bmg160.c 29 KB

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  1. /*
  2. * BMG160 Gyro Sensor driver
  3. * Copyright (c) 2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/slab.h>
  19. #include <linux/acpi.h>
  20. #include <linux/gpio/consumer.h>
  21. #include <linux/pm.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/iio/iio.h>
  24. #include <linux/iio/sysfs.h>
  25. #include <linux/iio/buffer.h>
  26. #include <linux/iio/trigger.h>
  27. #include <linux/iio/events.h>
  28. #include <linux/iio/trigger_consumer.h>
  29. #include <linux/iio/triggered_buffer.h>
  30. #define BMG160_DRV_NAME "bmg160"
  31. #define BMG160_IRQ_NAME "bmg160_event"
  32. #define BMG160_GPIO_NAME "gpio_int"
  33. #define BMG160_REG_CHIP_ID 0x00
  34. #define BMG160_CHIP_ID_VAL 0x0F
  35. #define BMG160_REG_PMU_LPW 0x11
  36. #define BMG160_MODE_NORMAL 0x00
  37. #define BMG160_MODE_DEEP_SUSPEND 0x20
  38. #define BMG160_MODE_SUSPEND 0x80
  39. #define BMG160_REG_RANGE 0x0F
  40. #define BMG160_RANGE_2000DPS 0
  41. #define BMG160_RANGE_1000DPS 1
  42. #define BMG160_RANGE_500DPS 2
  43. #define BMG160_RANGE_250DPS 3
  44. #define BMG160_RANGE_125DPS 4
  45. #define BMG160_REG_PMU_BW 0x10
  46. #define BMG160_NO_FILTER 0
  47. #define BMG160_DEF_BW 100
  48. #define BMG160_REG_INT_MAP_0 0x17
  49. #define BMG160_INT_MAP_0_BIT_ANY BIT(1)
  50. #define BMG160_REG_INT_MAP_1 0x18
  51. #define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
  52. #define BMG160_REG_INT_RST_LATCH 0x21
  53. #define BMG160_INT_MODE_LATCH_RESET 0x80
  54. #define BMG160_INT_MODE_LATCH_INT 0x0F
  55. #define BMG160_INT_MODE_NON_LATCH_INT 0x00
  56. #define BMG160_REG_INT_EN_0 0x15
  57. #define BMG160_DATA_ENABLE_INT BIT(7)
  58. #define BMG160_REG_INT_EN_1 0x16
  59. #define BMG160_INT1_BIT_OD BIT(1)
  60. #define BMG160_REG_XOUT_L 0x02
  61. #define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
  62. #define BMG160_REG_SLOPE_THRES 0x1B
  63. #define BMG160_SLOPE_THRES_MASK 0x0F
  64. #define BMG160_REG_MOTION_INTR 0x1C
  65. #define BMG160_INT_MOTION_X BIT(0)
  66. #define BMG160_INT_MOTION_Y BIT(1)
  67. #define BMG160_INT_MOTION_Z BIT(2)
  68. #define BMG160_ANY_DUR_MASK 0x30
  69. #define BMG160_ANY_DUR_SHIFT 4
  70. #define BMG160_REG_INT_STATUS_2 0x0B
  71. #define BMG160_ANY_MOTION_MASK 0x07
  72. #define BMG160_ANY_MOTION_BIT_X BIT(0)
  73. #define BMG160_ANY_MOTION_BIT_Y BIT(1)
  74. #define BMG160_ANY_MOTION_BIT_Z BIT(2)
  75. #define BMG160_REG_TEMP 0x08
  76. #define BMG160_TEMP_CENTER_VAL 23
  77. #define BMG160_MAX_STARTUP_TIME_MS 80
  78. #define BMG160_AUTO_SUSPEND_DELAY_MS 2000
  79. struct bmg160_data {
  80. struct i2c_client *client;
  81. struct iio_trigger *dready_trig;
  82. struct iio_trigger *motion_trig;
  83. struct mutex mutex;
  84. s16 buffer[8];
  85. u8 bw_bits;
  86. u32 dps_range;
  87. int ev_enable_state;
  88. int slope_thres;
  89. bool dready_trigger_on;
  90. bool motion_trigger_on;
  91. int64_t timestamp;
  92. };
  93. enum bmg160_axis {
  94. AXIS_X,
  95. AXIS_Y,
  96. AXIS_Z,
  97. };
  98. static const struct {
  99. int val;
  100. int bw_bits;
  101. } bmg160_samp_freq_table[] = { {100, 0x07},
  102. {200, 0x06},
  103. {400, 0x03},
  104. {1000, 0x02},
  105. {2000, 0x01} };
  106. static const struct {
  107. int scale;
  108. int dps_range;
  109. } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
  110. { 532, BMG160_RANGE_1000DPS},
  111. { 266, BMG160_RANGE_500DPS},
  112. { 133, BMG160_RANGE_250DPS},
  113. { 66, BMG160_RANGE_125DPS} };
  114. static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
  115. {
  116. int ret;
  117. ret = i2c_smbus_write_byte_data(data->client,
  118. BMG160_REG_PMU_LPW, mode);
  119. if (ret < 0) {
  120. dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
  121. return ret;
  122. }
  123. return 0;
  124. }
  125. static int bmg160_convert_freq_to_bit(int val)
  126. {
  127. int i;
  128. for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
  129. if (bmg160_samp_freq_table[i].val == val)
  130. return bmg160_samp_freq_table[i].bw_bits;
  131. }
  132. return -EINVAL;
  133. }
  134. static int bmg160_set_bw(struct bmg160_data *data, int val)
  135. {
  136. int ret;
  137. int bw_bits;
  138. bw_bits = bmg160_convert_freq_to_bit(val);
  139. if (bw_bits < 0)
  140. return bw_bits;
  141. ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
  142. bw_bits);
  143. if (ret < 0) {
  144. dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
  145. return ret;
  146. }
  147. data->bw_bits = bw_bits;
  148. return 0;
  149. }
  150. static int bmg160_chip_init(struct bmg160_data *data)
  151. {
  152. int ret;
  153. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
  154. if (ret < 0) {
  155. dev_err(&data->client->dev, "Error reading reg_chip_id\n");
  156. return ret;
  157. }
  158. dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
  159. if (ret != BMG160_CHIP_ID_VAL) {
  160. dev_err(&data->client->dev, "invalid chip %x\n", ret);
  161. return -ENODEV;
  162. }
  163. ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
  164. if (ret < 0)
  165. return ret;
  166. /* Wait upto 500 ms to be ready after changing mode */
  167. usleep_range(500, 1000);
  168. /* Set Bandwidth */
  169. ret = bmg160_set_bw(data, BMG160_DEF_BW);
  170. if (ret < 0)
  171. return ret;
  172. /* Set Default Range */
  173. ret = i2c_smbus_write_byte_data(data->client,
  174. BMG160_REG_RANGE,
  175. BMG160_RANGE_500DPS);
  176. if (ret < 0) {
  177. dev_err(&data->client->dev, "Error writing reg_range\n");
  178. return ret;
  179. }
  180. data->dps_range = BMG160_RANGE_500DPS;
  181. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
  182. if (ret < 0) {
  183. dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
  184. return ret;
  185. }
  186. data->slope_thres = ret;
  187. /* Set default interrupt mode */
  188. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_EN_1);
  189. if (ret < 0) {
  190. dev_err(&data->client->dev, "Error reading reg_int_en_1\n");
  191. return ret;
  192. }
  193. ret &= ~BMG160_INT1_BIT_OD;
  194. ret = i2c_smbus_write_byte_data(data->client,
  195. BMG160_REG_INT_EN_1, ret);
  196. if (ret < 0) {
  197. dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
  198. return ret;
  199. }
  200. ret = i2c_smbus_write_byte_data(data->client,
  201. BMG160_REG_INT_RST_LATCH,
  202. BMG160_INT_MODE_LATCH_INT |
  203. BMG160_INT_MODE_LATCH_RESET);
  204. if (ret < 0) {
  205. dev_err(&data->client->dev,
  206. "Error writing reg_motion_intr\n");
  207. return ret;
  208. }
  209. return 0;
  210. }
  211. static int bmg160_set_power_state(struct bmg160_data *data, bool on)
  212. {
  213. #ifdef CONFIG_PM_RUNTIME
  214. int ret;
  215. if (on)
  216. ret = pm_runtime_get_sync(&data->client->dev);
  217. else {
  218. pm_runtime_mark_last_busy(&data->client->dev);
  219. ret = pm_runtime_put_autosuspend(&data->client->dev);
  220. }
  221. if (ret < 0) {
  222. dev_err(&data->client->dev,
  223. "Failed: bmg160_set_power_state for %d\n", on);
  224. if (on)
  225. pm_runtime_put_noidle(&data->client->dev);
  226. return ret;
  227. }
  228. #endif
  229. return 0;
  230. }
  231. static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
  232. bool status)
  233. {
  234. int ret;
  235. /* Enable/Disable INT_MAP0 mapping */
  236. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_0);
  237. if (ret < 0) {
  238. dev_err(&data->client->dev, "Error reading reg_int_map0\n");
  239. return ret;
  240. }
  241. if (status)
  242. ret |= BMG160_INT_MAP_0_BIT_ANY;
  243. else
  244. ret &= ~BMG160_INT_MAP_0_BIT_ANY;
  245. ret = i2c_smbus_write_byte_data(data->client,
  246. BMG160_REG_INT_MAP_0,
  247. ret);
  248. if (ret < 0) {
  249. dev_err(&data->client->dev, "Error writing reg_int_map0\n");
  250. return ret;
  251. }
  252. /* Enable/Disable slope interrupts */
  253. if (status) {
  254. /* Update slope thres */
  255. ret = i2c_smbus_write_byte_data(data->client,
  256. BMG160_REG_SLOPE_THRES,
  257. data->slope_thres);
  258. if (ret < 0) {
  259. dev_err(&data->client->dev,
  260. "Error writing reg_slope_thres\n");
  261. return ret;
  262. }
  263. ret = i2c_smbus_write_byte_data(data->client,
  264. BMG160_REG_MOTION_INTR,
  265. BMG160_INT_MOTION_X |
  266. BMG160_INT_MOTION_Y |
  267. BMG160_INT_MOTION_Z);
  268. if (ret < 0) {
  269. dev_err(&data->client->dev,
  270. "Error writing reg_motion_intr\n");
  271. return ret;
  272. }
  273. /*
  274. * New data interrupt is always non-latched,
  275. * which will have higher priority, so no need
  276. * to set latched mode, we will be flooded anyway with INTR
  277. */
  278. if (!data->dready_trigger_on) {
  279. ret = i2c_smbus_write_byte_data(data->client,
  280. BMG160_REG_INT_RST_LATCH,
  281. BMG160_INT_MODE_LATCH_INT |
  282. BMG160_INT_MODE_LATCH_RESET);
  283. if (ret < 0) {
  284. dev_err(&data->client->dev,
  285. "Error writing reg_rst_latch\n");
  286. return ret;
  287. }
  288. }
  289. ret = i2c_smbus_write_byte_data(data->client,
  290. BMG160_REG_INT_EN_0,
  291. BMG160_DATA_ENABLE_INT);
  292. } else
  293. ret = i2c_smbus_write_byte_data(data->client,
  294. BMG160_REG_INT_EN_0,
  295. 0);
  296. if (ret < 0) {
  297. dev_err(&data->client->dev, "Error writing reg_int_en0\n");
  298. return ret;
  299. }
  300. return 0;
  301. }
  302. static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
  303. bool status)
  304. {
  305. int ret;
  306. /* Enable/Disable INT_MAP1 mapping */
  307. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
  308. if (ret < 0) {
  309. dev_err(&data->client->dev, "Error reading reg_int_map1\n");
  310. return ret;
  311. }
  312. if (status)
  313. ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
  314. else
  315. ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
  316. ret = i2c_smbus_write_byte_data(data->client,
  317. BMG160_REG_INT_MAP_1,
  318. ret);
  319. if (ret < 0) {
  320. dev_err(&data->client->dev, "Error writing reg_int_map1\n");
  321. return ret;
  322. }
  323. if (status) {
  324. ret = i2c_smbus_write_byte_data(data->client,
  325. BMG160_REG_INT_RST_LATCH,
  326. BMG160_INT_MODE_NON_LATCH_INT |
  327. BMG160_INT_MODE_LATCH_RESET);
  328. if (ret < 0) {
  329. dev_err(&data->client->dev,
  330. "Error writing reg_rst_latch\n");
  331. return ret;
  332. }
  333. ret = i2c_smbus_write_byte_data(data->client,
  334. BMG160_REG_INT_EN_0,
  335. BMG160_DATA_ENABLE_INT);
  336. } else {
  337. /* Restore interrupt mode */
  338. ret = i2c_smbus_write_byte_data(data->client,
  339. BMG160_REG_INT_RST_LATCH,
  340. BMG160_INT_MODE_LATCH_INT |
  341. BMG160_INT_MODE_LATCH_RESET);
  342. if (ret < 0) {
  343. dev_err(&data->client->dev,
  344. "Error writing reg_rst_latch\n");
  345. return ret;
  346. }
  347. ret = i2c_smbus_write_byte_data(data->client,
  348. BMG160_REG_INT_EN_0,
  349. 0);
  350. }
  351. if (ret < 0) {
  352. dev_err(&data->client->dev, "Error writing reg_int_en0\n");
  353. return ret;
  354. }
  355. return 0;
  356. }
  357. static int bmg160_get_bw(struct bmg160_data *data, int *val)
  358. {
  359. int i;
  360. for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
  361. if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
  362. *val = bmg160_samp_freq_table[i].val;
  363. return IIO_VAL_INT;
  364. }
  365. }
  366. return -EINVAL;
  367. }
  368. static int bmg160_set_scale(struct bmg160_data *data, int val)
  369. {
  370. int ret, i;
  371. for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
  372. if (bmg160_scale_table[i].scale == val) {
  373. ret = i2c_smbus_write_byte_data(
  374. data->client,
  375. BMG160_REG_RANGE,
  376. bmg160_scale_table[i].dps_range);
  377. if (ret < 0) {
  378. dev_err(&data->client->dev,
  379. "Error writing reg_range\n");
  380. return ret;
  381. }
  382. data->dps_range = bmg160_scale_table[i].dps_range;
  383. return 0;
  384. }
  385. }
  386. return -EINVAL;
  387. }
  388. static int bmg160_get_temp(struct bmg160_data *data, int *val)
  389. {
  390. int ret;
  391. mutex_lock(&data->mutex);
  392. ret = bmg160_set_power_state(data, true);
  393. if (ret < 0) {
  394. mutex_unlock(&data->mutex);
  395. return ret;
  396. }
  397. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
  398. if (ret < 0) {
  399. dev_err(&data->client->dev, "Error reading reg_temp\n");
  400. bmg160_set_power_state(data, false);
  401. mutex_unlock(&data->mutex);
  402. return ret;
  403. }
  404. *val = sign_extend32(ret, 7);
  405. ret = bmg160_set_power_state(data, false);
  406. mutex_unlock(&data->mutex);
  407. if (ret < 0)
  408. return ret;
  409. return IIO_VAL_INT;
  410. }
  411. static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
  412. {
  413. int ret;
  414. mutex_lock(&data->mutex);
  415. ret = bmg160_set_power_state(data, true);
  416. if (ret < 0) {
  417. mutex_unlock(&data->mutex);
  418. return ret;
  419. }
  420. ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
  421. if (ret < 0) {
  422. dev_err(&data->client->dev, "Error reading axis %d\n", axis);
  423. bmg160_set_power_state(data, false);
  424. mutex_unlock(&data->mutex);
  425. return ret;
  426. }
  427. *val = sign_extend32(ret, 15);
  428. ret = bmg160_set_power_state(data, false);
  429. mutex_unlock(&data->mutex);
  430. if (ret < 0)
  431. return ret;
  432. return IIO_VAL_INT;
  433. }
  434. static int bmg160_read_raw(struct iio_dev *indio_dev,
  435. struct iio_chan_spec const *chan,
  436. int *val, int *val2, long mask)
  437. {
  438. struct bmg160_data *data = iio_priv(indio_dev);
  439. int ret;
  440. switch (mask) {
  441. case IIO_CHAN_INFO_RAW:
  442. switch (chan->type) {
  443. case IIO_TEMP:
  444. return bmg160_get_temp(data, val);
  445. case IIO_ANGL_VEL:
  446. if (iio_buffer_enabled(indio_dev))
  447. return -EBUSY;
  448. else
  449. return bmg160_get_axis(data, chan->scan_index,
  450. val);
  451. default:
  452. return -EINVAL;
  453. }
  454. case IIO_CHAN_INFO_OFFSET:
  455. if (chan->type == IIO_TEMP) {
  456. *val = BMG160_TEMP_CENTER_VAL;
  457. return IIO_VAL_INT;
  458. } else
  459. return -EINVAL;
  460. case IIO_CHAN_INFO_SCALE:
  461. *val = 0;
  462. switch (chan->type) {
  463. case IIO_TEMP:
  464. *val2 = 500000;
  465. return IIO_VAL_INT_PLUS_MICRO;
  466. case IIO_ANGL_VEL:
  467. {
  468. int i;
  469. for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
  470. if (bmg160_scale_table[i].dps_range ==
  471. data->dps_range) {
  472. *val2 = bmg160_scale_table[i].scale;
  473. return IIO_VAL_INT_PLUS_MICRO;
  474. }
  475. }
  476. return -EINVAL;
  477. }
  478. default:
  479. return -EINVAL;
  480. }
  481. case IIO_CHAN_INFO_SAMP_FREQ:
  482. *val2 = 0;
  483. mutex_lock(&data->mutex);
  484. ret = bmg160_get_bw(data, val);
  485. mutex_unlock(&data->mutex);
  486. return ret;
  487. default:
  488. return -EINVAL;
  489. }
  490. }
  491. static int bmg160_write_raw(struct iio_dev *indio_dev,
  492. struct iio_chan_spec const *chan,
  493. int val, int val2, long mask)
  494. {
  495. struct bmg160_data *data = iio_priv(indio_dev);
  496. int ret;
  497. switch (mask) {
  498. case IIO_CHAN_INFO_SAMP_FREQ:
  499. mutex_lock(&data->mutex);
  500. /*
  501. * Section 4.2 of spec
  502. * In suspend mode, the only supported operations are reading
  503. * registers as well as writing to the (0x14) softreset
  504. * register. Since we will be in suspend mode by default, change
  505. * mode to power on for other writes.
  506. */
  507. ret = bmg160_set_power_state(data, true);
  508. if (ret < 0) {
  509. mutex_unlock(&data->mutex);
  510. return ret;
  511. }
  512. ret = bmg160_set_bw(data, val);
  513. if (ret < 0) {
  514. bmg160_set_power_state(data, false);
  515. mutex_unlock(&data->mutex);
  516. return ret;
  517. }
  518. ret = bmg160_set_power_state(data, false);
  519. mutex_unlock(&data->mutex);
  520. return ret;
  521. case IIO_CHAN_INFO_SCALE:
  522. if (val)
  523. return -EINVAL;
  524. mutex_lock(&data->mutex);
  525. /* Refer to comments above for the suspend mode ops */
  526. ret = bmg160_set_power_state(data, true);
  527. if (ret < 0) {
  528. mutex_unlock(&data->mutex);
  529. return ret;
  530. }
  531. ret = bmg160_set_scale(data, val2);
  532. if (ret < 0) {
  533. bmg160_set_power_state(data, false);
  534. mutex_unlock(&data->mutex);
  535. return ret;
  536. }
  537. ret = bmg160_set_power_state(data, false);
  538. mutex_unlock(&data->mutex);
  539. return ret;
  540. default:
  541. return -EINVAL;
  542. }
  543. return -EINVAL;
  544. }
  545. static int bmg160_read_event(struct iio_dev *indio_dev,
  546. const struct iio_chan_spec *chan,
  547. enum iio_event_type type,
  548. enum iio_event_direction dir,
  549. enum iio_event_info info,
  550. int *val, int *val2)
  551. {
  552. struct bmg160_data *data = iio_priv(indio_dev);
  553. *val2 = 0;
  554. switch (info) {
  555. case IIO_EV_INFO_VALUE:
  556. *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
  557. break;
  558. default:
  559. return -EINVAL;
  560. }
  561. return IIO_VAL_INT;
  562. }
  563. static int bmg160_write_event(struct iio_dev *indio_dev,
  564. const struct iio_chan_spec *chan,
  565. enum iio_event_type type,
  566. enum iio_event_direction dir,
  567. enum iio_event_info info,
  568. int val, int val2)
  569. {
  570. struct bmg160_data *data = iio_priv(indio_dev);
  571. switch (info) {
  572. case IIO_EV_INFO_VALUE:
  573. if (data->ev_enable_state)
  574. return -EBUSY;
  575. data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
  576. data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
  577. break;
  578. default:
  579. return -EINVAL;
  580. }
  581. return 0;
  582. }
  583. static int bmg160_read_event_config(struct iio_dev *indio_dev,
  584. const struct iio_chan_spec *chan,
  585. enum iio_event_type type,
  586. enum iio_event_direction dir)
  587. {
  588. struct bmg160_data *data = iio_priv(indio_dev);
  589. return data->ev_enable_state;
  590. }
  591. static int bmg160_write_event_config(struct iio_dev *indio_dev,
  592. const struct iio_chan_spec *chan,
  593. enum iio_event_type type,
  594. enum iio_event_direction dir,
  595. int state)
  596. {
  597. struct bmg160_data *data = iio_priv(indio_dev);
  598. int ret;
  599. if (state && data->ev_enable_state)
  600. return 0;
  601. mutex_lock(&data->mutex);
  602. if (!state && data->motion_trigger_on) {
  603. data->ev_enable_state = 0;
  604. mutex_unlock(&data->mutex);
  605. return 0;
  606. }
  607. /*
  608. * We will expect the enable and disable to do operation in
  609. * in reverse order. This will happen here anyway as our
  610. * resume operation uses sync mode runtime pm calls, the
  611. * suspend operation will be delayed by autosuspend delay
  612. * So the disable operation will still happen in reverse of
  613. * enable operation. When runtime pm is disabled the mode
  614. * is always on so sequence doesn't matter
  615. */
  616. ret = bmg160_set_power_state(data, state);
  617. if (ret < 0) {
  618. mutex_unlock(&data->mutex);
  619. return ret;
  620. }
  621. ret = bmg160_setup_any_motion_interrupt(data, state);
  622. if (ret < 0) {
  623. bmg160_set_power_state(data, false);
  624. mutex_unlock(&data->mutex);
  625. return ret;
  626. }
  627. data->ev_enable_state = state;
  628. mutex_unlock(&data->mutex);
  629. return 0;
  630. }
  631. static int bmg160_validate_trigger(struct iio_dev *indio_dev,
  632. struct iio_trigger *trig)
  633. {
  634. struct bmg160_data *data = iio_priv(indio_dev);
  635. if (data->dready_trig != trig && data->motion_trig != trig)
  636. return -EINVAL;
  637. return 0;
  638. }
  639. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
  640. static IIO_CONST_ATTR(in_anglvel_scale_available,
  641. "0.001065 0.000532 0.000266 0.000133 0.000066");
  642. static struct attribute *bmg160_attributes[] = {
  643. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  644. &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
  645. NULL,
  646. };
  647. static const struct attribute_group bmg160_attrs_group = {
  648. .attrs = bmg160_attributes,
  649. };
  650. static const struct iio_event_spec bmg160_event = {
  651. .type = IIO_EV_TYPE_ROC,
  652. .dir = IIO_EV_DIR_EITHER,
  653. .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
  654. BIT(IIO_EV_INFO_ENABLE)
  655. };
  656. #define BMG160_CHANNEL(_axis) { \
  657. .type = IIO_ANGL_VEL, \
  658. .modified = 1, \
  659. .channel2 = IIO_MOD_##_axis, \
  660. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  661. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  662. BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  663. .scan_index = AXIS_##_axis, \
  664. .scan_type = { \
  665. .sign = 's', \
  666. .realbits = 16, \
  667. .storagebits = 16, \
  668. }, \
  669. .event_spec = &bmg160_event, \
  670. .num_event_specs = 1 \
  671. }
  672. static const struct iio_chan_spec bmg160_channels[] = {
  673. {
  674. .type = IIO_TEMP,
  675. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  676. BIT(IIO_CHAN_INFO_SCALE) |
  677. BIT(IIO_CHAN_INFO_OFFSET),
  678. .scan_index = -1,
  679. },
  680. BMG160_CHANNEL(X),
  681. BMG160_CHANNEL(Y),
  682. BMG160_CHANNEL(Z),
  683. IIO_CHAN_SOFT_TIMESTAMP(3),
  684. };
  685. static const struct iio_info bmg160_info = {
  686. .attrs = &bmg160_attrs_group,
  687. .read_raw = bmg160_read_raw,
  688. .write_raw = bmg160_write_raw,
  689. .read_event_value = bmg160_read_event,
  690. .write_event_value = bmg160_write_event,
  691. .write_event_config = bmg160_write_event_config,
  692. .read_event_config = bmg160_read_event_config,
  693. .validate_trigger = bmg160_validate_trigger,
  694. .driver_module = THIS_MODULE,
  695. };
  696. static irqreturn_t bmg160_trigger_handler(int irq, void *p)
  697. {
  698. struct iio_poll_func *pf = p;
  699. struct iio_dev *indio_dev = pf->indio_dev;
  700. struct bmg160_data *data = iio_priv(indio_dev);
  701. int bit, ret, i = 0;
  702. mutex_lock(&data->mutex);
  703. for_each_set_bit(bit, indio_dev->buffer->scan_mask,
  704. indio_dev->masklength) {
  705. ret = i2c_smbus_read_word_data(data->client,
  706. BMG160_AXIS_TO_REG(bit));
  707. if (ret < 0) {
  708. mutex_unlock(&data->mutex);
  709. goto err;
  710. }
  711. data->buffer[i++] = ret;
  712. }
  713. mutex_unlock(&data->mutex);
  714. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  715. data->timestamp);
  716. err:
  717. iio_trigger_notify_done(indio_dev->trig);
  718. return IRQ_HANDLED;
  719. }
  720. static int bmg160_trig_try_reen(struct iio_trigger *trig)
  721. {
  722. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  723. struct bmg160_data *data = iio_priv(indio_dev);
  724. int ret;
  725. /* new data interrupts don't need ack */
  726. if (data->dready_trigger_on)
  727. return 0;
  728. /* Set latched mode interrupt and clear any latched interrupt */
  729. ret = i2c_smbus_write_byte_data(data->client,
  730. BMG160_REG_INT_RST_LATCH,
  731. BMG160_INT_MODE_LATCH_INT |
  732. BMG160_INT_MODE_LATCH_RESET);
  733. if (ret < 0) {
  734. dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
  735. return ret;
  736. }
  737. return 0;
  738. }
  739. static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
  740. bool state)
  741. {
  742. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  743. struct bmg160_data *data = iio_priv(indio_dev);
  744. int ret;
  745. mutex_lock(&data->mutex);
  746. if (!state && data->ev_enable_state && data->motion_trigger_on) {
  747. data->motion_trigger_on = false;
  748. mutex_unlock(&data->mutex);
  749. return 0;
  750. }
  751. /*
  752. * Refer to comment in bmg160_write_event_config for
  753. * enable/disable operation order
  754. */
  755. ret = bmg160_set_power_state(data, state);
  756. if (ret < 0) {
  757. mutex_unlock(&data->mutex);
  758. return ret;
  759. }
  760. if (data->motion_trig == trig)
  761. ret = bmg160_setup_any_motion_interrupt(data, state);
  762. else
  763. ret = bmg160_setup_new_data_interrupt(data, state);
  764. if (ret < 0) {
  765. bmg160_set_power_state(data, false);
  766. mutex_unlock(&data->mutex);
  767. return ret;
  768. }
  769. if (data->motion_trig == trig)
  770. data->motion_trigger_on = state;
  771. else
  772. data->dready_trigger_on = state;
  773. mutex_unlock(&data->mutex);
  774. return 0;
  775. }
  776. static const struct iio_trigger_ops bmg160_trigger_ops = {
  777. .set_trigger_state = bmg160_data_rdy_trigger_set_state,
  778. .try_reenable = bmg160_trig_try_reen,
  779. .owner = THIS_MODULE,
  780. };
  781. static irqreturn_t bmg160_event_handler(int irq, void *private)
  782. {
  783. struct iio_dev *indio_dev = private;
  784. struct bmg160_data *data = iio_priv(indio_dev);
  785. int ret;
  786. int dir;
  787. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
  788. if (ret < 0) {
  789. dev_err(&data->client->dev, "Error reading reg_int_status2\n");
  790. goto ack_intr_status;
  791. }
  792. if (ret & 0x08)
  793. dir = IIO_EV_DIR_RISING;
  794. else
  795. dir = IIO_EV_DIR_FALLING;
  796. if (ret & BMG160_ANY_MOTION_BIT_X)
  797. iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
  798. 0,
  799. IIO_MOD_X,
  800. IIO_EV_TYPE_ROC,
  801. dir),
  802. data->timestamp);
  803. if (ret & BMG160_ANY_MOTION_BIT_Y)
  804. iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
  805. 0,
  806. IIO_MOD_Y,
  807. IIO_EV_TYPE_ROC,
  808. dir),
  809. data->timestamp);
  810. if (ret & BMG160_ANY_MOTION_BIT_Z)
  811. iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
  812. 0,
  813. IIO_MOD_Z,
  814. IIO_EV_TYPE_ROC,
  815. dir),
  816. data->timestamp);
  817. ack_intr_status:
  818. if (!data->dready_trigger_on) {
  819. ret = i2c_smbus_write_byte_data(data->client,
  820. BMG160_REG_INT_RST_LATCH,
  821. BMG160_INT_MODE_LATCH_INT |
  822. BMG160_INT_MODE_LATCH_RESET);
  823. if (ret < 0)
  824. dev_err(&data->client->dev,
  825. "Error writing reg_rst_latch\n");
  826. }
  827. return IRQ_HANDLED;
  828. }
  829. static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
  830. {
  831. struct iio_dev *indio_dev = private;
  832. struct bmg160_data *data = iio_priv(indio_dev);
  833. data->timestamp = iio_get_time_ns();
  834. if (data->dready_trigger_on)
  835. iio_trigger_poll(data->dready_trig);
  836. else if (data->motion_trigger_on)
  837. iio_trigger_poll(data->motion_trig);
  838. if (data->ev_enable_state)
  839. return IRQ_WAKE_THREAD;
  840. else
  841. return IRQ_HANDLED;
  842. }
  843. static int bmg160_gpio_probe(struct i2c_client *client,
  844. struct bmg160_data *data)
  845. {
  846. struct device *dev;
  847. struct gpio_desc *gpio;
  848. int ret;
  849. if (!client)
  850. return -EINVAL;
  851. dev = &client->dev;
  852. /* data ready gpio interrupt pin */
  853. gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0);
  854. if (IS_ERR(gpio)) {
  855. dev_err(dev, "acpi gpio get index failed\n");
  856. return PTR_ERR(gpio);
  857. }
  858. ret = gpiod_direction_input(gpio);
  859. if (ret)
  860. return ret;
  861. ret = gpiod_to_irq(gpio);
  862. dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
  863. return ret;
  864. }
  865. static const char *bmg160_match_acpi_device(struct device *dev)
  866. {
  867. const struct acpi_device_id *id;
  868. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  869. if (!id)
  870. return NULL;
  871. return dev_name(dev);
  872. }
  873. static int bmg160_probe(struct i2c_client *client,
  874. const struct i2c_device_id *id)
  875. {
  876. struct bmg160_data *data;
  877. struct iio_dev *indio_dev;
  878. int ret;
  879. const char *name = NULL;
  880. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  881. if (!indio_dev)
  882. return -ENOMEM;
  883. data = iio_priv(indio_dev);
  884. i2c_set_clientdata(client, indio_dev);
  885. data->client = client;
  886. ret = bmg160_chip_init(data);
  887. if (ret < 0)
  888. return ret;
  889. mutex_init(&data->mutex);
  890. if (id)
  891. name = id->name;
  892. if (ACPI_HANDLE(&client->dev))
  893. name = bmg160_match_acpi_device(&client->dev);
  894. indio_dev->dev.parent = &client->dev;
  895. indio_dev->channels = bmg160_channels;
  896. indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
  897. indio_dev->name = name;
  898. indio_dev->modes = INDIO_DIRECT_MODE;
  899. indio_dev->info = &bmg160_info;
  900. if (client->irq <= 0)
  901. client->irq = bmg160_gpio_probe(client, data);
  902. if (client->irq > 0) {
  903. ret = devm_request_threaded_irq(&client->dev,
  904. client->irq,
  905. bmg160_data_rdy_trig_poll,
  906. bmg160_event_handler,
  907. IRQF_TRIGGER_RISING,
  908. BMG160_IRQ_NAME,
  909. indio_dev);
  910. if (ret)
  911. return ret;
  912. data->dready_trig = devm_iio_trigger_alloc(&client->dev,
  913. "%s-dev%d",
  914. indio_dev->name,
  915. indio_dev->id);
  916. if (!data->dready_trig)
  917. return -ENOMEM;
  918. data->motion_trig = devm_iio_trigger_alloc(&client->dev,
  919. "%s-any-motion-dev%d",
  920. indio_dev->name,
  921. indio_dev->id);
  922. if (!data->motion_trig)
  923. return -ENOMEM;
  924. data->dready_trig->dev.parent = &client->dev;
  925. data->dready_trig->ops = &bmg160_trigger_ops;
  926. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  927. ret = iio_trigger_register(data->dready_trig);
  928. if (ret)
  929. return ret;
  930. data->motion_trig->dev.parent = &client->dev;
  931. data->motion_trig->ops = &bmg160_trigger_ops;
  932. iio_trigger_set_drvdata(data->motion_trig, indio_dev);
  933. ret = iio_trigger_register(data->motion_trig);
  934. if (ret) {
  935. data->motion_trig = NULL;
  936. goto err_trigger_unregister;
  937. }
  938. ret = iio_triggered_buffer_setup(indio_dev,
  939. NULL,
  940. bmg160_trigger_handler,
  941. NULL);
  942. if (ret < 0) {
  943. dev_err(&client->dev,
  944. "iio triggered buffer setup failed\n");
  945. goto err_trigger_unregister;
  946. }
  947. }
  948. ret = iio_device_register(indio_dev);
  949. if (ret < 0) {
  950. dev_err(&client->dev, "unable to register iio device\n");
  951. goto err_buffer_cleanup;
  952. }
  953. ret = pm_runtime_set_active(&client->dev);
  954. if (ret)
  955. goto err_iio_unregister;
  956. pm_runtime_enable(&client->dev);
  957. pm_runtime_set_autosuspend_delay(&client->dev,
  958. BMG160_AUTO_SUSPEND_DELAY_MS);
  959. pm_runtime_use_autosuspend(&client->dev);
  960. return 0;
  961. err_iio_unregister:
  962. iio_device_unregister(indio_dev);
  963. err_buffer_cleanup:
  964. if (data->dready_trig)
  965. iio_triggered_buffer_cleanup(indio_dev);
  966. err_trigger_unregister:
  967. if (data->dready_trig)
  968. iio_trigger_unregister(data->dready_trig);
  969. if (data->motion_trig)
  970. iio_trigger_unregister(data->motion_trig);
  971. return ret;
  972. }
  973. static int bmg160_remove(struct i2c_client *client)
  974. {
  975. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  976. struct bmg160_data *data = iio_priv(indio_dev);
  977. pm_runtime_disable(&client->dev);
  978. pm_runtime_set_suspended(&client->dev);
  979. pm_runtime_put_noidle(&client->dev);
  980. iio_device_unregister(indio_dev);
  981. if (data->dready_trig) {
  982. iio_triggered_buffer_cleanup(indio_dev);
  983. iio_trigger_unregister(data->dready_trig);
  984. iio_trigger_unregister(data->motion_trig);
  985. }
  986. mutex_lock(&data->mutex);
  987. bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
  988. mutex_unlock(&data->mutex);
  989. return 0;
  990. }
  991. #ifdef CONFIG_PM_SLEEP
  992. static int bmg160_suspend(struct device *dev)
  993. {
  994. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  995. struct bmg160_data *data = iio_priv(indio_dev);
  996. mutex_lock(&data->mutex);
  997. bmg160_set_mode(data, BMG160_MODE_SUSPEND);
  998. mutex_unlock(&data->mutex);
  999. return 0;
  1000. }
  1001. static int bmg160_resume(struct device *dev)
  1002. {
  1003. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1004. struct bmg160_data *data = iio_priv(indio_dev);
  1005. mutex_lock(&data->mutex);
  1006. if (data->dready_trigger_on || data->motion_trigger_on ||
  1007. data->ev_enable_state)
  1008. bmg160_set_mode(data, BMG160_MODE_NORMAL);
  1009. mutex_unlock(&data->mutex);
  1010. return 0;
  1011. }
  1012. #endif
  1013. #ifdef CONFIG_PM_RUNTIME
  1014. static int bmg160_runtime_suspend(struct device *dev)
  1015. {
  1016. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1017. struct bmg160_data *data = iio_priv(indio_dev);
  1018. int ret;
  1019. ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
  1020. if (ret < 0) {
  1021. dev_err(&data->client->dev, "set mode failed\n");
  1022. return -EAGAIN;
  1023. }
  1024. return 0;
  1025. }
  1026. static int bmg160_runtime_resume(struct device *dev)
  1027. {
  1028. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1029. struct bmg160_data *data = iio_priv(indio_dev);
  1030. int ret;
  1031. ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
  1032. if (ret < 0)
  1033. return ret;
  1034. msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
  1035. return 0;
  1036. }
  1037. #endif
  1038. static const struct dev_pm_ops bmg160_pm_ops = {
  1039. SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
  1040. SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
  1041. bmg160_runtime_resume, NULL)
  1042. };
  1043. static const struct acpi_device_id bmg160_acpi_match[] = {
  1044. {"BMG0160", 0},
  1045. {"BMI055B", 0},
  1046. {},
  1047. };
  1048. MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
  1049. static const struct i2c_device_id bmg160_id[] = {
  1050. {"bmg160", 0},
  1051. {"bmi055_gyro", 0},
  1052. {}
  1053. };
  1054. MODULE_DEVICE_TABLE(i2c, bmg160_id);
  1055. static struct i2c_driver bmg160_driver = {
  1056. .driver = {
  1057. .name = BMG160_DRV_NAME,
  1058. .acpi_match_table = ACPI_PTR(bmg160_acpi_match),
  1059. .pm = &bmg160_pm_ops,
  1060. },
  1061. .probe = bmg160_probe,
  1062. .remove = bmg160_remove,
  1063. .id_table = bmg160_id,
  1064. };
  1065. module_i2c_driver(bmg160_driver);
  1066. MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
  1067. MODULE_LICENSE("GPL v2");
  1068. MODULE_DESCRIPTION("BMG160 Gyro driver");