focaltech_flash.c 103 KB

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  1. /*
  2. *
  3. * FocalTech fts TouchScreen driver.
  4. *
  5. * Copyright (c) 2010-2015, Focaltech Ltd. All rights reserved.
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. /*******************************************************************************
  18. *
  19. * File Name: Focaltech_IC_Program.c
  20. *
  21. * Author: Xu YongFeng
  22. *
  23. * Created: 2015-01-29
  24. *
  25. * Modify by mshl on 2015-10-26
  26. *
  27. * Abstract:
  28. *
  29. * Reference:
  30. *
  31. *******************************************************************************/
  32. /*******************************************************************************
  33. * 1.Included header files
  34. *******************************************************************************/
  35. #include "focaltech_core.h"
  36. #include "tpd_custom_upgrade.h"
  37. /*******************************************************************************
  38. * Private constant and macro definitions using #define
  39. *******************************************************************************/
  40. #define FTS_REG_FW_MAJ_VER 0xB1
  41. #define FTS_REG_FW_MIN_VER 0xB2
  42. #define FTS_REG_FW_SUB_MIN_VER 0xB3
  43. #define FTS_FW_MIN_SIZE 8
  44. #define FTS_FW_MAX_SIZE (54 * 1024)
  45. /* Firmware file is not supporting minor and sub minor so use 0 */
  46. #define FTS_FW_FILE_MAJ_VER(x) ((x)->data[(x)->size - 2])
  47. #define FTS_FW_FILE_MIN_VER(x) 0
  48. #define FTS_FW_FILE_SUB_MIN_VER(x) 0
  49. #define FTS_FW_FILE_VENDOR_ID(x) ((x)->data[(x)->size - 1])
  50. #define FTS_FW_FILE_MAJ_VER_FT6X36(x) ((x)->data[0x10a])
  51. #define FTS_FW_FILE_VENDOR_ID_FT6X36(x) ((x)->data[0x108])
  52. #define FTS_MAX_TRIES 5
  53. #define FTS_RETRY_DLY 20
  54. #define FTS_MAX_WR_BUF 10
  55. #define FTS_MAX_RD_BUF 2
  56. #define FTS_FW_PKT_META_LEN 6
  57. #define FTS_FW_PKT_DLY_MS 20
  58. #define FTS_FW_LAST_PKT 0x6ffa
  59. #define FTS_EARSE_DLY_MS 100
  60. #define FTS_55_AA_DLY_NS 5000
  61. #define FTS_CAL_START 0x04
  62. #define FTS_CAL_FIN 0x00
  63. #define FTS_CAL_STORE 0x05
  64. #define FTS_CAL_RETRY 100
  65. #define FTS_REG_CAL 0x00
  66. #define FTS_CAL_MASK 0x70
  67. #define FTS_BLOADER_SIZE_OFF 12
  68. #define FTS_BLOADER_NEW_SIZE 30
  69. #define FTS_DATA_LEN_OFF_OLD_FW 8
  70. #define FTS_DATA_LEN_OFF_NEW_FW 14
  71. #define FTS_FINISHING_PKT_LEN_OLD_FW 6
  72. #define FTS_FINISHING_PKT_LEN_NEW_FW 12
  73. #define FTS_MAGIC_BLOADER_Z7 0x7bfa
  74. #define FTS_MAGIC_BLOADER_LZ4 0x6ffa
  75. #define FTS_MAGIC_BLOADER_GZF_30 0x7ff4
  76. #define FTS_MAGIC_BLOADER_GZF 0x7bf4
  77. #define FTS_REG_ECC 0xCC
  78. #define FTS_RST_CMD_REG2 0xBC
  79. #define FTS_READ_ID_REG 0x90
  80. #define FTS_ERASE_APP_REG 0x61
  81. #define FTS_ERASE_PARAMS_CMD 0x63
  82. #define FTS_FW_WRITE_CMD 0xBF
  83. #define FTS_REG_RESET_FW 0x07
  84. #define FTS_RST_CMD_REG1 0xFC
  85. #define FTS_FACTORYMODE_VALUE 0x40
  86. #define FTS_WORKMODE_VALUE 0x00
  87. #define FTS_APP_INFO_ADDR 0xd7f8
  88. #define BL_VERSION_LZ4 0
  89. #define BL_VERSION_Z7 1
  90. #define BL_VERSION_GZF 2
  91. #define FTS_REG_ID 0xA3
  92. #define FTS_REG_FW_VENDOR_ID 0xA8
  93. #define FTS_PACKET_LENGTH 128
  94. #define FTS_SETTING_BUF_LEN 128
  95. #define FTS_UPGRADE_LOOP 30
  96. #define FTS_MAX_POINTS_2 2
  97. #define FTS_MAX_POINTS_5 5
  98. #define FTS_MAX_POINTS_10 10
  99. #define AUTO_CLB_NEED 1
  100. #define AUTO_CLB_NONEED 0
  101. #define FTS_UPGRADE_AA 0xAA
  102. #define FTS_UPGRADE_55 0x55
  103. #define HIDTOI2C_DISABLE 0
  104. #define FTXXXX_INI_FILEPATH_CONFIG ""
  105. /*******************************************************************************
  106. * Private enumerations, structures and unions using typedef
  107. *******************************************************************************/
  108. /*******************************************************************************
  109. * Static variables
  110. *******************************************************************************/
  111. //static unsigned char CTPM_FW[] = {
  112. // #include "HQ_AW875_FT3427_DJ_A.08.02_V1.0_V02_D01_20151204_app.i"
  113. //};
  114. static unsigned char aucFW_PRAM_BOOT[] = {
  115. //#include "FT8xx6_Pramboot_Vx.x_xxxx.i"
  116. };
  117. struct fts_Upgrade_Info fts_updateinfo[] =
  118. {
  119. {0x58,FTS_MAX_POINTS_10,AUTO_CLB_NONEED,2, 2, 0x58, 0x2c, 20, 2000},//"FT5822"
  120. {0x54,FTS_MAX_POINTS_5,AUTO_CLB_NONEED,2, 2, 0x54, 0x2c, 20, 2000}, //,"FT5x46"
  121. {0x55,FTS_MAX_POINTS_5,AUTO_CLB_NEED,50, 30, 0x79, 0x03, 10, 2000}, //,"FT5x06"
  122. {0x08,FTS_MAX_POINTS_5,AUTO_CLB_NEED,50, 10, 0x79, 0x06, 100, 2000}, //,"FT5606"
  123. {0x0a,FTS_MAX_POINTS_5,AUTO_CLB_NEED,50, 30, 0x79, 0x07, 10, 1500}, //,"FT5x16"
  124. {0x06,FTS_MAX_POINTS_2,AUTO_CLB_NONEED,100, 30, 0x79, 0x08, 10, 2000}, //,"FT6x06"
  125. {0x36,FTS_MAX_POINTS_2,AUTO_CLB_NONEED,10, 10, 0x79, 0x18, 10, 2000}, //,"FT6x36"
  126. {0x64,FTS_MAX_POINTS_2,AUTO_CLB_NONEED,10, 10, 0x79, 0x1c, 10, 2000}, //,"FT6336GU"
  127. {0x55,FTS_MAX_POINTS_5,AUTO_CLB_NEED,50, 30, 0x79, 0x03, 10, 2000}, //,"FT5x06i"
  128. {0x14,FTS_MAX_POINTS_5,AUTO_CLB_NONEED,30, 30, 0x79, 0x11, 10, 2000}, //,"FT5336"
  129. {0x13,FTS_MAX_POINTS_5,AUTO_CLB_NONEED,30, 30, 0x79, 0x11, 10, 2000}, //,"FT3316"
  130. {0x12,FTS_MAX_POINTS_5,AUTO_CLB_NONEED,30, 30, 0x79, 0x11, 10, 2000}, //,"FT5436i"
  131. {0x11,FTS_MAX_POINTS_5,AUTO_CLB_NONEED,30, 30, 0x79, 0x11, 10, 2000}, //,"FT5336i"
  132. {0x59,FTS_MAX_POINTS_10,AUTO_CLB_NONEED,30, 50, 0x79, 0x10, 1, 2000},//"FT5x26"
  133. {0x86,FTS_MAX_POINTS_10,AUTO_CLB_NONEED,2, 2, 0x86, 0xA6, 20, 2000},//"FT8606"
  134. {0x87,FTS_MAX_POINTS_10,AUTO_CLB_NONEED,2, 2, 0x87, 0xA6, 20, 2000},//"FT8716"
  135. {0x0E,FTS_MAX_POINTS_2,AUTO_CLB_NONEED,10, 10, 0x79, 0x18, 10, 2000}, //,"FT3x07"
  136. };
  137. /*******************************************************************************
  138. * Global variable or extern global variabls/functions
  139. *******************************************************************************/
  140. struct fts_Upgrade_Info fts_updateinfo_curr;
  141. static int btn_fw_flag = 0;
  142. /*******************************************************************************
  143. * Static function prototypes
  144. *******************************************************************************/
  145. int fts_6x36_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth);
  146. int fts_6336GU_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth);
  147. int fts_6x06_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth);
  148. int fts_5x36_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth);
  149. int fts_5x06_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth);
  150. int fts_5x46_ctpm_fw_upgrade(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth);
  151. int fts_5822_ctpm_fw_upgrade(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth);
  152. int fts_5x26_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth);
  153. int fts_8606_writepram(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth);
  154. int fts_8606_ctpm_fw_upgrade(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth);
  155. int fts_8716_ctpm_fw_upgrade(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth);
  156. int fts_8716_writepram(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth);
  157. int fts_3x07_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth);
  158. int hidi2c_to_stdi2c(struct i2c_client * client);
  159. /************************************************************************
  160. * Name: hidi2c_to_stdi2c
  161. * Brief: HID to I2C
  162. * Input: i2c info
  163. * Output: no
  164. * Return: fail =0
  165. ***********************************************************************/
  166. int hidi2c_to_stdi2c(struct i2c_client * client)
  167. {
  168. u8 auc_i2c_write_buf[5] = {0};
  169. int bRet = 0;
  170. #if HIDTOI2C_DISABLE
  171. return 0;
  172. #endif
  173. auc_i2c_write_buf[0] = 0xeb;
  174. auc_i2c_write_buf[1] = 0xaa;
  175. auc_i2c_write_buf[2] = 0x09;
  176. bRet =fts_i2c_write(client, auc_i2c_write_buf, 3);
  177. msleep(10);
  178. auc_i2c_write_buf[0] = auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = 0;
  179. fts_i2c_read(client, auc_i2c_write_buf, 0, auc_i2c_write_buf, 3);
  180. if(0xeb==auc_i2c_write_buf[0] && 0xaa==auc_i2c_write_buf[1] && 0x08==auc_i2c_write_buf[2])
  181. {
  182. pr_info("hidi2c_to_stdi2c successful.\n");
  183. bRet = 1;
  184. }
  185. else
  186. {
  187. pr_err("hidi2c_to_stdi2c error.\n");
  188. bRet = 0;
  189. }
  190. return bRet;
  191. }
  192. /*******************************************************************************
  193. * Name: fts_update_fw_vendor_id
  194. * Brief:
  195. * Input:
  196. * Output: None
  197. * Return: None
  198. *******************************************************************************/
  199. void fts_update_fw_vendor_id(struct fts_ts_data *data)
  200. {
  201. struct i2c_client *client = data->client;
  202. u8 reg_addr;
  203. int err;
  204. reg_addr = FTS_REG_FW_VENDOR_ID;
  205. err = fts_i2c_read(client, &reg_addr, 1, &data->fw_vendor_id, 1);
  206. if (err < 0)
  207. dev_err(&client->dev, "fw vendor id read failed");
  208. }
  209. /*******************************************************************************
  210. * Name: fts_update_fw_ver
  211. * Brief:
  212. * Input:
  213. * Output: None
  214. * Return: None
  215. *******************************************************************************/
  216. void fts_update_fw_ver(struct fts_ts_data *data)
  217. {
  218. struct i2c_client *client = data->client;
  219. u8 reg_addr;
  220. int err;
  221. reg_addr = FTS_REG_FW_VER;
  222. err = fts_i2c_read(client, &reg_addr, 1, &data->fw_ver[0], 1);
  223. if (err < 0)
  224. dev_err(&client->dev, "fw major version read failed");
  225. reg_addr = FTS_REG_FW_MIN_VER;
  226. err = fts_i2c_read(client, &reg_addr, 1, &data->fw_ver[1], 1);
  227. if (err < 0)
  228. dev_err(&client->dev, "fw minor version read failed");
  229. reg_addr = FTS_REG_FW_SUB_MIN_VER;
  230. err = fts_i2c_read(client, &reg_addr, 1, &data->fw_ver[2], 1);
  231. if (err < 0)
  232. dev_err(&client->dev, "fw sub minor version read failed");
  233. dev_info(&client->dev, "Firmware version = %d.%d.%d\n",
  234. data->fw_ver[0], data->fw_ver[1], data->fw_ver[2]);
  235. }
  236. /************************************************************************
  237. * Name: fts_ctpm_fw_upgrade_ReadVendorID
  238. * Brief: read vendor ID
  239. * Input: i2c info, vendor ID
  240. * Output: no
  241. * Return: fail <0
  242. ***********************************************************************/
  243. int fts_ctpm_fw_upgrade_ReadVendorID(struct i2c_client *client, u8 *ucPVendorID)
  244. {
  245. u8 reg_val[4] = {0};
  246. u32 i = 0;
  247. u8 auc_i2c_write_buf[10];
  248. int i_ret;
  249. *ucPVendorID = 0;
  250. i_ret = hidi2c_to_stdi2c(client);
  251. if (i_ret == 0)
  252. {
  253. TPD_DEBUG("hidi2c change to stdi2c fail ! \n");
  254. }
  255. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  256. {
  257. /*********Step 1:Reset CTPM *****/
  258. fts_write_reg(client, 0xfc, FTS_UPGRADE_AA);
  259. msleep(fts_updateinfo_curr.delay_aa);
  260. fts_write_reg(client, 0xfc, FTS_UPGRADE_55);
  261. msleep(200);
  262. /*********Step 2:Enter upgrade mode *****/
  263. i_ret = hidi2c_to_stdi2c(client);
  264. if (i_ret == 0)
  265. {
  266. TPD_DEBUG("hidi2c change to stdi2c fail ! \n");
  267. }
  268. msleep(10);
  269. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  270. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  271. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  272. if (i_ret < 0) {
  273. TPD_DEBUG("failed writing 0x55 and 0xaa ! \n");
  274. continue;
  275. }
  276. /*********Step 3:check READ-ID***********************/
  277. msleep(10);
  278. auc_i2c_write_buf[0] = 0x90;
  279. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] = 0x00;
  280. reg_val[0] = reg_val[1] = 0x00;
  281. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  282. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1 && reg_val[1] == fts_updateinfo_curr.upgrade_id_2) {
  283. TPD_DEBUG("[FTS] Step 3: READ OK CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  284. break;
  285. }
  286. else
  287. {
  288. dev_err(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  289. continue;
  290. }
  291. }
  292. if (i >= FTS_UPGRADE_LOOP)
  293. return -EIO;
  294. /*********Step 4: read vendor id from app param area***********************/
  295. msleep(10);
  296. auc_i2c_write_buf[0] = 0x03;
  297. auc_i2c_write_buf[1] = 0x00;
  298. auc_i2c_write_buf[2] = 0xd7;
  299. auc_i2c_write_buf[3] = 0x84;
  300. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  301. {
  302. fts_i2c_write(client, auc_i2c_write_buf, 4);
  303. msleep(5);
  304. reg_val[0] = reg_val[1] = 0x00;
  305. i_ret = fts_i2c_read(client, auc_i2c_write_buf, 0, reg_val, 2);
  306. if (0 != reg_val[0])
  307. {
  308. *ucPVendorID = 0;
  309. TPD_DEBUG("In upgrade Vendor ID Mismatch, REG1 = 0x%x, REG2 = 0x%x, Definition:0x%x, i_ret=%d\n", reg_val[0], reg_val[1], 0, i_ret);
  310. }
  311. else
  312. {
  313. *ucPVendorID = reg_val[0];
  314. TPD_DEBUG("In upgrade Vendor ID, REG1 = 0x%x, REG2 = 0x%x\n", reg_val[0], reg_val[1]);
  315. break;
  316. }
  317. }
  318. msleep(50);
  319. /*********Step 5: reset the new FW***********************/
  320. TPD_DEBUG("Step 5: reset the new FW\n");
  321. auc_i2c_write_buf[0] = 0x07;
  322. fts_i2c_write(client, auc_i2c_write_buf, 1);
  323. msleep(200);
  324. i_ret = hidi2c_to_stdi2c(client);
  325. if (i_ret == 0)
  326. {
  327. TPD_DEBUG("hidi2c change to stdi2c fail ! \n");
  328. }
  329. msleep(10);
  330. return 0;
  331. }
  332. /************************************************************************
  333. * Name: fts_ctpm_fw_upgrade_ReadProjectCode
  334. * Brief: read project code
  335. * Input: i2c info, project code
  336. * Output: no
  337. * Return: fail <0
  338. ***********************************************************************/
  339. int fts_ctpm_fw_upgrade_ReadProjectCode(struct i2c_client *client, char *pProjectCode)
  340. {
  341. u8 reg_val[4] = {0};
  342. u32 i = 0;
  343. u8 j = 0;
  344. u8 auc_i2c_write_buf[10];
  345. int i_ret;
  346. u32 temp;
  347. i_ret = hidi2c_to_stdi2c(client);
  348. if (i_ret == 0)
  349. {
  350. TPD_DEBUG("hidi2c change to stdi2c fail ! \n");
  351. }
  352. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  353. {
  354. /*********Step 1:Reset CTPM *****/
  355. fts_write_reg(client, 0xfc, FTS_UPGRADE_AA);
  356. msleep(fts_updateinfo_curr.delay_aa);
  357. fts_write_reg(client, 0xfc, FTS_UPGRADE_55);
  358. msleep(200);
  359. /*********Step 2:Enter upgrade mode *****/
  360. i_ret = hidi2c_to_stdi2c(client);
  361. if (i_ret == 0)
  362. {
  363. TPD_DEBUG("hidi2c change to stdi2c fail ! \n");
  364. }
  365. msleep(10);
  366. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  367. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  368. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  369. if (i_ret < 0)
  370. {
  371. TPD_DEBUG("failed writing 0x55 and 0xaa ! \n");
  372. continue;
  373. }
  374. /*********Step 3:check READ-ID***********************/
  375. msleep(10);
  376. auc_i2c_write_buf[0] = 0x90;
  377. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] = 0x00;
  378. reg_val[0] = reg_val[1] = 0x00;
  379. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  380. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1 && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  381. {
  382. TPD_DEBUG("[FTS] Step 3: READ OK CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  383. break;
  384. }
  385. else
  386. {
  387. dev_err(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  388. continue;
  389. }
  390. }
  391. if (i >= FTS_UPGRADE_LOOP)
  392. return -EIO;
  393. /*********Step 4: read vendor id from app param area***********************/
  394. msleep(10);
  395. /*read project code*/
  396. auc_i2c_write_buf[0] = 0x03;
  397. auc_i2c_write_buf[1] = 0x00;
  398. for (j = 0; j < 33; j++)
  399. {
  400. temp = 0xD7A0 + j;
  401. auc_i2c_write_buf[2] = (u8)(temp>>8);
  402. auc_i2c_write_buf[3] = (u8)temp;
  403. fts_i2c_read(client, auc_i2c_write_buf, 4, pProjectCode+j, 1);
  404. if (*(pProjectCode+j) == '\0')
  405. break;
  406. }
  407. pr_info("project code = %s \n", pProjectCode);
  408. msleep(50);
  409. /*********Step 5: reset the new FW***********************/
  410. TPD_DEBUG("Step 5: reset the new FW\n");
  411. auc_i2c_write_buf[0] = 0x07;
  412. fts_i2c_write(client, auc_i2c_write_buf, 1);
  413. msleep(200);
  414. i_ret = hidi2c_to_stdi2c(client);
  415. if (i_ret == 0)
  416. {
  417. TPD_DEBUG("hidi2c change to stdi2c fail ! \n");
  418. }
  419. msleep(10);
  420. return 0;
  421. }
  422. /************************************************************************
  423. * Name: fts_get_upgrade_array
  424. * Brief: decide which ic
  425. * Input: no
  426. * Output: get ic info in fts_updateinfo_curr
  427. * Return: no
  428. ***********************************************************************/
  429. void fts_get_upgrade_array(void)
  430. {
  431. u8 chip_id;
  432. u32 i;
  433. int ret = 0;
  434. ret = fts_read_reg(fts_i2c_client, FTS_REG_ID,&chip_id);
  435. if (ret<0)
  436. {
  437. printk("[Focal][Touch] read value fail");
  438. }
  439. printk("%s chip_id = 0x%x\n", __func__, chip_id);
  440. for(i=0;i<sizeof(fts_updateinfo)/sizeof(struct fts_Upgrade_Info);i++)
  441. {
  442. if(chip_id==fts_updateinfo[i].CHIP_ID)
  443. {
  444. memcpy(&fts_updateinfo_curr, &fts_updateinfo[i], sizeof(struct fts_Upgrade_Info));
  445. break;
  446. }
  447. }
  448. if(i >= sizeof(fts_updateinfo)/sizeof(struct fts_Upgrade_Info))
  449. {
  450. memcpy(&fts_updateinfo_curr, &fts_updateinfo[0], sizeof(struct fts_Upgrade_Info));
  451. }
  452. }
  453. /************************************************************************
  454. * Name: fts_ctpm_auto_clb
  455. * Brief: auto calibration
  456. * Input: i2c info
  457. * Output: no
  458. * Return: 0
  459. ***********************************************************************/
  460. int fts_ctpm_auto_clb(struct i2c_client *client)
  461. {
  462. unsigned char uc_temp = 0x00;
  463. unsigned char i = 0;
  464. /*start auto CLB */
  465. msleep(200);
  466. fts_write_reg(client, 0, FTS_FACTORYMODE_VALUE);
  467. /*make sure already enter factory mode */
  468. msleep(100);
  469. /*write command to start calibration */
  470. fts_write_reg(client, 2, 0x4);
  471. msleep(300);
  472. if ((fts_updateinfo_curr.CHIP_ID==0x11) ||(fts_updateinfo_curr.CHIP_ID==0x12) ||(fts_updateinfo_curr.CHIP_ID==0x13) ||(fts_updateinfo_curr.CHIP_ID==0x14)) //5x36,5x36i
  473. {
  474. for(i=0;i<100;i++)
  475. {
  476. fts_read_reg(client, 0x02, &uc_temp);
  477. if (0x02 == uc_temp ||
  478. 0xFF == uc_temp)
  479. {
  480. break;
  481. }
  482. msleep(20);
  483. }
  484. }
  485. else
  486. {
  487. for(i=0;i<100;i++)
  488. {
  489. fts_read_reg(client, 0, &uc_temp);
  490. if (0x0 == ((uc_temp&0x70)>>4))
  491. {
  492. break;
  493. }
  494. msleep(20);
  495. }
  496. }
  497. fts_write_reg(client, 0, 0x40);
  498. msleep(200);
  499. fts_write_reg(client, 2, 0x5);
  500. msleep(300);
  501. fts_write_reg(client, 0, FTS_WORKMODE_VALUE);
  502. msleep(300);
  503. return 0;
  504. }
  505. /************************************************************************
  506. * Name: fts_6x36_ctpm_fw_upgrade
  507. * Brief: fw upgrade
  508. * Input: i2c info, file buf, file len
  509. * Output: no
  510. * Return: fail <0
  511. ***********************************************************************/
  512. int fts_6x36_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  513. {
  514. u8 reg_val[2] = {0};
  515. u32 i = 0;
  516. u32 packet_number;
  517. u32 j;
  518. u32 temp;
  519. u32 lenght;
  520. u32 fw_length;
  521. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  522. u8 auc_i2c_write_buf[10];
  523. u8 bt_ecc;
  524. if(pbt_buf[0] != 0x02)
  525. {
  526. TPD_DEBUG("[FTS] FW first byte is not 0x02. so it is invalid \n");
  527. return -1;
  528. }
  529. if(dw_lenth > 0x11f)
  530. {
  531. fw_length = ((u32)pbt_buf[0x100]<<8) + pbt_buf[0x101];
  532. if(dw_lenth < fw_length)
  533. {
  534. TPD_DEBUG("[FTS] Fw length is invalid \n");
  535. return -1;
  536. }
  537. }
  538. else
  539. {
  540. TPD_DEBUG("[FTS] Fw length is invalid \n");
  541. return -1;
  542. }
  543. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  544. {
  545. /*********Step 1:Reset CTPM *****/
  546. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_AA);
  547. msleep(fts_updateinfo_curr.delay_aa);
  548. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_55);
  549. msleep(fts_updateinfo_curr.delay_55);
  550. /*********Step 2:Enter upgrade mode *****/
  551. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  552. fts_i2c_write(client, auc_i2c_write_buf, 1);
  553. auc_i2c_write_buf[0] = FTS_UPGRADE_AA;
  554. fts_i2c_write(client, auc_i2c_write_buf, 1);
  555. msleep(fts_updateinfo_curr.delay_readid);
  556. /*********Step 3:check READ-ID***********************/
  557. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  558. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =0x00;
  559. reg_val[0] = 0x00;
  560. reg_val[1] = 0x00;
  561. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  562. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  563. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  564. {
  565. TPD_DEBUG("[FTS] Step 3: GET CTPM ID OK,ID1 = 0x%x,ID2 = 0x%x\n",
  566. reg_val[0], reg_val[1]);
  567. break;
  568. }
  569. else
  570. {
  571. dev_err(&client->dev, "[FTS] Step 3: GET CTPM ID FAIL,ID1 = 0x%x,ID2 = 0x%x\n",
  572. reg_val[0], reg_val[1]);
  573. }
  574. }
  575. if (i >= FTS_UPGRADE_LOOP)
  576. return -EIO;
  577. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  578. auc_i2c_write_buf[1] = 0x00;
  579. auc_i2c_write_buf[2] = 0x00;
  580. auc_i2c_write_buf[3] = 0x00;
  581. auc_i2c_write_buf[4] = 0x00;
  582. fts_i2c_write(client, auc_i2c_write_buf, 5);
  583. /*Step 4:erase app and panel paramenter area*/
  584. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  585. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  586. fts_i2c_write(client, auc_i2c_write_buf, 1);
  587. msleep(fts_updateinfo_curr.delay_erase_flash);
  588. for(i = 0;i < 200;i++)
  589. {
  590. auc_i2c_write_buf[0] = 0x6a;
  591. auc_i2c_write_buf[1] = 0x00;
  592. auc_i2c_write_buf[2] = 0x00;
  593. auc_i2c_write_buf[3] = 0x00;
  594. reg_val[0] = 0x00;
  595. reg_val[1] = 0x00;
  596. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  597. if(0xb0 == reg_val[0] && 0x02 == reg_val[1])
  598. {
  599. TPD_DEBUG("[FTS] erase app finished \n");
  600. break;
  601. }
  602. msleep(50);
  603. }
  604. /*********Step 5:write firmware(FW) to ctpm flash*********/
  605. bt_ecc = 0;
  606. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  607. dw_lenth = fw_length;
  608. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  609. packet_buf[0] = FTS_FW_WRITE_CMD;
  610. packet_buf[1] = 0x00;
  611. for (j = 0; j < packet_number; j++)
  612. {
  613. temp = j * FTS_PACKET_LENGTH;
  614. packet_buf[2] = (u8) (temp >> 8);
  615. packet_buf[3] = (u8) temp;
  616. lenght = FTS_PACKET_LENGTH;
  617. packet_buf[4] = (u8) (lenght >> 8);
  618. packet_buf[5] = (u8) lenght;
  619. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  620. {
  621. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  622. bt_ecc ^= packet_buf[6 + i];
  623. }
  624. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  625. for(i = 0;i < 30;i++)
  626. {
  627. auc_i2c_write_buf[0] = 0x6a;
  628. auc_i2c_write_buf[1] = 0x00;
  629. auc_i2c_write_buf[2] = 0x00;
  630. auc_i2c_write_buf[3] = 0x00;
  631. reg_val[0] = 0x00;
  632. reg_val[1] = 0x00;
  633. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  634. if(0xb0 == (reg_val[0] & 0xf0) && (0x03 + (j % 0x0ffd)) == (((reg_val[0] & 0x0f) << 8) |reg_val[1]))
  635. {
  636. TPD_DEBUG("[FTS] write a block data finished \n");
  637. break;
  638. }
  639. msleep(1);
  640. }
  641. }
  642. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  643. {
  644. temp = packet_number * FTS_PACKET_LENGTH;
  645. packet_buf[2] = (u8) (temp >> 8);
  646. packet_buf[3] = (u8) temp;
  647. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  648. packet_buf[4] = (u8) (temp >> 8);
  649. packet_buf[5] = (u8) temp;
  650. for (i = 0; i < temp; i++)
  651. {
  652. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  653. bt_ecc ^= packet_buf[6 + i];
  654. }
  655. fts_i2c_write(client, packet_buf, temp + 6);
  656. for(i = 0;i < 30;i++)
  657. {
  658. auc_i2c_write_buf[0] = 0x6a;
  659. auc_i2c_write_buf[1] = 0x00;
  660. auc_i2c_write_buf[2] = 0x00;
  661. auc_i2c_write_buf[3] = 0x00;
  662. reg_val[0] = 0x00;
  663. reg_val[1] = 0x00;
  664. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  665. if(0xb0 == (reg_val[0] & 0xf0) && (0x03 + (j % 0x0ffd)) == (((reg_val[0] & 0x0f) << 8) |reg_val[1]))
  666. {
  667. TPD_DEBUG("[FTS] write a block data finished \n");
  668. break;
  669. }
  670. msleep(1);
  671. }
  672. }
  673. /*********Step 6: read out checksum***********************/
  674. TPD_DEBUG("Step 6: read out checksum\n");
  675. auc_i2c_write_buf[0] = FTS_REG_ECC;
  676. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  677. if (reg_val[0] != bt_ecc)
  678. {
  679. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",
  680. reg_val[0],
  681. bt_ecc);
  682. return -EIO;
  683. }
  684. /*********Step 7: reset the new FW***********************/
  685. TPD_DEBUG("Step 7: reset the new FW\n");
  686. auc_i2c_write_buf[0] = 0x07;
  687. fts_i2c_write(client, auc_i2c_write_buf, 1);
  688. msleep(300);
  689. return 0;
  690. }
  691. /************************************************************************
  692. * Name: fts_6336GU_ctpm_fw_upgrade
  693. * Brief: fw upgrade
  694. * Input: i2c info, file buf, file len
  695. * Output: no
  696. * Return: fail <0
  697. ***********************************************************************/
  698. int fts_6336GU_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  699. {
  700. u8 reg_val[2] = {0};
  701. u32 i = 0;
  702. u32 packet_number;
  703. u32 j;
  704. u32 temp;
  705. u32 lenght;
  706. u32 fw_length;
  707. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  708. u8 auc_i2c_write_buf[10];
  709. u8 bt_ecc;
  710. if(pbt_buf[0] != 0x02)
  711. {
  712. TPD_DEBUG("[FTS] FW first byte is not 0x02. so it is invalid \n");
  713. return -1;
  714. }
  715. if(dw_lenth > 0x11f)
  716. {
  717. fw_length = ((u32)pbt_buf[0x100]<<8) + pbt_buf[0x101];
  718. if(dw_lenth < fw_length)
  719. {
  720. TPD_DEBUG("[FTS] Fw length is invalid \n");
  721. return -1;
  722. }
  723. }
  724. else
  725. {
  726. TPD_DEBUG("[FTS] Fw length is invalid \n");
  727. return -1;
  728. }
  729. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  730. {
  731. /*********Step 1:Reset CTPM *****/
  732. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_AA);
  733. msleep(fts_updateinfo_curr.delay_aa);
  734. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_55);
  735. msleep(fts_updateinfo_curr.delay_55);
  736. /*********Step 2:Enter upgrade mode *****/
  737. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  738. fts_i2c_write(client, auc_i2c_write_buf, 1);
  739. auc_i2c_write_buf[0] = FTS_UPGRADE_AA;
  740. fts_i2c_write(client, auc_i2c_write_buf, 1);
  741. msleep(fts_updateinfo_curr.delay_readid);
  742. /*********Step 3:check READ-ID***********************/
  743. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  744. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =0x00;
  745. reg_val[0] = 0x00;
  746. reg_val[1] = 0x00;
  747. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  748. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  749. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  750. {
  751. TPD_DEBUG("[FTS] Step 3: GET CTPM ID OK,ID1 = 0x%x,ID2 = 0x%x\n",
  752. reg_val[0], reg_val[1]);
  753. break;
  754. }
  755. else
  756. {
  757. dev_err(&client->dev, "[FTS] Step 3: GET CTPM ID FAIL,ID1 = 0x%x,ID2 = 0x%x\n",
  758. reg_val[0], reg_val[1]);
  759. }
  760. }
  761. if (i >= FTS_UPGRADE_LOOP)
  762. return -EIO;
  763. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  764. auc_i2c_write_buf[1] = 0x00;
  765. auc_i2c_write_buf[2] = 0x00;
  766. auc_i2c_write_buf[3] = 0x00;
  767. auc_i2c_write_buf[4] = 0x00;
  768. fts_i2c_write(client, auc_i2c_write_buf, 5);
  769. /*Step 4:erase app and panel paramenter area*/
  770. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  771. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  772. fts_i2c_write(client, auc_i2c_write_buf, 1);
  773. msleep(fts_updateinfo_curr.delay_erase_flash);
  774. for(i = 0;i < 200;i++)
  775. {
  776. auc_i2c_write_buf[0] = 0x6a;
  777. auc_i2c_write_buf[1] = 0x00;
  778. auc_i2c_write_buf[2] = 0x00;
  779. auc_i2c_write_buf[3] = 0x00;
  780. reg_val[0] = 0x00;
  781. reg_val[1] = 0x00;
  782. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  783. if(0xb0 == reg_val[0] && 0x02 == reg_val[1])
  784. {
  785. TPD_DEBUG("[FTS] erase app finished \n");
  786. break;
  787. }
  788. msleep(50);
  789. }
  790. /*********Step 5:write firmware(FW) to ctpm flash*********/
  791. bt_ecc = 0;
  792. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  793. dw_lenth = fw_length;
  794. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  795. packet_buf[0] = FTS_FW_WRITE_CMD;
  796. packet_buf[1] = 0x00;
  797. for (j = 0; j < packet_number; j++)
  798. {
  799. temp = j * FTS_PACKET_LENGTH;
  800. packet_buf[2] = (u8) (temp >> 8);
  801. packet_buf[3] = (u8) temp;
  802. lenght = FTS_PACKET_LENGTH;
  803. packet_buf[4] = (u8) (lenght >> 8);
  804. packet_buf[5] = (u8) lenght;
  805. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  806. {
  807. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  808. bt_ecc ^= packet_buf[6 + i];
  809. }
  810. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  811. for(i = 0;i < 30;i++)
  812. {
  813. auc_i2c_write_buf[0] = 0x6a;
  814. auc_i2c_write_buf[1] = 0x00;
  815. auc_i2c_write_buf[2] = 0x00;
  816. auc_i2c_write_buf[3] = 0x00;
  817. reg_val[0] = 0x00;
  818. reg_val[1] = 0x00;
  819. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  820. if(0xb0 == (reg_val[0] & 0xf0) && (0x03 + (j % 0x0ffd)) == (((reg_val[0] & 0x0f) << 8) |reg_val[1]))
  821. {
  822. TPD_DEBUG("[FTS] write a block data finished \n");
  823. break;
  824. }
  825. msleep(1);
  826. }
  827. }
  828. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  829. {
  830. temp = packet_number * FTS_PACKET_LENGTH;
  831. packet_buf[2] = (u8) (temp >> 8);
  832. packet_buf[3] = (u8) temp;
  833. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  834. packet_buf[4] = (u8) (temp >> 8);
  835. packet_buf[5] = (u8) temp;
  836. for (i = 0; i < temp; i++)
  837. {
  838. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  839. bt_ecc ^= packet_buf[6 + i];
  840. }
  841. fts_i2c_write(client, packet_buf, temp + 6);
  842. for(i = 0;i < 30;i++)
  843. {
  844. auc_i2c_write_buf[0] = 0x6a;
  845. auc_i2c_write_buf[1] = 0x00;
  846. auc_i2c_write_buf[2] = 0x00;
  847. auc_i2c_write_buf[3] = 0x00;
  848. reg_val[0] = 0x00;
  849. reg_val[1] = 0x00;
  850. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  851. if(0xb0 == (reg_val[0] & 0xf0) && (0x03 + (j % 0x0ffd)) == (((reg_val[0] & 0x0f) << 8) |reg_val[1]))
  852. {
  853. TPD_DEBUG("[FTS] write a block data finished \n");
  854. break;
  855. }
  856. msleep(1);
  857. }
  858. }
  859. /*********Step 6: read out checksum***********************/
  860. TPD_DEBUG("Step 6: read out checksum\n");
  861. auc_i2c_write_buf[0] = FTS_REG_ECC;
  862. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  863. if (reg_val[0] != bt_ecc)
  864. {
  865. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",
  866. reg_val[0],
  867. bt_ecc);
  868. return -EIO;
  869. }
  870. /*********Step 7: reset the new FW***********************/
  871. TPD_DEBUG("Step 7: reset the new FW\n");
  872. auc_i2c_write_buf[0] = 0x07;
  873. fts_i2c_write(client, auc_i2c_write_buf, 1);
  874. msleep(300);
  875. return 0;
  876. }
  877. /************************************************************************
  878. * Name: fts_6x06_ctpm_fw_upgrade
  879. * Brief: fw upgrade
  880. * Input: i2c info, file buf, file len
  881. * Output: no
  882. * Return: fail <0
  883. ***********************************************************************/
  884. int fts_6x06_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  885. {
  886. u8 reg_val[2] = {0};
  887. u32 i = 0;
  888. u32 packet_number;
  889. u32 j;
  890. u32 temp;
  891. u32 lenght;
  892. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  893. u8 auc_i2c_write_buf[10];
  894. u8 bt_ecc;
  895. int i_ret;
  896. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  897. {
  898. /*********Step 1:Reset CTPM *****/
  899. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_AA);
  900. msleep(fts_updateinfo_curr.delay_aa);
  901. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_55);
  902. msleep(fts_updateinfo_curr.delay_55);
  903. /*********Step 2:Enter upgrade mode *****/
  904. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  905. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  906. do
  907. {
  908. i++;
  909. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  910. msleep(5);
  911. } while (i_ret <= 0 && i < 5);
  912. /*********Step 3:check READ-ID***********************/
  913. msleep(fts_updateinfo_curr.delay_readid);
  914. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  915. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =0x00;
  916. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  917. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  918. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  919. {
  920. TPD_DEBUG("[FTS] Step 3: CTPM ID OK ,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0], reg_val[1]);
  921. break;
  922. }
  923. else
  924. {
  925. dev_err(&client->dev, "[FTS] Step 3: CTPM ID FAIL,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0], reg_val[1]);
  926. }
  927. }
  928. if (i > FTS_UPGRADE_LOOP)
  929. return -EIO;
  930. auc_i2c_write_buf[0] = 0xcd;
  931. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  932. /*Step 4:erase app and panel paramenter area*/
  933. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  934. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  935. fts_i2c_write(client, auc_i2c_write_buf, 1);
  936. msleep(fts_updateinfo_curr.delay_erase_flash);
  937. /*erase panel parameter area */
  938. auc_i2c_write_buf[0] = FTS_ERASE_PARAMS_CMD;
  939. fts_i2c_write(client, auc_i2c_write_buf, 1);
  940. msleep(100);
  941. /*********Step 5:write firmware(FW) to ctpm flash*********/
  942. bt_ecc = 0;
  943. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  944. dw_lenth = dw_lenth - 8;
  945. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  946. packet_buf[0] = FTS_FW_WRITE_CMD;
  947. packet_buf[1] = 0x00;
  948. for (j = 0; j < packet_number; j++)
  949. {
  950. temp = j * FTS_PACKET_LENGTH;
  951. packet_buf[2] = (u8) (temp >> 8);
  952. packet_buf[3] = (u8) temp;
  953. lenght = FTS_PACKET_LENGTH;
  954. packet_buf[4] = (u8) (lenght >> 8);
  955. packet_buf[5] = (u8) lenght;
  956. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  957. {
  958. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  959. bt_ecc ^= packet_buf[6 + i];
  960. }
  961. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  962. msleep(FTS_PACKET_LENGTH / 6 + 1);
  963. }
  964. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  965. {
  966. temp = packet_number * FTS_PACKET_LENGTH;
  967. packet_buf[2] = (u8) (temp >> 8);
  968. packet_buf[3] = (u8) temp;
  969. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  970. packet_buf[4] = (u8) (temp >> 8);
  971. packet_buf[5] = (u8) temp;
  972. for (i = 0; i < temp; i++)
  973. {
  974. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  975. bt_ecc ^= packet_buf[6 + i];
  976. }
  977. fts_i2c_write(client, packet_buf, temp + 6);
  978. msleep(20);
  979. }
  980. /*send the last six byte */
  981. for (i = 0; i < 6; i++)
  982. {
  983. temp = 0x6ffa + i;
  984. packet_buf[2] = (u8) (temp >> 8);
  985. packet_buf[3] = (u8) temp;
  986. temp = 1;
  987. packet_buf[4] = (u8) (temp >> 8);
  988. packet_buf[5] = (u8) temp;
  989. packet_buf[6] = pbt_buf[dw_lenth + i];
  990. bt_ecc ^= packet_buf[6];
  991. fts_i2c_write(client, packet_buf, 7);
  992. msleep(20);
  993. }
  994. /*********Step 6: read out checksum***********************/
  995. /*send the opration head */
  996. TPD_DEBUG("Step 6: read out checksum\n");
  997. auc_i2c_write_buf[0] = FTS_REG_ECC;
  998. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  999. if (reg_val[0] != bt_ecc)
  1000. {
  1001. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",reg_val[0],bt_ecc);
  1002. return -EIO;
  1003. }
  1004. /*********Step 7: reset the new FW***********************/
  1005. TPD_DEBUG("Step 7: reset the new FW\n");
  1006. auc_i2c_write_buf[0] = FTS_REG_RESET_FW;
  1007. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1008. msleep(300);
  1009. return 0;
  1010. }
  1011. /************************************************************************
  1012. * Name: fts_5x26_ctpm_fw_upgrade
  1013. * Brief: fw upgrade
  1014. * Input: i2c info, file buf, file len
  1015. * Output: no
  1016. * Return: fail <0
  1017. ***********************************************************************/
  1018. int fts_5x26_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  1019. {
  1020. u8 reg_val[4] = {0};
  1021. u32 i = 0;
  1022. u32 packet_number;
  1023. u32 j;
  1024. u32 temp;
  1025. u32 lenght;
  1026. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  1027. u8 auc_i2c_write_buf[10];
  1028. u8 bt_ecc;
  1029. int i_ret=0;
  1030. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  1031. {
  1032. /*********Step 1:Reset CTPM *****/
  1033. fts_write_reg(client, 0xfc, FTS_UPGRADE_AA);
  1034. msleep(fts_updateinfo_curr.delay_aa);
  1035. fts_write_reg(client, 0xfc, FTS_UPGRADE_55);
  1036. msleep(fts_updateinfo_curr.delay_55);
  1037. /*********Step 2:Enter upgrade mode and switch protocol*****/
  1038. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  1039. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  1040. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  1041. if (i_ret < 0)
  1042. {
  1043. TPD_DEBUG("failed writing 0x55 and 0xaa ! \n");
  1044. continue;
  1045. }
  1046. /*********Step 3:check READ-ID***********************/
  1047. auc_i2c_write_buf[0] = 0x90;
  1048. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] = 0x00;
  1049. reg_val[0] = reg_val[1] = 0x00;
  1050. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  1051. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1 && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  1052. {
  1053. TPD_DEBUG("[FTS] Step 3: READ OK CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  1054. break;
  1055. }
  1056. else
  1057. {
  1058. dev_err(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  1059. continue;
  1060. }
  1061. }
  1062. if (i >= FTS_UPGRADE_LOOP) return -EIO;
  1063. /*Step 4:erase app and panel paramenter area*/
  1064. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  1065. auc_i2c_write_buf[0] = 0x61;
  1066. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1067. /*erase app area*/
  1068. auc_i2c_write_buf[0] = 0x63;
  1069. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1070. /*erase panel paramenter area*/
  1071. auc_i2c_write_buf[0] = 0x04;
  1072. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1073. /*erase panel paramenter area*/
  1074. msleep(fts_updateinfo_curr.delay_erase_flash);
  1075. /*********Step 5:write firmware(FW) to ctpm flash*********/
  1076. bt_ecc = 0;
  1077. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  1078. temp = 0;
  1079. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  1080. packet_buf[0] = 0xbf;
  1081. packet_buf[1] = 0x00;
  1082. for (j = 0; j < packet_number; j++)
  1083. {
  1084. temp = j * FTS_PACKET_LENGTH;
  1085. packet_buf[2] = (u8) (temp >> 8);
  1086. packet_buf[3] = (u8) temp;
  1087. lenght = FTS_PACKET_LENGTH;
  1088. packet_buf[4] = (u8) (lenght >> 8);
  1089. packet_buf[5] = (u8) lenght;
  1090. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  1091. {
  1092. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  1093. bt_ecc ^= packet_buf[6 + i];
  1094. }
  1095. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  1096. msleep(FTS_PACKET_LENGTH / 6 + 1);
  1097. }
  1098. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  1099. {
  1100. temp = packet_number * FTS_PACKET_LENGTH;
  1101. packet_buf[2] = (u8) (temp >> 8);
  1102. packet_buf[3] = (u8) temp;
  1103. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  1104. packet_buf[4] = (u8) (temp >> 8);
  1105. packet_buf[5] = (u8) temp;
  1106. for (i = 0; i < temp; i++)
  1107. {
  1108. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  1109. bt_ecc ^= packet_buf[6 + i];
  1110. }
  1111. fts_i2c_write(client, packet_buf, temp+6);
  1112. msleep(20);
  1113. }
  1114. /*********Step 6: read out checksum***********************/
  1115. TPD_DEBUG("Step 6: read out checksum\n");
  1116. auc_i2c_write_buf[0] = 0xcc;
  1117. reg_val[0] = reg_val[1] = 0x00;
  1118. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  1119. printk(KERN_WARNING "Checksum FT5X26:%X %X \n", reg_val[0], bt_ecc);
  1120. if (reg_val[0] != bt_ecc)
  1121. {
  1122. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",reg_val[0],bt_ecc);
  1123. return -EIO;
  1124. }
  1125. /*********Step 7: reset the new FW***********************/
  1126. TPD_DEBUG("Step 7: reset the new FW\n");
  1127. auc_i2c_write_buf[0] = 0x07;
  1128. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1129. /********Step 8 Disable Write Flash*****/
  1130. TPD_DEBUG("Step 8: Disable Write Flash\n");
  1131. auc_i2c_write_buf[0] = 0x04;
  1132. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1133. msleep(300);
  1134. auc_i2c_write_buf[0] =auc_i2c_write_buf[1]= 0x00;
  1135. fts_i2c_write(client,auc_i2c_write_buf,2);
  1136. return 0;
  1137. }
  1138. /************************************************************************
  1139. * Name: fts_5x36_ctpm_fw_upgrade
  1140. * Brief: fw upgrade
  1141. * Input: i2c info, file buf, file len
  1142. * Output: no
  1143. * Return: fail <0
  1144. ***********************************************************************/
  1145. int fts_5x36_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  1146. {
  1147. u8 reg_val[2] = {0};
  1148. u32 i = 0;
  1149. u8 is_5336_new_bootloader = 0;
  1150. u8 is_5336_fwsize_30 = 0;
  1151. u32 packet_number;
  1152. u32 j;
  1153. u32 temp;
  1154. u32 lenght;
  1155. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  1156. u8 auc_i2c_write_buf[10];
  1157. u8 bt_ecc;
  1158. int i_ret;
  1159. int fw_filenth = sizeof(CTPM_FW);
  1160. if(CTPM_FW[fw_filenth-12] == 30)
  1161. {
  1162. is_5336_fwsize_30 = 1;
  1163. }
  1164. else
  1165. {
  1166. is_5336_fwsize_30 = 0;
  1167. }
  1168. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  1169. {
  1170. /*********Step 1:Reset CTPM *****/
  1171. fts_write_reg(client, FTS_RST_CMD_REG1, FTS_UPGRADE_AA);
  1172. msleep(fts_updateinfo_curr.delay_aa);
  1173. /*write 0x55 to register FTS_RST_CMD_REG1*/
  1174. fts_write_reg(client, FTS_RST_CMD_REG1, FTS_UPGRADE_55);
  1175. msleep(fts_updateinfo_curr.delay_55);
  1176. /*********Step 2:Enter upgrade mode *****/
  1177. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  1178. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  1179. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  1180. /*********Step 3:check READ-ID***********************/
  1181. msleep(fts_updateinfo_curr.delay_readid);
  1182. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  1183. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] = 0x00;
  1184. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  1185. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  1186. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  1187. {
  1188. dev_dbg(&client->dev, "[FTS] Step 3: CTPM ID OK,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0],reg_val[1]);
  1189. break;
  1190. }
  1191. else
  1192. {
  1193. dev_err(&client->dev, "[FTS] Step 3: CTPM ID FAILD,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0],reg_val[1]);
  1194. continue;
  1195. }
  1196. }
  1197. if (i >= FTS_UPGRADE_LOOP)
  1198. return -EIO;
  1199. auc_i2c_write_buf[0] = 0xcd;
  1200. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  1201. /*********20130705 mshl ********************/
  1202. if (reg_val[0] <= 4)
  1203. {
  1204. is_5336_new_bootloader = BL_VERSION_LZ4 ;
  1205. }
  1206. else if(reg_val[0] == 7)
  1207. {
  1208. is_5336_new_bootloader = BL_VERSION_Z7 ;
  1209. }
  1210. else if(reg_val[0] >= 0x0f)
  1211. {
  1212. is_5336_new_bootloader = BL_VERSION_GZF ;
  1213. }
  1214. /*********Step 4:erase app and panel paramenter area ********************/
  1215. if(is_5336_fwsize_30)
  1216. {
  1217. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  1218. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1219. msleep(fts_updateinfo_curr.delay_erase_flash);
  1220. auc_i2c_write_buf[0] = FTS_ERASE_PARAMS_CMD;
  1221. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1222. msleep(50);
  1223. }
  1224. else
  1225. {
  1226. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  1227. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1228. msleep(fts_updateinfo_curr.delay_erase_flash);
  1229. }
  1230. /*********Step 5:write firmware(FW) to ctpm flash*********/
  1231. bt_ecc = 0;
  1232. if(is_5336_new_bootloader == BL_VERSION_LZ4 || is_5336_new_bootloader == BL_VERSION_Z7 )
  1233. {
  1234. dw_lenth = dw_lenth - 8;
  1235. }
  1236. else if(is_5336_new_bootloader == BL_VERSION_GZF)
  1237. {
  1238. dw_lenth = dw_lenth - 14;
  1239. }
  1240. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  1241. packet_buf[0] = FTS_FW_WRITE_CMD;
  1242. packet_buf[1] = 0x00;
  1243. for (j=0;j<packet_number;j++)
  1244. {
  1245. temp = j * FTS_PACKET_LENGTH;
  1246. packet_buf[2] = (u8)(temp>>8);
  1247. packet_buf[3] = (u8)temp;
  1248. lenght = FTS_PACKET_LENGTH;
  1249. packet_buf[4] = (u8)(lenght>>8);
  1250. packet_buf[5] = (u8)lenght;
  1251. for (i=0;i<FTS_PACKET_LENGTH;i++)
  1252. {
  1253. packet_buf[6+i] = pbt_buf[j*FTS_PACKET_LENGTH + i];
  1254. bt_ecc ^= packet_buf[6+i];
  1255. }
  1256. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH+6);
  1257. msleep(FTS_PACKET_LENGTH/6 + 1);
  1258. }
  1259. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  1260. {
  1261. temp = packet_number * FTS_PACKET_LENGTH;
  1262. packet_buf[2] = (u8)(temp>>8);
  1263. packet_buf[3] = (u8)temp;
  1264. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  1265. packet_buf[4] = (u8)(temp>>8);
  1266. packet_buf[5] = (u8)temp;
  1267. for (i=0;i<temp;i++)
  1268. {
  1269. packet_buf[6+i] = pbt_buf[ packet_number*FTS_PACKET_LENGTH + i];
  1270. bt_ecc ^= packet_buf[6+i];
  1271. }
  1272. fts_i2c_write(client, packet_buf, temp+6);
  1273. msleep(20);
  1274. }
  1275. /*send the last six byte*/
  1276. if(is_5336_new_bootloader == BL_VERSION_LZ4 || is_5336_new_bootloader == BL_VERSION_Z7 )
  1277. {
  1278. for (i = 0; i<6; i++)
  1279. {
  1280. if (is_5336_new_bootloader == BL_VERSION_Z7)
  1281. {
  1282. temp = 0x7bfa + i;
  1283. }
  1284. else if(is_5336_new_bootloader == BL_VERSION_LZ4)
  1285. {
  1286. temp = 0x6ffa + i;
  1287. }
  1288. packet_buf[2] = (u8)(temp>>8);
  1289. packet_buf[3] = (u8)temp;
  1290. temp =1;
  1291. packet_buf[4] = (u8)(temp>>8);
  1292. packet_buf[5] = (u8)temp;
  1293. packet_buf[6] = pbt_buf[ dw_lenth + i];
  1294. bt_ecc ^= packet_buf[6];
  1295. fts_i2c_write(client, packet_buf, 7);
  1296. msleep(10);
  1297. }
  1298. }
  1299. else if(is_5336_new_bootloader == BL_VERSION_GZF)
  1300. {
  1301. for (i = 0; i<12; i++)
  1302. {
  1303. if (is_5336_fwsize_30)
  1304. {
  1305. temp = 0x7ff4 + i;
  1306. }
  1307. else
  1308. {
  1309. temp = 0x7bf4 + i;
  1310. }
  1311. packet_buf[2] = (u8)(temp>>8);
  1312. packet_buf[3] = (u8)temp;
  1313. temp =1;
  1314. packet_buf[4] = (u8)(temp>>8);
  1315. packet_buf[5] = (u8)temp;
  1316. packet_buf[6] = pbt_buf[ dw_lenth + i];
  1317. bt_ecc ^= packet_buf[6];
  1318. fts_i2c_write(client, packet_buf, 7);
  1319. msleep(10);
  1320. }
  1321. }
  1322. /*********Step 6: read out checksum***********************/
  1323. auc_i2c_write_buf[0] = FTS_REG_ECC;
  1324. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  1325. if(reg_val[0] != bt_ecc)
  1326. {
  1327. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n", reg_val[0], bt_ecc);
  1328. return -EIO;
  1329. }
  1330. /*********Step 7: reset the new FW***********************/
  1331. auc_i2c_write_buf[0] = FTS_REG_RESET_FW;
  1332. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1333. msleep(300);
  1334. return 0;
  1335. }
  1336. /************************************************************************
  1337. * Name: fts_5822_ctpm_fw_upgrade
  1338. * Brief: fw upgrade
  1339. * Input: i2c info, file buf, file len
  1340. * Output: no
  1341. * Return: fail <0
  1342. ***********************************************************************/
  1343. int fts_5822_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  1344. {
  1345. u8 reg_val[4] = {0};
  1346. u32 i = 0;
  1347. u32 packet_number;
  1348. u32 j;
  1349. u32 temp;
  1350. u32 lenght;
  1351. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  1352. u8 auc_i2c_write_buf[10];
  1353. u8 bt_ecc;
  1354. u8 bt_ecc_check;
  1355. int i_ret;
  1356. i_ret = hidi2c_to_stdi2c(client);
  1357. if (i_ret == 0)
  1358. {
  1359. TPD_DEBUG("HidI2c change to StdI2c fail ! \n");
  1360. }
  1361. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  1362. {
  1363. /*********Step 1:Reset CTPM *****/
  1364. fts_write_reg(client, 0xfc, FTS_UPGRADE_AA);
  1365. msleep(fts_updateinfo_curr.delay_aa);
  1366. fts_write_reg(client, 0xfc, FTS_UPGRADE_55);
  1367. msleep(200);
  1368. /*********Step 2:Enter upgrade mode *****/
  1369. i_ret = hidi2c_to_stdi2c(client);
  1370. if (i_ret == 0)
  1371. {
  1372. TPD_DEBUG("HidI2c change to StdI2c fail ! \n");
  1373. }
  1374. msleep(5);
  1375. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  1376. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  1377. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  1378. if (i_ret < 0)
  1379. {
  1380. TPD_DEBUG("failed writing 0x55 and 0xaa ! \n");
  1381. continue;
  1382. }
  1383. /*********Step 3:check READ-ID***********************/
  1384. msleep(1);
  1385. auc_i2c_write_buf[0] = 0x90;
  1386. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] = 0x00;
  1387. reg_val[0] = reg_val[1] = 0x00;
  1388. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  1389. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1 && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  1390. {
  1391. TPD_DEBUG("[FTS] Step 3: READ OK CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  1392. break;
  1393. }
  1394. else
  1395. {
  1396. dev_err(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n", reg_val[0], reg_val[1]);
  1397. continue;
  1398. }
  1399. }
  1400. if (i >= FTS_UPGRADE_LOOP)
  1401. return -EIO;
  1402. /*Step 4:erase app and panel paramenter area*/
  1403. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  1404. auc_i2c_write_buf[0] = 0x61;
  1405. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1406. msleep(1350);
  1407. for (i = 0; i < 15; i++)
  1408. {
  1409. auc_i2c_write_buf[0] = 0x6a;
  1410. reg_val[0] = reg_val[1] = 0x00;
  1411. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1412. if (0xF0 == reg_val[0] && 0xAA == reg_val[1])
  1413. {
  1414. break;
  1415. }
  1416. msleep(50);
  1417. }
  1418. printk("[FTS][%s] erase app area reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1419. auc_i2c_write_buf[0] = 0xB0;
  1420. auc_i2c_write_buf[1] = (u8) ((dw_lenth >> 16) & 0xFF);
  1421. auc_i2c_write_buf[2] = (u8) ((dw_lenth >> 8) & 0xFF);
  1422. auc_i2c_write_buf[3] = (u8) (dw_lenth & 0xFF);
  1423. fts_i2c_write(client, auc_i2c_write_buf, 4);
  1424. /*********Step 5:write firmware(FW) to ctpm flash*********/
  1425. bt_ecc = 0;
  1426. bt_ecc_check = 0;
  1427. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  1428. temp = 0;
  1429. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  1430. packet_buf[0] = 0xbf;
  1431. packet_buf[1] = 0x00;
  1432. for (j = 0; j < packet_number; j++)
  1433. {
  1434. temp = j * FTS_PACKET_LENGTH;
  1435. packet_buf[2] = (u8) (temp >> 8);
  1436. packet_buf[3] = (u8) temp;
  1437. lenght = FTS_PACKET_LENGTH;
  1438. packet_buf[4] = (u8) (lenght >> 8);
  1439. packet_buf[5] = (u8) lenght;
  1440. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  1441. {
  1442. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  1443. bt_ecc_check ^= pbt_buf[j * FTS_PACKET_LENGTH + i];
  1444. bt_ecc ^= packet_buf[6 + i];
  1445. }
  1446. printk("[FTS][%s] bt_ecc = %x \n", __func__, bt_ecc);
  1447. if (bt_ecc != bt_ecc_check)
  1448. printk("[FTS][%s] Host checksum error bt_ecc_check = %x \n", __func__, bt_ecc_check);
  1449. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  1450. for (i = 0; i < 30; i++)
  1451. {
  1452. auc_i2c_write_buf[0] = 0x6a;
  1453. reg_val[0] = reg_val[1] = 0x00;
  1454. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1455. if ((j + 0x1000) == (((reg_val[0]) << 8) | reg_val[1])) {
  1456. break;
  1457. }
  1458. printk("[FTS][%s] reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1459. msleep(1);
  1460. }
  1461. }
  1462. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  1463. {
  1464. temp = packet_number * FTS_PACKET_LENGTH;
  1465. packet_buf[2] = (u8) (temp >> 8);
  1466. packet_buf[3] = (u8) temp;
  1467. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  1468. packet_buf[4] = (u8) (temp >> 8);
  1469. packet_buf[5] = (u8) temp;
  1470. for (i = 0; i < temp; i++)
  1471. {
  1472. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  1473. bt_ecc_check ^= pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  1474. bt_ecc ^= packet_buf[6 + i];
  1475. }
  1476. fts_i2c_write(client, packet_buf, temp + 6);
  1477. printk("[FTS][%s] bt_ecc = %x \n", __func__, bt_ecc);
  1478. if (bt_ecc != bt_ecc_check)
  1479. printk("[FTS][%s] Host checksum error bt_ecc_check = %x \n", __func__, bt_ecc_check);
  1480. for (i = 0; i < 30; i++)
  1481. {
  1482. auc_i2c_write_buf[0] = 0x6a;
  1483. reg_val[0] = reg_val[1] = 0x00;
  1484. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1485. printk("[FTS][%s] reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1486. if ((j + 0x1000) == (((reg_val[0]) << 8) | reg_val[1]))
  1487. {
  1488. break;
  1489. }
  1490. printk("[FTS][%s] reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1491. msleep(1);
  1492. }
  1493. }
  1494. msleep(50);
  1495. /*********Step 6: read out checksum***********************/
  1496. /*send the opration head */
  1497. TPD_DEBUG("Step 6: read out checksum\n");
  1498. auc_i2c_write_buf[0] = 0x64;
  1499. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1500. msleep(300);
  1501. temp = 0;
  1502. auc_i2c_write_buf[0] = 0x65;
  1503. auc_i2c_write_buf[1] = (u8)(temp >> 16);
  1504. auc_i2c_write_buf[2] = (u8)(temp >> 8);
  1505. auc_i2c_write_buf[3] = (u8)(temp);
  1506. temp = dw_lenth;
  1507. auc_i2c_write_buf[4] = (u8)(temp >> 8);
  1508. auc_i2c_write_buf[5] = (u8)(temp);
  1509. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 6);
  1510. msleep(dw_lenth/256);
  1511. for (i = 0; i < 100; i++)
  1512. {
  1513. auc_i2c_write_buf[0] = 0x6a;
  1514. reg_val[0] = reg_val[1] = 0x00;
  1515. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1516. dev_err(&client->dev, "[FTS]--reg_val[0]=%02x reg_val[0]=%02x\n", reg_val[0], reg_val[1]);
  1517. if (0xF0 == reg_val[0] && 0x55 == reg_val[1])
  1518. {
  1519. dev_err(&client->dev, "[FTS]--reg_val[0]=%02x reg_val[0]=%02x\n", reg_val[0], reg_val[1]);
  1520. break;
  1521. }
  1522. msleep(1);
  1523. }
  1524. auc_i2c_write_buf[0] = 0x66;
  1525. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  1526. if (reg_val[0] != bt_ecc)
  1527. {
  1528. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n", reg_val[0], bt_ecc);
  1529. return -EIO;
  1530. }
  1531. printk(KERN_WARNING "checksum %X %X \n", reg_val[0], bt_ecc);
  1532. /*********Step 7: reset the new FW***********************/
  1533. TPD_DEBUG("Step 7: reset the new FW\n");
  1534. auc_i2c_write_buf[0] = 0x07;
  1535. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1536. msleep(200);
  1537. i_ret = hidi2c_to_stdi2c(client);
  1538. if (i_ret == 0)
  1539. {
  1540. TPD_DEBUG("HidI2c change to StdI2c fail ! \n");
  1541. }
  1542. return 0;
  1543. }
  1544. /************************************************************************
  1545. * Name: fts_5x06_ctpm_fw_upgrade
  1546. * Brief: fw upgrade
  1547. * Input: i2c info, file buf, file len
  1548. * Output: no
  1549. * Return: fail <0
  1550. ***********************************************************************/
  1551. int fts_5x06_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  1552. {
  1553. u8 reg_val[2] = {0};
  1554. u32 i = 0;
  1555. u32 packet_number;
  1556. u32 j;
  1557. u32 temp;
  1558. u32 lenght;
  1559. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  1560. u8 auc_i2c_write_buf[10];
  1561. u8 bt_ecc;
  1562. int i_ret;
  1563. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  1564. {
  1565. /*********Step 1:Reset CTPM *****/
  1566. /*write 0xaa to register FTS_RST_CMD_REG1 */
  1567. fts_write_reg(client, FTS_RST_CMD_REG1, FTS_UPGRADE_AA);
  1568. msleep(fts_updateinfo_curr.delay_aa);
  1569. /*write 0x55 to register FTS_RST_CMD_REG1 */
  1570. fts_write_reg(client, FTS_RST_CMD_REG1, FTS_UPGRADE_55);
  1571. msleep(fts_updateinfo_curr.delay_55);
  1572. /*********Step 2:Enter upgrade mode *****/
  1573. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  1574. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  1575. do
  1576. {
  1577. i++;
  1578. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  1579. msleep(5);
  1580. } while (i_ret <= 0 && i < 5);
  1581. /*********Step 3:check READ-ID***********************/
  1582. msleep(fts_updateinfo_curr.delay_readid);
  1583. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  1584. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =0x00;
  1585. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  1586. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  1587. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  1588. {
  1589. TPD_DEBUG("[FTS] Step 3: CTPM ID OK,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0], reg_val[1]);
  1590. break;
  1591. }
  1592. else
  1593. {
  1594. dev_err(&client->dev, "[FTS] Step 3: CTPM ID FAIL,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0], reg_val[1]);
  1595. }
  1596. }
  1597. if (i >= FTS_UPGRADE_LOOP)
  1598. return -EIO;
  1599. /*Step 4:erase app and panel paramenter area*/
  1600. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  1601. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  1602. fts_i2c_write(client, auc_i2c_write_buf, 1); /*erase app area */
  1603. msleep(fts_updateinfo_curr.delay_erase_flash);
  1604. /*erase panel parameter area */
  1605. auc_i2c_write_buf[0] = FTS_ERASE_PARAMS_CMD;
  1606. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1607. msleep(100);
  1608. /*********Step 5:write firmware(FW) to ctpm flash*********/
  1609. bt_ecc = 0;
  1610. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  1611. dw_lenth = dw_lenth - 8;
  1612. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  1613. packet_buf[0] = FTS_FW_WRITE_CMD;
  1614. packet_buf[1] = 0x00;
  1615. for (j = 0; j < packet_number; j++)
  1616. {
  1617. temp = j * FTS_PACKET_LENGTH;
  1618. packet_buf[2] = (u8) (temp >> 8);
  1619. packet_buf[3] = (u8) temp;
  1620. lenght = FTS_PACKET_LENGTH;
  1621. packet_buf[4] = (u8) (lenght >> 8);
  1622. packet_buf[5] = (u8) lenght;
  1623. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  1624. {
  1625. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  1626. bt_ecc ^= packet_buf[6 + i];
  1627. }
  1628. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  1629. msleep(FTS_PACKET_LENGTH / 6 + 1);
  1630. }
  1631. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  1632. {
  1633. temp = packet_number * FTS_PACKET_LENGTH;
  1634. packet_buf[2] = (u8) (temp >> 8);
  1635. packet_buf[3] = (u8) temp;
  1636. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  1637. packet_buf[4] = (u8) (temp >> 8);
  1638. packet_buf[5] = (u8) temp;
  1639. for (i = 0; i < temp; i++)
  1640. {
  1641. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  1642. bt_ecc ^= packet_buf[6 + i];
  1643. }
  1644. fts_i2c_write(client, packet_buf, temp + 6);
  1645. msleep(20);
  1646. }
  1647. /*send the last six byte */
  1648. for (i = 0; i < 6; i++)
  1649. {
  1650. temp = 0x6ffa + i;
  1651. packet_buf[2] = (u8) (temp >> 8);
  1652. packet_buf[3] = (u8) temp;
  1653. temp = 1;
  1654. packet_buf[4] = (u8) (temp >> 8);
  1655. packet_buf[5] = (u8) temp;
  1656. packet_buf[6] = pbt_buf[dw_lenth + i];
  1657. bt_ecc ^= packet_buf[6];
  1658. fts_i2c_write(client, packet_buf, 7);
  1659. msleep(20);
  1660. }
  1661. /*********Step 6: read out checksum***********************/
  1662. /*send the opration head */
  1663. TPD_DEBUG("Step 6: read out checksum\n");
  1664. auc_i2c_write_buf[0] = FTS_REG_ECC;
  1665. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  1666. if (reg_val[0] != bt_ecc)
  1667. {
  1668. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",
  1669. reg_val[0],
  1670. bt_ecc);
  1671. return -EIO;
  1672. }
  1673. /*********Step 7: reset the new FW***********************/
  1674. TPD_DEBUG("Step 7: reset the new FW\n");
  1675. auc_i2c_write_buf[0] = FTS_REG_RESET_FW;
  1676. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1677. msleep(300); /*make sure CTP startup normally */
  1678. return 0;
  1679. }
  1680. /************************************************************************
  1681. * Name: fts_5x46_ctpm_fw_upgrade
  1682. * Brief: fw upgrade
  1683. * Input: i2c info, file buf, file len
  1684. * Output: no
  1685. * Return: fail <0
  1686. ***********************************************************************/
  1687. int fts_5x46_ctpm_fw_upgrade(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth)
  1688. {
  1689. u8 reg_val[4] = {0};
  1690. u32 i = 0;
  1691. u32 packet_number;
  1692. u32 j;
  1693. u32 temp;
  1694. u32 lenght;
  1695. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  1696. u8 auc_i2c_write_buf[10];
  1697. u8 bt_ecc;
  1698. int i_ret;
  1699. i_ret = hidi2c_to_stdi2c(client);
  1700. if(i_ret == 0)
  1701. {
  1702. TPD_DEBUG("[FTS] hid change to i2c fail ! \n");
  1703. }
  1704. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  1705. {
  1706. /*********Step 1:Reset CTPM *****/
  1707. /*write 0xaa to register FTS_RST_CMD_REG1 */
  1708. fts_write_reg(client, FTS_RST_CMD_REG1, FTS_UPGRADE_AA);
  1709. msleep(fts_updateinfo_curr.delay_aa);
  1710. //write 0x55 to register FTS_RST_CMD_REG1
  1711. fts_write_reg(client, FTS_RST_CMD_REG1, FTS_UPGRADE_55);
  1712. msleep(200);
  1713. /*********Step 2:Enter upgrade mode *****/
  1714. i_ret = hidi2c_to_stdi2c(client);
  1715. if(i_ret == 0)
  1716. {
  1717. TPD_DEBUG("[FTS] hid change to i2c fail ! \n");
  1718. }
  1719. msleep(10);
  1720. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  1721. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  1722. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  1723. if(i_ret < 0)
  1724. {
  1725. TPD_DEBUG("[FTS] failed writing 0x55 and 0xaa ! \n");
  1726. continue;
  1727. }
  1728. /*********Step 3:check READ-ID***********************/
  1729. msleep(1);
  1730. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  1731. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =0x00;
  1732. reg_val[0] = reg_val[1] = 0x00;
  1733. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  1734. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  1735. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  1736. {
  1737. TPD_DEBUG("[FTS] Step 3: READ OK CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0], reg_val[1]);
  1738. break;
  1739. }
  1740. else
  1741. {
  1742. dev_err(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0], reg_val[1]);
  1743. continue;
  1744. }
  1745. }
  1746. if (i >= FTS_UPGRADE_LOOP )
  1747. return -EIO;
  1748. /*Step 4:erase app and panel paramenter area*/
  1749. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  1750. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  1751. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1752. msleep(1350);
  1753. for(i = 0;i < 15;i++)
  1754. {
  1755. auc_i2c_write_buf[0] = 0x6a;
  1756. reg_val[0] = reg_val[1] = 0x00;
  1757. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1758. if(0xF0==reg_val[0] && 0xAA==reg_val[1])
  1759. {
  1760. break;
  1761. }
  1762. msleep(50);
  1763. }
  1764. printk("[FTS][%s] erase app area reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1765. auc_i2c_write_buf[0] = 0xB0;
  1766. auc_i2c_write_buf[1] = (u8) ((dw_lenth >> 16) & 0xFF);
  1767. auc_i2c_write_buf[2] = (u8) ((dw_lenth >> 8) & 0xFF);
  1768. auc_i2c_write_buf[3] = (u8) (dw_lenth & 0xFF);
  1769. fts_i2c_write(client, auc_i2c_write_buf, 4);
  1770. /*********Step 5:write firmware(FW) to ctpm flash*********/
  1771. bt_ecc = 0;
  1772. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  1773. temp = 0;
  1774. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  1775. packet_buf[0] = FTS_FW_WRITE_CMD;
  1776. packet_buf[1] = 0x00;
  1777. for (j = 0; j < packet_number; j++)
  1778. {
  1779. temp = j * FTS_PACKET_LENGTH;
  1780. packet_buf[2] = (u8) (temp >> 8);
  1781. packet_buf[3] = (u8) temp;
  1782. lenght = FTS_PACKET_LENGTH;
  1783. packet_buf[4] = (u8) (lenght >> 8);
  1784. packet_buf[5] = (u8) lenght;
  1785. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  1786. {
  1787. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  1788. bt_ecc ^= packet_buf[6 + i];
  1789. }
  1790. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  1791. msleep(20);
  1792. /*
  1793. for(i = 0;i < 30;i++)
  1794. {
  1795. auc_i2c_write_buf[0] = 0x6a;
  1796. reg_val[0] = reg_val[1] = 0x00;
  1797. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1798. if ((j + 0x1000) == (((reg_val[0]) << 8) | reg_val[1]))
  1799. {
  1800. break;
  1801. }
  1802. printk("[FTS][%s] reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1803. msleep(1);
  1804. }*/
  1805. }
  1806. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  1807. {
  1808. temp = packet_number * FTS_PACKET_LENGTH;
  1809. packet_buf[2] = (u8) (temp >> 8);
  1810. packet_buf[3] = (u8) temp;
  1811. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  1812. packet_buf[4] = (u8) (temp >> 8);
  1813. packet_buf[5] = (u8) temp;
  1814. for (i = 0; i < temp; i++)
  1815. {
  1816. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  1817. bt_ecc ^= packet_buf[6 + i];
  1818. }
  1819. fts_i2c_write(client, packet_buf, temp + 6);
  1820. for(i = 0;i < 30;i++)
  1821. {
  1822. auc_i2c_write_buf[0] = 0x6a;
  1823. reg_val[0] = reg_val[1] = 0x00;
  1824. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1825. printk("[FTS][%s] reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1826. if ((j + 0x1000) == (((reg_val[0]) << 8) | reg_val[1]))
  1827. {
  1828. break;
  1829. }
  1830. printk("[FTS][%s] reg_val[0] = %x reg_val[1] = %x \n", __func__, reg_val[0], reg_val[1]);
  1831. msleep(1);
  1832. }
  1833. }
  1834. msleep(50);
  1835. /*********Step 6: read out checksum***********************/
  1836. /*send the opration head */
  1837. TPD_DEBUG("Step 6: read out checksum\n");
  1838. auc_i2c_write_buf[0] = 0x64;
  1839. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1840. msleep(300);
  1841. temp = 0;
  1842. auc_i2c_write_buf[0] = 0x65;
  1843. auc_i2c_write_buf[1] = (u8)(temp >> 16);
  1844. auc_i2c_write_buf[2] = (u8)(temp >> 8);
  1845. auc_i2c_write_buf[3] = (u8)(temp);
  1846. temp = dw_lenth;
  1847. auc_i2c_write_buf[4] = (u8)(temp >> 8);
  1848. auc_i2c_write_buf[5] = (u8)(temp);
  1849. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 6);
  1850. msleep(dw_lenth/256);
  1851. for(i = 0;i < 100;i++)
  1852. {
  1853. auc_i2c_write_buf[0] = 0x6a;
  1854. reg_val[0] = reg_val[1] = 0x00;
  1855. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  1856. dev_err(&client->dev, "[FTS]--reg_val[0]=%02x reg_val[0]=%02x\n", reg_val[0], reg_val[1]);
  1857. if (0xF0==reg_val[0] && 0x55==reg_val[1])
  1858. {
  1859. dev_err(&client->dev, "[FTS]--reg_val[0]=%02x reg_val[0]=%02x\n", reg_val[0], reg_val[1]);
  1860. break;
  1861. }
  1862. msleep(1);
  1863. }
  1864. auc_i2c_write_buf[0] = 0x66;
  1865. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  1866. if (reg_val[0] != bt_ecc)
  1867. {
  1868. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",
  1869. reg_val[0],
  1870. bt_ecc);
  1871. return -EIO;
  1872. }
  1873. printk(KERN_WARNING "checksum %X %X \n",reg_val[0],bt_ecc);
  1874. /*********Step 7: reset the new FW***********************/
  1875. TPD_DEBUG("Step 7: reset the new FW\n");
  1876. auc_i2c_write_buf[0] = FTS_REG_RESET_FW;
  1877. fts_i2c_write(client, auc_i2c_write_buf, 1);
  1878. msleep(200);
  1879. i_ret = hidi2c_to_stdi2c(client);
  1880. if (i_ret == 0)
  1881. {
  1882. TPD_DEBUG("HidI2c change to StdI2c fail ! \n");
  1883. }
  1884. return 0;
  1885. }
  1886. /************************************************************************
  1887. * Name: fts_8606_writepram
  1888. * Brief: fw upgrade
  1889. * Input: i2c info, file buf, file len
  1890. * Output: no
  1891. * Return: fail <0
  1892. ***********************************************************************/
  1893. int fts_8606_writepram(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth)
  1894. {
  1895. u8 reg_val[4] = {0};
  1896. u32 i = 0;
  1897. u32 packet_number;
  1898. u32 j;
  1899. u32 temp;
  1900. u32 lenght;
  1901. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  1902. u8 auc_i2c_write_buf[10];
  1903. u8 bt_ecc;
  1904. int i_ret;
  1905. TPD_DEBUG("8606 dw_lenth= %d",dw_lenth);
  1906. if(dw_lenth > 0x10000 || dw_lenth ==0)
  1907. {
  1908. return -EIO;
  1909. }
  1910. for (i = 0; i < 20; i++)
  1911. {
  1912. fts_write_reg(client, 0xfc, FTS_UPGRADE_AA);
  1913. msleep(fts_updateinfo_curr.delay_aa);
  1914. fts_write_reg(client, 0xfc, FTS_UPGRADE_55);
  1915. msleep(200);
  1916. /*********Step 2:Enter upgrade mode *****/
  1917. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  1918. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 1);
  1919. if(i_ret < 0)
  1920. {
  1921. TPD_DEBUG("[FTS] failed writing 0x55 ! \n");
  1922. continue;
  1923. }
  1924. /*********Step 3:check READ-ID***********************/
  1925. msleep(1);
  1926. auc_i2c_write_buf[0] = 0x90;
  1927. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =
  1928. 0x00;
  1929. reg_val[0] = reg_val[1] = 0x00;
  1930. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  1931. if ((reg_val[0] == 0x86
  1932. && reg_val[1] == 0x06) || (reg_val[0] == 0x86
  1933. && reg_val[1] == 0x07))
  1934. {
  1935. msleep(50);
  1936. break;
  1937. }
  1938. else
  1939. {
  1940. dev_err(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",
  1941. reg_val[0], reg_val[1]);
  1942. continue;
  1943. }
  1944. }
  1945. if (i >= FTS_UPGRADE_LOOP )
  1946. return -EIO;
  1947. /*********Step 4:write firmware(FW) to ctpm flash*********/
  1948. bt_ecc = 0;
  1949. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  1950. temp = 0;
  1951. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  1952. packet_buf[0] = 0xae;
  1953. packet_buf[1] = 0x00;
  1954. for (j = 0; j < packet_number; j++)
  1955. {
  1956. temp = j * FTS_PACKET_LENGTH;
  1957. packet_buf[2] = (u8) (temp >> 8);
  1958. packet_buf[3] = (u8) temp;
  1959. lenght = FTS_PACKET_LENGTH;
  1960. packet_buf[4] = (u8) (lenght >> 8);
  1961. packet_buf[5] = (u8) lenght;
  1962. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  1963. {
  1964. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  1965. bt_ecc ^= packet_buf[6 + i];
  1966. }
  1967. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  1968. }
  1969. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  1970. {
  1971. temp = packet_number * FTS_PACKET_LENGTH;
  1972. packet_buf[2] = (u8) (temp >> 8);
  1973. packet_buf[3] = (u8) temp;
  1974. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  1975. packet_buf[4] = (u8) (temp >> 8);
  1976. packet_buf[5] = (u8) temp;
  1977. for (i = 0; i < temp; i++)
  1978. {
  1979. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  1980. bt_ecc ^= packet_buf[6 + i];
  1981. }
  1982. fts_i2c_write(client, packet_buf, temp + 6);
  1983. }
  1984. /*********Step 5: read out checksum***********************/
  1985. /*send the opration head */
  1986. TPD_DEBUG("Step 6: read out checksum\n");
  1987. auc_i2c_write_buf[0] = 0xcc;
  1988. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  1989. if (reg_val[0] != bt_ecc)
  1990. {
  1991. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",reg_val[0],bt_ecc);
  1992. return -EIO;
  1993. }
  1994. TPD_DEBUG("checksum %X %X \n",reg_val[0],bt_ecc);
  1995. TPD_DEBUG("Read flash and compare\n");
  1996. msleep(50);
  1997. /*********Step 6: start app***********************/
  1998. TPD_DEBUG("Step 6: start app\n");
  1999. auc_i2c_write_buf[0] = 0x08;
  2000. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2001. msleep(20);
  2002. return 0;
  2003. }
  2004. /************************************************************************
  2005. * Name: fts_8606_ctpm_fw_upgrade
  2006. * Brief: fw upgrade
  2007. * Input: i2c info, file buf, file len
  2008. * Output: no
  2009. * Return: fail <0
  2010. ***********************************************************************/
  2011. int fts_8606_ctpm_fw_upgrade(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth)
  2012. {
  2013. u8 reg_val[4] = {0};
  2014. u8 reg_val_id[4] = {0};
  2015. u32 i = 0;
  2016. u32 packet_number;
  2017. u32 j;
  2018. u32 temp;
  2019. u32 lenght;
  2020. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  2021. u8 auc_i2c_write_buf[10];
  2022. u8 bt_ecc;
  2023. int i_ret;
  2024. unsigned char cmd[20];
  2025. unsigned char Checksum = 0;
  2026. auc_i2c_write_buf[0] = 0x05;
  2027. reg_val_id[0] = 0x00;
  2028. i_ret =fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val_id, 1);
  2029. if(dw_lenth == 0)
  2030. {
  2031. return -EIO;
  2032. }
  2033. if(0x81 == (int)reg_val_id[0])
  2034. {
  2035. if(dw_lenth > 1024*60)
  2036. {
  2037. return -EIO;
  2038. }
  2039. }
  2040. else if(0x80 == (int)reg_val_id[0])
  2041. {
  2042. if(dw_lenth > 1024*64)
  2043. {
  2044. return -EIO;
  2045. }
  2046. }
  2047. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  2048. {
  2049. msleep(10);
  2050. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  2051. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  2052. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  2053. if(i_ret < 0)
  2054. {
  2055. TPD_DEBUG("failed writing 0x55 and 0xaa ! \n");
  2056. continue;
  2057. }
  2058. /*********Step 3:check READ-ID***********************/
  2059. msleep(1);
  2060. auc_i2c_write_buf[0] = 0x90;
  2061. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] = 0x00;
  2062. reg_val[0] = reg_val[1] = 0x00;
  2063. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  2064. if ((reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  2065. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)|| (reg_val[0] == 0x86 && reg_val[1] == 0xA6)) {
  2066. TPD_DEBUG("[FTS] Step 3: READ OK CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",
  2067. reg_val[0], reg_val[1]);
  2068. break;
  2069. } else {
  2070. dev_err(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",
  2071. reg_val[0], reg_val[1]);
  2072. continue;
  2073. }
  2074. }
  2075. if (i >= FTS_UPGRADE_LOOP )
  2076. return -EIO;
  2077. /*Step 4:erase app and panel paramenter area*/
  2078. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  2079. {
  2080. cmd[0] = 0x05;
  2081. cmd[1] = reg_val_id[0];//0x80;
  2082. cmd[2] = 0x00;//???
  2083. fts_i2c_write(client, cmd, 3);
  2084. }
  2085. {
  2086. cmd[0] = 0x09;
  2087. cmd[1] = 0x0B;
  2088. fts_i2c_write(client, cmd, 2);
  2089. }
  2090. for(i=0; i<dw_lenth ; i++)
  2091. {
  2092. Checksum ^= pbt_buf[i];
  2093. }
  2094. msleep(50);
  2095. auc_i2c_write_buf[0] = 0x61;
  2096. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2097. msleep(1350);
  2098. for(i = 0;i < 15;i++)
  2099. {
  2100. auc_i2c_write_buf[0] = 0x6a;
  2101. reg_val[0] = reg_val[1] = 0x00;
  2102. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2103. if(0xF0==reg_val[0] && 0xAA==reg_val[1])
  2104. {
  2105. break;
  2106. }
  2107. msleep(50);
  2108. }
  2109. bt_ecc = 0;
  2110. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  2111. temp = 0;
  2112. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  2113. packet_buf[0] = 0xbf;
  2114. for (j = 0; j < packet_number; j++) {
  2115. temp = 0x1000+j * FTS_PACKET_LENGTH;
  2116. packet_buf[1] = (u8) (temp >> 16);
  2117. packet_buf[2] = (u8) (temp >> 8);
  2118. packet_buf[3] = (u8) temp;
  2119. lenght = FTS_PACKET_LENGTH;
  2120. packet_buf[4] = (u8) (lenght >> 8);
  2121. packet_buf[5] = (u8) lenght;
  2122. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  2123. {
  2124. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  2125. bt_ecc ^= packet_buf[6 + i];
  2126. }
  2127. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  2128. for(i = 0;i < 30;i++)
  2129. {
  2130. auc_i2c_write_buf[0] = 0x6a;
  2131. reg_val[0] = reg_val[1] = 0x00;
  2132. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2133. if ((j + 0x1000) == (((reg_val[0]) << 8) | reg_val[1]))
  2134. {
  2135. break;
  2136. }
  2137. msleep(1);
  2138. }
  2139. }
  2140. if ((dw_lenth) % FTS_PACKET_LENGTH > 0) {
  2141. temp = 0x1000+packet_number * FTS_PACKET_LENGTH;
  2142. packet_buf[1] = (u8) (temp >> 16);
  2143. packet_buf[2] = (u8) (temp >> 8);
  2144. packet_buf[3] = (u8) temp;
  2145. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  2146. packet_buf[4] = (u8) (temp >> 8);
  2147. packet_buf[5] = (u8) temp;
  2148. for (i = 0; i < temp; i++) {
  2149. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  2150. bt_ecc ^= packet_buf[6 + i];
  2151. }
  2152. fts_i2c_write(client, packet_buf, temp + 6);
  2153. for(i = 0;i < 30;i++)
  2154. {
  2155. auc_i2c_write_buf[0] = 0x6a;
  2156. reg_val[0] = reg_val[1] = 0x00;
  2157. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2158. if ((j + 0x1000) == (((reg_val[0]) << 8) | reg_val[1]))
  2159. {
  2160. break;
  2161. }
  2162. msleep(1);
  2163. }
  2164. }
  2165. msleep(50);
  2166. /*********Step 6: read out checksum***********************/
  2167. /*send the opration head */
  2168. TPD_DEBUG("Step 6: read out checksum\n");
  2169. auc_i2c_write_buf[0] = 0x64;
  2170. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2171. msleep(300);
  2172. temp = 0x1000+0;
  2173. auc_i2c_write_buf[0] = 0x65;
  2174. auc_i2c_write_buf[1] = (u8)(temp >> 16);
  2175. auc_i2c_write_buf[2] = (u8)(temp >> 8);
  2176. auc_i2c_write_buf[3] = (u8)(temp);
  2177. if (dw_lenth > LEN_FLASH_ECC_MAX)
  2178. {
  2179. temp = LEN_FLASH_ECC_MAX;
  2180. }
  2181. else
  2182. {
  2183. temp = dw_lenth;
  2184. TPD_DEBUG("Step 6_1: read out checksum\n");
  2185. }
  2186. auc_i2c_write_buf[4] = (u8)(temp >> 8);
  2187. auc_i2c_write_buf[5] = (u8)(temp);
  2188. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 6);
  2189. msleep(dw_lenth/256);
  2190. for(i = 0;i < 100;i++)
  2191. {
  2192. auc_i2c_write_buf[0] = 0x6a;
  2193. reg_val[0] = reg_val[1] = 0x00;
  2194. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2195. if (0xF0==reg_val[0] && 0x55==reg_val[1])
  2196. {
  2197. break;
  2198. }
  2199. msleep(1);
  2200. }
  2201. //----------------------------------------------------------------------
  2202. if (dw_lenth > LEN_FLASH_ECC_MAX)
  2203. {
  2204. temp = LEN_FLASH_ECC_MAX;//??? 0x1000+LEN_FLASH_ECC_MAX
  2205. auc_i2c_write_buf[0] = 0x65;
  2206. auc_i2c_write_buf[1] = (u8)(temp >> 16);
  2207. auc_i2c_write_buf[2] = (u8)(temp >> 8);
  2208. auc_i2c_write_buf[3] = (u8)(temp);
  2209. temp = dw_lenth-LEN_FLASH_ECC_MAX;
  2210. auc_i2c_write_buf[4] = (u8)(temp >> 8);
  2211. auc_i2c_write_buf[5] = (u8)(temp);
  2212. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 6);
  2213. msleep(dw_lenth/256);
  2214. for(i = 0;i < 100;i++)
  2215. {
  2216. auc_i2c_write_buf[0] = 0x6a;
  2217. reg_val[0] = reg_val[1] = 0x00;
  2218. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2219. if (0xF0==reg_val[0] && 0x55==reg_val[1])
  2220. {
  2221. break;
  2222. }
  2223. msleep(1);
  2224. }
  2225. }
  2226. auc_i2c_write_buf[0] = 0x66;
  2227. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  2228. if (reg_val[0] != bt_ecc)
  2229. {
  2230. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",
  2231. reg_val[0],
  2232. bt_ecc);
  2233. return -EIO;
  2234. }
  2235. TPD_DEBUG("checksum %X %X \n",reg_val[0],bt_ecc);
  2236. /*********Step 7: reset the new FW***********************/
  2237. TPD_DEBUG("Step 7: reset the new FW\n");
  2238. auc_i2c_write_buf[0] = 0x07;
  2239. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2240. msleep(200); //make sure CTP startup normally
  2241. return 0;
  2242. }
  2243. /************************************************************************
  2244. * Name: fts_8716_ctpm_fw_write_pram
  2245. * Brief: fw upgrade
  2246. * Input: i2c info, file buf, file len
  2247. * Output: no
  2248. * Return: fail <0
  2249. ***********************************************************************/
  2250. int fts_8716_writepram(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth)
  2251. {
  2252. u8 reg_val[4] = {0};
  2253. u32 i = 0;
  2254. u32 packet_number;
  2255. u32 j;
  2256. u32 temp;
  2257. u32 lenght;
  2258. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  2259. u8 auc_i2c_write_buf[10];
  2260. u8 bt_ecc;
  2261. int i_ret;
  2262. TPD_DEBUG("8716 dw_lenth= %d",dw_lenth);
  2263. if(dw_lenth > 0x10000 || dw_lenth ==0)
  2264. {
  2265. return -EIO;
  2266. }
  2267. for (i = 0; i < 20; i++)
  2268. {
  2269. fts_write_reg(client, 0xfc, FTS_UPGRADE_AA);
  2270. msleep(fts_updateinfo_curr.delay_aa);
  2271. fts_write_reg(client, 0xfc, FTS_UPGRADE_55);
  2272. msleep(200);
  2273. /********* Step 2:Enter upgrade mode *****/
  2274. i_ret = hidi2c_to_stdi2c(client);
  2275. if(i_ret == 0)
  2276. {
  2277. TPD_DEBUG("[FTS] hid change to i2c fail ! \n");
  2278. }
  2279. msleep(10);
  2280. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  2281. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 1);
  2282. if(i_ret < 0)
  2283. {
  2284. TPD_DEBUG("[FTS] failed writing 0x55 ! \n");
  2285. continue;
  2286. }
  2287. /********* Step 3:check READ-ID ***********************/
  2288. msleep(1);
  2289. auc_i2c_write_buf[0] = 0x90;
  2290. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =
  2291. 0x00;
  2292. reg_val[0] = reg_val[1] = 0x00;
  2293. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  2294. if ((reg_val[0] == 0x87
  2295. && reg_val[1] == 0x16))
  2296. {
  2297. TPD_DEBUG("[FTS] Step 3: READ CTPM ID OK,ID1 = 0x%x,ID2 = 0x%x\n",
  2298. reg_val[0], reg_val[1]);
  2299. break;
  2300. }
  2301. else
  2302. {
  2303. dev_err(&client->dev, "[FTS] Step 3: READ CTPM ID FAIL,ID1 = 0x%x,ID2 = 0x%x\n",
  2304. reg_val[0], reg_val[1]);
  2305. continue;
  2306. }
  2307. }
  2308. if (i >= FTS_UPGRADE_LOOP )
  2309. return -EIO;
  2310. /********* Step 4:write firmware(FW) to ctpm flash *********/
  2311. bt_ecc = 0;
  2312. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  2313. temp = 0;
  2314. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  2315. packet_buf[0] = 0xae;
  2316. packet_buf[1] = 0x00;
  2317. for (j = 0; j < packet_number; j++)
  2318. {
  2319. temp = j * FTS_PACKET_LENGTH;
  2320. packet_buf[2] = (u8) (temp >> 8);
  2321. packet_buf[3] = (u8) temp;
  2322. lenght = FTS_PACKET_LENGTH;
  2323. packet_buf[4] = (u8) (lenght >> 8);
  2324. packet_buf[5] = (u8) lenght;
  2325. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  2326. {
  2327. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  2328. bt_ecc ^= packet_buf[6 + i];
  2329. }
  2330. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  2331. }
  2332. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  2333. {
  2334. temp = packet_number * FTS_PACKET_LENGTH;
  2335. packet_buf[2] = (u8) (temp >> 8);
  2336. packet_buf[3] = (u8) temp;
  2337. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  2338. packet_buf[4] = (u8) (temp >> 8);
  2339. packet_buf[5] = (u8) temp;
  2340. for (i = 0; i < temp; i++)
  2341. {
  2342. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  2343. bt_ecc ^= packet_buf[6 + i];
  2344. }
  2345. fts_i2c_write(client, packet_buf, temp + 6);
  2346. }
  2347. /********* Step 5: read out checksum ***********************/
  2348. /* send the opration head */
  2349. TPD_DEBUG("Step 6: read out checksum\n");
  2350. auc_i2c_write_buf[0] = 0xcc;
  2351. msleep(2);
  2352. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  2353. if (reg_val[0] != bt_ecc)
  2354. {
  2355. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",reg_val[0],bt_ecc);
  2356. return -EIO;
  2357. }
  2358. printk(KERN_WARNING "checksum %X %X \n",reg_val[0],bt_ecc);
  2359. msleep(100);
  2360. /********* Step 6: start app ***********************/
  2361. TPD_DEBUG("Step 6: start app\n");
  2362. auc_i2c_write_buf[0] = 0x08;
  2363. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2364. msleep(20);
  2365. return 0;
  2366. }
  2367. /************************************************************************
  2368. * Name: fts_8716_ctpm_fw_upgrade
  2369. * Brief: fw upgrade
  2370. * Input: i2c info, file buf, file len
  2371. * Output: no
  2372. * Return: fail <0
  2373. ***********************************************************************/
  2374. int fts_8716_ctpm_fw_upgrade(struct i2c_client * client, u8* pbt_buf, u32 dw_lenth)
  2375. {
  2376. u8 reg_val[4] = {0};
  2377. u8 reg_val_id[4] = {0};
  2378. u32 i = 0;
  2379. u32 packet_number;
  2380. u32 j;
  2381. u32 temp;
  2382. u32 lenght;
  2383. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  2384. u8 auc_i2c_write_buf[10];
  2385. u8 bt_ecc;
  2386. int i_ret;
  2387. unsigned char cmd[20];
  2388. unsigned char Checksum = 0;
  2389. i_ret = hidi2c_to_stdi2c(client);
  2390. if(i_ret == 0)
  2391. {
  2392. TPD_DEBUG("[FTS] hid change to i2c fail ! \n");
  2393. }
  2394. auc_i2c_write_buf[0] = 0x05;
  2395. reg_val_id[0] = 0x00;
  2396. i_ret =fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val_id, 1);
  2397. if(dw_lenth == 0)
  2398. {
  2399. return -EIO;
  2400. }
  2401. if(0x81 == (int)reg_val_id[0])
  2402. {
  2403. if(dw_lenth > 1024*60)
  2404. {
  2405. return -EIO;
  2406. }
  2407. }
  2408. else if(0x80 == (int)reg_val_id[0])
  2409. {
  2410. if(dw_lenth > 1024*64)
  2411. {
  2412. return -EIO;
  2413. }
  2414. }
  2415. for (i = 0; i < FTS_UPGRADE_LOOP; i++) {
  2416. /********* Step 1:Reset CTPM *****/
  2417. msleep(10);
  2418. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  2419. auc_i2c_write_buf[1] = FTS_UPGRADE_AA;
  2420. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  2421. if(i_ret < 0)
  2422. {
  2423. TPD_DEBUG("failed writing 0x55 and 0xaa ! \n");
  2424. continue;
  2425. }
  2426. /********* Step 3:check READ-ID ***********************/
  2427. msleep(1);
  2428. auc_i2c_write_buf[0] = 0x90;
  2429. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] = 0x00;
  2430. reg_val[0] = reg_val[1] = 0x00;
  2431. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  2432. if ((reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  2433. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)/*|| (reg_val[0] == 0x87 && reg_val[1] == 0xA6)*/) {
  2434. TPD_DEBUG("[FTS] Step 3: READ OK CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",
  2435. reg_val[0], reg_val[1]);
  2436. break;
  2437. } else {
  2438. dev_err(&client->dev, "[FTS] Step 3: READ FAIL CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",
  2439. reg_val[0], reg_val[1]);
  2440. continue;
  2441. }
  2442. }
  2443. if (i >= FTS_UPGRADE_LOOP )
  2444. return -EIO;
  2445. /* Step 4:erase app and panel paramenter area */
  2446. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  2447. {
  2448. cmd[0] = 0x05;
  2449. cmd[1] = reg_val_id[0];//0x80;
  2450. cmd[2] = 0x00;
  2451. fts_i2c_write(client, cmd, 3);
  2452. }
  2453. {
  2454. cmd[0] = 0x09;
  2455. cmd[1] = 0x0B;
  2456. fts_i2c_write(client, cmd, 2);
  2457. }
  2458. for(i=0; i<dw_lenth ; i++)
  2459. {
  2460. Checksum ^= pbt_buf[i];
  2461. }
  2462. msleep(50);
  2463. auc_i2c_write_buf[0] = 0x61;
  2464. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2465. msleep(1350);
  2466. for(i = 0;i < 15;i++)
  2467. {
  2468. auc_i2c_write_buf[0] = 0x6a;
  2469. reg_val[0] = reg_val[1] = 0x00;
  2470. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2471. if(0xF0==reg_val[0] && 0xAA==reg_val[1])
  2472. {
  2473. break;
  2474. }
  2475. msleep(50);
  2476. }
  2477. /********* Step 5:write firmware(FW) to ctpm flash *********/
  2478. bt_ecc = 0;
  2479. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  2480. temp = 0;
  2481. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  2482. packet_buf[0] = 0xbf;
  2483. for (j = 0; j < packet_number; j++) {
  2484. temp = 0x1000+j * FTS_PACKET_LENGTH;
  2485. packet_buf[1] = (u8) (temp >> 16);
  2486. packet_buf[2] = (u8) (temp >> 8);
  2487. packet_buf[3] = (u8) temp;
  2488. lenght = FTS_PACKET_LENGTH;
  2489. packet_buf[4] = (u8) (lenght >> 8);
  2490. packet_buf[5] = (u8) lenght;
  2491. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  2492. {
  2493. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  2494. bt_ecc ^= packet_buf[6 + i];
  2495. }
  2496. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  2497. for(i = 0;i < 30;i++)
  2498. {
  2499. auc_i2c_write_buf[0] = 0x6a;
  2500. reg_val[0] = reg_val[1] = 0x00;
  2501. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2502. if ((j + 0x22+0x1000) == (((reg_val[0]) << 8) | reg_val[1]))
  2503. {
  2504. break;
  2505. }
  2506. msleep(1);
  2507. }
  2508. }
  2509. if ((dw_lenth) % FTS_PACKET_LENGTH > 0) {
  2510. temp = 0x1000+packet_number * FTS_PACKET_LENGTH;
  2511. packet_buf[1] = (u8) (temp >> 16);
  2512. packet_buf[2] = (u8) (temp >> 8);
  2513. packet_buf[3] = (u8) temp;
  2514. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  2515. packet_buf[4] = (u8) (temp >> 8);
  2516. packet_buf[5] = (u8) temp;
  2517. for (i = 0; i < temp; i++) {
  2518. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  2519. bt_ecc ^= packet_buf[6 + i];
  2520. }
  2521. fts_i2c_write(client, packet_buf, temp + 6);
  2522. for(i = 0;i < 30;i++)
  2523. {
  2524. auc_i2c_write_buf[0] = 0x6a;
  2525. reg_val[0] = reg_val[1] = 0x00;
  2526. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2527. if ((j + 0x22+ 0x1000) == (((reg_val[0]) << 8) | reg_val[1]))
  2528. {
  2529. break;
  2530. }
  2531. msleep(1);
  2532. }
  2533. }
  2534. msleep(50);
  2535. /********* Step 6: read out checksum ***********************/
  2536. /*send the opration head */
  2537. TPD_DEBUG("Step 6: read out checksum\n");
  2538. auc_i2c_write_buf[0] = 0x64;
  2539. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2540. msleep(300);
  2541. temp = 0x1000+0;
  2542. auc_i2c_write_buf[0] = 0x65;
  2543. auc_i2c_write_buf[1] = (u8)(temp >> 16);
  2544. auc_i2c_write_buf[2] = (u8)(temp >> 8);
  2545. auc_i2c_write_buf[3] = (u8)(temp);
  2546. if (dw_lenth > LEN_FLASH_ECC_MAX)
  2547. {
  2548. temp = LEN_FLASH_ECC_MAX;
  2549. }
  2550. else
  2551. {
  2552. temp = dw_lenth;
  2553. TPD_DEBUG("Step 6_1: read out checksum\n");
  2554. }
  2555. auc_i2c_write_buf[4] = (u8)(temp >> 8);
  2556. auc_i2c_write_buf[5] = (u8)(temp);
  2557. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 6);
  2558. msleep(dw_lenth/256);
  2559. for(i = 0;i < 100;i++)
  2560. {
  2561. auc_i2c_write_buf[0] = 0x6a;
  2562. reg_val[0] = reg_val[1] = 0x00;
  2563. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2564. if (0xF0==reg_val[0] && 0x55==reg_val[1])
  2565. {
  2566. break;
  2567. }
  2568. msleep(1);
  2569. }
  2570. //----------------------------------------------------------------------
  2571. if (dw_lenth > LEN_FLASH_ECC_MAX)
  2572. {
  2573. temp = LEN_FLASH_ECC_MAX;
  2574. auc_i2c_write_buf[0] = 0x65;
  2575. auc_i2c_write_buf[1] = (u8)(temp >> 16);
  2576. auc_i2c_write_buf[2] = (u8)(temp >> 8);
  2577. auc_i2c_write_buf[3] = (u8)(temp);
  2578. temp = dw_lenth-LEN_FLASH_ECC_MAX;
  2579. auc_i2c_write_buf[4] = (u8)(temp >> 8);
  2580. auc_i2c_write_buf[5] = (u8)(temp);
  2581. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 6);
  2582. msleep(dw_lenth/256);
  2583. for(i = 0;i < 100;i++)
  2584. {
  2585. auc_i2c_write_buf[0] = 0x6a;
  2586. reg_val[0] = reg_val[1] = 0x00;
  2587. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 2);
  2588. if (0xF0==reg_val[0] && 0x55==reg_val[1])
  2589. {
  2590. break;
  2591. }
  2592. msleep(1);
  2593. }
  2594. }
  2595. auc_i2c_write_buf[0] = 0x66;
  2596. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  2597. if (reg_val[0] != bt_ecc)
  2598. {
  2599. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",
  2600. reg_val[0],bt_ecc);
  2601. return -EIO;
  2602. }
  2603. printk(KERN_WARNING "checksum %X %X \n",reg_val[0],bt_ecc);
  2604. /********* Step 7: reset the new FW ***********************/
  2605. TPD_DEBUG("Step 7: reset the new FW\n");
  2606. auc_i2c_write_buf[0] = 0x07;
  2607. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2608. msleep(200);
  2609. return 0;
  2610. }
  2611. /************************************************************************
  2612. * Name: fts_3x07_ctpm_fw_upgrade
  2613. * Brief: fw upgrade
  2614. * Input: i2c info, file buf, file len
  2615. * Output: no
  2616. * Return: fail <0
  2617. ***********************************************************************/
  2618. int fts_3x07_ctpm_fw_upgrade(struct i2c_client *client, u8 *pbt_buf, u32 dw_lenth)
  2619. {
  2620. u8 reg_val[2] = {0};
  2621. u32 i = 0;
  2622. u32 packet_number;
  2623. u32 j;
  2624. u32 temp;
  2625. u32 lenght;
  2626. u32 fw_length;
  2627. u8 packet_buf[FTS_PACKET_LENGTH + 6];
  2628. u8 auc_i2c_write_buf[10];
  2629. u8 bt_ecc;
  2630. if(pbt_buf[0] != 0x02)
  2631. {
  2632. TPD_DEBUG("[FTS] FW first byte is not 0x02. so it is invalid \n");
  2633. return -1;
  2634. }
  2635. if(dw_lenth > 0x11f)
  2636. {
  2637. fw_length = ((u32)pbt_buf[0x100]<<8) + pbt_buf[0x101];
  2638. if(dw_lenth < fw_length)
  2639. {
  2640. TPD_DEBUG("[FTS] Fw length is invalid \n");
  2641. return -1;
  2642. }
  2643. }
  2644. else
  2645. {
  2646. TPD_DEBUG("[FTS] Fw length is invalid \n");
  2647. return -1;
  2648. }
  2649. for (i = 0; i < FTS_UPGRADE_LOOP; i++)
  2650. {
  2651. /*********Step 1:Reset CTPM *****/
  2652. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_AA);
  2653. msleep(fts_updateinfo_curr.delay_aa);
  2654. fts_write_reg(client, FTS_RST_CMD_REG2, FTS_UPGRADE_55);
  2655. msleep(fts_updateinfo_curr.delay_55);
  2656. /*********Step 2:Enter upgrade mode *****/
  2657. auc_i2c_write_buf[0] = FTS_UPGRADE_55;
  2658. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2659. auc_i2c_write_buf[0] = FTS_UPGRADE_AA;
  2660. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2661. msleep(fts_updateinfo_curr.delay_readid);
  2662. /*********Step 3:check READ-ID***********************/
  2663. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  2664. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =0x00;
  2665. reg_val[0] = 0x00;
  2666. reg_val[1] = 0x00;
  2667. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  2668. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1
  2669. && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  2670. {
  2671. TPD_DEBUG("[FTS] Step 3: GET CTPM ID OK,ID1 = 0x%x,ID2 = 0x%x\n",
  2672. reg_val[0], reg_val[1]);
  2673. break;
  2674. }
  2675. else
  2676. {
  2677. dev_err(&client->dev, "[FTS] Step 3: GET CTPM ID FAIL,ID1 = 0x%x,ID2 = 0x%x\n",
  2678. reg_val[0], reg_val[1]);
  2679. }
  2680. }
  2681. if (i >= FTS_UPGRADE_LOOP)
  2682. return -EIO;
  2683. auc_i2c_write_buf[0] = FTS_READ_ID_REG;
  2684. auc_i2c_write_buf[1] = 0x00;
  2685. auc_i2c_write_buf[2] = 0x00;
  2686. auc_i2c_write_buf[3] = 0x00;
  2687. auc_i2c_write_buf[4] = 0x00;
  2688. fts_i2c_write(client, auc_i2c_write_buf, 5);
  2689. /*Step 4:erase app and panel paramenter area*/
  2690. TPD_DEBUG("Step 4:erase app and panel paramenter area\n");
  2691. auc_i2c_write_buf[0] = FTS_ERASE_APP_REG;
  2692. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2693. msleep(fts_updateinfo_curr.delay_erase_flash);
  2694. for(i = 0;i < 200;i++)
  2695. {
  2696. auc_i2c_write_buf[0] = 0x6a;
  2697. auc_i2c_write_buf[1] = 0x00;
  2698. auc_i2c_write_buf[2] = 0x00;
  2699. auc_i2c_write_buf[3] = 0x00;
  2700. reg_val[0] = 0x00;
  2701. reg_val[1] = 0x00;
  2702. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  2703. if(0xb0 == reg_val[0] && 0x02 == reg_val[1])
  2704. {
  2705. TPD_DEBUG("[FTS] erase app finished \n");
  2706. break;
  2707. }
  2708. msleep(50);
  2709. }
  2710. /*********Step 5:write firmware(FW) to ctpm flash*********/
  2711. bt_ecc = 0;
  2712. TPD_DEBUG("Step 5:write firmware(FW) to ctpm flash\n");
  2713. dw_lenth = fw_length;
  2714. packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
  2715. packet_buf[0] = FTS_FW_WRITE_CMD;
  2716. packet_buf[1] = 0x00;
  2717. for (j = 0; j < packet_number; j++)
  2718. {
  2719. temp = j * FTS_PACKET_LENGTH;
  2720. packet_buf[2] = (u8) (temp >> 8);
  2721. packet_buf[3] = (u8) temp;
  2722. lenght = FTS_PACKET_LENGTH;
  2723. packet_buf[4] = (u8) (lenght >> 8);
  2724. packet_buf[5] = (u8) lenght;
  2725. for (i = 0; i < FTS_PACKET_LENGTH; i++)
  2726. {
  2727. packet_buf[6 + i] = pbt_buf[j * FTS_PACKET_LENGTH + i];
  2728. bt_ecc ^= packet_buf[6 + i];
  2729. }
  2730. fts_i2c_write(client, packet_buf, FTS_PACKET_LENGTH + 6);
  2731. for(i = 0;i < 30;i++)
  2732. {
  2733. auc_i2c_write_buf[0] = 0x6a;
  2734. auc_i2c_write_buf[1] = 0x00;
  2735. auc_i2c_write_buf[2] = 0x00;
  2736. auc_i2c_write_buf[3] = 0x00;
  2737. reg_val[0] = 0x00;
  2738. reg_val[1] = 0x00;
  2739. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  2740. if(0xb0 == (reg_val[0] & 0xf0) && (0x03 + (j % 0x0ffd)) == (((reg_val[0] & 0x0f) << 8) |reg_val[1]))
  2741. {
  2742. TPD_DEBUG("[FTS] write a block data finished \n");
  2743. break;
  2744. }
  2745. msleep(1);
  2746. }
  2747. }
  2748. if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
  2749. {
  2750. temp = packet_number * FTS_PACKET_LENGTH;
  2751. packet_buf[2] = (u8) (temp >> 8);
  2752. packet_buf[3] = (u8) temp;
  2753. temp = (dw_lenth) % FTS_PACKET_LENGTH;
  2754. packet_buf[4] = (u8) (temp >> 8);
  2755. packet_buf[5] = (u8) temp;
  2756. for (i = 0; i < temp; i++)
  2757. {
  2758. packet_buf[6 + i] = pbt_buf[packet_number * FTS_PACKET_LENGTH + i];
  2759. bt_ecc ^= packet_buf[6 + i];
  2760. }
  2761. fts_i2c_write(client, packet_buf, temp + 6);
  2762. for(i = 0;i < 30;i++)
  2763. {
  2764. auc_i2c_write_buf[0] = 0x6a;
  2765. auc_i2c_write_buf[1] = 0x00;
  2766. auc_i2c_write_buf[2] = 0x00;
  2767. auc_i2c_write_buf[3] = 0x00;
  2768. reg_val[0] = 0x00;
  2769. reg_val[1] = 0x00;
  2770. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  2771. if(0xb0 == (reg_val[0] & 0xf0) && (0x03 + (j % 0x0ffd)) == (((reg_val[0] & 0x0f) << 8) |reg_val[1]))
  2772. {
  2773. TPD_DEBUG("[FTS] write a block data finished \n");
  2774. break;
  2775. }
  2776. msleep(1);
  2777. }
  2778. }
  2779. /*********Step 6: read out checksum***********************/
  2780. TPD_DEBUG("Step 6: read out checksum\n");
  2781. auc_i2c_write_buf[0] = FTS_REG_ECC;
  2782. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  2783. if (reg_val[0] != bt_ecc)
  2784. {
  2785. dev_err(&client->dev, "[FTS]--ecc error! FW=%02x bt_ecc=%02x\n",
  2786. reg_val[0],
  2787. bt_ecc);
  2788. return -EIO;
  2789. }
  2790. /*********Step 7: reset the new FW***********************/
  2791. TPD_DEBUG("Step 7: reset the new FW\n");
  2792. auc_i2c_write_buf[0] = 0x07;
  2793. fts_i2c_write(client, auc_i2c_write_buf, 1);
  2794. msleep(300);
  2795. return 0;
  2796. }
  2797. /*
  2798. *note:the firmware default path is sdcard.
  2799. if you want to change the dir, please modify by yourself.
  2800. */
  2801. /************************************************************************
  2802. * Name: fts_GetFirmwareSize
  2803. * Brief: get file size
  2804. * Input: file name
  2805. * Output: no
  2806. * Return: file size
  2807. ***********************************************************************/
  2808. static int fts_GetFirmwareSize(char *firmware_name)
  2809. {
  2810. struct file *pfile = NULL;
  2811. struct inode *inode;
  2812. unsigned long magic;
  2813. off_t fsize = 0;
  2814. char filepath[128];
  2815. memset(filepath, 0, sizeof(filepath));
  2816. sprintf(filepath, "%s%s", FTXXXX_INI_FILEPATH_CONFIG, firmware_name);
  2817. if (NULL == pfile)
  2818. {
  2819. pfile = filp_open(filepath, O_RDONLY, 0);
  2820. }
  2821. if (IS_ERR(pfile))
  2822. {
  2823. pr_err("error occured while opening file %s.\n", filepath);
  2824. return -EIO;
  2825. }
  2826. inode = pfile->f_dentry->d_inode;
  2827. magic = inode->i_sb->s_magic;
  2828. fsize = inode->i_size;
  2829. filp_close(pfile, NULL);
  2830. return fsize;
  2831. }
  2832. /************************************************************************
  2833. * Name: fts_ReadFirmware
  2834. * Brief: read firmware buf for .bin file.
  2835. * Input: file name, data buf
  2836. * Output: data buf
  2837. * Return: 0
  2838. ***********************************************************************/
  2839. /*
  2840. note:the firmware default path is sdcard.
  2841. if you want to change the dir, please modify by yourself.
  2842. */
  2843. static int fts_ReadFirmware(char *firmware_name,unsigned char *firmware_buf)
  2844. {
  2845. struct file *pfile = NULL;
  2846. struct inode *inode;
  2847. unsigned long magic;
  2848. off_t fsize;
  2849. char filepath[128];
  2850. loff_t pos;
  2851. mm_segment_t old_fs;
  2852. memset(filepath, 0, sizeof(filepath));
  2853. sprintf(filepath, "%s%s", FTXXXX_INI_FILEPATH_CONFIG, firmware_name);
  2854. if (NULL == pfile)
  2855. {
  2856. pfile = filp_open(filepath, O_RDONLY, 0);
  2857. }
  2858. if (IS_ERR(pfile))
  2859. {
  2860. pr_err("error occured while opening file %s.\n", filepath);
  2861. return -EIO;
  2862. }
  2863. inode = pfile->f_dentry->d_inode;
  2864. magic = inode->i_sb->s_magic;
  2865. fsize = inode->i_size;
  2866. old_fs = get_fs();
  2867. set_fs(KERNEL_DS);
  2868. pos = 0;
  2869. vfs_read(pfile, firmware_buf, fsize, &pos);
  2870. filp_close(pfile, NULL);
  2871. set_fs(old_fs);
  2872. return 0;
  2873. }
  2874. /************************************************************************
  2875. * Name: fts_ctpm_fw_upgrade_with_app_file
  2876. * Brief: upgrade with *.bin file
  2877. * Input: i2c info, file name
  2878. * Output: no
  2879. * Return: success =0
  2880. ***********************************************************************/
  2881. int fts_ctpm_fw_upgrade_with_app_file(struct i2c_client *client, char *firmware_name)
  2882. {
  2883. u8 *pbt_buf = NULL;
  2884. int i_ret=0;
  2885. int fwsize = fts_GetFirmwareSize(firmware_name);
  2886. printk("**********fts_ctpm_fw_upgrade_with_app_file start****************\n");
  2887. if (fwsize <= 0)
  2888. {
  2889. dev_err(&client->dev, "%s ERROR:Get firmware size failed\n",__func__);
  2890. return -EIO;
  2891. }
  2892. if (fwsize < 8 || fwsize > 54 * 1024)
  2893. {
  2894. dev_err(&client->dev, "FW length error\n");
  2895. return -EIO;
  2896. }
  2897. /*=========FW upgrade========================*/
  2898. pbt_buf = (unsigned char *)kmalloc(fwsize + 1, GFP_ATOMIC);
  2899. if (fts_ReadFirmware(firmware_name, pbt_buf))
  2900. {
  2901. dev_err(&client->dev, "%s() - ERROR: request_firmware failed\n",__func__);
  2902. kfree(pbt_buf);
  2903. return -EIO;
  2904. }
  2905. if ((fts_updateinfo_curr.CHIP_ID==0x55) ||(fts_updateinfo_curr.CHIP_ID==0x08) ||(fts_updateinfo_curr.CHIP_ID==0x0a))
  2906. {
  2907. i_ret = fts_5x06_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2908. }
  2909. else if ((fts_updateinfo_curr.CHIP_ID==0x11) ||(fts_updateinfo_curr.CHIP_ID==0x12) ||(fts_updateinfo_curr.CHIP_ID==0x13) ||(fts_updateinfo_curr.CHIP_ID==0x14))
  2910. {
  2911. i_ret = fts_5x36_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2912. }
  2913. else if ((fts_updateinfo_curr.CHIP_ID==0x06))
  2914. {
  2915. i_ret = fts_6x06_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2916. }
  2917. else if ((fts_updateinfo_curr.CHIP_ID==0x36))
  2918. {
  2919. i_ret = fts_6x36_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2920. }
  2921. else if ((fts_updateinfo_curr.CHIP_ID==0x64))
  2922. {
  2923. i_ret = fts_6336GU_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2924. }
  2925. else if ((fts_updateinfo_curr.CHIP_ID==0x54))
  2926. {
  2927. i_ret = fts_5x46_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2928. }
  2929. else if ((fts_updateinfo_curr.CHIP_ID==0x58))
  2930. {
  2931. i_ret = fts_5822_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2932. }
  2933. else if ((fts_updateinfo_curr.CHIP_ID==0x59))
  2934. {
  2935. i_ret = fts_5x26_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2936. }
  2937. else if ((fts_updateinfo_curr.CHIP_ID==0x86))
  2938. {
  2939. /*call the upgrade function*/
  2940. i_ret = fts_8606_writepram(client, aucFW_PRAM_BOOT, sizeof(aucFW_PRAM_BOOT));
  2941. if (i_ret != 0)
  2942. {
  2943. dev_err(&client->dev, "%s:fts_8606_writepram failed. err.\n",__func__);
  2944. return -EIO;
  2945. }
  2946. i_ret = fts_8606_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2947. }
  2948. else if ((fts_updateinfo_curr.CHIP_ID==0x87))
  2949. {
  2950. /*call the upgrade function*/
  2951. i_ret = fts_8716_writepram(client, aucFW_PRAM_BOOT, sizeof(aucFW_PRAM_BOOT));
  2952. if (i_ret != 0)
  2953. {
  2954. dev_err(&client->dev, "%s:fts_8716_writepram failed. err.\n",__func__);
  2955. return -EIO;
  2956. }
  2957. i_ret = fts_8716_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2958. }
  2959. else if ((fts_updateinfo_curr.CHIP_ID==0x0E))
  2960. {
  2961. i_ret = fts_3x07_ctpm_fw_upgrade(client, pbt_buf, fwsize);
  2962. }
  2963. if (i_ret != 0)
  2964. dev_err(&client->dev, "%s() - ERROR:[FTS] upgrade failed..\n",
  2965. __func__);
  2966. else if(fts_updateinfo_curr.AUTO_CLB==AUTO_CLB_NEED)
  2967. {
  2968. fts_ctpm_auto_clb(client);
  2969. }
  2970. kfree(pbt_buf);
  2971. return i_ret;
  2972. }
  2973. /************************************************************************
  2974. * Name: fts_ctpm_get_i_file_ver
  2975. * Brief: get .i file version
  2976. * Input: no
  2977. * Output: no
  2978. * Return: fw version
  2979. ***********************************************************************/
  2980. int fts_ctpm_get_i_file_ver(void)
  2981. {
  2982. u16 ui_sz;
  2983. if (tpd_dts_data.use_tpd_button) {
  2984. if(1 == btn_fw_flag){
  2985. ui_sz = sizeof(CTPM_FW_BTN);
  2986. if (ui_sz > 2)
  2987. {
  2988. if(fts_updateinfo_curr.CHIP_ID==0x36 || fts_updateinfo_curr.CHIP_ID==0x86 || fts_updateinfo_curr.CHIP_ID==0x64)
  2989. return CTPM_FW_BTN[0x10a];
  2990. else if(fts_updateinfo_curr.CHIP_ID==0x58)
  2991. return CTPM_FW_BTN[0x10a];//0x1D0A by default; 0x10a for ft5626
  2992. else
  2993. return CTPM_FW_BTN[ui_sz - 2];
  2994. }
  2995. }else{
  2996. ui_sz = sizeof(CTPM_FW);
  2997. if (ui_sz > 2)
  2998. {
  2999. if(fts_updateinfo_curr.CHIP_ID==0x36 || fts_updateinfo_curr.CHIP_ID==0x86 || fts_updateinfo_curr.CHIP_ID==0x64)
  3000. return CTPM_FW[0x10a];
  3001. else if(fts_updateinfo_curr.CHIP_ID==0x58)
  3002. return CTPM_FW[0x10a];//0x1D0A by default; 0x10a for ft5626
  3003. else
  3004. return CTPM_FW[ui_sz - 2];
  3005. }
  3006. }
  3007. }else{
  3008. ui_sz = sizeof(CTPM_FW);
  3009. if (ui_sz > 2)
  3010. {
  3011. if(fts_updateinfo_curr.CHIP_ID==0x36 || fts_updateinfo_curr.CHIP_ID==0x86 || fts_updateinfo_curr.CHIP_ID==0x64)
  3012. return CTPM_FW[0x10a];
  3013. else if(fts_updateinfo_curr.CHIP_ID==0x58)
  3014. return CTPM_FW[0x10a];//0x1D0A by default; 0x10a for ft5626
  3015. else
  3016. return CTPM_FW[ui_sz - 2];
  3017. }
  3018. }
  3019. return 0x00;
  3020. }
  3021. /************************************************************************
  3022. * Name: fts_ctpm_update_project_setting
  3023. * Brief: update project setting, only update these settings for COB project, or for some special case
  3024. * Input: i2c info
  3025. * Output: no
  3026. * Return: fail <0
  3027. ***********************************************************************/
  3028. int fts_ctpm_update_project_setting(struct i2c_client *client)
  3029. {
  3030. u8 uc_i2c_addr;
  3031. u8 uc_io_voltage;
  3032. u8 uc_panel_factory_id;
  3033. u8 buf[FTS_SETTING_BUF_LEN];
  3034. u8 reg_val[2] = {0};
  3035. u8 auc_i2c_write_buf[10] = {0};
  3036. u8 packet_buf[FTS_SETTING_BUF_LEN + 6];
  3037. u32 i = 0;
  3038. int i_ret;
  3039. uc_i2c_addr = client->addr;
  3040. uc_io_voltage = 0x0;
  3041. uc_panel_factory_id = 0x5a;
  3042. /*Step 1:Reset CTPM*/
  3043. if(fts_updateinfo_curr.CHIP_ID==0x06 || fts_updateinfo_curr.CHIP_ID==0x36)
  3044. {
  3045. fts_write_reg(client, 0xbc, 0xaa);
  3046. }
  3047. else
  3048. {
  3049. fts_write_reg(client, 0xfc, 0xaa);
  3050. }
  3051. msleep(50);
  3052. /*write 0x55 to register 0xfc */
  3053. if(fts_updateinfo_curr.CHIP_ID==0x06 || fts_updateinfo_curr.CHIP_ID==0x36)
  3054. {
  3055. fts_write_reg(client, 0xbc, 0x55);
  3056. }
  3057. else
  3058. {
  3059. fts_write_reg(client, 0xfc, 0x55);
  3060. }
  3061. msleep(30);
  3062. /*********Step 2:Enter upgrade mode *****/
  3063. auc_i2c_write_buf[0] = 0x55;
  3064. auc_i2c_write_buf[1] = 0xaa;
  3065. do
  3066. {
  3067. i++;
  3068. i_ret = fts_i2c_write(client, auc_i2c_write_buf, 2);
  3069. msleep(5);
  3070. } while (i_ret <= 0 && i < 5);
  3071. /*********Step 3:check READ-ID***********************/
  3072. auc_i2c_write_buf[0] = 0x90;
  3073. auc_i2c_write_buf[1] = auc_i2c_write_buf[2] = auc_i2c_write_buf[3] =
  3074. 0x00;
  3075. fts_i2c_read(client, auc_i2c_write_buf, 4, reg_val, 2);
  3076. if (reg_val[0] == fts_updateinfo_curr.upgrade_id_1 && reg_val[1] == fts_updateinfo_curr.upgrade_id_2)
  3077. dev_dbg(&client->dev, "[FTS] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0], reg_val[1]);
  3078. else
  3079. return -EIO;
  3080. auc_i2c_write_buf[0] = 0xcd;
  3081. fts_i2c_read(client, auc_i2c_write_buf, 1, reg_val, 1);
  3082. dev_dbg(&client->dev, "bootloader version = 0x%x\n", reg_val[0]);
  3083. /*--------- read current project setting ---------- */
  3084. /*set read start address */
  3085. buf[0] = 0x3;
  3086. buf[1] = 0x0;
  3087. buf[2] = 0x78;
  3088. buf[3] = 0x0;
  3089. fts_i2c_read(client, buf, 4, buf, FTS_SETTING_BUF_LEN);
  3090. dev_dbg(&client->dev, "[FTS] old setting: uc_i2c_addr = 0x%x,\
  3091. uc_io_voltage = %d, uc_panel_factory_id = 0x%x\n",
  3092. buf[0], buf[2], buf[4]);
  3093. /*--------- Step 4:erase project setting --------------*/
  3094. auc_i2c_write_buf[0] = 0x63;
  3095. fts_i2c_write(client, auc_i2c_write_buf, 1);
  3096. msleep(100);
  3097. /*---------- Set new settings ---------------*/
  3098. buf[0] = uc_i2c_addr;
  3099. buf[1] = ~uc_i2c_addr;
  3100. buf[2] = uc_io_voltage;
  3101. buf[3] = ~uc_io_voltage;
  3102. buf[4] = uc_panel_factory_id;
  3103. buf[5] = ~uc_panel_factory_id;
  3104. packet_buf[0] = 0xbf;
  3105. packet_buf[1] = 0x00;
  3106. packet_buf[2] = 0x78;
  3107. packet_buf[3] = 0x0;
  3108. packet_buf[4] = 0;
  3109. packet_buf[5] = FTS_SETTING_BUF_LEN;
  3110. for (i = 0; i < FTS_SETTING_BUF_LEN; i++)
  3111. packet_buf[6 + i] = buf[i];
  3112. fts_i2c_write(client, packet_buf, FTS_SETTING_BUF_LEN + 6);
  3113. msleep(100);
  3114. /********* reset the new FW***********************/
  3115. auc_i2c_write_buf[0] = 0x07;
  3116. fts_i2c_write(client, auc_i2c_write_buf, 1);
  3117. msleep(200);
  3118. return 0;
  3119. }
  3120. /************************************************************************
  3121. * Name: fts_ctpm_fw_upgrade_with_i_file
  3122. * Brief: upgrade with *.i file
  3123. * Input: i2c info
  3124. * Output: no
  3125. * Return: fail <0
  3126. ***********************************************************************/
  3127. int fts_ctpm_fw_upgrade_with_i_file(struct i2c_client *client)
  3128. {
  3129. u8 *pbt_buf = NULL;
  3130. int i_ret=0;
  3131. int fw_len = sizeof(CTPM_FW);
  3132. if (tpd_dts_data.use_tpd_button) {
  3133. if(1 == btn_fw_flag)
  3134. fw_len = sizeof(CTPM_FW_BTN);
  3135. }
  3136. /*judge the fw that will be upgraded
  3137. * if illegal, then stop upgrade and return.
  3138. */
  3139. if ((fts_updateinfo_curr.CHIP_ID==0x11) ||(fts_updateinfo_curr.CHIP_ID==0x12) ||(fts_updateinfo_curr.CHIP_ID==0x13) ||(fts_updateinfo_curr.CHIP_ID==0x14)
  3140. ||(fts_updateinfo_curr.CHIP_ID==0x55) ||(fts_updateinfo_curr.CHIP_ID==0x06) ||(fts_updateinfo_curr.CHIP_ID==0x0a) ||(fts_updateinfo_curr.CHIP_ID==0x08))
  3141. {
  3142. if (fw_len < 8 || fw_len > 32 * 1024)
  3143. {
  3144. dev_err(&client->dev, "%s:FW length error\n", __func__);
  3145. return -EIO;
  3146. }
  3147. if ((CTPM_FW[fw_len - 8] ^ CTPM_FW[fw_len - 6]) == 0xFF
  3148. && (CTPM_FW[fw_len - 7] ^ CTPM_FW[fw_len - 5]) == 0xFF
  3149. && (CTPM_FW[fw_len - 3] ^ CTPM_FW[fw_len - 4]) == 0xFF)
  3150. {
  3151. /*FW upgrade */
  3152. pbt_buf = CTPM_FW;
  3153. /*call the upgrade function */
  3154. if ((fts_updateinfo_curr.CHIP_ID==0x55) ||(fts_updateinfo_curr.CHIP_ID==0x08) ||(fts_updateinfo_curr.CHIP_ID==0x0a))
  3155. {
  3156. i_ret = fts_5x06_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3157. }
  3158. else if ((fts_updateinfo_curr.CHIP_ID==0x11) ||(fts_updateinfo_curr.CHIP_ID==0x12) ||(fts_updateinfo_curr.CHIP_ID==0x13) ||(fts_updateinfo_curr.CHIP_ID==0x14))
  3159. {
  3160. i_ret = fts_5x36_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3161. }
  3162. else if ((fts_updateinfo_curr.CHIP_ID==0x06))
  3163. {
  3164. i_ret = fts_6x06_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3165. }
  3166. if (i_ret != 0)
  3167. dev_err(&client->dev, "%s:upgrade failed. err.\n",__func__);
  3168. else if(fts_updateinfo_curr.AUTO_CLB==AUTO_CLB_NEED)
  3169. {
  3170. fts_ctpm_auto_clb(client);
  3171. }
  3172. }
  3173. else
  3174. {
  3175. dev_err(&client->dev, "%s:FW format error\n", __func__);
  3176. return -EBADFD;
  3177. }
  3178. }
  3179. else if ((fts_updateinfo_curr.CHIP_ID==0x36))
  3180. {
  3181. if (fw_len < 8 || fw_len > 32 * 1024)
  3182. {
  3183. dev_err(&client->dev, "%s:FW length error\n", __func__);
  3184. return -EIO;
  3185. }
  3186. pbt_buf = CTPM_FW;
  3187. i_ret = fts_6x36_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3188. if (i_ret != 0)
  3189. dev_err(&client->dev, "%s:upgrade failed. err.\n",__func__);
  3190. }
  3191. else if ((fts_updateinfo_curr.CHIP_ID==0x64))
  3192. {
  3193. if (fw_len < 8 || fw_len > 48 * 1024)
  3194. {
  3195. dev_err(&client->dev, "%s:FW length error\n", __func__);
  3196. return -EIO;
  3197. }
  3198. pbt_buf = CTPM_FW;
  3199. i_ret = fts_6336GU_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3200. if (i_ret != 0)
  3201. dev_err(&client->dev, "%s:upgrade failed. err.\n",__func__);
  3202. }
  3203. else if ((fts_updateinfo_curr.CHIP_ID==0x54))
  3204. {
  3205. if (fw_len < 8 || fw_len > 54 * 1024)
  3206. {
  3207. pr_err("FW length error\n");
  3208. return -EIO;
  3209. }
  3210. /*FW upgrade*/
  3211. pbt_buf = CTPM_FW;
  3212. /*call the upgrade function*/
  3213. i_ret = fts_5x46_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3214. if (i_ret != 0)
  3215. {
  3216. dev_err(&client->dev, "[FTS] upgrade failed. err=%d.\n", i_ret);
  3217. }
  3218. else
  3219. {
  3220. #ifdef AUTO_CLB
  3221. fts_ctpm_auto_clb(client); /*start auto CLB*/
  3222. #endif
  3223. }
  3224. }
  3225. else if ((fts_updateinfo_curr.CHIP_ID==0x58))
  3226. {
  3227. if (fw_len < 8 || fw_len > 54*1024)
  3228. {
  3229. pr_err("FW length error\n");
  3230. return -EIO;
  3231. }
  3232. if (tpd_dts_data.use_tpd_button) {
  3233. if(1 == btn_fw_flag)
  3234. {
  3235. pbt_buf = CTPM_FW_BTN;
  3236. i_ret = fts_5822_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW_BTN));
  3237. }
  3238. }else{
  3239. /*FW upgrade*/
  3240. pbt_buf = CTPM_FW;
  3241. /*call the upgrade function*/
  3242. i_ret = fts_5822_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3243. }
  3244. if (i_ret != 0)
  3245. {
  3246. dev_err(&client->dev, "[FTS] upgrade failed. err=%d.\n", i_ret);
  3247. }
  3248. else
  3249. {
  3250. #ifdef AUTO_CLB
  3251. fts_ctpm_auto_clb(client); /*start auto CLB*/
  3252. #endif
  3253. }
  3254. }
  3255. else if ((fts_updateinfo_curr.CHIP_ID==0x59))
  3256. {
  3257. if (fw_len < 8 || fw_len > 54*1024)
  3258. {
  3259. pr_err("FW length error\n");
  3260. return -EIO;
  3261. }
  3262. /*FW upgrade*/
  3263. pbt_buf = CTPM_FW;
  3264. /*call the upgrade function*/
  3265. i_ret = fts_5x26_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3266. if (i_ret != 0)
  3267. {
  3268. dev_err(&client->dev, "[FTS] upgrade failed. err=%d.\n", i_ret);
  3269. }
  3270. else
  3271. {
  3272. #ifdef AUTO_CLB
  3273. fts_ctpm_auto_clb(client); /*start auto CLB*/
  3274. #endif
  3275. }
  3276. }
  3277. else if ((fts_updateinfo_curr.CHIP_ID==0x86))
  3278. {
  3279. /*FW upgrade*/
  3280. pbt_buf = CTPM_FW;
  3281. /*call the upgrade function*/
  3282. i_ret = fts_8606_writepram(client, aucFW_PRAM_BOOT, sizeof(aucFW_PRAM_BOOT));
  3283. if (i_ret != 0)
  3284. {
  3285. dev_err(&client->dev, "%s:upgrade failed. err.\n",__func__);
  3286. return -EIO;
  3287. }
  3288. i_ret = fts_8606_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3289. if (i_ret != 0)
  3290. {
  3291. dev_err(&client->dev, "[FTS] upgrade failed. err=%d.\n", i_ret);
  3292. }
  3293. else
  3294. {
  3295. #ifdef AUTO_CLB
  3296. fts_ctpm_auto_clb(client); /*start auto CLB*/
  3297. #endif
  3298. }
  3299. }
  3300. else if ((fts_updateinfo_curr.CHIP_ID==0x87))
  3301. {
  3302. /*FW upgrade*/
  3303. pbt_buf = CTPM_FW;
  3304. /*call the upgrade function*/
  3305. i_ret = fts_8716_writepram(client, aucFW_PRAM_BOOT, sizeof(aucFW_PRAM_BOOT));
  3306. if (i_ret != 0)
  3307. {
  3308. dev_err(&client->dev, "%s:upgrade failed. err.\n",__func__);
  3309. return -EIO;
  3310. }
  3311. i_ret = fts_8716_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3312. if (i_ret != 0)
  3313. {
  3314. dev_err(&client->dev, "[FTS] upgrade failed. err=%d.\n", i_ret);
  3315. }
  3316. else
  3317. {
  3318. #ifdef AUTO_CLB
  3319. fts_ctpm_auto_clb(client); /*start auto CLB*/
  3320. #endif
  3321. }
  3322. }
  3323. else if ((fts_updateinfo_curr.CHIP_ID==0x0E))
  3324. {
  3325. if (fw_len < 8 || fw_len > 32 * 1024)
  3326. {
  3327. dev_err(&client->dev, "%s:FW length error\n", __func__);
  3328. return -EIO;
  3329. }
  3330. pbt_buf = CTPM_FW;
  3331. i_ret = fts_3x07_ctpm_fw_upgrade(client, pbt_buf, sizeof(CTPM_FW));
  3332. if (i_ret != 0)
  3333. dev_err(&client->dev, "%s:upgrade failed. err.\n",__func__);
  3334. }
  3335. return i_ret;
  3336. }
  3337. /************************************************************************
  3338. * Name: fts_ctpm_auto_upgrade
  3339. * Brief: auto upgrade
  3340. * Input: i2c info
  3341. * Output: no
  3342. * Return: 0
  3343. ***********************************************************************/
  3344. int fts_ctpm_auto_upgrade(struct i2c_client *client)
  3345. {
  3346. u8 uc_host_fm_ver = FTS_REG_FW_VER;
  3347. u8 uc_tp_fm_ver;
  3348. int i_ret;
  3349. fts_read_reg(client, FTS_REG_FW_VER, &uc_tp_fm_ver);
  3350. if (tpd_dts_data.use_tpd_button) {
  3351. if((uc_tp_fm_ver >= 0x80) || (uc_tp_fm_ver == 0x0))
  3352. btn_fw_flag = 1;
  3353. }
  3354. uc_host_fm_ver = fts_ctpm_get_i_file_ver();
  3355. TPD_DMESG("[TPD] tp_fm_ver = 0x%x, host_fm_ver = 0x%x\n", uc_tp_fm_ver, uc_host_fm_ver);
  3356. if (uc_tp_fm_ver == FTS_REG_FW_VER || uc_tp_fm_ver < uc_host_fm_ver ||( uc_tp_fm_ver != TPD_FW_VERSION) )
  3357. {
  3358. msleep(100);
  3359. TPD_DMESG("[FTS] uc_tp_fm_ver = 0x%x, uc_host_fm_ver = 0x%x\n",uc_tp_fm_ver, uc_host_fm_ver);
  3360. i_ret = fts_ctpm_fw_upgrade_with_i_file(client);
  3361. if (i_ret == 0)
  3362. {
  3363. msleep(300);
  3364. uc_host_fm_ver = fts_ctpm_get_i_file_ver();
  3365. TPD_DMESG("[FTS] upgrade to new version 0x%x\n",uc_host_fm_ver);
  3366. }
  3367. else
  3368. {
  3369. pr_err("[FTS] upgrade failed ret=%d.\n", i_ret);
  3370. return -EIO;
  3371. }
  3372. }
  3373. return 0;
  3374. }