rmi_fw_update.c 64 KB

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  1. /*
  2. * Synaptics DSX touchscreen driver
  3. *
  4. * Copyright (C) 2012 Synaptics Incorporated
  5. *
  6. * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
  7. * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/i2c.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <linux/input.h>
  26. #include <linux/firmware.h>
  27. /* #include <linux/input/synaptics_dsx.h> */
  28. #include "include/synaptics_dsx_rmi4_i2c.h"
  29. #include "tpd.h"
  30. #include "SynaImage.h"
  31. #define DEBUG_FW_UPDATE
  32. #define SHOW_PROGRESS
  33. #define FW_IMAGE_NAME "SynaImage.h"
  34. #define CHECKSUM_OFFSET 0x00
  35. #define BOOTLOADER_VERSION_OFFSET 0x07
  36. #define IMAGE_SIZE_OFFSET 0x08
  37. #define CONFIG_SIZE_OFFSET 0x0C
  38. #define PRODUCT_ID_OFFSET 0x10
  39. #define PRODUCT_INFO_OFFSET 0x1E
  40. #define FW_IMAGE_OFFSET 0x100
  41. #define PRODUCT_ID_SIZE 10
  42. #define BOOTLOADER_ID_OFFSET 0
  43. #define FLASH_PROPERTIES_OFFSET 2
  44. #define BLOCK_SIZE_OFFSET 3
  45. #define FW_BLOCK_COUNT_OFFSET 5
  46. #define SYN_I2C_RETRY_TIMES 10
  47. #define F01_STD_QUERY_LEN 21
  48. #define REG_MAP (1 << 0)
  49. #define UNLOCKED (1 << 1)
  50. #define HAS_CONFIG_ID (1 << 2)
  51. #define HAS_PERM_CONFIG (1 << 3)
  52. #define HAS_BL_CONFIG (1 << 4)
  53. #define HAS_DISP_CONFIG (1 << 5)
  54. #define HAS_CTRL1 (1 << 6)
  55. #define BLOCK_NUMBER_OFFSET 0
  56. #define BLOCK_DATA_OFFSET 2
  57. #define UI_CONFIG_AREA 0x00
  58. #define PERM_CONFIG_AREA 0x01
  59. #define BL_CONFIG_AREA 0x02
  60. #define DISP_CONFIG_AREA 0x03
  61. #define SENSOR_ID_VALID (1 << 31)
  62. enum flash_command {
  63. CMD_WRITE_FW_BLOCK = 0x2,
  64. CMD_ERASE_ALL = 0x3,
  65. CMD_READ_CONFIG_BLOCK = 0x5,
  66. CMD_WRITE_CONFIG_BLOCK = 0x6,
  67. CMD_ERASE_CONFIG = 0x7,
  68. CMD_READ_SENSOR_ID = 0x8,
  69. CMD_ERASE_BL_CONFIG = 0x9,
  70. CMD_ERASE_DISP_CONFIG = 0xA,
  71. CMD_ENABLE_FLASH_PROG = 0xF,
  72. };
  73. enum glass_vendor {
  74. LENSON = 0,
  75. TPK = 1,
  76. };
  77. #define SLEEP_MODE_NORMAL (0x00)
  78. #define SLEEP_MODE_SENSOR_SLEEP (0x01)
  79. #define SLEEP_MODE_RESERVED0 (0x02)
  80. #define SLEEP_MODE_RESERVED1 (0x03)
  81. #define ENABLE_WAIT_MS (1 * 1000)
  82. #define WRITE_WAIT_MS (3 * 1000)
  83. #define ERASE_WAIT_MS (5 * 1000)
  84. #define MIN_SLEEP_TIME_US 50
  85. #define MAX_SLEEP_TIME_US 100
  86. struct kobject *properties_kobj_fwupdate;
  87. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  88. struct kobject *kobj, struct bin_attribute *attributes,
  89. char *buf, loff_t pos, size_t count);
  90. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  91. struct kobject *kobj, struct bin_attribute *attributes,
  92. char *buf, loff_t pos, size_t count);
  93. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  94. struct device_attribute *attr, const char *buf,
  95. size_t count);
  96. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  97. struct device_attribute *attr, const char *buf,
  98. size_t count);
  99. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  100. struct device_attribute *attr, const char *buf,
  101. size_t count);
  102. #if 0
  103. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  104. struct device_attribute *attr, const char *buf,
  105. size_t count);
  106. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  107. struct device_attribute *attr, const char *buf,
  108. size_t count);
  109. #endif
  110. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  111. struct device_attribute *attr, char *buf);
  112. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  113. struct device_attribute *attr, char *buf);
  114. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  115. struct device_attribute *attr, char *buf);
  116. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  117. struct device_attribute *attr, char *buf);
  118. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  119. struct device_attribute *attr, char *buf);
  120. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  121. struct device_attribute *attr, char *buf);
  122. static int fwu_wait_for_idle(int timeout_ms);
  123. struct image_header {
  124. unsigned int checksum;
  125. unsigned int image_size;
  126. unsigned int config_size;
  127. unsigned char options;
  128. unsigned char bootloader_version;
  129. unsigned char product_id[SYNAPTICS_RMI4_PRODUCT_ID_LENGTH + 1];
  130. unsigned char product_info[SYNAPTICS_RMI4_PRODUCT_INFO_SIZE];
  131. };
  132. struct pdt_properties {
  133. union {
  134. struct {
  135. unsigned char reserved_1:6;
  136. unsigned char has_bsr:1;
  137. unsigned char reserved_2:1;
  138. } __packed;
  139. unsigned char data[1];
  140. };
  141. };
  142. struct f01_device_status {
  143. union {
  144. struct {
  145. unsigned char status_code:4;
  146. unsigned char reserved:2;
  147. unsigned char flash_prog:1;
  148. unsigned char unconfigured:1;
  149. } __packed;
  150. unsigned char data[1];
  151. };
  152. };
  153. struct f01_device_control {
  154. union {
  155. struct {
  156. unsigned char sleep_mode:2;
  157. unsigned char nosleep:1;
  158. unsigned char reserved:2;
  159. unsigned char charger_connected:1;
  160. unsigned char report_rate:1;
  161. unsigned char configured:1;
  162. } __packed;
  163. unsigned char data[1];
  164. };
  165. };
  166. struct f34_flash_control {
  167. union {
  168. struct {
  169. unsigned char command:4;
  170. unsigned char status:3;
  171. unsigned char program_enabled:1;
  172. } __packed;
  173. unsigned char data[1];
  174. };
  175. };
  176. struct f34_flash_properties {
  177. union {
  178. struct {
  179. unsigned char regmap:1;
  180. unsigned char unlocked:1;
  181. unsigned char has_configid:1;
  182. unsigned char has_perm_config:1;
  183. unsigned char has_bl_config:1;
  184. unsigned char has_display_config:1;
  185. unsigned char has_blob_config:1;
  186. unsigned char reserved:1;
  187. } __packed;
  188. unsigned char data[1];
  189. };
  190. };
  191. struct synaptics_rmi4_fwu_handle {
  192. bool initialized;
  193. char product_id[SYNAPTICS_RMI4_PRODUCT_ID_LENGTH + 1];
  194. unsigned int image_size;
  195. unsigned int data_pos;
  196. unsigned int sensor_id;
  197. unsigned char intr_mask;
  198. unsigned char bootloader_id[2];
  199. unsigned char productinfo1;
  200. unsigned char productinfo2;
  201. unsigned char *ext_data_source;
  202. unsigned char *read_config_buf;
  203. const unsigned char *firmware_data;
  204. const unsigned char *config_data;
  205. unsigned short block_size;
  206. unsigned short fw_block_count;
  207. unsigned short config_block_count;
  208. unsigned short perm_config_block_count;
  209. unsigned short bl_config_block_count;
  210. unsigned short disp_config_block_count;
  211. unsigned short config_size;
  212. unsigned short config_area;
  213. unsigned short addr_f34_flash_control;
  214. unsigned short addr_f01_interrupt_register;
  215. struct synaptics_rmi4_fn_desc f01_fd;
  216. struct synaptics_rmi4_fn_desc f34_fd;
  217. struct synaptics_rmi4_exp_fn_ptr *fn_ptr;
  218. struct synaptics_rmi4_data *rmi4_data;
  219. struct f34_flash_control flash_control;
  220. struct f34_flash_properties flash_properties;
  221. };
  222. static struct bin_attribute dev_attr_data = {
  223. .attr = {
  224. .name = "data",
  225. .mode = (S_IRUGO | S_IWUSR),
  226. },
  227. .size = 0,
  228. .read = fwu_sysfs_show_image,
  229. .write = fwu_sysfs_store_image,
  230. };
  231. static struct device_attribute attrs[] = {
  232. __ATTR(doreflash, (S_IRUGO | S_IWUSR),
  233. synaptics_rmi4_show_error,
  234. fwu_sysfs_do_reflash_store),
  235. __ATTR(writeconfig, (S_IRUGO | S_IWUSR),
  236. synaptics_rmi4_show_error,
  237. fwu_sysfs_write_config_store),
  238. __ATTR(readconfig, (S_IRUGO | S_IWUSR),
  239. synaptics_rmi4_show_error,
  240. fwu_sysfs_read_config_store),
  241. #if 0
  242. __ATTR(configarea, S_IWUGO,
  243. synaptics_rmi4_show_error,
  244. fwu_sysfs_config_area_store),
  245. __ATTR(imagesize, S_IWUGO,
  246. synaptics_rmi4_show_error,
  247. fwu_sysfs_image_size_store),
  248. #endif
  249. __ATTR(blocksize, S_IRUGO,
  250. fwu_sysfs_block_size_show,
  251. synaptics_rmi4_store_error),
  252. __ATTR(fwblockcount, S_IRUGO,
  253. fwu_sysfs_firmware_block_count_show,
  254. synaptics_rmi4_store_error),
  255. __ATTR(configblockcount, S_IRUGO,
  256. fwu_sysfs_configuration_block_count_show,
  257. synaptics_rmi4_store_error),
  258. __ATTR(permconfigblockcount, S_IRUGO,
  259. fwu_sysfs_perm_config_block_count_show,
  260. synaptics_rmi4_store_error),
  261. __ATTR(blconfigblockcount, S_IRUGO,
  262. fwu_sysfs_bl_config_block_count_show,
  263. synaptics_rmi4_store_error),
  264. __ATTR(dispconfigblockcount, S_IRUGO,
  265. fwu_sysfs_disp_config_block_count_show,
  266. synaptics_rmi4_store_error),
  267. };
  268. /*
  269. static struct kobj_attribute synaptics_flashprog_attr = {
  270. .attr = {
  271. .name = "prog",
  272. .mode = (S_IRUGO | S_IWUGO),
  273. },
  274. .show = &synaptics_rmi4_f01_flashprog_show,
  275. .store = &synaptics_rmi4_store_error,
  276. };
  277. static struct kobj_attribute synaptics_0dbutton_attr = {
  278. .attr = {
  279. .name = "0dbutton",
  280. .mode = (S_IRUGO | S_IWUGO),
  281. },
  282. .show = &synaptics_rmi4_0dbutton_show,
  283. .store = &synaptics_rmi4_0dbutton_store,
  284. };
  285. static struct attribute *syna_attrs[] = {
  286. &synaptics_pm_cycle_attr.attr,
  287. &synaptics_f51_enables_attr.attr,
  288. &synaptics_show_error_attr.attr,
  289. &synaptics_productinfo_attr.attr,
  290. &synaptics_0dbutton_attr.attr,
  291. &synaptics_flashprog_attr.attr,
  292. NULL
  293. };
  294. static struct attribute_group syna_attr_group = {
  295. .attrs = syna_attrs,
  296. };
  297. */
  298. static struct synaptics_rmi4_fwu_handle *fwu;
  299. static struct completion remove_complete;
  300. static unsigned int extract_uint(const unsigned char *ptr)
  301. {
  302. return (unsigned int)ptr[0] +
  303. (unsigned int)ptr[1] * 0x100 +
  304. (unsigned int)ptr[2] * 0x10000 + (unsigned int)ptr[3] * 0x1000000;
  305. }
  306. static void parse_header(struct image_header *header, const unsigned char *fw_image)
  307. {
  308. header->checksum = extract_uint(&fw_image[CHECKSUM_OFFSET]);
  309. header->bootloader_version = fw_image[BOOTLOADER_VERSION_OFFSET];
  310. header->image_size = extract_uint(&fw_image[IMAGE_SIZE_OFFSET]);
  311. header->config_size = extract_uint(&fw_image[CONFIG_SIZE_OFFSET]);
  312. memcpy(header->product_id, &fw_image[PRODUCT_ID_OFFSET], SYNAPTICS_RMI4_PRODUCT_ID_LENGTH);
  313. header->product_id[SYNAPTICS_RMI4_PRODUCT_ID_LENGTH] = 0;
  314. memcpy(header->product_info, &fw_image[PRODUCT_INFO_OFFSET],
  315. SYNAPTICS_RMI4_PRODUCT_INFO_SIZE);
  316. #ifdef DEBUG_FW_UPDATE
  317. dev_info(&fwu->rmi4_data->i2c_client->dev,
  318. "Firwmare size %d, config size %d\n", header->image_size, header->config_size);
  319. #endif
  320. }
  321. static int fwu_check_version(void)
  322. {
  323. int retval;
  324. unsigned char firmware_id[4];
  325. unsigned char config_id[4];
  326. struct i2c_client *i2c_client = fwu->rmi4_data->i2c_client;
  327. /* device firmware id */
  328. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  329. fwu->f01_fd.query_base_addr + 18,
  330. firmware_id, sizeof(firmware_id));
  331. if (retval < 0) {
  332. TPD_DMESG("Failed to read firmware ID (code %d).\n", retval);
  333. return retval;
  334. }
  335. firmware_id[3] = 0;
  336. TPD_DMESG("Device firmware ID%d\n", extract_uint(firmware_id));
  337. /* device config id */
  338. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  339. fwu->f34_fd.ctrl_base_addr, config_id, sizeof(config_id));
  340. if (retval < 0) {
  341. dev_err(&i2c_client->dev, "Failed to read config ID (code %d).\n", retval);
  342. return retval;
  343. }
  344. TPD_DMESG("Device config ID 0x%02X, 0x%02X, 0x%02X, 0x%02X\n",
  345. config_id[0], config_id[1], config_id[2], config_id[3]);
  346. /* .img config id */
  347. TPD_DMESG(".img config ID 0x%02X, 0x%02X, 0x%02X, 0x%02X\n",
  348. fwu->config_data[0],
  349. fwu->config_data[1], fwu->config_data[2], fwu->config_data[3]);
  350. if (config_id[0] == fwu->config_data[0] &&
  351. config_id[1] == fwu->config_data[1] &&
  352. config_id[2] == fwu->config_data[2] && config_id[3] == fwu->config_data[3]) {
  353. TPD_DMESG("Both the device and .img is the same version, no need to update!\n");
  354. return -1;
  355. }
  356. return 0;
  357. }
  358. static int fwu_read_f01_device_status(struct f01_device_status *status)
  359. {
  360. int retval;
  361. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  362. fwu->f01_fd.data_base_addr, status->data, sizeof(status->data));
  363. if (retval < 0) {
  364. TPD_DMESG("%s: Failed to read F01 device status\n", __func__);
  365. return retval;
  366. }
  367. return 0;
  368. }
  369. static int fwu_read_f34_queries(void)
  370. {
  371. int retval;
  372. unsigned char count = 4;
  373. unsigned char buf[10];
  374. struct i2c_client *i2c_client = fwu->rmi4_data->i2c_client;
  375. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  376. fwu->f34_fd.query_base_addr + BOOTLOADER_ID_OFFSET,
  377. fwu->bootloader_id, sizeof(fwu->bootloader_id));
  378. if (retval < 0) {
  379. TPD_DMESG("%s: Failed to read bootloader ID\n", __func__);
  380. return retval;
  381. }
  382. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  383. fwu->f34_fd.query_base_addr + FLASH_PROPERTIES_OFFSET,
  384. fwu->flash_properties.data, sizeof(fwu->flash_properties.data));
  385. if (retval < 0) {
  386. dev_err(&i2c_client->dev, "%s: Failed to read flash properties\n", __func__);
  387. return retval;
  388. }
  389. dev_info(&i2c_client->dev, "%s perm:%d, bl%d, display:%d\n",
  390. __func__,
  391. fwu->flash_properties.has_perm_config,
  392. fwu->flash_properties.has_bl_config, fwu->flash_properties.has_display_config);
  393. if (fwu->flash_properties.has_perm_config)
  394. count += 2;
  395. if (fwu->flash_properties.has_bl_config)
  396. count += 2;
  397. if (fwu->flash_properties.has_display_config)
  398. count += 2;
  399. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  400. fwu->f34_fd.query_base_addr + BLOCK_SIZE_OFFSET, buf, 2);
  401. if (retval < 0) {
  402. dev_err(&i2c_client->dev, "%s: Failed to read block size info\n", __func__);
  403. return retval;
  404. }
  405. batohs(&fwu->block_size, &(buf[0]));
  406. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  407. fwu->f34_fd.query_base_addr + FW_BLOCK_COUNT_OFFSET, buf, count);
  408. if (retval < 0) {
  409. dev_err(&i2c_client->dev, "%s: Failed to read block count info\n", __func__);
  410. return retval;
  411. }
  412. batohs(&fwu->fw_block_count, &(buf[0]));
  413. batohs(&fwu->config_block_count, &(buf[2]));
  414. count = 4;
  415. if (fwu->flash_properties.has_perm_config) {
  416. batohs(&fwu->perm_config_block_count, &(buf[count]));
  417. count += 2;
  418. }
  419. if (fwu->flash_properties.has_bl_config) {
  420. batohs(&fwu->bl_config_block_count, &(buf[count]));
  421. count += 2;
  422. }
  423. if (fwu->flash_properties.has_display_config)
  424. batohs(&fwu->disp_config_block_count, &(buf[count]));
  425. fwu->addr_f34_flash_control = fwu->f34_fd.data_base_addr +
  426. BLOCK_DATA_OFFSET + fwu->block_size;
  427. return 0;
  428. }
  429. static int fwu_read_interrupt_status(void)
  430. {
  431. int retval;
  432. unsigned char interrupt_status;
  433. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  434. fwu->addr_f01_interrupt_register,
  435. &interrupt_status, sizeof(interrupt_status));
  436. if (retval < 0) {
  437. TPD_DMESG("%s: Failed to read flash status\n", __func__);
  438. return retval;
  439. }
  440. return interrupt_status;
  441. }
  442. static int fwu_read_f34_flash_status(void)
  443. {
  444. int retval;
  445. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  446. fwu->addr_f34_flash_control,
  447. fwu->flash_control.data, sizeof(fwu->flash_control.data));
  448. if (retval < 0) {
  449. dev_err(&fwu->rmi4_data->i2c_client->dev,
  450. "%s: Failed to read flash status\n", __func__);
  451. return retval;
  452. }
  453. /* return 0; */
  454. /* TPD_DMESG("fwu_read_f34_flash_status = 0x%x\n", fwu->flash_control.data[0]); */
  455. return fwu->flash_control.data[0];
  456. }
  457. static int fwu_reset_device(void)
  458. {
  459. int retval;
  460. unsigned char reset = 0x01;
  461. #ifdef DEBUG_FW_UPDATE
  462. dev_info(&fwu->rmi4_data->i2c_client->dev, "Reset device\n");
  463. #endif
  464. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  465. fwu->f01_fd.cmd_base_addr, &reset, sizeof(reset));
  466. if (retval < 0) {
  467. dev_err(&fwu->rmi4_data->i2c_client->dev,
  468. "%s: Failed to reset device (addr : 0x%02x)\n",
  469. __func__, fwu->f01_fd.cmd_base_addr);
  470. return retval;
  471. }
  472. fwu_wait_for_idle(WRITE_WAIT_MS);
  473. retval = fwu->rmi4_data->reset_device(fwu->rmi4_data);
  474. if (retval < 0) {
  475. dev_err(&fwu->rmi4_data->i2c_client->dev,
  476. "%s: Failed to reset core driver after reflash\n", __func__);
  477. return retval;
  478. }
  479. return 0;
  480. }
  481. static int fwu_write_f34_command(unsigned char cmd)
  482. {
  483. int retval;
  484. retval = fwu->fn_ptr->write(fwu->rmi4_data, fwu->addr_f34_flash_control, &cmd, sizeof(cmd));
  485. if (retval < 0) {
  486. TPD_DMESG("%s: Failed to write command 0x%02x\n", __func__, cmd);
  487. return retval;
  488. }
  489. return 0;
  490. }
  491. static unsigned char fwu_check_flash_status(void)
  492. {
  493. fwu_read_f34_flash_status();
  494. return fwu->flash_control.status;
  495. }
  496. static int fwu_wait_for_idle(int timeout_ms)
  497. {
  498. int count = 0;
  499. int timeout_count = ((timeout_ms * 1000) / MAX_SLEEP_TIME_US) + 1;
  500. do {
  501. if (fwu_read_interrupt_status() > 0)
  502. /* if( (fwu_read_f34_flash_status())&0x7f==0x00) */
  503. return 0;
  504. usleep_range(MIN_SLEEP_TIME_US, MAX_SLEEP_TIME_US);
  505. count++;
  506. } while (count < timeout_count);
  507. TPD_DMESG("%s: Timed out waiting for idle status\n", __func__);
  508. return -ETIMEDOUT;
  509. }
  510. static int fwu_scan_pdt(void)
  511. {
  512. int retval;
  513. unsigned char ii;
  514. unsigned char intr_count = 0;
  515. unsigned char intr_off;
  516. unsigned char intr_src;
  517. unsigned short addr;
  518. bool f01found = false;
  519. bool f34found = false;
  520. struct synaptics_rmi4_fn_desc rmi_fd;
  521. #ifdef DEBUG_FW_UPDATE
  522. dev_info(&fwu->rmi4_data->i2c_client->dev, "Scan PDT\n");
  523. #endif
  524. for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
  525. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  526. addr, (unsigned char *)&rmi_fd, sizeof(rmi_fd));
  527. if (retval < 0)
  528. return retval;
  529. if (rmi_fd.fn_number) {
  530. TPD_DMESG("%s: Found F%02x\n", __func__, rmi_fd.fn_number);
  531. switch (rmi_fd.fn_number) {
  532. case SYNAPTICS_RMI4_F01:
  533. f01found = true;
  534. fwu->f01_fd = rmi_fd;
  535. fwu->addr_f01_interrupt_register = fwu->f01_fd.data_base_addr + 1;
  536. break;
  537. case SYNAPTICS_RMI4_F34:
  538. f34found = true;
  539. fwu->f34_fd = rmi_fd;
  540. fwu->intr_mask = 0;
  541. intr_src = rmi_fd.intr_src_count;
  542. intr_off = intr_count % 8;
  543. for (ii = intr_off; ii < ((intr_src & MASK_3BIT) + intr_off); ii++)
  544. fwu->intr_mask |= 1 << ii;
  545. break;
  546. }
  547. } else
  548. break;
  549. intr_count += (rmi_fd.intr_src_count & MASK_3BIT);
  550. }
  551. if (!f01found || !f34found) {
  552. dev_err(&fwu->rmi4_data->i2c_client->dev,
  553. "%s: Failed to find both F01 and F34\n", __func__);
  554. return -EINVAL;
  555. }
  556. fwu_read_interrupt_status();
  557. return 0;
  558. }
  559. static int fwu_write_blocks(unsigned char *block_ptr, unsigned short block_cnt,
  560. unsigned char command)
  561. {
  562. int retval;
  563. unsigned char block_offset[] = { 0, 0 };
  564. unsigned short block_num;
  565. #ifdef SHOW_PROGRESS
  566. unsigned int progress = (command == CMD_WRITE_CONFIG_BLOCK) ? 10 : 100;
  567. #endif
  568. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  569. fwu->f34_fd.data_base_addr + BLOCK_NUMBER_OFFSET,
  570. block_offset, sizeof(block_offset));
  571. /* TPD_DMESG("write block number"); */
  572. if (retval < 0) {
  573. dev_err(&fwu->rmi4_data->i2c_client->dev,
  574. "%s: Failed to write to block number registers\n", __func__);
  575. return retval;
  576. }
  577. for (block_num = 0; block_num < block_cnt; block_num++) {
  578. #ifdef SHOW_PROGRESS
  579. if (block_num % progress == 0) {
  580. TPD_DMESG("%s: update %s %3d / %3d\n",
  581. __func__,
  582. command == CMD_WRITE_CONFIG_BLOCK ?
  583. "config" : "firmware", block_num, block_cnt);
  584. }
  585. #endif
  586. /* TPD_DMESG("before write BLOCK_DATA_OFFSET"); */
  587. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  588. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  589. block_ptr, fwu->block_size);
  590. if (retval < 0) {
  591. TPD_DMESG("%s: Failed to write block data (block %d)\n",
  592. __func__, block_num);
  593. return retval;
  594. }
  595. retval = fwu_write_f34_command(command);
  596. if (retval < 0) {
  597. dev_err(&fwu->rmi4_data->i2c_client->dev,
  598. "%s: Failed to write command for block %d\n", __func__, block_num);
  599. return retval;
  600. }
  601. retval = fwu_wait_for_idle(WRITE_WAIT_MS);
  602. if (retval < 0) {
  603. dev_err(&fwu->rmi4_data->i2c_client->dev,
  604. "%s: Failed to wait for idle status (block %d)\n",
  605. __func__, block_num);
  606. return retval;
  607. }
  608. retval = fwu_check_flash_status();
  609. if (retval != 0) {
  610. dev_err(&fwu->rmi4_data->i2c_client->dev,
  611. "%s: Flash block %d status %d\n", __func__, block_num, retval);
  612. return -1;
  613. }
  614. block_ptr += fwu->block_size;
  615. }
  616. #ifdef SHOW_PROGRESS
  617. dev_info(&fwu->rmi4_data->i2c_client->dev,
  618. "%s: update %s %3d / %3d\n",
  619. __func__,
  620. command == CMD_WRITE_CONFIG_BLOCK ? "config" : "firmware", block_cnt, block_cnt);
  621. #endif
  622. return 0;
  623. }
  624. static int fwu_write_firmware(void)
  625. {
  626. return fwu_write_blocks((unsigned char *)fwu->firmware_data,
  627. fwu->fw_block_count, CMD_WRITE_FW_BLOCK);
  628. }
  629. static int fwu_write_configuration(void)
  630. {
  631. return fwu_write_blocks((unsigned char *)fwu->config_data,
  632. fwu->config_block_count, CMD_WRITE_CONFIG_BLOCK);
  633. }
  634. static int fwu_write_bootloader_id(void)
  635. {
  636. int retval;
  637. #ifdef DEBUG_FW_UPDATE
  638. dev_info(&fwu->rmi4_data->i2c_client->dev, "Write bootloader ID\n");
  639. #endif
  640. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  641. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  642. fwu->bootloader_id, sizeof(fwu->bootloader_id));
  643. TPD_DMESG("bootloader ID=%s\n", fwu->bootloader_id);
  644. TPD_DMESG("f34_data_addr=%x\n", fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET);
  645. if (retval < 0) {
  646. TPD_DMESG("%s: Failed to write bootloader ID\n", __func__);
  647. return retval;
  648. }
  649. return 0;
  650. }
  651. static int fwu_enter_flash_prog(void)
  652. {
  653. int retval;
  654. struct f01_device_status f01_device_status;
  655. struct f01_device_control f01_device_control;
  656. #ifdef DEBUG_FW_UPDATE
  657. dev_info(&fwu->rmi4_data->i2c_client->dev, "Enter bootloader mode\n");
  658. #endif
  659. retval = fwu_read_f01_device_status(&f01_device_status);
  660. if (retval < 0)
  661. return retval;
  662. if (f01_device_status.flash_prog) {
  663. TPD_DMESG("%s: Already in flash prog mode\n", __func__);
  664. return 0;
  665. }
  666. retval = fwu_write_bootloader_id();
  667. if (retval < 0)
  668. return retval;
  669. retval = fwu_write_f34_command(CMD_ENABLE_FLASH_PROG);
  670. if (retval < 0)
  671. return retval;
  672. retval = fwu_wait_for_idle(ENABLE_WAIT_MS);
  673. if (retval < 0)
  674. return retval;
  675. retval = fwu_read_f01_device_status(&f01_device_status);
  676. if (retval < 0)
  677. return retval;
  678. if (!f01_device_status.flash_prog) {
  679. dev_err(&fwu->rmi4_data->i2c_client->dev,
  680. "%s: Program enabled bit not set\n", __func__);
  681. return -EINVAL;
  682. }
  683. retval = fwu_scan_pdt();
  684. if (retval < 0)
  685. return retval;
  686. retval = fwu_read_f01_device_status(&f01_device_status);
  687. if (retval < 0)
  688. return retval;
  689. if (!f01_device_status.flash_prog) {
  690. dev_err(&fwu->rmi4_data->i2c_client->dev, "%s: Not in flash prog mode\n", __func__);
  691. return -EINVAL;
  692. }
  693. retval = fwu_read_f34_queries();
  694. if (retval < 0)
  695. return retval;
  696. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  697. fwu->f01_fd.ctrl_base_addr,
  698. f01_device_control.data, sizeof(f01_device_control.data));
  699. if (retval < 0) {
  700. TPD_DMESG("%s: Failed to read F01 device control\n", __func__);
  701. return retval;
  702. }
  703. f01_device_control.nosleep = true;
  704. f01_device_control.sleep_mode = SLEEP_MODE_NORMAL;
  705. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  706. fwu->f01_fd.ctrl_base_addr,
  707. f01_device_control.data, sizeof(f01_device_control.data));
  708. if (retval < 0) {
  709. TPD_DMESG("%s: Failed to write F01 device control\n", __func__);
  710. return retval;
  711. }
  712. return retval;
  713. }
  714. static int fwu_do_reflash(void)
  715. {
  716. int retval;
  717. retval = fwu_enter_flash_prog();
  718. if (retval < 0)
  719. return retval;
  720. TPD_DMESG("%s: Entered flash prog mode\n", __func__);
  721. retval = fwu_write_bootloader_id();
  722. if (retval < 0)
  723. return retval;
  724. TPD_DMESG("%s: Bootloader ID written\n", __func__);
  725. retval = fwu_write_f34_command(CMD_ERASE_ALL);
  726. if (retval < 0)
  727. return retval;
  728. TPD_DMESG("%s: Erase all command written\n", __func__);
  729. /* while (1); */
  730. retval = fwu_wait_for_idle(ERASE_WAIT_MS);
  731. if (retval < 0)
  732. return retval;
  733. TPD_DMESG("%s: Idle status detected\n", __func__);
  734. if (fwu->firmware_data) {
  735. retval = fwu_write_firmware();
  736. mdelay(100);
  737. if (retval < 0)
  738. return retval;
  739. pr_notice("%s: Firmware programmed\n", __func__);
  740. }
  741. if (fwu->config_data) {
  742. retval = fwu_write_configuration();
  743. if (retval < 0)
  744. return retval;
  745. pr_notice("%s: Configuration programmed\n", __func__);
  746. }
  747. return retval;
  748. }
  749. char buf[] = {
  750. /* #inlcude ".h" */
  751. };
  752. static int fwu_read_sensor_id(void)
  753. {
  754. int retval;
  755. unsigned char sensor_id[2];
  756. unsigned char snsrid_pinmux[] = { 0x05, 0x00 };
  757. unsigned char snsrid_pullupmux[] = { 0x05, 0x00 };
  758. if ((fwu->sensor_id & SENSOR_ID_VALID) != 0)
  759. return 0;
  760. retval = fwu_enter_flash_prog();
  761. if (retval < 0)
  762. goto reset;
  763. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  764. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  765. snsrid_pinmux, sizeof(snsrid_pinmux));
  766. if (retval < 0) {
  767. TPD_DMESG("%s: Failed to write sensor ID\n", __func__);
  768. goto reset;
  769. }
  770. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  771. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET + 2,
  772. snsrid_pullupmux, sizeof(snsrid_pullupmux));
  773. if (retval < 0) {
  774. TPD_DMESG("%s: Failed to write sensor ID\n", __func__);
  775. goto reset;
  776. }
  777. retval = fwu_write_f34_command(CMD_READ_SENSOR_ID);
  778. if (retval < 0)
  779. goto reset;
  780. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  781. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET + 4,
  782. sensor_id, sizeof(sensor_id));
  783. if (retval < 0) {
  784. TPD_DMESG("%s: Failed to read sensor ID\n", __func__);
  785. goto reset;
  786. }
  787. fwu->sensor_id = sensor_id[0] + (sensor_id[1] << 8);
  788. fwu->sensor_id |= SENSOR_ID_VALID;
  789. #ifdef DEBUG_FW_UPDATE
  790. TPD_DMESG("Read sensor ID %u\n", fwu->sensor_id & ~SENSOR_ID_VALID);
  791. #endif
  792. reset:
  793. fwu_reset_device();
  794. return retval;
  795. }
  796. static int fwu_start_reflash(void)
  797. {
  798. int retval;
  799. struct image_header header;
  800. const unsigned char *fw_image;
  801. const struct firmware *fw_entry = NULL;
  802. struct f01_device_status f01_device_status;
  803. TPD_DMESG("%s: Start of reflash process\n", __func__);
  804. /* mt65xx_eint_mask(CUST_EINT_TOUCH_PANEL_NUM); */
  805. if (fwu->ext_data_source)
  806. fw_image = fwu->ext_data_source;
  807. else {
  808. TPD_DMESG("%s: Requesting firmware image %s\n", __func__, FW_IMAGE_NAME);
  809. #if 0
  810. retval = request_firmware(&fw_entry, FW_IMAGE_NAME,
  811. &fwu->rmi4_data->i2c_client->dev);
  812. if (retval != 0) {
  813. TPD_DMESG("%s: Firmware image %s not available\n", __func__, FW_IMAGE_NAME);
  814. retval = -EINVAL;
  815. goto exit;
  816. }
  817. TPD_DMESG("%s: Firmware image size = %d\n", __func__, fw_entry->size);
  818. fw_image = fw_entry->data;
  819. #else
  820. retval = fwu_read_sensor_id();
  821. if (retval < 0)
  822. return -EINVAL;
  823. switch (fwu->sensor_id & 0xFFFF) {
  824. case LENSON:
  825. fw_image = synaImage;
  826. break;
  827. case TPK:
  828. fw_image = synaImage2;
  829. break;
  830. default:
  831. TPD_DMESG("%s: Unknown touch sensor id: %d\n",
  832. __func__, (u16) fwu->sensor_id);
  833. return -EINVAL;
  834. }
  835. TPD_DMESG("%s: Sensor ID=%d\n", __func__, (u16) fwu->sensor_id);
  836. #endif
  837. }
  838. parse_header(&header, fw_image);
  839. if (header.image_size)
  840. fwu->firmware_data = fw_image + FW_IMAGE_OFFSET;
  841. if (header.config_size)
  842. fwu->config_data = fw_image + FW_IMAGE_OFFSET + header.image_size;
  843. fwu->fn_ptr->enable(fwu->rmi4_data, false);
  844. retval = fwu_check_version();
  845. #if 1
  846. if (retval < 0)
  847. goto exit;
  848. #endif
  849. retval = fwu_do_reflash();
  850. if (retval < 0)
  851. TPD_DMESG("%s: Failed to do reflash\n", __func__);
  852. msleep(50);
  853. /* reset device */
  854. fwu_reset_device();
  855. /* check device status */
  856. retval = fwu_read_f01_device_status(&f01_device_status);
  857. if (retval < 0)
  858. goto exit;
  859. dev_info(&fwu->rmi4_data->i2c_client->dev, "Device is in %s mode\n",
  860. f01_device_status.flash_prog == 1 ? "bootloader" : "UI");
  861. if (f01_device_status.flash_prog)
  862. dev_info(&fwu->rmi4_data->i2c_client->dev, "Flash status %d\n",
  863. f01_device_status.status_code);
  864. if (f01_device_status.flash_prog) {
  865. dev_info(&fwu->rmi4_data->i2c_client->dev,
  866. "%s: Device is in flash prog mode 0x%02X\n",
  867. __func__, f01_device_status.status_code);
  868. retval = 0;
  869. goto exit;
  870. }
  871. fwu->fn_ptr->enable(fwu->rmi4_data, true);
  872. if (fw_entry)
  873. release_firmware(fw_entry);
  874. pr_notice("%s: End of reflash process\n", __func__);
  875. exit:
  876. /* mt65xx_eint_unmask(CUST_EINT_TOUCH_PANEL_NUM); */
  877. return retval;
  878. }
  879. static int fwu_do_write_config(void)
  880. {
  881. int retval;
  882. retval = fwu_enter_flash_prog();
  883. if (retval < 0)
  884. return retval;
  885. TPD_DMESG("%s: Entered flash prog mode\n", __func__);
  886. if (fwu->config_area == PERM_CONFIG_AREA) {
  887. fwu->config_block_count = fwu->perm_config_block_count;
  888. goto write_config;
  889. }
  890. retval = fwu_write_bootloader_id();
  891. if (retval < 0)
  892. return retval;
  893. TPD_DMESG("%s: Bootloader ID written\n", __func__);
  894. switch (fwu->config_area) {
  895. case UI_CONFIG_AREA:
  896. retval = fwu_write_f34_command(CMD_ERASE_CONFIG);
  897. break;
  898. case BL_CONFIG_AREA:
  899. retval = fwu_write_f34_command(CMD_ERASE_BL_CONFIG);
  900. fwu->config_block_count = fwu->bl_config_block_count;
  901. break;
  902. case DISP_CONFIG_AREA:
  903. retval = fwu_write_f34_command(CMD_ERASE_DISP_CONFIG);
  904. fwu->config_block_count = fwu->disp_config_block_count;
  905. break;
  906. }
  907. if (retval < 0)
  908. return retval;
  909. TPD_DMESG("%s: Erase command written\n", __func__);
  910. retval = fwu_wait_for_idle(ERASE_WAIT_MS);
  911. if (retval < 0)
  912. return retval;
  913. TPD_DMESG("%s: Idle status detected\n", __func__);
  914. write_config:
  915. retval = fwu_write_configuration();
  916. if (retval < 0)
  917. return retval;
  918. pr_notice("%s: Config written\n", __func__);
  919. return retval;
  920. }
  921. static int fwu_start_write_config(void)
  922. {
  923. int retval;
  924. struct image_header header;
  925. switch (fwu->config_area) {
  926. case UI_CONFIG_AREA:
  927. break;
  928. case PERM_CONFIG_AREA:
  929. if (!fwu->flash_properties.has_perm_config)
  930. return -EINVAL;
  931. break;
  932. case BL_CONFIG_AREA:
  933. if (!fwu->flash_properties.has_bl_config)
  934. return -EINVAL;
  935. break;
  936. case DISP_CONFIG_AREA:
  937. if (!fwu->flash_properties.has_display_config)
  938. return -EINVAL;
  939. break;
  940. default:
  941. return -EINVAL;
  942. }
  943. if (fwu->ext_data_source)
  944. fwu->config_data = fwu->ext_data_source;
  945. else
  946. return -EINVAL;
  947. if (fwu->config_area == UI_CONFIG_AREA) {
  948. parse_header(&header, fwu->ext_data_source);
  949. if (header.config_size) {
  950. fwu->config_data = fwu->ext_data_source +
  951. FW_IMAGE_OFFSET + header.image_size;
  952. } else {
  953. return -EINVAL;
  954. }
  955. }
  956. pr_notice("%s: Start of write config process\n", __func__);
  957. retval = fwu_do_write_config();
  958. if (retval < 0)
  959. dev_err(&fwu->rmi4_data->i2c_client->dev, "%s: Failed to write config\n", __func__);
  960. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  961. pr_notice("%s: End of write config process\n", __func__);
  962. return retval;
  963. }
  964. static int fwu_do_read_config(void)
  965. {
  966. int retval;
  967. unsigned char block_offset[] = { 0, 0 };
  968. unsigned short block_num;
  969. unsigned short block_count;
  970. unsigned short index = 0;
  971. retval = fwu_enter_flash_prog();
  972. if (retval < 0)
  973. goto exit;
  974. TPD_DMESG("%s: Entered flash prog mode\n", __func__);
  975. switch (fwu->config_area) {
  976. case UI_CONFIG_AREA:
  977. block_count = fwu->config_block_count;
  978. break;
  979. case PERM_CONFIG_AREA:
  980. if (!fwu->flash_properties.has_perm_config) {
  981. retval = -EINVAL;
  982. goto exit;
  983. }
  984. block_count = fwu->perm_config_block_count;
  985. break;
  986. case BL_CONFIG_AREA:
  987. if (!fwu->flash_properties.has_bl_config) {
  988. retval = -EINVAL;
  989. goto exit;
  990. }
  991. block_count = fwu->bl_config_block_count;
  992. break;
  993. case DISP_CONFIG_AREA:
  994. if (!fwu->flash_properties.has_display_config) {
  995. retval = -EINVAL;
  996. goto exit;
  997. }
  998. block_count = fwu->disp_config_block_count;
  999. break;
  1000. default:
  1001. retval = -EINVAL;
  1002. goto exit;
  1003. }
  1004. fwu->config_size = fwu->block_size * block_count;
  1005. kfree(fwu->read_config_buf);
  1006. fwu->read_config_buf = kzalloc(fwu->config_size, GFP_KERNEL);
  1007. block_offset[1] |= (fwu->config_area << 5);
  1008. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  1009. fwu->f34_fd.data_base_addr + BLOCK_NUMBER_OFFSET,
  1010. block_offset, sizeof(block_offset));
  1011. if (retval < 0) {
  1012. dev_err(&fwu->rmi4_data->i2c_client->dev,
  1013. "%s: Failed to write to block number registers\n", __func__);
  1014. goto exit;
  1015. }
  1016. for (block_num = 0; block_num < block_count; block_num++) {
  1017. retval = fwu_write_f34_command(CMD_READ_CONFIG_BLOCK);
  1018. if (retval < 0) {
  1019. dev_err(&fwu->rmi4_data->i2c_client->dev,
  1020. "%s: Failed to write read config command\n", __func__);
  1021. goto exit;
  1022. }
  1023. retval = fwu_wait_for_idle(WRITE_WAIT_MS);
  1024. if (retval < 0) {
  1025. dev_err(&fwu->rmi4_data->i2c_client->dev,
  1026. "%s: Failed to wait for idle status\n", __func__);
  1027. goto exit;
  1028. }
  1029. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  1030. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  1031. &fwu->read_config_buf[index], fwu->block_size);
  1032. if (retval < 0) {
  1033. dev_err(&fwu->rmi4_data->i2c_client->dev,
  1034. "%s: Failed to read block data (block %d)\n", __func__, block_num);
  1035. goto exit;
  1036. }
  1037. index += fwu->block_size;
  1038. }
  1039. exit:
  1040. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  1041. return retval;
  1042. }
  1043. int synaptics_fw_updater(unsigned char *fw_data)
  1044. {
  1045. int retval;
  1046. if (!fwu)
  1047. return -ENODEV;
  1048. if (!fwu->initialized)
  1049. return -ENODEV;
  1050. fwu->ext_data_source = fw_data;
  1051. fwu->config_area = UI_CONFIG_AREA;
  1052. retval = fwu_start_reflash();
  1053. return retval;
  1054. }
  1055. EXPORT_SYMBOL(synaptics_fw_updater);
  1056. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  1057. struct kobject *kobj, struct bin_attribute *attributes,
  1058. char *buf, loff_t pos, size_t count)
  1059. {
  1060. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1061. if (count < fwu->config_size) {
  1062. dev_err(&rmi4_data->i2c_client->dev,
  1063. "%s: Not enough space (%zu bytes) in buffer\n", __func__, count);
  1064. return -EINVAL;
  1065. }
  1066. memcpy(buf, fwu->read_config_buf, fwu->config_size);
  1067. return fwu->config_size;
  1068. }
  1069. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  1070. struct kobject *kobj, struct bin_attribute *attributes,
  1071. char *buf, loff_t pos, size_t count)
  1072. {
  1073. memcpy((void *)(&fwu->ext_data_source[fwu->data_pos]), (const void *)buf, count);
  1074. fwu->data_pos += count;
  1075. return count;
  1076. }
  1077. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  1078. struct device_attribute *attr, const char *buf,
  1079. size_t count)
  1080. {
  1081. int retval;
  1082. unsigned int input;
  1083. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1084. if (kstrtoint(buf, 10, &input)) {
  1085. retval = -EINVAL;
  1086. goto exit;
  1087. }
  1088. if (input != 1) {
  1089. retval = -EINVAL;
  1090. goto exit;
  1091. }
  1092. retval = synaptics_fw_updater(fwu->ext_data_source);
  1093. if (retval < 0) {
  1094. dev_err(&rmi4_data->i2c_client->dev, "%s: Failed to do reflash\n", __func__);
  1095. goto exit;
  1096. }
  1097. retval = count;
  1098. exit:
  1099. kfree(fwu->ext_data_source);
  1100. fwu->ext_data_source = NULL;
  1101. return retval;
  1102. }
  1103. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  1104. struct device_attribute *attr, const char *buf,
  1105. size_t count)
  1106. {
  1107. int retval;
  1108. unsigned int input;
  1109. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1110. if (kstrtoint(buf, 10, &input)) {
  1111. retval = -EINVAL;
  1112. goto exit;
  1113. }
  1114. if (input != 1) {
  1115. retval = -EINVAL;
  1116. goto exit;
  1117. }
  1118. retval = fwu_start_write_config();
  1119. if (retval < 0) {
  1120. dev_err(&rmi4_data->i2c_client->dev, "%s: Failed to write config\n", __func__);
  1121. goto exit;
  1122. }
  1123. retval = count;
  1124. exit:
  1125. kfree(fwu->ext_data_source);
  1126. fwu->ext_data_source = NULL;
  1127. return retval;
  1128. }
  1129. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  1130. struct device_attribute *attr, const char *buf,
  1131. size_t count)
  1132. {
  1133. int retval;
  1134. unsigned int input;
  1135. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1136. if (kstrtoint(buf, 10, &input))
  1137. return -EINVAL;
  1138. if (input != 1)
  1139. return -EINVAL;
  1140. retval = fwu_do_read_config();
  1141. if (retval < 0) {
  1142. dev_err(&rmi4_data->i2c_client->dev, "%s: Failed to read config\n", __func__);
  1143. return retval;
  1144. }
  1145. return count;
  1146. }
  1147. #if 0
  1148. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  1149. struct device_attribute *attr, const char *buf,
  1150. size_t count)
  1151. {
  1152. int retval;
  1153. unsigned long config_area;
  1154. retval = sstrtoul(buf, 10, &config_area);
  1155. if (retval)
  1156. return retval;
  1157. fwu->config_area = config_area;
  1158. return count;
  1159. }
  1160. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  1161. struct device_attribute *attr, const char *buf,
  1162. size_t count)
  1163. {
  1164. int retval;
  1165. unsigned long size;
  1166. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1167. retval = sstrtoul(buf, 10, &size);
  1168. if (retval)
  1169. return retval;
  1170. fwu->image_size = size;
  1171. fwu->data_pos = 0;
  1172. kfree(fwu->ext_data_source);
  1173. fwu->ext_data_source = kzalloc(fwu->image_size, GFP_KERNEL);
  1174. if (!fwu->ext_data_source) {
  1175. dev_err(&rmi4_data->i2c_client->dev,
  1176. "%s: Failed to alloc mem for image data\n", __func__);
  1177. return -ENOMEM;
  1178. }
  1179. return count;
  1180. }
  1181. #endif
  1182. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  1183. struct device_attribute *attr, char *buf)
  1184. {
  1185. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->block_size);
  1186. }
  1187. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  1188. struct device_attribute *attr, char *buf)
  1189. {
  1190. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->fw_block_count);
  1191. }
  1192. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  1193. struct device_attribute *attr, char *buf)
  1194. {
  1195. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->config_block_count);
  1196. }
  1197. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  1198. struct device_attribute *attr, char *buf)
  1199. {
  1200. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->perm_config_block_count);
  1201. }
  1202. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  1203. struct device_attribute *attr, char *buf)
  1204. {
  1205. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->bl_config_block_count);
  1206. }
  1207. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  1208. struct device_attribute *attr, char *buf)
  1209. {
  1210. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->disp_config_block_count);
  1211. }
  1212. static void synaptics_rmi4_fwu_attn(struct i2c_client *client, unsigned char intr_mask)
  1213. {
  1214. if (fwu->intr_mask & intr_mask)
  1215. fwu_read_f34_flash_status();
  1216. }
  1217. /**
  1218. * synaptics_rmi4_set_page()
  1219. *
  1220. * Called by synaptics_rmi4_i2c_read() and synaptics_rmi4_i2c_write().
  1221. *
  1222. * This function writes to the page select register to switch to the
  1223. * assigned page.
  1224. */
  1225. #if 0
  1226. static int synaptics_rmi4_set_page(struct synaptics_rmi4_data *rmi4_data, unsigned int address)
  1227. {
  1228. int retval = 0;
  1229. unsigned char retry;
  1230. unsigned char buf[PAGE_SELECT_LEN];
  1231. unsigned char page;
  1232. struct i2c_client *i2c = rmi4_data->i2c_client;
  1233. page = ((address >> 8) & MASK_8BIT);
  1234. if (page != rmi4_data->current_page) {
  1235. buf[0] = MASK_8BIT;
  1236. buf[1] = page;
  1237. for (retry = 0; retry < SYN_I2C_RETRY_TIMES; retry++) {
  1238. retval = i2c_master_send(i2c, buf, PAGE_SELECT_LEN);
  1239. if (retval != PAGE_SELECT_LEN) {
  1240. dev_err(&i2c->dev, "%s: I2C retry %d\n", __func__, retry + 1);
  1241. msleep(20);
  1242. } else {
  1243. rmi4_data->current_page = page;
  1244. break;
  1245. }
  1246. }
  1247. } else {
  1248. retval = PAGE_SELECT_LEN;
  1249. }
  1250. return retval;
  1251. }
  1252. #endif
  1253. /**
  1254. * synaptics_rmi4_i2c_read()
  1255. *
  1256. * Called by various functions in this driver, and also exported to
  1257. * other expansion Function modules such as rmi_dev.
  1258. *
  1259. * This function reads data of an arbitrary length from the sensor,
  1260. * starting from an assigned register address of the sensor, via I2C
  1261. * with a retry mechanism.
  1262. */
  1263. static int synaptics_rmi4_i2c_read(struct synaptics_rmi4_data *rmi4_data,
  1264. unsigned short addr, unsigned char *data, unsigned short length)
  1265. {
  1266. return tpd_i2c_read_data(rmi4_data->i2c_client, addr, data, length);
  1267. /*
  1268. int retval;
  1269. unsigned char retry;
  1270. unsigned char buf;
  1271. struct i2c_msg msg[] = {
  1272. {
  1273. .addr = rmi4_data->i2c_client->addr,
  1274. .flags = 0,
  1275. .len = 1,
  1276. .buf = &buf,
  1277. },
  1278. {
  1279. .addr = rmi4_data->i2c_client->addr,
  1280. .flags = I2C_M_RD,
  1281. .len = length,
  1282. .buf = data,
  1283. },
  1284. };
  1285. buf = addr & MASK_8BIT;
  1286. mutex_lock(&(rmi4_data->rmi4_io_ctrl_mutex));
  1287. retval = synaptics_rmi4_set_page(rmi4_data, addr);
  1288. if (retval != PAGE_SELECT_LEN)
  1289. goto exit;
  1290. for (retry = 0; retry < SYN_I2C_RETRY_TIMES; retry++) {
  1291. if (i2c_transfer(rmi4_data->i2c_client->adapter, msg, 2) == 2) {
  1292. retval = length;
  1293. break;
  1294. }
  1295. dev_err(&rmi4_data->i2c_client->dev,
  1296. "%s: I2C retry %d\n",
  1297. __func__, retry + 1);
  1298. msleep(20);
  1299. }
  1300. if (retry == SYN_I2C_RETRY_TIMES) {
  1301. dev_err(&rmi4_data->i2c_client->dev,
  1302. "%s: I2C read over retry limit\n",
  1303. __func__);
  1304. retval = -EIO;
  1305. }
  1306. exit:
  1307. mutex_unlock(&(rmi4_data->rmi4_io_ctrl_mutex));
  1308. return retval; */
  1309. }
  1310. /**
  1311. * synaptics_rmi4_i2c_write()
  1312. *
  1313. * Called by various functions in this driver, and also exported to
  1314. * other expansion Function modules such as rmi_dev.
  1315. *
  1316. * This function writes data of an arbitrary length to the sensor,
  1317. * starting from an assigned register address of the sensor, via I2C with
  1318. * a retry mechanism.
  1319. */
  1320. static int synaptics_rmi4_i2c_write(struct synaptics_rmi4_data *rmi4_data,
  1321. unsigned short addr, unsigned char *data, unsigned short length)
  1322. {
  1323. return tpd_i2c_write_data(rmi4_data->i2c_client, addr, data, length);
  1324. /* int retval;
  1325. unsigned char retry;
  1326. unsigned char buf[length + 1];
  1327. struct i2c_msg msg[] = {
  1328. {
  1329. .addr = rmi4_data->i2c_client->addr,
  1330. .flags = 0,
  1331. .len = length + 1,
  1332. .buf = buf,
  1333. }
  1334. };
  1335. mutex_lock(&(rmi4_data->rmi4_io_ctrl_mutex));
  1336. retval = synaptics_rmi4_set_page(rmi4_data, addr);
  1337. if (retval != PAGE_SELECT_LEN)
  1338. goto exit;
  1339. buf[0] = addr & MASK_8BIT;
  1340. memcpy(&buf[1], &data[0], length);
  1341. for (retry = 0; retry < SYN_I2C_RETRY_TIMES; retry++) {
  1342. if (i2c_transfer(rmi4_data->i2c_client->adapter, msg, 1) == 1) {
  1343. retval = length;
  1344. break;
  1345. }
  1346. dev_err(&rmi4_data->i2c_client->dev,
  1347. "%s: I2C retry %d\n",
  1348. __func__, retry + 1);
  1349. msleep(20);
  1350. }
  1351. if (retry == SYN_I2C_RETRY_TIMES) {
  1352. dev_err(&rmi4_data->i2c_client->dev,
  1353. "%s: I2C write over retry limit\n",
  1354. __func__);
  1355. retval = -EIO;
  1356. }
  1357. exit:
  1358. mutex_unlock(&(rmi4_data->rmi4_io_ctrl_mutex));
  1359. return retval;*/
  1360. }
  1361. /**
  1362. * synaptics_rmi4_irq_enable()
  1363. *
  1364. * Called by synaptics_rmi4_probe() and the power management functions
  1365. * in this driver and also exported to other expansion Function modules
  1366. * such as rmi_dev.
  1367. *
  1368. * This function handles the enabling and disabling of the attention
  1369. * irq including the setting up of the ISR thread.
  1370. */
  1371. static int synaptics_rmi4_irq_enable(struct synaptics_rmi4_data *rmi4_data, bool enable)
  1372. {
  1373. int retval = 0;
  1374. unsigned char intr_status;
  1375. /* const struct synaptics_dsx_platform_data *platform_data = rmi4_data->i2c_client->dev.platform_data; */
  1376. if (enable) {
  1377. if (rmi4_data->irq_enabled)
  1378. return retval;
  1379. /* Clear interrupts first */
  1380. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1381. rmi4_data->f01_data_base_addr + 1,
  1382. &intr_status, rmi4_data->num_of_intr_regs);
  1383. if (retval < 0)
  1384. return retval;
  1385. /* retval = request_threaded_irq(rmi4_data->irq, NULL,
  1386. synaptics_rmi4_irq, platform_data->irq_type,
  1387. DRIVER_NAME, rmi4_data);
  1388. if (retval < 0) {
  1389. dev_err(&rmi4_data->i2c_client->dev,
  1390. "%s: Failed to create irq thread\n",
  1391. __func__);
  1392. return retval;
  1393. }*/
  1394. rmi4_data->irq_enabled = true;
  1395. } else {
  1396. if (rmi4_data->irq_enabled) {
  1397. disable_irq(rmi4_data->irq);
  1398. free_irq(rmi4_data->irq, rmi4_data);
  1399. rmi4_data->irq_enabled = false;
  1400. }
  1401. }
  1402. return retval;
  1403. }
  1404. static int synaptics_rmi4_alloc_fh(struct synaptics_rmi4_fn **fhandler,
  1405. struct synaptics_rmi4_fn_desc *rmi_fd, int page_number)
  1406. {
  1407. if (!(*fhandler))
  1408. *fhandler = kmalloc(sizeof(**fhandler), GFP_KERNEL);
  1409. if (!(*fhandler))
  1410. return -ENOMEM;
  1411. (*fhandler)->full_addr.data_base = (rmi_fd->data_base_addr | (page_number << 8));
  1412. (*fhandler)->full_addr.ctrl_base = (rmi_fd->ctrl_base_addr | (page_number << 8));
  1413. (*fhandler)->full_addr.cmd_base = (rmi_fd->cmd_base_addr | (page_number << 8));
  1414. (*fhandler)->full_addr.query_base = (rmi_fd->query_base_addr | (page_number << 8));
  1415. return 0;
  1416. }
  1417. static int synaptics_rmi4_f11_init(struct synaptics_rmi4_data *rmi4_data,
  1418. struct synaptics_rmi4_fn *fhandler,
  1419. struct synaptics_rmi4_fn_desc *fd, unsigned int intr_count)
  1420. {
  1421. int retval;
  1422. unsigned char ii;
  1423. unsigned char intr_offset;
  1424. unsigned char abs_data_size;
  1425. unsigned char abs_data_blk_size;
  1426. unsigned char query[F11_STD_QUERY_LEN];
  1427. unsigned char control[F11_STD_CTRL_LEN];
  1428. fhandler->fn_number = fd->fn_number;
  1429. fhandler->num_of_data_sources = fd->intr_src_count;
  1430. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1431. fhandler->full_addr.query_base, query, sizeof(query));
  1432. if (retval < 0)
  1433. return retval;
  1434. /* Maximum number of fingers supported */
  1435. if ((query[1] & MASK_3BIT) <= 4)
  1436. fhandler->num_of_data_points = (query[1] & MASK_3BIT) + 1;
  1437. else if ((query[1] & MASK_3BIT) == 5)
  1438. fhandler->num_of_data_points = 10;
  1439. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1440. fhandler->full_addr.ctrl_base, control, sizeof(control));
  1441. if (retval < 0)
  1442. return retval;
  1443. /* Maximum x and y */
  1444. rmi4_data->sensor_max_x = ((control[6] & MASK_8BIT) << 0) | ((control[7] & MASK_4BIT) << 8);
  1445. rmi4_data->sensor_max_y = ((control[8] & MASK_8BIT) << 0) | ((control[9] & MASK_4BIT) << 8);
  1446. dev_dbg(&rmi4_data->i2c_client->dev,
  1447. "%s: Function %02x max x = %d max y = %d\n",
  1448. __func__, fhandler->fn_number, rmi4_data->sensor_max_x, rmi4_data->sensor_max_y);
  1449. fhandler->intr_reg_num = (intr_count + 7) / 8;
  1450. if (fhandler->intr_reg_num != 0)
  1451. fhandler->intr_reg_num -= 1;
  1452. /* Set an enable bit for each data source */
  1453. intr_offset = intr_count % 8;
  1454. fhandler->intr_mask = 0;
  1455. for (ii = intr_offset; ii < ((fd->intr_src_count & MASK_3BIT) + intr_offset); ii++)
  1456. fhandler->intr_mask |= 1 << ii;
  1457. abs_data_size = query[5] & MASK_2BIT;
  1458. abs_data_blk_size = 3 + (2 * (abs_data_size == 0 ? 1 : 0));
  1459. fhandler->size_of_data_register_block = abs_data_blk_size;
  1460. return retval;
  1461. }
  1462. /**
  1463. * synaptics_rmi4_f12_init()
  1464. *
  1465. * Called by synaptics_rmi4_query_device().
  1466. *
  1467. * This function parses information from the Function 12 registers and
  1468. * determines the number of fingers supported, offset to the data1
  1469. * register, x and y data ranges, offset to the associated interrupt
  1470. * status register, interrupt bit mask, and allocates memory resources
  1471. * for finger data acquisition.
  1472. */
  1473. static int synaptics_rmi4_f12_init(struct synaptics_rmi4_data *rmi4_data,
  1474. struct synaptics_rmi4_fn *fhandler,
  1475. struct synaptics_rmi4_fn_desc *fd, unsigned int intr_count)
  1476. {
  1477. int retval;
  1478. unsigned char ii;
  1479. unsigned char intr_offset;
  1480. unsigned char ctrl_8_offset;
  1481. unsigned char ctrl_23_offset;
  1482. struct synaptics_rmi4_f12_query_5 query_5;
  1483. struct synaptics_rmi4_f12_query_8 query_8;
  1484. struct synaptics_rmi4_f12_ctrl_8 ctrl_8;
  1485. struct synaptics_rmi4_f12_ctrl_23 ctrl_23;
  1486. struct synaptics_rmi4_f12_finger_data *finger_data_list;
  1487. fhandler->fn_number = fd->fn_number;
  1488. fhandler->num_of_data_sources = fd->intr_src_count;
  1489. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1490. fhandler->full_addr.query_base + 5,
  1491. query_5.data, sizeof(query_5.data));
  1492. if (retval < 0)
  1493. return retval;
  1494. ctrl_8_offset = query_5.ctrl0_is_present +
  1495. query_5.ctrl1_is_present +
  1496. query_5.ctrl2_is_present +
  1497. query_5.ctrl3_is_present +
  1498. query_5.ctrl4_is_present +
  1499. query_5.ctrl5_is_present + query_5.ctrl6_is_present + query_5.ctrl7_is_present;
  1500. ctrl_23_offset = ctrl_8_offset +
  1501. query_5.ctrl8_is_present +
  1502. query_5.ctrl9_is_present +
  1503. query_5.ctrl10_is_present +
  1504. query_5.ctrl11_is_present +
  1505. query_5.ctrl12_is_present +
  1506. query_5.ctrl13_is_present +
  1507. query_5.ctrl14_is_present +
  1508. query_5.ctrl15_is_present +
  1509. query_5.ctrl16_is_present +
  1510. query_5.ctrl17_is_present +
  1511. query_5.ctrl18_is_present +
  1512. query_5.ctrl19_is_present +
  1513. query_5.ctrl20_is_present + query_5.ctrl21_is_present + query_5.ctrl22_is_present;
  1514. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1515. fhandler->full_addr.ctrl_base + ctrl_23_offset,
  1516. ctrl_23.data, sizeof(ctrl_23.data));
  1517. if (retval < 0)
  1518. return retval;
  1519. /* Maximum number of fingers supported */
  1520. fhandler->num_of_data_points = ctrl_23.max_reported_objects;
  1521. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1522. fhandler->full_addr.query_base + 8,
  1523. query_8.data, sizeof(query_8.data));
  1524. if (retval < 0)
  1525. return retval;
  1526. /* Determine the presence of the Data0 register */
  1527. fhandler->data1_offset = query_8.data0_is_present;
  1528. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1529. fhandler->full_addr.ctrl_base + ctrl_8_offset,
  1530. ctrl_8.data, sizeof(ctrl_8.data));
  1531. if (retval < 0)
  1532. return retval;
  1533. /* Maximum x and y */
  1534. rmi4_data->sensor_max_x =
  1535. ((unsigned short)ctrl_8.max_x_coord_lsb << 0) |
  1536. ((unsigned short)ctrl_8.max_x_coord_msb << 8);
  1537. rmi4_data->sensor_max_y =
  1538. ((unsigned short)ctrl_8.max_y_coord_lsb << 0) |
  1539. ((unsigned short)ctrl_8.max_y_coord_msb << 8);
  1540. dev_dbg(&rmi4_data->i2c_client->dev,
  1541. "%s: Function %02x max x = %d max y = %d\n",
  1542. __func__, fhandler->fn_number, rmi4_data->sensor_max_x, rmi4_data->sensor_max_y);
  1543. rmi4_data->num_of_rx = ctrl_8.num_of_rx;
  1544. rmi4_data->num_of_tx = ctrl_8.num_of_tx;
  1545. fhandler->intr_reg_num = (intr_count + 7) / 8;
  1546. if (fhandler->intr_reg_num != 0)
  1547. fhandler->intr_reg_num -= 1;
  1548. /* Set an enable bit for each data source */
  1549. intr_offset = intr_count % 8;
  1550. fhandler->intr_mask = 0;
  1551. for (ii = intr_offset; ii < ((fd->intr_src_count & MASK_3BIT) + intr_offset); ii++)
  1552. fhandler->intr_mask |= 1 << ii;
  1553. /* Allocate memory for finger data storage space */
  1554. fhandler->data_size = fhandler->num_of_data_points *
  1555. sizeof(struct synaptics_rmi4_f12_finger_data);
  1556. finger_data_list = kmalloc(fhandler->data_size, GFP_KERNEL);
  1557. fhandler->data = (void *)finger_data_list;
  1558. return retval;
  1559. }
  1560. static void synaptics_rmi4_f1a_kfree(struct synaptics_rmi4_fn *fhandler)
  1561. {
  1562. struct synaptics_rmi4_f1a_handle *f1a = fhandler->data;
  1563. if (f1a) {
  1564. kfree(f1a->button_data_buffer);
  1565. kfree(f1a->button_map);
  1566. kfree(f1a);
  1567. fhandler->data = NULL;
  1568. }
  1569. }
  1570. static int synaptics_rmi4_f1a_alloc_mem(struct synaptics_rmi4_data *rmi4_data,
  1571. struct synaptics_rmi4_fn *fhandler)
  1572. {
  1573. int retval;
  1574. struct synaptics_rmi4_f1a_handle *f1a;
  1575. f1a = kzalloc(sizeof(*f1a), GFP_KERNEL);
  1576. if (!f1a) {
  1577. /*dev_err(&rmi4_data->i2c_client->dev,
  1578. "%s: Failed to alloc mem for function handle\n", __func__);*/
  1579. return -ENOMEM;
  1580. }
  1581. fhandler->data = (void *)f1a;
  1582. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1583. fhandler->full_addr.query_base,
  1584. f1a->button_query.data, sizeof(f1a->button_query.data));
  1585. if (retval < 0) {
  1586. dev_err(&rmi4_data->i2c_client->dev,
  1587. "%s: Failed to read query registers\n", __func__);
  1588. return retval;
  1589. }
  1590. f1a->button_count = f1a->button_query.max_button_count + 1;
  1591. f1a->button_bitmask_size = (f1a->button_count + 7) / 8;
  1592. f1a->button_data_buffer = kcalloc(f1a->button_bitmask_size,
  1593. sizeof(*(f1a->button_data_buffer)), GFP_KERNEL);
  1594. if (!f1a->button_data_buffer) {
  1595. /*dev_err(&rmi4_data->i2c_client->dev,
  1596. "%s: Failed to alloc mem for data buffer\n", __func__);*/
  1597. return -ENOMEM;
  1598. }
  1599. f1a->button_map = kcalloc(f1a->button_count, sizeof(*(f1a->button_map)), GFP_KERNEL);
  1600. if (!f1a->button_map) {
  1601. /*dev_err(&rmi4_data->i2c_client->dev,
  1602. "%s: Failed to alloc mem for button map\n", __func__);*/
  1603. return -ENOMEM;
  1604. }
  1605. return 0;
  1606. }
  1607. static int synaptics_rmi4_f1a_button_map(struct synaptics_rmi4_data *rmi4_data,
  1608. struct synaptics_rmi4_fn *fhandler)
  1609. {
  1610. /* unsigned char ii; */
  1611. /* struct synaptics_rmi4_f1a_handle *f1a = fhandler->data; */
  1612. /* const struct synaptics_dsx_platform_data *pdata = rmi4_data->board;
  1613. if (!pdata->f1a_button_map) {
  1614. dev_err(&rmi4_data->i2c_client->dev,
  1615. "%s: f1a_button_map is NULL in board file\n",
  1616. __func__);
  1617. return -ENODEV;
  1618. } else if (!pdata->f1a_button_map->map) {
  1619. dev_err(&rmi4_data->i2c_client->dev,
  1620. "%s: Button map is missing in board file\n",
  1621. __func__);
  1622. return -ENODEV;
  1623. } else {
  1624. if (pdata->f1a_button_map->nbuttons != f1a->button_count) {
  1625. f1a->valid_button_count = min(f1a->button_count,
  1626. pdata->f1a_button_map->nbuttons);
  1627. } else {
  1628. f1a->valid_button_count = f1a->button_count;
  1629. }
  1630. for (ii = 0; ii < f1a->valid_button_count; ii++)
  1631. f1a->button_map[ii] = pdata->f1a_button_map->map[ii];
  1632. } */
  1633. return 0;
  1634. }
  1635. static int synaptics_rmi4_f1a_init(struct synaptics_rmi4_data *rmi4_data,
  1636. struct synaptics_rmi4_fn *fhandler,
  1637. struct synaptics_rmi4_fn_desc *fd, unsigned int intr_count)
  1638. {
  1639. int retval;
  1640. unsigned char ii;
  1641. unsigned short intr_offset;
  1642. fhandler->fn_number = fd->fn_number;
  1643. fhandler->num_of_data_sources = fd->intr_src_count;
  1644. fhandler->intr_reg_num = (intr_count + 7) / 8;
  1645. if (fhandler->intr_reg_num != 0)
  1646. fhandler->intr_reg_num -= 1;
  1647. /* Set an enable bit for each data source */
  1648. intr_offset = intr_count % 8;
  1649. fhandler->intr_mask = 0;
  1650. for (ii = intr_offset; ii < ((fd->intr_src_count & MASK_3BIT) + intr_offset); ii++)
  1651. fhandler->intr_mask |= 1 << ii;
  1652. retval = synaptics_rmi4_f1a_alloc_mem(rmi4_data, fhandler);
  1653. if (retval < 0)
  1654. goto error_exit;
  1655. retval = synaptics_rmi4_f1a_button_map(rmi4_data, fhandler);
  1656. if (retval < 0)
  1657. goto error_exit;
  1658. rmi4_data->button_0d_enabled = 1;
  1659. return 0;
  1660. error_exit:
  1661. synaptics_rmi4_f1a_kfree(fhandler);
  1662. return retval;
  1663. }
  1664. /**
  1665. * synaptics_rmi4_query_device()
  1666. *
  1667. * Called by synaptics_rmi4_probe().
  1668. *
  1669. * This function scans the page description table, records the offsets
  1670. * to the register types of Function $01, sets up the function handlers
  1671. * for Function $11 and Function $12, determines the number of interrupt
  1672. * sources from the sensor, adds valid Functions with data inputs to the
  1673. * Function linked list, parses information from the query registers of
  1674. * Function $01, and enables the interrupt sources from the valid Functions
  1675. * with data inputs.
  1676. */
  1677. static int synaptics_rmi4_query_device(struct synaptics_rmi4_data *rmi4_data)
  1678. {
  1679. int retval;
  1680. unsigned char ii;
  1681. unsigned char page_number;
  1682. unsigned char intr_count = 0;
  1683. unsigned char data_sources = 0;
  1684. unsigned char f01_query[F01_STD_QUERY_LEN];
  1685. unsigned short pdt_entry_addr;
  1686. unsigned short intr_addr;
  1687. struct synaptics_rmi4_f01_device_status status;
  1688. struct synaptics_rmi4_fn_desc rmi_fd;
  1689. struct synaptics_rmi4_fn *fhandler;
  1690. struct synaptics_rmi4_device_info *rmi;
  1691. rmi = &(rmi4_data->rmi4_mod_info);
  1692. INIT_LIST_HEAD(&rmi->support_fn_list);
  1693. /* Scan the page description tables of the pages to service */
  1694. for (page_number = 0; page_number < PAGES_TO_SERVICE; page_number++) {
  1695. for (pdt_entry_addr = PDT_START; pdt_entry_addr > PDT_END;
  1696. pdt_entry_addr -= PDT_ENTRY_SIZE) {
  1697. pdt_entry_addr |= (page_number << 8);
  1698. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1699. pdt_entry_addr,
  1700. (unsigned char *)&rmi_fd, sizeof(rmi_fd));
  1701. if (retval < 0)
  1702. return retval;
  1703. fhandler = NULL;
  1704. if (rmi_fd.fn_number == 0) {
  1705. TPD_DMESG("%s: Reached end of PDT\n", __func__);
  1706. break;
  1707. }
  1708. TPD_DMESG("%s: F%02x found (page %d)\n",
  1709. __func__, rmi_fd.fn_number, page_number);
  1710. switch (rmi_fd.fn_number) {
  1711. case SYNAPTICS_RMI4_F01:
  1712. rmi4_data->f01_query_base_addr = rmi_fd.query_base_addr;
  1713. rmi4_data->f01_ctrl_base_addr = rmi_fd.ctrl_base_addr;
  1714. rmi4_data->f01_data_base_addr = rmi_fd.data_base_addr;
  1715. rmi4_data->f01_cmd_base_addr = rmi_fd.cmd_base_addr;
  1716. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1717. rmi4_data->f01_data_base_addr,
  1718. status.data, sizeof(status.data));
  1719. if (retval < 0)
  1720. return retval;
  1721. if (status.flash_prog == 1) {
  1722. TPD_DMESG("%s: In flash prog mode, status = 0x%02x\n",
  1723. __func__, status.status_code);
  1724. goto flash_prog_mode;
  1725. }
  1726. break;
  1727. case SYNAPTICS_RMI4_F11:
  1728. if (rmi_fd.intr_src_count == 0)
  1729. break;
  1730. retval = synaptics_rmi4_alloc_fh(&fhandler, &rmi_fd, page_number);
  1731. if (retval < 0) {
  1732. dev_err(&rmi4_data->i2c_client->dev,
  1733. "%s: Failed to alloc for F%d\n",
  1734. __func__, rmi_fd.fn_number);
  1735. return retval;
  1736. }
  1737. retval = synaptics_rmi4_f11_init(rmi4_data,
  1738. fhandler, &rmi_fd, intr_count);
  1739. if (retval < 0)
  1740. return retval;
  1741. break;
  1742. case SYNAPTICS_RMI4_F12:
  1743. if (rmi_fd.intr_src_count == 0)
  1744. break;
  1745. retval = synaptics_rmi4_alloc_fh(&fhandler, &rmi_fd, page_number);
  1746. if (retval < 0) {
  1747. dev_err(&rmi4_data->i2c_client->dev,
  1748. "%s: Failed to alloc for F%d\n",
  1749. __func__, rmi_fd.fn_number);
  1750. return retval;
  1751. }
  1752. retval = synaptics_rmi4_f12_init(rmi4_data,
  1753. fhandler, &rmi_fd, intr_count);
  1754. if (retval < 0)
  1755. return retval;
  1756. break;
  1757. case SYNAPTICS_RMI4_F1A:
  1758. if (rmi_fd.intr_src_count == 0)
  1759. break;
  1760. retval = synaptics_rmi4_alloc_fh(&fhandler, &rmi_fd, page_number);
  1761. if (retval < 0) {
  1762. dev_err(&rmi4_data->i2c_client->dev,
  1763. "%s: Failed to alloc for F%d\n",
  1764. __func__, rmi_fd.fn_number);
  1765. return retval;
  1766. }
  1767. retval = synaptics_rmi4_f1a_init(rmi4_data,
  1768. fhandler, &rmi_fd, intr_count);
  1769. if (retval < 0)
  1770. return retval;
  1771. break;
  1772. #if PROXIMITY
  1773. case SYNAPTICS_RMI4_F51:
  1774. if (rmi_fd.intr_src_count == 0)
  1775. break;
  1776. retval = synaptics_rmi4_alloc_fh(&fhandler, &rmi_fd, page_number);
  1777. if (retval < 0) {
  1778. dev_err(&rmi4_data->i2c_client->dev,
  1779. "%s: Failed to alloc for F%d\n",
  1780. __func__, rmi_fd.fn_number);
  1781. return retval;
  1782. }
  1783. retval = synaptics_rmi4_f51_init(rmi4_data,
  1784. fhandler, &rmi_fd, intr_count);
  1785. if (retval < 0)
  1786. return retval;
  1787. break;
  1788. #endif
  1789. }
  1790. /* Accumulate the interrupt count */
  1791. intr_count += (rmi_fd.intr_src_count & MASK_3BIT);
  1792. if (fhandler && rmi_fd.intr_src_count)
  1793. list_add_tail(&fhandler->link, &rmi->support_fn_list);
  1794. }
  1795. }
  1796. flash_prog_mode:
  1797. rmi4_data->num_of_intr_regs = (intr_count + 7) / 8;
  1798. TPD_DMESG("%s: Number of interrupt registers = %d\n",
  1799. __func__, rmi4_data->num_of_intr_regs);
  1800. retval = synaptics_rmi4_i2c_read(rmi4_data,
  1801. rmi4_data->f01_query_base_addr,
  1802. f01_query, sizeof(f01_query));
  1803. if (retval < 0)
  1804. return retval;
  1805. /* RMI Version 4.0 currently supported */
  1806. rmi->version_major = 4;
  1807. rmi->version_minor = 0;
  1808. rmi->manufacturer_id = f01_query[0];
  1809. rmi->product_props = f01_query[1];
  1810. rmi->product_info[0] = f01_query[2] & MASK_7BIT;
  1811. rmi->product_info[1] = f01_query[3] & MASK_7BIT;
  1812. rmi->date_code[0] = f01_query[4] & MASK_5BIT;
  1813. rmi->date_code[1] = f01_query[5] & MASK_4BIT;
  1814. rmi->date_code[2] = f01_query[6] & MASK_5BIT;
  1815. rmi->tester_id = ((f01_query[7] & MASK_7BIT) << 8) | (f01_query[8] & MASK_7BIT);
  1816. rmi->serial_number = ((f01_query[9] & MASK_7BIT) << 8) | (f01_query[10] & MASK_7BIT);
  1817. memcpy(rmi->product_id_string, &f01_query[11], 10);
  1818. if (rmi->manufacturer_id != 1) {
  1819. dev_err(&rmi4_data->i2c_client->dev,
  1820. "%s: Non-Synaptics device found, manufacturer ID = %d\n",
  1821. __func__, rmi->manufacturer_id);
  1822. }
  1823. memset(rmi4_data->intr_mask, 0x00, sizeof(rmi4_data->intr_mask));
  1824. /*
  1825. * Map out the interrupt bit masks for the interrupt sources
  1826. * from the registered function handlers.
  1827. */
  1828. list_for_each_entry(fhandler, &rmi->support_fn_list, link)
  1829. data_sources += fhandler->num_of_data_sources;
  1830. if (data_sources) {
  1831. list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
  1832. if (fhandler->num_of_data_sources)
  1833. rmi4_data->intr_mask[fhandler->intr_reg_num] |= fhandler->intr_mask;
  1834. }
  1835. }
  1836. /* Enable the interrupt sources */
  1837. for (ii = 0; ii < rmi4_data->num_of_intr_regs; ii++) {
  1838. if (rmi4_data->intr_mask[ii] != 0x00) {
  1839. TPD_DMESG("%s: Interrupt enable mask %d = 0x%02x\n",
  1840. __func__, ii, rmi4_data->intr_mask[ii]);
  1841. intr_addr = rmi4_data->f01_ctrl_base_addr + 1 + ii;
  1842. retval = synaptics_rmi4_i2c_write(rmi4_data,
  1843. intr_addr,
  1844. &(rmi4_data->intr_mask[ii]),
  1845. sizeof(rmi4_data->intr_mask[ii]));
  1846. if (retval < 0)
  1847. return retval;
  1848. }
  1849. }
  1850. return 0;
  1851. }
  1852. static int synaptics_rmi4_reset_device(struct synaptics_rmi4_data *rmi4_data)
  1853. {
  1854. int retval;
  1855. unsigned char command = 0x01;
  1856. /* struct synaptics_rmi4_fn *fhandler; */
  1857. struct synaptics_rmi4_device_info *rmi;
  1858. rmi = &(rmi4_data->rmi4_mod_info);
  1859. retval = synaptics_rmi4_i2c_write(rmi4_data,
  1860. rmi4_data->f01_cmd_base_addr, &command, sizeof(command));
  1861. if (retval < 0) {
  1862. dev_err(&rmi4_data->i2c_client->dev,
  1863. "%s: Failed to issue reset command, error = %d\n", __func__, retval);
  1864. return retval;
  1865. }
  1866. msleep(100);
  1867. /* list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
  1868. printk("kfree handler = 0x%x\n", fhandler);
  1869. if (fhandler) {
  1870. if (fhandler->fn_number == SYNAPTICS_RMI4_F1A)
  1871. synaptics_rmi4_f1a_kfree(fhandler);
  1872. else
  1873. kfree(fhandler->data);
  1874. kfree(fhandler);
  1875. }
  1876. }*/
  1877. retval = synaptics_rmi4_query_device(rmi4_data);
  1878. if (retval < 0) {
  1879. dev_err(&rmi4_data->i2c_client->dev, "%s: Failed to query device\n", __func__);
  1880. return retval;
  1881. }
  1882. return 0;
  1883. }
  1884. static int synaptics_rmi4_fwu_init(struct i2c_client *client)
  1885. {
  1886. int retval;
  1887. unsigned char attr_count;
  1888. struct pdt_properties pdt_props;
  1889. TPD_DMESG("%s:enter\n", __func__);
  1890. fwu = kzalloc(sizeof(*fwu), GFP_KERNEL);
  1891. if (!fwu) {
  1892. /*dev_err(&client->dev, "%s: Failed to alloc mem for fwu\n", __func__);*/
  1893. goto exit;
  1894. }
  1895. fwu->rmi4_data = kzalloc(sizeof(struct synaptics_rmi4_data), GFP_KERNEL);
  1896. if (!fwu->rmi4_data) {
  1897. /*dev_err(&client->dev, "%s: Failed to alloc mem for rmi4_data\n", __func__);*/
  1898. retval = -ENOMEM;
  1899. goto exit_free_fwu;
  1900. }
  1901. fwu->fn_ptr = kzalloc(sizeof(*(fwu->fn_ptr)), GFP_KERNEL);
  1902. if (!fwu->fn_ptr) {
  1903. /*dev_err(&client->dev, "%s: Failed to alloc mem for fn_ptr\n", __func__);*/
  1904. retval = -ENOMEM;
  1905. goto exit_free_rmi4;
  1906. }
  1907. fwu->rmi4_data->input_dev = tpd->dev;
  1908. fwu->rmi4_data->i2c_client = client;
  1909. fwu->fn_ptr->read = synaptics_rmi4_i2c_read;
  1910. fwu->fn_ptr->write = synaptics_rmi4_i2c_write;
  1911. fwu->fn_ptr->enable = synaptics_rmi4_irq_enable;
  1912. fwu->rmi4_data->reset_device = synaptics_rmi4_reset_device;
  1913. retval = synaptics_rmi4_query_device(fwu->rmi4_data);
  1914. if (retval < 0)
  1915. goto exit_free_mem;
  1916. mutex_init(&(fwu->rmi4_data->rmi4_io_ctrl_mutex));
  1917. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  1918. PDT_PROPS, pdt_props.data, sizeof(pdt_props.data));
  1919. if (retval < 0) {
  1920. TPD_DMESG("%s: Failed to read PDT properties, assuming 0x00\n", __func__);
  1921. } else if (pdt_props.has_bsr) {
  1922. TPD_DMESG("%s: Reflash for LTS not currently supported\n", __func__);
  1923. goto exit_free_mem;
  1924. }
  1925. retval = fwu_scan_pdt();
  1926. if (retval < 0)
  1927. goto exit_free_mem;
  1928. /* fwu->productinfo1 = rmi4_data->rmi4_mod_info.product_info[0];
  1929. fwu->productinfo2 = rmi4_data->rmi4_mod_info.product_info[1];
  1930. memcpy(fwu->product_id, rmi4_data->rmi4_mod_info.product_id_string,
  1931. SYNAPTICS_RMI4_PRODUCT_ID_SIZE);
  1932. fwu->product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE] = 0;
  1933. dev_dbg(&rmi4_data->i2c_client->dev,
  1934. "%s: F01 product info: 0x%04x 0x%04x\n",
  1935. __func__, fwu->productinfo1, fwu->productinfo2);
  1936. dev_dbg(&rmi4_data->i2c_client->dev,
  1937. "%s: F01 product ID: %s\n",
  1938. __func__, fwu->product_id);
  1939. */
  1940. retval = fwu_read_f34_queries();
  1941. if (retval < 0)
  1942. goto exit_free_mem;
  1943. TPD_DMESG
  1944. ("query_base_addr=0x%x, data_base_addr=0x%x, addr_f34_flash_control=0x%x, bootloader_id=%s\n",
  1945. fwu->f34_fd.query_base_addr, fwu->f34_fd.data_base_addr, fwu->addr_f34_flash_control,
  1946. fwu->bootloader_id);
  1947. fwu->initialized = true;
  1948. /* fwu->ext_data_source = synaImage; */
  1949. /* fwu->config_area = UI_CONFIG_AREA; */
  1950. properties_kobj_fwupdate = kobject_create_and_add("fwupdate", properties_kobj_synap);
  1951. if (!properties_kobj_fwupdate) {
  1952. dev_err(&client->dev, "%s: Failed to create sysfs directory\n", __func__);
  1953. goto err_sysfs_dir;
  1954. }
  1955. retval = sysfs_create_bin_file(properties_kobj_fwupdate, &dev_attr_data);
  1956. if (retval < 0) {
  1957. dev_err(&client->dev, "%s: Failed to create sysfs bin file\n", __func__);
  1958. goto exit_free_mem;
  1959. }
  1960. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
  1961. /* retval = sysfs_create_file(&tpd->dev->dev.kobj, &attrs[attr_count].attr); */
  1962. retval = sysfs_create_file(properties_kobj_fwupdate, &attrs[attr_count].attr);
  1963. if (retval < 0) {
  1964. dev_err(&client->dev, "%s: Failed to create sysfs attributes\n", __func__);
  1965. retval = -ENODEV;
  1966. goto exit_remove_attrs;
  1967. }
  1968. }
  1969. /*
  1970. attr_kobj = kobject_create_and_add("syna_reflash", NULL);
  1971. retval = sysfs_create_group(attr_kobj,&syna_attr_group);
  1972. if(!attr_kobj|| retval){
  1973. printk("failed to create board_properties\n");
  1974. goto err_sysfs;
  1975. */
  1976. /* fwu_start_reflash(); */
  1977. return 0;
  1978. exit_remove_attrs:
  1979. for (attr_count--; attr_count >= 0; attr_count--)
  1980. sysfs_remove_file(properties_kobj_fwupdate, &attrs[attr_count].attr);
  1981. sysfs_remove_bin_file(properties_kobj_fwupdate, &dev_attr_data);
  1982. err_sysfs_dir:
  1983. exit_free_mem:
  1984. kfree(fwu->fn_ptr);
  1985. exit_free_rmi4:
  1986. kfree(fwu->rmi4_data);
  1987. exit_free_fwu:
  1988. kfree(fwu);
  1989. exit:
  1990. return 0;
  1991. }
  1992. static void synaptics_rmi4_fwu_remove(struct i2c_client *client)
  1993. {
  1994. unsigned char attr_count;
  1995. sysfs_remove_bin_file(&fwu->rmi4_data->input_dev->dev.kobj, &dev_attr_data);
  1996. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++)
  1997. sysfs_remove_file(&fwu->rmi4_data->input_dev->dev.kobj, &attrs[attr_count].attr);
  1998. kfree(fwu->fn_ptr);
  1999. kfree(fwu);
  2000. complete(&remove_complete);
  2001. }
  2002. static int __init rmi4_fw_update_module_init(void)
  2003. {
  2004. synaptics_rmi4_new_function(RMI_FW_UPDATER, true,
  2005. synaptics_rmi4_fwu_init,
  2006. synaptics_rmi4_fwu_remove, synaptics_rmi4_fwu_attn);
  2007. return 0;
  2008. }
  2009. static void __exit rmi4_fw_update_module_exit(void)
  2010. {
  2011. init_completion(&remove_complete);
  2012. synaptics_rmi4_new_function(RMI_FW_UPDATER, false,
  2013. synaptics_rmi4_fwu_init,
  2014. synaptics_rmi4_fwu_remove, synaptics_rmi4_fwu_attn);
  2015. wait_for_completion(&remove_complete);
  2016. }
  2017. module_init(rmi4_fw_update_module_init);
  2018. module_exit(rmi4_fw_update_module_exit);
  2019. MODULE_AUTHOR("Synaptics, Inc.");
  2020. MODULE_DESCRIPTION("RMI4 FW Update Module");
  2021. MODULE_LICENSE("GPL");
  2022. MODULE_VERSION(SYNAPTICS_RMI4_DRIVER_VERSION);