Kconfig 9.0 KB

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  1. # IOMMU_API always gets selected by whoever wants it.
  2. config IOMMU_API
  3. bool
  4. menuconfig IOMMU_SUPPORT
  5. bool "IOMMU Hardware Support"
  6. default y
  7. ---help---
  8. Say Y here if you want to compile device drivers for IO Memory
  9. Management Units into the kernel. These devices usually allow to
  10. remap DMA requests and/or remap interrupts from other devices on the
  11. system.
  12. if IOMMU_SUPPORT
  13. config OF_IOMMU
  14. def_bool y
  15. depends on OF
  16. config FSL_PAMU
  17. bool "Freescale IOMMU support"
  18. depends on PPC_E500MC
  19. select IOMMU_API
  20. select GENERIC_ALLOCATOR
  21. help
  22. Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
  23. PAMU can authorize memory access, remap the memory address, and remap I/O
  24. transaction types.
  25. # MSM IOMMU support
  26. config MSM_IOMMU
  27. bool "MSM IOMMU Support"
  28. depends on ARCH_MSM8X60 || ARCH_MSM8960
  29. select IOMMU_API
  30. help
  31. Support for the IOMMUs found on certain Qualcomm SOCs.
  32. These IOMMUs allow virtualization of the address space used by most
  33. cores within the multimedia subsystem.
  34. If unsure, say N here.
  35. config IOMMU_PGTABLES_L2
  36. def_bool y
  37. depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
  38. # AMD IOMMU support
  39. config AMD_IOMMU
  40. bool "AMD IOMMU support"
  41. select SWIOTLB
  42. select PCI_MSI
  43. select PCI_ATS
  44. select PCI_PRI
  45. select PCI_PASID
  46. select IOMMU_API
  47. depends on X86_64 && PCI && ACPI
  48. ---help---
  49. With this option you can enable support for AMD IOMMU hardware in
  50. your system. An IOMMU is a hardware component which provides
  51. remapping of DMA memory accesses from devices. With an AMD IOMMU you
  52. can isolate the DMA memory of different devices and protect the
  53. system from misbehaving device drivers or hardware.
  54. You can find out if your system has an AMD IOMMU if you look into
  55. your BIOS for an option to enable it or if you have an IVRS ACPI
  56. table.
  57. config AMD_IOMMU_STATS
  58. bool "Export AMD IOMMU statistics to debugfs"
  59. depends on AMD_IOMMU
  60. select DEBUG_FS
  61. ---help---
  62. This option enables code in the AMD IOMMU driver to collect various
  63. statistics about whats happening in the driver and exports that
  64. information to userspace via debugfs.
  65. If unsure, say N.
  66. config AMD_IOMMU_V2
  67. tristate "AMD IOMMU Version 2 driver"
  68. depends on AMD_IOMMU
  69. select MMU_NOTIFIER
  70. ---help---
  71. This option enables support for the AMD IOMMUv2 features of the IOMMU
  72. hardware. Select this option if you want to use devices that support
  73. the PCI PRI and PASID interface.
  74. # Intel IOMMU support
  75. config DMAR_TABLE
  76. bool
  77. config MTK_IOMMU
  78. def_bool n
  79. prompt "support for MTK IOMMU using DMA Remapping Devices"
  80. select IOMMU_API
  81. select ARM_DMA_USE_IOMMU
  82. select MTK_SMI
  83. help
  84. MTK iommu driver, support iommu masters access virtual memory address
  85. which will be translated by iommu HW.
  86. config INTEL_IOMMU
  87. bool "Support for Intel IOMMU using DMA Remapping Devices"
  88. depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
  89. select IOMMU_API
  90. select DMAR_TABLE
  91. help
  92. DMA remapping (DMAR) devices support enables independent address
  93. translations for Direct Memory Access (DMA) from devices.
  94. These DMA remapping devices are reported via ACPI tables
  95. and include PCI device scope covered by these DMA
  96. remapping devices.
  97. config INTEL_IOMMU_DEFAULT_ON
  98. def_bool y
  99. prompt "Enable Intel DMA Remapping Devices by default"
  100. depends on INTEL_IOMMU
  101. help
  102. Selecting this option will enable a DMAR device at boot time if
  103. one is found. If this option is not selected, DMAR support can
  104. be enabled by passing intel_iommu=on to the kernel.
  105. config INTEL_IOMMU_BROKEN_GFX_WA
  106. bool "Workaround broken graphics drivers (going away soon)"
  107. depends on INTEL_IOMMU && BROKEN && X86
  108. ---help---
  109. Current Graphics drivers tend to use physical address
  110. for DMA and avoid using DMA APIs. Setting this config
  111. option permits the IOMMU driver to set a unity map for
  112. all the OS-visible memory. Hence the driver can continue
  113. to use physical addresses for DMA, at least until this
  114. option is removed in the 2.6.32 kernel.
  115. config INTEL_IOMMU_FLOPPY_WA
  116. def_bool y
  117. depends on INTEL_IOMMU && X86
  118. ---help---
  119. Floppy disk drivers are known to bypass DMA API calls
  120. thereby failing to work when IOMMU is enabled. This
  121. workaround will setup a 1:1 mapping for the first
  122. 16MiB to make floppy (an ISA device) work.
  123. config IRQ_REMAP
  124. bool "Support for Interrupt Remapping"
  125. depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
  126. select DMAR_TABLE
  127. ---help---
  128. Supports Interrupt remapping for IO-APIC and MSI devices.
  129. To use x2apic mode in the CPU's which support x2APIC enhancements or
  130. to support platforms with CPU's having > 8 bit APIC ID, say Y.
  131. # OMAP IOMMU support
  132. config OMAP_IOMMU
  133. bool "OMAP IOMMU Support"
  134. depends on ARCH_OMAP2PLUS
  135. select IOMMU_API
  136. config OMAP_IOMMU_DEBUG
  137. tristate "Export OMAP IOMMU internals in DebugFS"
  138. depends on OMAP_IOMMU && DEBUG_FS
  139. help
  140. Select this to see extensive information about
  141. the internal state of OMAP IOMMU in debugfs.
  142. Say N unless you know you need this.
  143. config TEGRA_IOMMU_GART
  144. bool "Tegra GART IOMMU Support"
  145. depends on ARCH_TEGRA_2x_SOC
  146. select IOMMU_API
  147. help
  148. Enables support for remapping discontiguous physical memory
  149. shared with the operating system into contiguous I/O virtual
  150. space through the GART (Graphics Address Relocation Table)
  151. hardware included on Tegra SoCs.
  152. config TEGRA_IOMMU_SMMU
  153. bool "Tegra SMMU IOMMU Support"
  154. depends on ARCH_TEGRA && TEGRA_AHB
  155. select IOMMU_API
  156. help
  157. Enables support for remapping discontiguous physical memory
  158. shared with the operating system into contiguous I/O virtual
  159. space through the SMMU (System Memory Management Unit)
  160. hardware included on Tegra SoCs.
  161. config EXYNOS_IOMMU
  162. bool "Exynos IOMMU Support"
  163. depends on ARCH_EXYNOS
  164. select IOMMU_API
  165. select ARM_DMA_USE_IOMMU
  166. help
  167. Support for the IOMMU (System MMU) of Samsung Exynos application
  168. processor family. This enables H/W multimedia accelerators to see
  169. non-linear physical memory chunks as linear memory in their
  170. address space.
  171. If unsure, say N here.
  172. config EXYNOS_IOMMU_DEBUG
  173. bool "Debugging log for Exynos IOMMU"
  174. depends on EXYNOS_IOMMU
  175. help
  176. Select this to see the detailed log message that shows what
  177. happens in the IOMMU driver.
  178. Say N unless you need kernel log message for IOMMU debugging.
  179. config SHMOBILE_IPMMU
  180. bool
  181. config SHMOBILE_IPMMU_TLB
  182. bool
  183. config SHMOBILE_IOMMU
  184. bool "IOMMU for Renesas IPMMU/IPMMUI"
  185. default n
  186. depends on ARM
  187. depends on ARCH_SHMOBILE || COMPILE_TEST
  188. select IOMMU_API
  189. select ARM_DMA_USE_IOMMU
  190. select SHMOBILE_IPMMU
  191. select SHMOBILE_IPMMU_TLB
  192. help
  193. Support for Renesas IPMMU/IPMMUI. This option enables
  194. remapping of DMA memory accesses from all of the IP blocks
  195. on the ICB.
  196. Warning: Drivers (including userspace drivers of UIO
  197. devices) of the IP blocks on the ICB *must* use addresses
  198. allocated from the IPMMU (iova) for DMA with this option
  199. enabled.
  200. If unsure, say N.
  201. choice
  202. prompt "IPMMU/IPMMUI address space size"
  203. default SHMOBILE_IOMMU_ADDRSIZE_2048MB
  204. depends on SHMOBILE_IOMMU
  205. help
  206. This option sets IPMMU/IPMMUI address space size by
  207. adjusting the 1st level page table size. The page table size
  208. is calculated as follows:
  209. page table size = number of page table entries * 4 bytes
  210. number of page table entries = address space size / 1 MiB
  211. For example, when the address space size is 2048 MiB, the
  212. 1st level page table size is 8192 bytes.
  213. config SHMOBILE_IOMMU_ADDRSIZE_2048MB
  214. bool "2 GiB"
  215. config SHMOBILE_IOMMU_ADDRSIZE_1024MB
  216. bool "1 GiB"
  217. config SHMOBILE_IOMMU_ADDRSIZE_512MB
  218. bool "512 MiB"
  219. config SHMOBILE_IOMMU_ADDRSIZE_256MB
  220. bool "256 MiB"
  221. config SHMOBILE_IOMMU_ADDRSIZE_128MB
  222. bool "128 MiB"
  223. config SHMOBILE_IOMMU_ADDRSIZE_64MB
  224. bool "64 MiB"
  225. config SHMOBILE_IOMMU_ADDRSIZE_32MB
  226. bool "32 MiB"
  227. endchoice
  228. config SHMOBILE_IOMMU_L1SIZE
  229. int
  230. default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
  231. default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
  232. default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
  233. default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
  234. default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
  235. default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
  236. default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
  237. config IPMMU_VMSA
  238. bool "Renesas VMSA-compatible IPMMU"
  239. depends on ARM_LPAE
  240. depends on ARCH_SHMOBILE || COMPILE_TEST
  241. select IOMMU_API
  242. select ARM_DMA_USE_IOMMU
  243. help
  244. Support for the Renesas VMSA-compatible IPMMU Renesas found in the
  245. R-Mobile APE6 and R-Car H2/M2 SoCs.
  246. If unsure, say N.
  247. config SPAPR_TCE_IOMMU
  248. bool "sPAPR TCE IOMMU Support"
  249. depends on PPC_POWERNV || PPC_PSERIES
  250. select IOMMU_API
  251. help
  252. Enables bits of IOMMU API required by VFIO. The iommu_ops
  253. is not implemented as it is not necessary for VFIO.
  254. config ARM_SMMU
  255. bool "ARM Ltd. System MMU (SMMU) Support"
  256. depends on ARM64 || (ARM_LPAE && OF)
  257. select IOMMU_API
  258. select ARM_DMA_USE_IOMMU if ARM
  259. help
  260. Support for implementations of the ARM System MMU architecture
  261. versions 1 and 2. The driver supports both v7l and v8l table
  262. formats with 4k and 64k page sizes.
  263. Say Y here if your SoC includes an IOMMU device implementing
  264. the ARM SMMU architecture.
  265. endif # IOMMU_SUPPORT