cx88-video.c 54 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * video4linux video interface
  5. *
  6. * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
  9. * - Multituner support
  10. * - video_ioctl2 conversion
  11. * - PAL/M fixes
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/init.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/kmod.h>
  31. #include <linux/kernel.h>
  32. #include <linux/slab.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/kthread.h>
  37. #include <asm/div64.h>
  38. #include "cx88.h"
  39. #include <media/v4l2-common.h>
  40. #include <media/v4l2-ioctl.h>
  41. #include <media/v4l2-event.h>
  42. #include <media/wm8775.h>
  43. MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  44. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  45. MODULE_LICENSE("GPL");
  46. MODULE_VERSION(CX88_VERSION);
  47. /* ------------------------------------------------------------------ */
  48. static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  49. static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  50. static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  51. module_param_array(video_nr, int, NULL, 0444);
  52. module_param_array(vbi_nr, int, NULL, 0444);
  53. module_param_array(radio_nr, int, NULL, 0444);
  54. MODULE_PARM_DESC(video_nr,"video device numbers");
  55. MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  56. MODULE_PARM_DESC(radio_nr,"radio device numbers");
  57. static unsigned int video_debug;
  58. module_param(video_debug,int,0644);
  59. MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  60. static unsigned int irq_debug;
  61. module_param(irq_debug,int,0644);
  62. MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  63. static unsigned int vid_limit = 16;
  64. module_param(vid_limit,int,0644);
  65. MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
  66. #define dprintk(level,fmt, arg...) if (video_debug >= level) \
  67. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  68. /* ------------------------------------------------------------------- */
  69. /* static data */
  70. static const struct cx8800_fmt formats[] = {
  71. {
  72. .name = "8 bpp, gray",
  73. .fourcc = V4L2_PIX_FMT_GREY,
  74. .cxformat = ColorFormatY8,
  75. .depth = 8,
  76. .flags = FORMAT_FLAGS_PACKED,
  77. },{
  78. .name = "15 bpp RGB, le",
  79. .fourcc = V4L2_PIX_FMT_RGB555,
  80. .cxformat = ColorFormatRGB15,
  81. .depth = 16,
  82. .flags = FORMAT_FLAGS_PACKED,
  83. },{
  84. .name = "15 bpp RGB, be",
  85. .fourcc = V4L2_PIX_FMT_RGB555X,
  86. .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  87. .depth = 16,
  88. .flags = FORMAT_FLAGS_PACKED,
  89. },{
  90. .name = "16 bpp RGB, le",
  91. .fourcc = V4L2_PIX_FMT_RGB565,
  92. .cxformat = ColorFormatRGB16,
  93. .depth = 16,
  94. .flags = FORMAT_FLAGS_PACKED,
  95. },{
  96. .name = "16 bpp RGB, be",
  97. .fourcc = V4L2_PIX_FMT_RGB565X,
  98. .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  99. .depth = 16,
  100. .flags = FORMAT_FLAGS_PACKED,
  101. },{
  102. .name = "24 bpp RGB, le",
  103. .fourcc = V4L2_PIX_FMT_BGR24,
  104. .cxformat = ColorFormatRGB24,
  105. .depth = 24,
  106. .flags = FORMAT_FLAGS_PACKED,
  107. },{
  108. .name = "32 bpp RGB, le",
  109. .fourcc = V4L2_PIX_FMT_BGR32,
  110. .cxformat = ColorFormatRGB32,
  111. .depth = 32,
  112. .flags = FORMAT_FLAGS_PACKED,
  113. },{
  114. .name = "32 bpp RGB, be",
  115. .fourcc = V4L2_PIX_FMT_RGB32,
  116. .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
  117. .depth = 32,
  118. .flags = FORMAT_FLAGS_PACKED,
  119. },{
  120. .name = "4:2:2, packed, YUYV",
  121. .fourcc = V4L2_PIX_FMT_YUYV,
  122. .cxformat = ColorFormatYUY2,
  123. .depth = 16,
  124. .flags = FORMAT_FLAGS_PACKED,
  125. },{
  126. .name = "4:2:2, packed, UYVY",
  127. .fourcc = V4L2_PIX_FMT_UYVY,
  128. .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
  129. .depth = 16,
  130. .flags = FORMAT_FLAGS_PACKED,
  131. },
  132. };
  133. static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
  134. {
  135. unsigned int i;
  136. for (i = 0; i < ARRAY_SIZE(formats); i++)
  137. if (formats[i].fourcc == fourcc)
  138. return formats+i;
  139. return NULL;
  140. }
  141. /* ------------------------------------------------------------------- */
  142. struct cx88_ctrl {
  143. /* control information */
  144. u32 id;
  145. s32 minimum;
  146. s32 maximum;
  147. u32 step;
  148. s32 default_value;
  149. /* control register information */
  150. u32 off;
  151. u32 reg;
  152. u32 sreg;
  153. u32 mask;
  154. u32 shift;
  155. };
  156. static const struct cx88_ctrl cx8800_vid_ctls[] = {
  157. /* --- video --- */
  158. {
  159. .id = V4L2_CID_BRIGHTNESS,
  160. .minimum = 0x00,
  161. .maximum = 0xff,
  162. .step = 1,
  163. .default_value = 0x7f,
  164. .off = 128,
  165. .reg = MO_CONTR_BRIGHT,
  166. .mask = 0x00ff,
  167. .shift = 0,
  168. },{
  169. .id = V4L2_CID_CONTRAST,
  170. .minimum = 0,
  171. .maximum = 0xff,
  172. .step = 1,
  173. .default_value = 0x3f,
  174. .off = 0,
  175. .reg = MO_CONTR_BRIGHT,
  176. .mask = 0xff00,
  177. .shift = 8,
  178. },{
  179. .id = V4L2_CID_HUE,
  180. .minimum = 0,
  181. .maximum = 0xff,
  182. .step = 1,
  183. .default_value = 0x7f,
  184. .off = 128,
  185. .reg = MO_HUE,
  186. .mask = 0x00ff,
  187. .shift = 0,
  188. },{
  189. /* strictly, this only describes only U saturation.
  190. * V saturation is handled specially through code.
  191. */
  192. .id = V4L2_CID_SATURATION,
  193. .minimum = 0,
  194. .maximum = 0xff,
  195. .step = 1,
  196. .default_value = 0x7f,
  197. .off = 0,
  198. .reg = MO_UV_SATURATION,
  199. .mask = 0x00ff,
  200. .shift = 0,
  201. }, {
  202. .id = V4L2_CID_SHARPNESS,
  203. .minimum = 0,
  204. .maximum = 4,
  205. .step = 1,
  206. .default_value = 0x0,
  207. .off = 0,
  208. /* NOTE: the value is converted and written to both even
  209. and odd registers in the code */
  210. .reg = MO_FILTER_ODD,
  211. .mask = 7 << 7,
  212. .shift = 7,
  213. }, {
  214. .id = V4L2_CID_CHROMA_AGC,
  215. .minimum = 0,
  216. .maximum = 1,
  217. .default_value = 0x1,
  218. .reg = MO_INPUT_FORMAT,
  219. .mask = 1 << 10,
  220. .shift = 10,
  221. }, {
  222. .id = V4L2_CID_COLOR_KILLER,
  223. .minimum = 0,
  224. .maximum = 1,
  225. .default_value = 0x1,
  226. .reg = MO_INPUT_FORMAT,
  227. .mask = 1 << 9,
  228. .shift = 9,
  229. }, {
  230. .id = V4L2_CID_BAND_STOP_FILTER,
  231. .minimum = 0,
  232. .maximum = 1,
  233. .step = 1,
  234. .default_value = 0x0,
  235. .off = 0,
  236. .reg = MO_HTOTAL,
  237. .mask = 3 << 11,
  238. .shift = 11,
  239. }
  240. };
  241. static const struct cx88_ctrl cx8800_aud_ctls[] = {
  242. {
  243. /* --- audio --- */
  244. .id = V4L2_CID_AUDIO_MUTE,
  245. .minimum = 0,
  246. .maximum = 1,
  247. .default_value = 1,
  248. .reg = AUD_VOL_CTL,
  249. .sreg = SHADOW_AUD_VOL_CTL,
  250. .mask = (1 << 6),
  251. .shift = 6,
  252. },{
  253. .id = V4L2_CID_AUDIO_VOLUME,
  254. .minimum = 0,
  255. .maximum = 0x3f,
  256. .step = 1,
  257. .default_value = 0x3f,
  258. .reg = AUD_VOL_CTL,
  259. .sreg = SHADOW_AUD_VOL_CTL,
  260. .mask = 0x3f,
  261. .shift = 0,
  262. },{
  263. .id = V4L2_CID_AUDIO_BALANCE,
  264. .minimum = 0,
  265. .maximum = 0x7f,
  266. .step = 1,
  267. .default_value = 0x40,
  268. .reg = AUD_BAL_CTL,
  269. .sreg = SHADOW_AUD_BAL_CTL,
  270. .mask = 0x7f,
  271. .shift = 0,
  272. }
  273. };
  274. enum {
  275. CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
  276. CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
  277. };
  278. /* ------------------------------------------------------------------- */
  279. /* resource management */
  280. static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
  281. {
  282. struct cx88_core *core = dev->core;
  283. if (fh->resources & bit)
  284. /* have it already allocated */
  285. return 1;
  286. /* is it free? */
  287. mutex_lock(&core->lock);
  288. if (dev->resources & bit) {
  289. /* no, someone else uses it */
  290. mutex_unlock(&core->lock);
  291. return 0;
  292. }
  293. /* it's free, grab it */
  294. fh->resources |= bit;
  295. dev->resources |= bit;
  296. dprintk(1,"res: get %d\n",bit);
  297. mutex_unlock(&core->lock);
  298. return 1;
  299. }
  300. static
  301. int res_check(struct cx8800_fh *fh, unsigned int bit)
  302. {
  303. return (fh->resources & bit);
  304. }
  305. static
  306. int res_locked(struct cx8800_dev *dev, unsigned int bit)
  307. {
  308. return (dev->resources & bit);
  309. }
  310. static
  311. void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
  312. {
  313. struct cx88_core *core = dev->core;
  314. BUG_ON((fh->resources & bits) != bits);
  315. mutex_lock(&core->lock);
  316. fh->resources &= ~bits;
  317. dev->resources &= ~bits;
  318. dprintk(1,"res: put %d\n",bits);
  319. mutex_unlock(&core->lock);
  320. }
  321. /* ------------------------------------------------------------------ */
  322. int cx88_video_mux(struct cx88_core *core, unsigned int input)
  323. {
  324. /* struct cx88_core *core = dev->core; */
  325. dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
  326. input, INPUT(input).vmux,
  327. INPUT(input).gpio0,INPUT(input).gpio1,
  328. INPUT(input).gpio2,INPUT(input).gpio3);
  329. core->input = input;
  330. cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
  331. cx_write(MO_GP3_IO, INPUT(input).gpio3);
  332. cx_write(MO_GP0_IO, INPUT(input).gpio0);
  333. cx_write(MO_GP1_IO, INPUT(input).gpio1);
  334. cx_write(MO_GP2_IO, INPUT(input).gpio2);
  335. switch (INPUT(input).type) {
  336. case CX88_VMUX_SVIDEO:
  337. cx_set(MO_AFECFG_IO, 0x00000001);
  338. cx_set(MO_INPUT_FORMAT, 0x00010010);
  339. cx_set(MO_FILTER_EVEN, 0x00002020);
  340. cx_set(MO_FILTER_ODD, 0x00002020);
  341. break;
  342. default:
  343. cx_clear(MO_AFECFG_IO, 0x00000001);
  344. cx_clear(MO_INPUT_FORMAT, 0x00010010);
  345. cx_clear(MO_FILTER_EVEN, 0x00002020);
  346. cx_clear(MO_FILTER_ODD, 0x00002020);
  347. break;
  348. }
  349. /* if there are audioroutes defined, we have an external
  350. ADC to deal with audio */
  351. if (INPUT(input).audioroute) {
  352. /* The wm8775 module has the "2" route hardwired into
  353. the initialization. Some boards may use different
  354. routes for different inputs. HVR-1300 surely does */
  355. if (core->sd_wm8775) {
  356. call_all(core, audio, s_routing,
  357. INPUT(input).audioroute, 0, 0);
  358. }
  359. /* cx2388's C-ADC is connected to the tuner only.
  360. When used with S-Video, that ADC is busy dealing with
  361. chroma, so an external must be used for baseband audio */
  362. if (INPUT(input).type != CX88_VMUX_TELEVISION &&
  363. INPUT(input).type != CX88_VMUX_CABLE) {
  364. /* "I2S ADC mode" */
  365. core->tvaudio = WW_I2SADC;
  366. cx88_set_tvaudio(core);
  367. } else {
  368. /* Normal mode */
  369. cx_write(AUD_I2SCNTL, 0x0);
  370. cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
  371. }
  372. }
  373. return 0;
  374. }
  375. EXPORT_SYMBOL(cx88_video_mux);
  376. /* ------------------------------------------------------------------ */
  377. static int start_video_dma(struct cx8800_dev *dev,
  378. struct cx88_dmaqueue *q,
  379. struct cx88_buffer *buf)
  380. {
  381. struct cx88_core *core = dev->core;
  382. /* setup fifo + format */
  383. cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
  384. buf->bpl, buf->risc.dma);
  385. cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
  386. cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
  387. /* reset counter */
  388. cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
  389. q->count = 1;
  390. /* enable irqs */
  391. cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
  392. /* Enables corresponding bits at PCI_INT_STAT:
  393. bits 0 to 4: video, audio, transport stream, VIP, Host
  394. bit 7: timer
  395. bits 8 and 9: DMA complete for: SRC, DST
  396. bits 10 and 11: BERR signal asserted for RISC: RD, WR
  397. bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
  398. */
  399. cx_set(MO_VID_INTMSK, 0x0f0011);
  400. /* enable capture */
  401. cx_set(VID_CAPTURE_CONTROL,0x06);
  402. /* start dma */
  403. cx_set(MO_DEV_CNTRL2, (1<<5));
  404. cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
  405. return 0;
  406. }
  407. #ifdef CONFIG_PM
  408. static int stop_video_dma(struct cx8800_dev *dev)
  409. {
  410. struct cx88_core *core = dev->core;
  411. /* stop dma */
  412. cx_clear(MO_VID_DMACNTRL, 0x11);
  413. /* disable capture */
  414. cx_clear(VID_CAPTURE_CONTROL,0x06);
  415. /* disable irqs */
  416. cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
  417. cx_clear(MO_VID_INTMSK, 0x0f0011);
  418. return 0;
  419. }
  420. #endif
  421. static int restart_video_queue(struct cx8800_dev *dev,
  422. struct cx88_dmaqueue *q)
  423. {
  424. struct cx88_core *core = dev->core;
  425. struct cx88_buffer *buf, *prev;
  426. if (!list_empty(&q->active)) {
  427. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  428. dprintk(2,"restart_queue [%p/%d]: restart dma\n",
  429. buf, buf->vb.i);
  430. start_video_dma(dev, q, buf);
  431. list_for_each_entry(buf, &q->active, vb.queue)
  432. buf->count = q->count++;
  433. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  434. return 0;
  435. }
  436. prev = NULL;
  437. for (;;) {
  438. if (list_empty(&q->queued))
  439. return 0;
  440. buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
  441. if (NULL == prev) {
  442. list_move_tail(&buf->vb.queue, &q->active);
  443. start_video_dma(dev, q, buf);
  444. buf->vb.state = VIDEOBUF_ACTIVE;
  445. buf->count = q->count++;
  446. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  447. dprintk(2,"[%p/%d] restart_queue - first active\n",
  448. buf,buf->vb.i);
  449. } else if (prev->vb.width == buf->vb.width &&
  450. prev->vb.height == buf->vb.height &&
  451. prev->fmt == buf->fmt) {
  452. list_move_tail(&buf->vb.queue, &q->active);
  453. buf->vb.state = VIDEOBUF_ACTIVE;
  454. buf->count = q->count++;
  455. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  456. dprintk(2,"[%p/%d] restart_queue - move to active\n",
  457. buf,buf->vb.i);
  458. } else {
  459. return 0;
  460. }
  461. prev = buf;
  462. }
  463. }
  464. /* ------------------------------------------------------------------ */
  465. static int
  466. buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
  467. {
  468. struct cx8800_fh *fh = q->priv_data;
  469. struct cx8800_dev *dev = fh->dev;
  470. *size = dev->fmt->depth * dev->width * dev->height >> 3;
  471. if (0 == *count)
  472. *count = 32;
  473. if (*size * *count > vid_limit * 1024 * 1024)
  474. *count = (vid_limit * 1024 * 1024) / *size;
  475. return 0;
  476. }
  477. static int
  478. buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  479. enum v4l2_field field)
  480. {
  481. struct cx8800_fh *fh = q->priv_data;
  482. struct cx8800_dev *dev = fh->dev;
  483. struct cx88_core *core = dev->core;
  484. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  485. struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
  486. int rc, init_buffer = 0;
  487. BUG_ON(NULL == dev->fmt);
  488. if (dev->width < 48 || dev->width > norm_maxw(core->tvnorm) ||
  489. dev->height < 32 || dev->height > norm_maxh(core->tvnorm))
  490. return -EINVAL;
  491. buf->vb.size = (dev->width * dev->height * dev->fmt->depth) >> 3;
  492. if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
  493. return -EINVAL;
  494. if (buf->fmt != dev->fmt ||
  495. buf->vb.width != dev->width ||
  496. buf->vb.height != dev->height ||
  497. buf->vb.field != field) {
  498. buf->fmt = dev->fmt;
  499. buf->vb.width = dev->width;
  500. buf->vb.height = dev->height;
  501. buf->vb.field = field;
  502. init_buffer = 1;
  503. }
  504. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  505. init_buffer = 1;
  506. if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
  507. goto fail;
  508. }
  509. if (init_buffer) {
  510. buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
  511. switch (buf->vb.field) {
  512. case V4L2_FIELD_TOP:
  513. cx88_risc_buffer(dev->pci, &buf->risc,
  514. dma->sglist, 0, UNSET,
  515. buf->bpl, 0, buf->vb.height);
  516. break;
  517. case V4L2_FIELD_BOTTOM:
  518. cx88_risc_buffer(dev->pci, &buf->risc,
  519. dma->sglist, UNSET, 0,
  520. buf->bpl, 0, buf->vb.height);
  521. break;
  522. case V4L2_FIELD_INTERLACED:
  523. cx88_risc_buffer(dev->pci, &buf->risc,
  524. dma->sglist, 0, buf->bpl,
  525. buf->bpl, buf->bpl,
  526. buf->vb.height >> 1);
  527. break;
  528. case V4L2_FIELD_SEQ_TB:
  529. cx88_risc_buffer(dev->pci, &buf->risc,
  530. dma->sglist,
  531. 0, buf->bpl * (buf->vb.height >> 1),
  532. buf->bpl, 0,
  533. buf->vb.height >> 1);
  534. break;
  535. case V4L2_FIELD_SEQ_BT:
  536. cx88_risc_buffer(dev->pci, &buf->risc,
  537. dma->sglist,
  538. buf->bpl * (buf->vb.height >> 1), 0,
  539. buf->bpl, 0,
  540. buf->vb.height >> 1);
  541. break;
  542. default:
  543. BUG();
  544. }
  545. }
  546. dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
  547. buf, buf->vb.i,
  548. dev->width, dev->height, dev->fmt->depth, dev->fmt->name,
  549. (unsigned long)buf->risc.dma);
  550. buf->vb.state = VIDEOBUF_PREPARED;
  551. return 0;
  552. fail:
  553. cx88_free_buffer(q,buf);
  554. return rc;
  555. }
  556. static void
  557. buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
  558. {
  559. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  560. struct cx88_buffer *prev;
  561. struct cx8800_fh *fh = vq->priv_data;
  562. struct cx8800_dev *dev = fh->dev;
  563. struct cx88_core *core = dev->core;
  564. struct cx88_dmaqueue *q = &dev->vidq;
  565. /* add jump to stopper */
  566. buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
  567. buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
  568. if (!list_empty(&q->queued)) {
  569. list_add_tail(&buf->vb.queue,&q->queued);
  570. buf->vb.state = VIDEOBUF_QUEUED;
  571. dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
  572. buf, buf->vb.i);
  573. } else if (list_empty(&q->active)) {
  574. list_add_tail(&buf->vb.queue,&q->active);
  575. start_video_dma(dev, q, buf);
  576. buf->vb.state = VIDEOBUF_ACTIVE;
  577. buf->count = q->count++;
  578. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  579. dprintk(2,"[%p/%d] buffer_queue - first active\n",
  580. buf, buf->vb.i);
  581. } else {
  582. prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
  583. if (prev->vb.width == buf->vb.width &&
  584. prev->vb.height == buf->vb.height &&
  585. prev->fmt == buf->fmt) {
  586. list_add_tail(&buf->vb.queue,&q->active);
  587. buf->vb.state = VIDEOBUF_ACTIVE;
  588. buf->count = q->count++;
  589. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  590. dprintk(2,"[%p/%d] buffer_queue - append to active\n",
  591. buf, buf->vb.i);
  592. } else {
  593. list_add_tail(&buf->vb.queue,&q->queued);
  594. buf->vb.state = VIDEOBUF_QUEUED;
  595. dprintk(2,"[%p/%d] buffer_queue - first queued\n",
  596. buf, buf->vb.i);
  597. }
  598. }
  599. }
  600. static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  601. {
  602. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  603. cx88_free_buffer(q,buf);
  604. }
  605. static const struct videobuf_queue_ops cx8800_video_qops = {
  606. .buf_setup = buffer_setup,
  607. .buf_prepare = buffer_prepare,
  608. .buf_queue = buffer_queue,
  609. .buf_release = buffer_release,
  610. };
  611. /* ------------------------------------------------------------------ */
  612. /* ------------------------------------------------------------------ */
  613. static struct videobuf_queue *get_queue(struct file *file)
  614. {
  615. struct video_device *vdev = video_devdata(file);
  616. struct cx8800_fh *fh = file->private_data;
  617. switch (vdev->vfl_type) {
  618. case VFL_TYPE_GRABBER:
  619. return &fh->vidq;
  620. case VFL_TYPE_VBI:
  621. return &fh->vbiq;
  622. default:
  623. BUG();
  624. }
  625. }
  626. static int get_resource(struct file *file)
  627. {
  628. struct video_device *vdev = video_devdata(file);
  629. switch (vdev->vfl_type) {
  630. case VFL_TYPE_GRABBER:
  631. return RESOURCE_VIDEO;
  632. case VFL_TYPE_VBI:
  633. return RESOURCE_VBI;
  634. default:
  635. BUG();
  636. }
  637. }
  638. static int video_open(struct file *file)
  639. {
  640. struct video_device *vdev = video_devdata(file);
  641. struct cx8800_dev *dev = video_drvdata(file);
  642. struct cx88_core *core = dev->core;
  643. struct cx8800_fh *fh;
  644. enum v4l2_buf_type type = 0;
  645. int radio = 0;
  646. switch (vdev->vfl_type) {
  647. case VFL_TYPE_GRABBER:
  648. type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  649. break;
  650. case VFL_TYPE_VBI:
  651. type = V4L2_BUF_TYPE_VBI_CAPTURE;
  652. break;
  653. case VFL_TYPE_RADIO:
  654. radio = 1;
  655. break;
  656. }
  657. dprintk(1, "open dev=%s radio=%d type=%s\n",
  658. video_device_node_name(vdev), radio, v4l2_type_names[type]);
  659. /* allocate + initialize per filehandle data */
  660. fh = kzalloc(sizeof(*fh),GFP_KERNEL);
  661. if (unlikely(!fh))
  662. return -ENOMEM;
  663. v4l2_fh_init(&fh->fh, vdev);
  664. file->private_data = fh;
  665. fh->dev = dev;
  666. mutex_lock(&core->lock);
  667. videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
  668. &dev->pci->dev, &dev->slock,
  669. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  670. V4L2_FIELD_INTERLACED,
  671. sizeof(struct cx88_buffer),
  672. fh, NULL);
  673. videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
  674. &dev->pci->dev, &dev->slock,
  675. V4L2_BUF_TYPE_VBI_CAPTURE,
  676. V4L2_FIELD_SEQ_TB,
  677. sizeof(struct cx88_buffer),
  678. fh, NULL);
  679. if (vdev->vfl_type == VFL_TYPE_RADIO) {
  680. dprintk(1,"video_open: setting radio device\n");
  681. cx_write(MO_GP3_IO, core->board.radio.gpio3);
  682. cx_write(MO_GP0_IO, core->board.radio.gpio0);
  683. cx_write(MO_GP1_IO, core->board.radio.gpio1);
  684. cx_write(MO_GP2_IO, core->board.radio.gpio2);
  685. if (core->board.radio.audioroute) {
  686. if (core->sd_wm8775) {
  687. call_all(core, audio, s_routing,
  688. core->board.radio.audioroute, 0, 0);
  689. }
  690. /* "I2S ADC mode" */
  691. core->tvaudio = WW_I2SADC;
  692. cx88_set_tvaudio(core);
  693. } else {
  694. /* FM Mode */
  695. core->tvaudio = WW_FM;
  696. cx88_set_tvaudio(core);
  697. cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
  698. }
  699. call_all(core, tuner, s_radio);
  700. }
  701. core->users++;
  702. mutex_unlock(&core->lock);
  703. v4l2_fh_add(&fh->fh);
  704. return 0;
  705. }
  706. static ssize_t
  707. video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
  708. {
  709. struct video_device *vdev = video_devdata(file);
  710. struct cx8800_fh *fh = file->private_data;
  711. switch (vdev->vfl_type) {
  712. case VFL_TYPE_GRABBER:
  713. if (res_locked(fh->dev,RESOURCE_VIDEO))
  714. return -EBUSY;
  715. return videobuf_read_one(&fh->vidq, data, count, ppos,
  716. file->f_flags & O_NONBLOCK);
  717. case VFL_TYPE_VBI:
  718. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  719. return -EBUSY;
  720. return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
  721. file->f_flags & O_NONBLOCK);
  722. default:
  723. BUG();
  724. }
  725. }
  726. static unsigned int
  727. video_poll(struct file *file, struct poll_table_struct *wait)
  728. {
  729. struct video_device *vdev = video_devdata(file);
  730. struct cx8800_fh *fh = file->private_data;
  731. struct cx88_buffer *buf;
  732. unsigned int rc = v4l2_ctrl_poll(file, wait);
  733. if (vdev->vfl_type == VFL_TYPE_VBI) {
  734. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  735. return rc | POLLERR;
  736. return rc | videobuf_poll_stream(file, &fh->vbiq, wait);
  737. }
  738. mutex_lock(&fh->vidq.vb_lock);
  739. if (res_check(fh,RESOURCE_VIDEO)) {
  740. /* streaming capture */
  741. if (list_empty(&fh->vidq.stream))
  742. goto done;
  743. buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
  744. } else {
  745. /* read() capture */
  746. buf = (struct cx88_buffer*)fh->vidq.read_buf;
  747. if (NULL == buf)
  748. goto done;
  749. }
  750. poll_wait(file, &buf->vb.done, wait);
  751. if (buf->vb.state == VIDEOBUF_DONE ||
  752. buf->vb.state == VIDEOBUF_ERROR)
  753. rc |= POLLIN|POLLRDNORM;
  754. done:
  755. mutex_unlock(&fh->vidq.vb_lock);
  756. return rc;
  757. }
  758. static int video_release(struct file *file)
  759. {
  760. struct cx8800_fh *fh = file->private_data;
  761. struct cx8800_dev *dev = fh->dev;
  762. /* turn off overlay */
  763. if (res_check(fh, RESOURCE_OVERLAY)) {
  764. /* FIXME */
  765. res_free(dev,fh,RESOURCE_OVERLAY);
  766. }
  767. /* stop video capture */
  768. if (res_check(fh, RESOURCE_VIDEO)) {
  769. videobuf_queue_cancel(&fh->vidq);
  770. res_free(dev,fh,RESOURCE_VIDEO);
  771. }
  772. if (fh->vidq.read_buf) {
  773. buffer_release(&fh->vidq,fh->vidq.read_buf);
  774. kfree(fh->vidq.read_buf);
  775. }
  776. /* stop vbi capture */
  777. if (res_check(fh, RESOURCE_VBI)) {
  778. videobuf_stop(&fh->vbiq);
  779. res_free(dev,fh,RESOURCE_VBI);
  780. }
  781. videobuf_mmap_free(&fh->vidq);
  782. videobuf_mmap_free(&fh->vbiq);
  783. mutex_lock(&dev->core->lock);
  784. v4l2_fh_del(&fh->fh);
  785. v4l2_fh_exit(&fh->fh);
  786. file->private_data = NULL;
  787. kfree(fh);
  788. dev->core->users--;
  789. if (!dev->core->users)
  790. call_all(dev->core, core, s_power, 0);
  791. mutex_unlock(&dev->core->lock);
  792. return 0;
  793. }
  794. static int
  795. video_mmap(struct file *file, struct vm_area_struct * vma)
  796. {
  797. return videobuf_mmap_mapper(get_queue(file), vma);
  798. }
  799. /* ------------------------------------------------------------------ */
  800. /* VIDEO CTRL IOCTLS */
  801. static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
  802. {
  803. struct cx88_core *core =
  804. container_of(ctrl->handler, struct cx88_core, video_hdl);
  805. const struct cx88_ctrl *cc = ctrl->priv;
  806. u32 value, mask;
  807. mask = cc->mask;
  808. switch (ctrl->id) {
  809. case V4L2_CID_SATURATION:
  810. /* special v_sat handling */
  811. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  812. if (core->tvnorm & V4L2_STD_SECAM) {
  813. /* For SECAM, both U and V sat should be equal */
  814. value = value << 8 | value;
  815. } else {
  816. /* Keeps U Saturation proportional to V Sat */
  817. value = (value * 0x5a) / 0x7f << 8 | value;
  818. }
  819. mask = 0xffff;
  820. break;
  821. case V4L2_CID_SHARPNESS:
  822. /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
  823. value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
  824. /* needs to be set for both fields */
  825. cx_andor(MO_FILTER_EVEN, mask, value);
  826. break;
  827. case V4L2_CID_CHROMA_AGC:
  828. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  829. break;
  830. default:
  831. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  832. break;
  833. }
  834. dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  835. ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
  836. mask, cc->sreg ? " [shadowed]" : "");
  837. if (cc->sreg)
  838. cx_sandor(cc->sreg, cc->reg, mask, value);
  839. else
  840. cx_andor(cc->reg, mask, value);
  841. return 0;
  842. }
  843. static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
  844. {
  845. struct cx88_core *core =
  846. container_of(ctrl->handler, struct cx88_core, audio_hdl);
  847. const struct cx88_ctrl *cc = ctrl->priv;
  848. u32 value,mask;
  849. /* Pass changes onto any WM8775 */
  850. if (core->sd_wm8775) {
  851. switch (ctrl->id) {
  852. case V4L2_CID_AUDIO_MUTE:
  853. wm8775_s_ctrl(core, ctrl->id, ctrl->val);
  854. break;
  855. case V4L2_CID_AUDIO_VOLUME:
  856. wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
  857. (0x90 + ctrl->val) << 8 : 0);
  858. break;
  859. case V4L2_CID_AUDIO_BALANCE:
  860. wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
  861. break;
  862. default:
  863. break;
  864. }
  865. }
  866. mask = cc->mask;
  867. switch (ctrl->id) {
  868. case V4L2_CID_AUDIO_BALANCE:
  869. value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40);
  870. break;
  871. case V4L2_CID_AUDIO_VOLUME:
  872. value = 0x3f - (ctrl->val & 0x3f);
  873. break;
  874. default:
  875. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  876. break;
  877. }
  878. dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  879. ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
  880. mask, cc->sreg ? " [shadowed]" : "");
  881. if (cc->sreg)
  882. cx_sandor(cc->sreg, cc->reg, mask, value);
  883. else
  884. cx_andor(cc->reg, mask, value);
  885. return 0;
  886. }
  887. /* ------------------------------------------------------------------ */
  888. /* VIDEO IOCTLS */
  889. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  890. struct v4l2_format *f)
  891. {
  892. struct cx8800_fh *fh = priv;
  893. struct cx8800_dev *dev = fh->dev;
  894. f->fmt.pix.width = dev->width;
  895. f->fmt.pix.height = dev->height;
  896. f->fmt.pix.field = fh->vidq.field;
  897. f->fmt.pix.pixelformat = dev->fmt->fourcc;
  898. f->fmt.pix.bytesperline =
  899. (f->fmt.pix.width * dev->fmt->depth) >> 3;
  900. f->fmt.pix.sizeimage =
  901. f->fmt.pix.height * f->fmt.pix.bytesperline;
  902. f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
  903. return 0;
  904. }
  905. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  906. struct v4l2_format *f)
  907. {
  908. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  909. const struct cx8800_fmt *fmt;
  910. enum v4l2_field field;
  911. unsigned int maxw, maxh;
  912. fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  913. if (NULL == fmt)
  914. return -EINVAL;
  915. field = f->fmt.pix.field;
  916. maxw = norm_maxw(core->tvnorm);
  917. maxh = norm_maxh(core->tvnorm);
  918. if (V4L2_FIELD_ANY == field) {
  919. field = (f->fmt.pix.height > maxh/2)
  920. ? V4L2_FIELD_INTERLACED
  921. : V4L2_FIELD_BOTTOM;
  922. }
  923. switch (field) {
  924. case V4L2_FIELD_TOP:
  925. case V4L2_FIELD_BOTTOM:
  926. maxh = maxh / 2;
  927. break;
  928. case V4L2_FIELD_INTERLACED:
  929. break;
  930. default:
  931. return -EINVAL;
  932. }
  933. f->fmt.pix.field = field;
  934. v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
  935. &f->fmt.pix.height, 32, maxh, 0, 0);
  936. f->fmt.pix.bytesperline =
  937. (f->fmt.pix.width * fmt->depth) >> 3;
  938. f->fmt.pix.sizeimage =
  939. f->fmt.pix.height * f->fmt.pix.bytesperline;
  940. return 0;
  941. }
  942. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  943. struct v4l2_format *f)
  944. {
  945. struct cx8800_fh *fh = priv;
  946. struct cx8800_dev *dev = fh->dev;
  947. int err = vidioc_try_fmt_vid_cap (file,priv,f);
  948. if (0 != err)
  949. return err;
  950. dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  951. dev->width = f->fmt.pix.width;
  952. dev->height = f->fmt.pix.height;
  953. fh->vidq.field = f->fmt.pix.field;
  954. return 0;
  955. }
  956. void cx88_querycap(struct file *file, struct cx88_core *core,
  957. struct v4l2_capability *cap)
  958. {
  959. struct video_device *vdev = video_devdata(file);
  960. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  961. cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
  962. if (UNSET != core->board.tuner_type)
  963. cap->device_caps |= V4L2_CAP_TUNER;
  964. switch (vdev->vfl_type) {
  965. case VFL_TYPE_RADIO:
  966. cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
  967. break;
  968. case VFL_TYPE_GRABBER:
  969. cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
  970. break;
  971. case VFL_TYPE_VBI:
  972. cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
  973. break;
  974. }
  975. cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
  976. V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
  977. if (core->board.radio.type == CX88_RADIO)
  978. cap->capabilities |= V4L2_CAP_RADIO;
  979. }
  980. EXPORT_SYMBOL(cx88_querycap);
  981. static int vidioc_querycap(struct file *file, void *priv,
  982. struct v4l2_capability *cap)
  983. {
  984. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  985. struct cx88_core *core = dev->core;
  986. strcpy(cap->driver, "cx8800");
  987. sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
  988. cx88_querycap(file, core, cap);
  989. return 0;
  990. }
  991. static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
  992. struct v4l2_fmtdesc *f)
  993. {
  994. if (unlikely(f->index >= ARRAY_SIZE(formats)))
  995. return -EINVAL;
  996. strlcpy(f->description,formats[f->index].name,sizeof(f->description));
  997. f->pixelformat = formats[f->index].fourcc;
  998. return 0;
  999. }
  1000. static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
  1001. {
  1002. return videobuf_reqbufs(get_queue(file), p);
  1003. }
  1004. static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1005. {
  1006. return videobuf_querybuf(get_queue(file), p);
  1007. }
  1008. static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1009. {
  1010. return videobuf_qbuf(get_queue(file), p);
  1011. }
  1012. static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1013. {
  1014. return videobuf_dqbuf(get_queue(file), p,
  1015. file->f_flags & O_NONBLOCK);
  1016. }
  1017. static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
  1018. {
  1019. struct video_device *vdev = video_devdata(file);
  1020. struct cx8800_fh *fh = priv;
  1021. struct cx8800_dev *dev = fh->dev;
  1022. if ((vdev->vfl_type == VFL_TYPE_GRABBER && i != V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
  1023. (vdev->vfl_type == VFL_TYPE_VBI && i != V4L2_BUF_TYPE_VBI_CAPTURE))
  1024. return -EINVAL;
  1025. if (unlikely(!res_get(dev, fh, get_resource(file))))
  1026. return -EBUSY;
  1027. return videobuf_streamon(get_queue(file));
  1028. }
  1029. static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
  1030. {
  1031. struct video_device *vdev = video_devdata(file);
  1032. struct cx8800_fh *fh = priv;
  1033. struct cx8800_dev *dev = fh->dev;
  1034. int err, res;
  1035. if ((vdev->vfl_type == VFL_TYPE_GRABBER && i != V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
  1036. (vdev->vfl_type == VFL_TYPE_VBI && i != V4L2_BUF_TYPE_VBI_CAPTURE))
  1037. return -EINVAL;
  1038. res = get_resource(file);
  1039. err = videobuf_streamoff(get_queue(file));
  1040. if (err < 0)
  1041. return err;
  1042. res_free(dev,fh,res);
  1043. return 0;
  1044. }
  1045. static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
  1046. {
  1047. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1048. *tvnorm = core->tvnorm;
  1049. return 0;
  1050. }
  1051. static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
  1052. {
  1053. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1054. mutex_lock(&core->lock);
  1055. cx88_set_tvnorm(core, tvnorms);
  1056. mutex_unlock(&core->lock);
  1057. return 0;
  1058. }
  1059. /* only one input in this sample driver */
  1060. int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
  1061. {
  1062. static const char * const iname[] = {
  1063. [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
  1064. [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
  1065. [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
  1066. [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
  1067. [ CX88_VMUX_SVIDEO ] = "S-Video",
  1068. [ CX88_VMUX_TELEVISION ] = "Television",
  1069. [ CX88_VMUX_CABLE ] = "Cable TV",
  1070. [ CX88_VMUX_DVB ] = "DVB",
  1071. [ CX88_VMUX_DEBUG ] = "for debug only",
  1072. };
  1073. unsigned int n = i->index;
  1074. if (n >= 4)
  1075. return -EINVAL;
  1076. if (0 == INPUT(n).type)
  1077. return -EINVAL;
  1078. i->type = V4L2_INPUT_TYPE_CAMERA;
  1079. strcpy(i->name,iname[INPUT(n).type]);
  1080. if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
  1081. (CX88_VMUX_CABLE == INPUT(n).type)) {
  1082. i->type = V4L2_INPUT_TYPE_TUNER;
  1083. }
  1084. i->std = CX88_NORMS;
  1085. return 0;
  1086. }
  1087. EXPORT_SYMBOL(cx88_enum_input);
  1088. static int vidioc_enum_input (struct file *file, void *priv,
  1089. struct v4l2_input *i)
  1090. {
  1091. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1092. return cx88_enum_input (core,i);
  1093. }
  1094. static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
  1095. {
  1096. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1097. *i = core->input;
  1098. return 0;
  1099. }
  1100. static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
  1101. {
  1102. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1103. if (i >= 4)
  1104. return -EINVAL;
  1105. if (0 == INPUT(i).type)
  1106. return -EINVAL;
  1107. mutex_lock(&core->lock);
  1108. cx88_newstation(core);
  1109. cx88_video_mux(core,i);
  1110. mutex_unlock(&core->lock);
  1111. return 0;
  1112. }
  1113. static int vidioc_g_tuner (struct file *file, void *priv,
  1114. struct v4l2_tuner *t)
  1115. {
  1116. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1117. u32 reg;
  1118. if (unlikely(UNSET == core->board.tuner_type))
  1119. return -EINVAL;
  1120. if (0 != t->index)
  1121. return -EINVAL;
  1122. strcpy(t->name, "Television");
  1123. t->capability = V4L2_TUNER_CAP_NORM;
  1124. t->rangehigh = 0xffffffffUL;
  1125. call_all(core, tuner, g_tuner, t);
  1126. cx88_get_stereo(core ,t);
  1127. reg = cx_read(MO_DEVICE_STATUS);
  1128. t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
  1129. return 0;
  1130. }
  1131. static int vidioc_s_tuner (struct file *file, void *priv,
  1132. const struct v4l2_tuner *t)
  1133. {
  1134. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1135. if (UNSET == core->board.tuner_type)
  1136. return -EINVAL;
  1137. if (0 != t->index)
  1138. return -EINVAL;
  1139. cx88_set_stereo(core, t->audmode, 1);
  1140. return 0;
  1141. }
  1142. static int vidioc_g_frequency (struct file *file, void *priv,
  1143. struct v4l2_frequency *f)
  1144. {
  1145. struct cx8800_fh *fh = priv;
  1146. struct cx88_core *core = fh->dev->core;
  1147. if (unlikely(UNSET == core->board.tuner_type))
  1148. return -EINVAL;
  1149. if (f->tuner)
  1150. return -EINVAL;
  1151. f->frequency = core->freq;
  1152. call_all(core, tuner, g_frequency, f);
  1153. return 0;
  1154. }
  1155. int cx88_set_freq (struct cx88_core *core,
  1156. const struct v4l2_frequency *f)
  1157. {
  1158. struct v4l2_frequency new_freq = *f;
  1159. if (unlikely(UNSET == core->board.tuner_type))
  1160. return -EINVAL;
  1161. if (unlikely(f->tuner != 0))
  1162. return -EINVAL;
  1163. mutex_lock(&core->lock);
  1164. cx88_newstation(core);
  1165. call_all(core, tuner, s_frequency, f);
  1166. call_all(core, tuner, g_frequency, &new_freq);
  1167. core->freq = new_freq.frequency;
  1168. /* When changing channels it is required to reset TVAUDIO */
  1169. msleep (10);
  1170. cx88_set_tvaudio(core);
  1171. mutex_unlock(&core->lock);
  1172. return 0;
  1173. }
  1174. EXPORT_SYMBOL(cx88_set_freq);
  1175. static int vidioc_s_frequency (struct file *file, void *priv,
  1176. const struct v4l2_frequency *f)
  1177. {
  1178. struct cx8800_fh *fh = priv;
  1179. struct cx88_core *core = fh->dev->core;
  1180. return cx88_set_freq(core, f);
  1181. }
  1182. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1183. static int vidioc_g_register (struct file *file, void *fh,
  1184. struct v4l2_dbg_register *reg)
  1185. {
  1186. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1187. /* cx2388x has a 24-bit register space */
  1188. reg->val = cx_read(reg->reg & 0xfffffc);
  1189. reg->size = 4;
  1190. return 0;
  1191. }
  1192. static int vidioc_s_register (struct file *file, void *fh,
  1193. const struct v4l2_dbg_register *reg)
  1194. {
  1195. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1196. cx_write(reg->reg & 0xfffffc, reg->val);
  1197. return 0;
  1198. }
  1199. #endif
  1200. /* ----------------------------------------------------------- */
  1201. /* RADIO ESPECIFIC IOCTLS */
  1202. /* ----------------------------------------------------------- */
  1203. static int radio_g_tuner (struct file *file, void *priv,
  1204. struct v4l2_tuner *t)
  1205. {
  1206. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1207. if (unlikely(t->index > 0))
  1208. return -EINVAL;
  1209. strcpy(t->name, "Radio");
  1210. call_all(core, tuner, g_tuner, t);
  1211. return 0;
  1212. }
  1213. static int radio_s_tuner (struct file *file, void *priv,
  1214. const struct v4l2_tuner *t)
  1215. {
  1216. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1217. if (0 != t->index)
  1218. return -EINVAL;
  1219. call_all(core, tuner, s_tuner, t);
  1220. return 0;
  1221. }
  1222. /* ----------------------------------------------------------- */
  1223. static void cx8800_vid_timeout(unsigned long data)
  1224. {
  1225. struct cx8800_dev *dev = (struct cx8800_dev*)data;
  1226. struct cx88_core *core = dev->core;
  1227. struct cx88_dmaqueue *q = &dev->vidq;
  1228. struct cx88_buffer *buf;
  1229. unsigned long flags;
  1230. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1231. cx_clear(MO_VID_DMACNTRL, 0x11);
  1232. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1233. spin_lock_irqsave(&dev->slock,flags);
  1234. while (!list_empty(&q->active)) {
  1235. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  1236. list_del(&buf->vb.queue);
  1237. buf->vb.state = VIDEOBUF_ERROR;
  1238. wake_up(&buf->vb.done);
  1239. printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
  1240. buf, buf->vb.i, (unsigned long)buf->risc.dma);
  1241. }
  1242. restart_video_queue(dev,q);
  1243. spin_unlock_irqrestore(&dev->slock,flags);
  1244. }
  1245. static const char *cx88_vid_irqs[32] = {
  1246. "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
  1247. "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
  1248. "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
  1249. "y_sync", "u_sync", "v_sync", "vbi_sync",
  1250. "opc_err", "par_err", "rip_err", "pci_abort",
  1251. };
  1252. static void cx8800_vid_irq(struct cx8800_dev *dev)
  1253. {
  1254. struct cx88_core *core = dev->core;
  1255. u32 status, mask, count;
  1256. status = cx_read(MO_VID_INTSTAT);
  1257. mask = cx_read(MO_VID_INTMSK);
  1258. if (0 == (status & mask))
  1259. return;
  1260. cx_write(MO_VID_INTSTAT, status);
  1261. if (irq_debug || (status & mask & ~0xff))
  1262. cx88_print_irqbits(core->name, "irq vid",
  1263. cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
  1264. status, mask);
  1265. /* risc op code error */
  1266. if (status & (1 << 16)) {
  1267. printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
  1268. cx_clear(MO_VID_DMACNTRL, 0x11);
  1269. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1270. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1271. }
  1272. /* risc1 y */
  1273. if (status & 0x01) {
  1274. spin_lock(&dev->slock);
  1275. count = cx_read(MO_VIDY_GPCNT);
  1276. cx88_wakeup(core, &dev->vidq, count);
  1277. spin_unlock(&dev->slock);
  1278. }
  1279. /* risc1 vbi */
  1280. if (status & 0x08) {
  1281. spin_lock(&dev->slock);
  1282. count = cx_read(MO_VBI_GPCNT);
  1283. cx88_wakeup(core, &dev->vbiq, count);
  1284. spin_unlock(&dev->slock);
  1285. }
  1286. /* risc2 y */
  1287. if (status & 0x10) {
  1288. dprintk(2,"stopper video\n");
  1289. spin_lock(&dev->slock);
  1290. restart_video_queue(dev,&dev->vidq);
  1291. spin_unlock(&dev->slock);
  1292. }
  1293. /* risc2 vbi */
  1294. if (status & 0x80) {
  1295. dprintk(2,"stopper vbi\n");
  1296. spin_lock(&dev->slock);
  1297. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1298. spin_unlock(&dev->slock);
  1299. }
  1300. }
  1301. static irqreturn_t cx8800_irq(int irq, void *dev_id)
  1302. {
  1303. struct cx8800_dev *dev = dev_id;
  1304. struct cx88_core *core = dev->core;
  1305. u32 status;
  1306. int loop, handled = 0;
  1307. for (loop = 0; loop < 10; loop++) {
  1308. status = cx_read(MO_PCI_INTSTAT) &
  1309. (core->pci_irqmask | PCI_INT_VIDINT);
  1310. if (0 == status)
  1311. goto out;
  1312. cx_write(MO_PCI_INTSTAT, status);
  1313. handled = 1;
  1314. if (status & core->pci_irqmask)
  1315. cx88_core_irq(core,status);
  1316. if (status & PCI_INT_VIDINT)
  1317. cx8800_vid_irq(dev);
  1318. }
  1319. if (10 == loop) {
  1320. printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
  1321. core->name);
  1322. cx_write(MO_PCI_INTMSK,0);
  1323. }
  1324. out:
  1325. return IRQ_RETVAL(handled);
  1326. }
  1327. /* ----------------------------------------------------------- */
  1328. /* exported stuff */
  1329. static const struct v4l2_file_operations video_fops =
  1330. {
  1331. .owner = THIS_MODULE,
  1332. .open = video_open,
  1333. .release = video_release,
  1334. .read = video_read,
  1335. .poll = video_poll,
  1336. .mmap = video_mmap,
  1337. .unlocked_ioctl = video_ioctl2,
  1338. };
  1339. static const struct v4l2_ioctl_ops video_ioctl_ops = {
  1340. .vidioc_querycap = vidioc_querycap,
  1341. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  1342. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  1343. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  1344. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  1345. .vidioc_reqbufs = vidioc_reqbufs,
  1346. .vidioc_querybuf = vidioc_querybuf,
  1347. .vidioc_qbuf = vidioc_qbuf,
  1348. .vidioc_dqbuf = vidioc_dqbuf,
  1349. .vidioc_g_std = vidioc_g_std,
  1350. .vidioc_s_std = vidioc_s_std,
  1351. .vidioc_enum_input = vidioc_enum_input,
  1352. .vidioc_g_input = vidioc_g_input,
  1353. .vidioc_s_input = vidioc_s_input,
  1354. .vidioc_streamon = vidioc_streamon,
  1355. .vidioc_streamoff = vidioc_streamoff,
  1356. .vidioc_g_tuner = vidioc_g_tuner,
  1357. .vidioc_s_tuner = vidioc_s_tuner,
  1358. .vidioc_g_frequency = vidioc_g_frequency,
  1359. .vidioc_s_frequency = vidioc_s_frequency,
  1360. .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
  1361. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  1362. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1363. .vidioc_g_register = vidioc_g_register,
  1364. .vidioc_s_register = vidioc_s_register,
  1365. #endif
  1366. };
  1367. static const struct video_device cx8800_video_template = {
  1368. .name = "cx8800-video",
  1369. .fops = &video_fops,
  1370. .ioctl_ops = &video_ioctl_ops,
  1371. .tvnorms = CX88_NORMS,
  1372. };
  1373. static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
  1374. .vidioc_querycap = vidioc_querycap,
  1375. .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
  1376. .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
  1377. .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
  1378. .vidioc_reqbufs = vidioc_reqbufs,
  1379. .vidioc_querybuf = vidioc_querybuf,
  1380. .vidioc_qbuf = vidioc_qbuf,
  1381. .vidioc_dqbuf = vidioc_dqbuf,
  1382. .vidioc_g_std = vidioc_g_std,
  1383. .vidioc_s_std = vidioc_s_std,
  1384. .vidioc_enum_input = vidioc_enum_input,
  1385. .vidioc_g_input = vidioc_g_input,
  1386. .vidioc_s_input = vidioc_s_input,
  1387. .vidioc_streamon = vidioc_streamon,
  1388. .vidioc_streamoff = vidioc_streamoff,
  1389. .vidioc_g_tuner = vidioc_g_tuner,
  1390. .vidioc_s_tuner = vidioc_s_tuner,
  1391. .vidioc_g_frequency = vidioc_g_frequency,
  1392. .vidioc_s_frequency = vidioc_s_frequency,
  1393. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1394. .vidioc_g_register = vidioc_g_register,
  1395. .vidioc_s_register = vidioc_s_register,
  1396. #endif
  1397. };
  1398. static const struct video_device cx8800_vbi_template = {
  1399. .name = "cx8800-vbi",
  1400. .fops = &video_fops,
  1401. .ioctl_ops = &vbi_ioctl_ops,
  1402. .tvnorms = CX88_NORMS,
  1403. };
  1404. static const struct v4l2_file_operations radio_fops =
  1405. {
  1406. .owner = THIS_MODULE,
  1407. .open = video_open,
  1408. .poll = v4l2_ctrl_poll,
  1409. .release = video_release,
  1410. .unlocked_ioctl = video_ioctl2,
  1411. };
  1412. static const struct v4l2_ioctl_ops radio_ioctl_ops = {
  1413. .vidioc_querycap = vidioc_querycap,
  1414. .vidioc_g_tuner = radio_g_tuner,
  1415. .vidioc_s_tuner = radio_s_tuner,
  1416. .vidioc_g_frequency = vidioc_g_frequency,
  1417. .vidioc_s_frequency = vidioc_s_frequency,
  1418. .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
  1419. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  1420. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1421. .vidioc_g_register = vidioc_g_register,
  1422. .vidioc_s_register = vidioc_s_register,
  1423. #endif
  1424. };
  1425. static const struct video_device cx8800_radio_template = {
  1426. .name = "cx8800-radio",
  1427. .fops = &radio_fops,
  1428. .ioctl_ops = &radio_ioctl_ops,
  1429. };
  1430. static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
  1431. .s_ctrl = cx8800_s_vid_ctrl,
  1432. };
  1433. static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
  1434. .s_ctrl = cx8800_s_aud_ctrl,
  1435. };
  1436. /* ----------------------------------------------------------- */
  1437. static void cx8800_unregister_video(struct cx8800_dev *dev)
  1438. {
  1439. if (dev->radio_dev) {
  1440. if (video_is_registered(dev->radio_dev))
  1441. video_unregister_device(dev->radio_dev);
  1442. else
  1443. video_device_release(dev->radio_dev);
  1444. dev->radio_dev = NULL;
  1445. }
  1446. if (dev->vbi_dev) {
  1447. if (video_is_registered(dev->vbi_dev))
  1448. video_unregister_device(dev->vbi_dev);
  1449. else
  1450. video_device_release(dev->vbi_dev);
  1451. dev->vbi_dev = NULL;
  1452. }
  1453. if (dev->video_dev) {
  1454. if (video_is_registered(dev->video_dev))
  1455. video_unregister_device(dev->video_dev);
  1456. else
  1457. video_device_release(dev->video_dev);
  1458. dev->video_dev = NULL;
  1459. }
  1460. }
  1461. static int cx8800_initdev(struct pci_dev *pci_dev,
  1462. const struct pci_device_id *pci_id)
  1463. {
  1464. struct cx8800_dev *dev;
  1465. struct cx88_core *core;
  1466. int err;
  1467. int i;
  1468. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  1469. if (NULL == dev)
  1470. return -ENOMEM;
  1471. /* pci init */
  1472. dev->pci = pci_dev;
  1473. if (pci_enable_device(pci_dev)) {
  1474. err = -EIO;
  1475. goto fail_free;
  1476. }
  1477. core = cx88_core_get(dev->pci);
  1478. if (NULL == core) {
  1479. err = -EINVAL;
  1480. goto fail_free;
  1481. }
  1482. dev->core = core;
  1483. /* print pci info */
  1484. dev->pci_rev = pci_dev->revision;
  1485. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  1486. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  1487. "latency: %d, mmio: 0x%llx\n", core->name,
  1488. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  1489. dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
  1490. pci_set_master(pci_dev);
  1491. if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
  1492. printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
  1493. err = -EIO;
  1494. goto fail_core;
  1495. }
  1496. /* initialize driver struct */
  1497. spin_lock_init(&dev->slock);
  1498. core->tvnorm = V4L2_STD_NTSC_M;
  1499. /* init video dma queues */
  1500. INIT_LIST_HEAD(&dev->vidq.active);
  1501. INIT_LIST_HEAD(&dev->vidq.queued);
  1502. dev->vidq.timeout.function = cx8800_vid_timeout;
  1503. dev->vidq.timeout.data = (unsigned long)dev;
  1504. init_timer(&dev->vidq.timeout);
  1505. cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
  1506. MO_VID_DMACNTRL,0x11,0x00);
  1507. /* init vbi dma queues */
  1508. INIT_LIST_HEAD(&dev->vbiq.active);
  1509. INIT_LIST_HEAD(&dev->vbiq.queued);
  1510. dev->vbiq.timeout.function = cx8800_vbi_timeout;
  1511. dev->vbiq.timeout.data = (unsigned long)dev;
  1512. init_timer(&dev->vbiq.timeout);
  1513. cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
  1514. MO_VID_DMACNTRL,0x88,0x00);
  1515. /* get irq */
  1516. err = request_irq(pci_dev->irq, cx8800_irq,
  1517. IRQF_SHARED, core->name, dev);
  1518. if (err < 0) {
  1519. printk(KERN_ERR "%s/0: can't get IRQ %d\n",
  1520. core->name,pci_dev->irq);
  1521. goto fail_core;
  1522. }
  1523. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1524. for (i = 0; i < CX8800_AUD_CTLS; i++) {
  1525. const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
  1526. struct v4l2_ctrl *vc;
  1527. vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
  1528. cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
  1529. if (vc == NULL) {
  1530. err = core->audio_hdl.error;
  1531. goto fail_core;
  1532. }
  1533. vc->priv = (void *)cc;
  1534. }
  1535. for (i = 0; i < CX8800_VID_CTLS; i++) {
  1536. const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
  1537. struct v4l2_ctrl *vc;
  1538. vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
  1539. cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
  1540. if (vc == NULL) {
  1541. err = core->video_hdl.error;
  1542. goto fail_core;
  1543. }
  1544. vc->priv = (void *)cc;
  1545. if (vc->id == V4L2_CID_CHROMA_AGC)
  1546. core->chroma_agc = vc;
  1547. }
  1548. v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL);
  1549. /* load and configure helper modules */
  1550. if (core->board.audio_chip == CX88_AUDIO_WM8775) {
  1551. struct i2c_board_info wm8775_info = {
  1552. .type = "wm8775",
  1553. .addr = 0x36 >> 1,
  1554. .platform_data = &core->wm8775_data,
  1555. };
  1556. struct v4l2_subdev *sd;
  1557. if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
  1558. core->wm8775_data.is_nova_s = true;
  1559. else
  1560. core->wm8775_data.is_nova_s = false;
  1561. sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
  1562. &wm8775_info, NULL);
  1563. if (sd != NULL) {
  1564. core->sd_wm8775 = sd;
  1565. sd->grp_id = WM8775_GID;
  1566. }
  1567. }
  1568. if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
  1569. /* This probes for a tda9874 as is used on some
  1570. Pixelview Ultra boards. */
  1571. v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
  1572. "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
  1573. }
  1574. switch (core->boardnr) {
  1575. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1576. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
  1577. static const struct i2c_board_info rtc_info = {
  1578. I2C_BOARD_INFO("isl1208", 0x6f)
  1579. };
  1580. request_module("rtc-isl1208");
  1581. core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
  1582. }
  1583. /* break intentionally omitted */
  1584. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1585. request_module("ir-kbd-i2c");
  1586. }
  1587. /* Sets device info at pci_dev */
  1588. pci_set_drvdata(pci_dev, dev);
  1589. dev->width = 320;
  1590. dev->height = 240;
  1591. dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
  1592. /* initial device configuration */
  1593. mutex_lock(&core->lock);
  1594. cx88_set_tvnorm(core, core->tvnorm);
  1595. v4l2_ctrl_handler_setup(&core->video_hdl);
  1596. v4l2_ctrl_handler_setup(&core->audio_hdl);
  1597. cx88_video_mux(core, 0);
  1598. /* register v4l devices */
  1599. dev->video_dev = cx88_vdev_init(core,dev->pci,
  1600. &cx8800_video_template,"video");
  1601. video_set_drvdata(dev->video_dev, dev);
  1602. dev->video_dev->ctrl_handler = &core->video_hdl;
  1603. err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
  1604. video_nr[core->nr]);
  1605. if (err < 0) {
  1606. printk(KERN_ERR "%s/0: can't register video device\n",
  1607. core->name);
  1608. goto fail_unreg;
  1609. }
  1610. printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
  1611. core->name, video_device_node_name(dev->video_dev));
  1612. dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
  1613. video_set_drvdata(dev->vbi_dev, dev);
  1614. err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
  1615. vbi_nr[core->nr]);
  1616. if (err < 0) {
  1617. printk(KERN_ERR "%s/0: can't register vbi device\n",
  1618. core->name);
  1619. goto fail_unreg;
  1620. }
  1621. printk(KERN_INFO "%s/0: registered device %s\n",
  1622. core->name, video_device_node_name(dev->vbi_dev));
  1623. if (core->board.radio.type == CX88_RADIO) {
  1624. dev->radio_dev = cx88_vdev_init(core,dev->pci,
  1625. &cx8800_radio_template,"radio");
  1626. video_set_drvdata(dev->radio_dev, dev);
  1627. dev->radio_dev->ctrl_handler = &core->audio_hdl;
  1628. err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
  1629. radio_nr[core->nr]);
  1630. if (err < 0) {
  1631. printk(KERN_ERR "%s/0: can't register radio device\n",
  1632. core->name);
  1633. goto fail_unreg;
  1634. }
  1635. printk(KERN_INFO "%s/0: registered device %s\n",
  1636. core->name, video_device_node_name(dev->radio_dev));
  1637. }
  1638. /* start tvaudio thread */
  1639. if (core->board.tuner_type != TUNER_ABSENT) {
  1640. core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
  1641. if (IS_ERR(core->kthread)) {
  1642. err = PTR_ERR(core->kthread);
  1643. printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
  1644. core->name, err);
  1645. }
  1646. }
  1647. mutex_unlock(&core->lock);
  1648. return 0;
  1649. fail_unreg:
  1650. cx8800_unregister_video(dev);
  1651. free_irq(pci_dev->irq, dev);
  1652. mutex_unlock(&core->lock);
  1653. fail_core:
  1654. cx88_core_put(core,dev->pci);
  1655. fail_free:
  1656. kfree(dev);
  1657. return err;
  1658. }
  1659. static void cx8800_finidev(struct pci_dev *pci_dev)
  1660. {
  1661. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1662. struct cx88_core *core = dev->core;
  1663. /* stop thread */
  1664. if (core->kthread) {
  1665. kthread_stop(core->kthread);
  1666. core->kthread = NULL;
  1667. }
  1668. if (core->ir)
  1669. cx88_ir_stop(core);
  1670. cx88_shutdown(core); /* FIXME */
  1671. pci_disable_device(pci_dev);
  1672. /* unregister stuff */
  1673. free_irq(pci_dev->irq, dev);
  1674. cx8800_unregister_video(dev);
  1675. /* free memory */
  1676. btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
  1677. cx88_core_put(core,dev->pci);
  1678. kfree(dev);
  1679. }
  1680. #ifdef CONFIG_PM
  1681. static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
  1682. {
  1683. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1684. struct cx88_core *core = dev->core;
  1685. unsigned long flags;
  1686. /* stop video+vbi capture */
  1687. spin_lock_irqsave(&dev->slock, flags);
  1688. if (!list_empty(&dev->vidq.active)) {
  1689. printk("%s/0: suspend video\n", core->name);
  1690. stop_video_dma(dev);
  1691. del_timer(&dev->vidq.timeout);
  1692. }
  1693. if (!list_empty(&dev->vbiq.active)) {
  1694. printk("%s/0: suspend vbi\n", core->name);
  1695. cx8800_stop_vbi_dma(dev);
  1696. del_timer(&dev->vbiq.timeout);
  1697. }
  1698. spin_unlock_irqrestore(&dev->slock, flags);
  1699. if (core->ir)
  1700. cx88_ir_stop(core);
  1701. /* FIXME -- shutdown device */
  1702. cx88_shutdown(core);
  1703. pci_save_state(pci_dev);
  1704. if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
  1705. pci_disable_device(pci_dev);
  1706. dev->state.disabled = 1;
  1707. }
  1708. return 0;
  1709. }
  1710. static int cx8800_resume(struct pci_dev *pci_dev)
  1711. {
  1712. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1713. struct cx88_core *core = dev->core;
  1714. unsigned long flags;
  1715. int err;
  1716. if (dev->state.disabled) {
  1717. err=pci_enable_device(pci_dev);
  1718. if (err) {
  1719. printk(KERN_ERR "%s/0: can't enable device\n",
  1720. core->name);
  1721. return err;
  1722. }
  1723. dev->state.disabled = 0;
  1724. }
  1725. err= pci_set_power_state(pci_dev, PCI_D0);
  1726. if (err) {
  1727. printk(KERN_ERR "%s/0: can't set power state\n", core->name);
  1728. pci_disable_device(pci_dev);
  1729. dev->state.disabled = 1;
  1730. return err;
  1731. }
  1732. pci_restore_state(pci_dev);
  1733. /* FIXME: re-initialize hardware */
  1734. cx88_reset(core);
  1735. if (core->ir)
  1736. cx88_ir_start(core);
  1737. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1738. /* restart video+vbi capture */
  1739. spin_lock_irqsave(&dev->slock, flags);
  1740. if (!list_empty(&dev->vidq.active)) {
  1741. printk("%s/0: resume video\n", core->name);
  1742. restart_video_queue(dev,&dev->vidq);
  1743. }
  1744. if (!list_empty(&dev->vbiq.active)) {
  1745. printk("%s/0: resume vbi\n", core->name);
  1746. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1747. }
  1748. spin_unlock_irqrestore(&dev->slock, flags);
  1749. return 0;
  1750. }
  1751. #endif
  1752. /* ----------------------------------------------------------- */
  1753. static const struct pci_device_id cx8800_pci_tbl[] = {
  1754. {
  1755. .vendor = 0x14f1,
  1756. .device = 0x8800,
  1757. .subvendor = PCI_ANY_ID,
  1758. .subdevice = PCI_ANY_ID,
  1759. },{
  1760. /* --- end of list --- */
  1761. }
  1762. };
  1763. MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
  1764. static struct pci_driver cx8800_pci_driver = {
  1765. .name = "cx8800",
  1766. .id_table = cx8800_pci_tbl,
  1767. .probe = cx8800_initdev,
  1768. .remove = cx8800_finidev,
  1769. #ifdef CONFIG_PM
  1770. .suspend = cx8800_suspend,
  1771. .resume = cx8800_resume,
  1772. #endif
  1773. };
  1774. module_pci_driver(cx8800_pci_driver);