AudDrv_BTCVSD.c 40 KB

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  1. /*
  2. * Copyright (C) 2007 The Android Open Source Project
  3. *
  4. * Licensed under the Apache License, Version 2.0 (the "License");
  5. * you may not use this file except in compliance with the License.
  6. * You may obtain a copy of the License at
  7. *
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. *
  10. * Unless required by applicable law or agreed to in writing, software
  11. * distributed under the License is distributed on an "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13. * See the License for the specific language governing permissions and
  14. * limitations under the License.
  15. */
  16. /*******************************************************************************
  17. *
  18. * Filename:
  19. * ---------
  20. * AudDrv_Kernelc
  21. *
  22. * Project:
  23. * --------
  24. * MT6583 Audio Driver Kernel Function
  25. *
  26. * Description:
  27. * ------------
  28. * Audio register
  29. *
  30. * Author:
  31. * -------
  32. * Chipeng Chang
  33. *
  34. *
  35. *
  36. *******************************************************************************/
  37. /*****************************************************************************
  38. * C O M P I L E R F L A G S
  39. *****************************************************************************/
  40. /*****************************************************************************
  41. * E X T E R N A L R E F E R E N C E S
  42. *****************************************************************************/
  43. #include "AudDrv_BTCVSD.h"
  44. #include "AudDrv_BTCVSD_ioctl.h"
  45. #include <linux/kernel.h>
  46. #include <linux/module.h>
  47. #include <linux/init.h>
  48. #include <linux/device.h>
  49. #include <linux/slab.h>
  50. #include <linux/fs.h>
  51. #include <linux/completion.h>
  52. #include <linux/mm.h>
  53. #include <linux/delay.h>
  54. #include <linux/interrupt.h>
  55. #include <linux/dma-mapping.h>
  56. #include <linux/vmalloc.h>
  57. #include <linux/platform_device.h>
  58. #include <linux/miscdevice.h>
  59. #include <linux/wait.h>
  60. #include <linux/spinlock.h>
  61. #include <linux/sched.h>
  62. #include <linux/wakelock.h>
  63. #include <linux/semaphore.h>
  64. #include <linux/jiffies.h>
  65. #include <linux/proc_fs.h>
  66. #include <linux/string.h>
  67. #include <linux/mutex.h>
  68. /* #include <linux/xlog.h> */
  69. #include <mach/irqs.h>
  70. /* #include <mach/mt_irq.h> */
  71. #include <mach/irqs.h>
  72. #include <asm/uaccess.h>
  73. #include <asm/irq.h>
  74. #include <asm/io.h>
  75. /* #include <mach/mt_reg_base.h> */
  76. #include <asm/div64.h>
  77. /* #include <linux/aee.h> */
  78. #include <mt-plat/aee.h>
  79. #include <linux/dma-mapping.h>
  80. #include <linux/compat.h>
  81. #ifdef CONFIG_OF
  82. #include <linux/of.h>
  83. #include <linux/of_irq.h>
  84. #include <linux/of_address.h>
  85. #endif
  86. /*#define TEST_PACKETLOSS*/
  87. /*****************************************************************************
  88. * DEFINE AND CONSTANT
  89. ******************************************************************************
  90. */
  91. #define AUDDRV_BTCVSD_NAME "MediaTek Audio BTCVSD Driver"
  92. #define AUDDRV_AUTHOR "MediaTek WCX"
  93. #define MASK_ALL (0xFFFFFFFF)
  94. /*****************************************************************************
  95. * V A R I A B L E D E L A R A T I O N
  96. *******************************************************************************/
  97. static const char auddrv_btcvsd_name[] = "AudioMTKBTCVSD";
  98. static kal_uint32 writeToBT_cnt;
  99. static kal_uint32 readFromBT_cnt;
  100. static kal_uint32 disableBTirq;
  101. static struct device *mDev;
  102. #ifdef TEST_PACKETLOSS
  103. kal_uint8 uSilencePattern[SCO_RX_PLC_SIZE];
  104. static kal_uint16 packet_cnt;
  105. #endif
  106. /* to mask BT CVSD IRQ when AP-side CVSD disable. Note: 72 is bit1 */
  107. static volatile void *INFRA_MISC_ADDRESS;
  108. static const kal_uint32 btsco_PacketValidMask[BT_SCO_CVSD_MAX][BT_SCO_CVSD_MAX] = {
  109. {0x1, 0x1 << 1, 0x1 << 2, 0x1 << 3, 0x1 << 4, 0x1 << 5}, /*30*/
  110. {0x1, 0x1, 0x2, 0x2, 0x4, 0x4}, /*60*/
  111. {0x1, 0x1, 0x1, 0x2, 0x2, 0x2}, /*90*/
  112. {0x1, 0x1, 0x1, 0x1, 0, 0}, /*120*/
  113. {0x7, 0x7 << 3, 0x7 << 6, 0x7 << 9, 0x7 << 12, 0x7 << 15}, /*10*/
  114. {0x3, 0x3 << 1, 0x3 << 3, 0x3 << 4, 0x3 << 6, 0x3 << 7}
  115. }; /*20*/
  116. static const kal_uint8 btsco_PacketInfo[BT_SCO_CVSD_MAX][BT_SCO_CVSD_MAX] = {
  117. {30, 6, BT_SCO_PACKET_180 / SCO_TX_ENCODE_SIZE, BT_SCO_PACKET_180 / SCO_RX_PLC_SIZE}, /*30*/
  118. {60, 3, BT_SCO_PACKET_180 / SCO_TX_ENCODE_SIZE, BT_SCO_PACKET_180 / SCO_RX_PLC_SIZE}, /*60*/
  119. {90, 2, BT_SCO_PACKET_180 / SCO_TX_ENCODE_SIZE, BT_SCO_PACKET_180 / SCO_RX_PLC_SIZE}, /*90*/
  120. {120, 1, BT_SCO_PACKET_120 / SCO_TX_ENCODE_SIZE, BT_SCO_PACKET_120 / SCO_RX_PLC_SIZE}, /*120*/
  121. {10, 18, BT_SCO_PACKET_180 / SCO_TX_ENCODE_SIZE, BT_SCO_PACKET_180 / SCO_RX_PLC_SIZE}, /*10*/
  122. {20, 9, BT_SCO_PACKET_180 / SCO_TX_ENCODE_SIZE, BT_SCO_PACKET_180 / SCO_RX_PLC_SIZE}
  123. }; /*20*/
  124. static struct {
  125. BT_SCO_TX_T *pTX;
  126. BT_SCO_RX_T *pRX;
  127. kal_uint8 *pStructMemory;
  128. kal_uint8 *pWorkingMemory;
  129. kal_uint16 uAudId;
  130. CVSD_STATE uTXState;
  131. CVSD_STATE uRXState;
  132. kal_bool fIsStructMemoryOnMED;
  133. } btsco;
  134. static volatile kal_uint32 *bt_hw_REG_PACKET_W, *bt_hw_REG_PACKET_R, *bt_hw_REG_CONTROL;
  135. static DEFINE_SPINLOCK(auddrv_BTCVSDTX_lock);
  136. static DEFINE_SPINLOCK(auddrv_BTCVSDRX_lock);
  137. static kal_uint32 BTCVSD_write_wait_queue_flag;
  138. static kal_uint32 BTCVSD_read_wait_queue_flag;
  139. DECLARE_WAIT_QUEUE_HEAD(BTCVSD_Write_Wait_Queue);
  140. DECLARE_WAIT_QUEUE_HEAD(BTCVSD_Read_Wait_Queue);
  141. #ifdef CONFIG_OF
  142. static int Auddrv_BTCVSD_Irq_Map(void)
  143. {
  144. struct device_node *node = NULL;
  145. node = of_find_compatible_node(NULL, NULL, "mediatek,audio_bt_cvsd");
  146. if (node == NULL)
  147. pr_debug("BTCVSD get node failed\n");
  148. /*get btcvsd irq num */
  149. btcvsd_irq_number = irq_of_parse_and_map(node, 0);
  150. pr_debug("[BTCVSD] btcvsd_irq_number=%d\n", btcvsd_irq_number);
  151. if (!btcvsd_irq_number) {
  152. pr_debug("[BTCVSD] get btcvsd_irq_number failed!!!\n");
  153. return -1;
  154. }
  155. return 0;
  156. }
  157. static int Auddrv_BTCVSD_Address_Map(void)
  158. {
  159. struct device_node *node = NULL;
  160. void __iomem *base;
  161. u32 offset[5] = { 0, 0, 0, 0, 0 };
  162. node = of_find_compatible_node(NULL, NULL, "mediatek,audio_bt_cvsd");
  163. if (node == NULL)
  164. pr_debug("BTCVSD get node failed\n");
  165. /*get INFRA_MISC offset, conn_bt_cvsd_mask, cvsd_mcu_read_offset, write_offset, packet_indicator */
  166. of_property_read_u32_array(node, "offset", offset, ARRAY_SIZE(offset));
  167. infra_misc_offset = offset[0];
  168. conn_bt_cvsd_mask = offset[1];
  169. cvsd_mcu_read_offset = offset[2];
  170. cvsd_mcu_write_offset = offset[3];
  171. cvsd_packet_indicator = offset[4];
  172. /*get infra base address */
  173. base = of_iomap(node, 0);
  174. infra_base = (unsigned long)base;
  175. /*get btcvsd sram address */
  176. base = of_iomap(node, 1);
  177. btsys_pkv_physical_base = (unsigned long)base;
  178. base = of_iomap(node, 2);
  179. btsys_sram_bank2_physical_base = (unsigned long)base;
  180. /*print for debug */
  181. pr_err("[BTCVSD] Auddrv_BTCVSD_Address_Map:\n");
  182. pr_err("[BTCVSD] infra_misc_offset=0x%lx\n", infra_misc_offset);
  183. pr_err("[BTCVSD] conn_bt_cvsd_mask=0x%lx\n", conn_bt_cvsd_mask);
  184. pr_err("[BTCVSD] read_off=0x%lx\n", cvsd_mcu_read_offset);
  185. pr_err("[BTCVSD] write_off=0x%lx\n", cvsd_mcu_write_offset);
  186. pr_err("[BTCVSD] packet_ind=0x%lx\n", cvsd_packet_indicator);
  187. pr_err("[BTCVSD] infra_base=0x%lx\n", infra_base);
  188. pr_err("[BTCVSD] btsys_pkv_physical_base=0x%lx\n", btsys_pkv_physical_base);
  189. pr_err("[BTCVSD] btsys_sram_bank2_physical_base=0x%lx\n", btsys_sram_bank2_physical_base);
  190. if (!infra_base) {
  191. pr_err("[BTCVSD] get infra_base failed!!!\n");
  192. return -1;
  193. }
  194. if (!btsys_pkv_physical_base) {
  195. pr_err("[BTCVSD] get btsys_pkv_physical_base failed!!!\n");
  196. return -1;
  197. }
  198. if (!btsys_sram_bank2_physical_base) {
  199. pr_err("[BTCVSD] get btsys_sram_bank2_physical_base failed!!!\n");
  200. return -1;
  201. }
  202. return 0;
  203. }
  204. #endif
  205. static void Disable_CVSD_Wakeup(void)
  206. {
  207. volatile kal_uint32 *INFRA_MISC_REGISTER = (volatile kal_uint32 *)(INFRA_MISC_ADDRESS);
  208. *INFRA_MISC_REGISTER |= conn_bt_cvsd_mask;
  209. pr_err("Disable_CVSD_Wakeup\n");
  210. }
  211. static void Enable_CVSD_Wakeup(void)
  212. {
  213. volatile kal_uint32 *INFRA_MISC_REGISTER = (volatile kal_uint32 *)(INFRA_MISC_ADDRESS);
  214. *INFRA_MISC_REGISTER &= ~(conn_bt_cvsd_mask);
  215. pr_err("Enable_CVSD_Wakeup\n");
  216. }
  217. static int AudDrv_btcvsd_Allocate_Buffer(struct file *fp, kal_uint8 isRX)
  218. {
  219. pr_debug("AudDrv_btcvsd_Allocate_Buffer(+) isRX=%d\n", isRX);
  220. if (isRX == 1) {
  221. readFromBT_cnt = 0;
  222. BT_CVSD_Mem.u4RXBufferSize = sizeof(BT_SCO_RX_T);
  223. if ((BT_CVSD_Mem.pucRXVirtBufAddr == NULL)
  224. && (BT_CVSD_Mem.pucRXPhysBufAddr == 0)) {
  225. BT_CVSD_Mem.pucRXVirtBufAddr = dma_alloc_coherent(mDev,
  226. BT_CVSD_Mem.u4RXBufferSize,
  227. &BT_CVSD_Mem.pucRXPhysBufAddr,
  228. GFP_KERNEL);
  229. if ((0 == BT_CVSD_Mem.pucRXPhysBufAddr)
  230. || (NULL == BT_CVSD_Mem.pucRXVirtBufAddr)) {
  231. pr_debug
  232. ("AudDrv_btcvsd_Allocate_Buffer dma_alloc_coherent RX fail\n");
  233. return -1;
  234. }
  235. memset((void *)BT_CVSD_Mem.pucRXVirtBufAddr, 0, BT_CVSD_Mem.u4RXBufferSize);
  236. PRINTK_AUDDRV("BT_CVSD_Mem.pucRXVirtBufAddr = %p BT_CVSD_Mem.pucRXPhysBufAddr = 0x%x\n",
  237. BT_CVSD_Mem.pucRXVirtBufAddr, BT_CVSD_Mem.pucRXPhysBufAddr);
  238. btsco.pRX = (BT_SCO_RX_T *) (BT_CVSD_Mem.pucRXVirtBufAddr);
  239. btsco.pRX->u4BufferSize = SCO_RX_PACKER_BUF_NUM * (SCO_RX_PLC_SIZE +
  240. BTSCO_CVSD_PACKET_VALID_SIZE);
  241. }
  242. } else {
  243. writeToBT_cnt = 0;
  244. BT_CVSD_Mem.u4TXBufferSize = sizeof(BT_SCO_TX_T);
  245. if ((BT_CVSD_Mem.pucTXVirtBufAddr == NULL)
  246. && (BT_CVSD_Mem.pucTXPhysBufAddr == 0)) {
  247. BT_CVSD_Mem.pucTXVirtBufAddr = dma_alloc_coherent(mDev,
  248. BT_CVSD_Mem.u4TXBufferSize,
  249. &BT_CVSD_Mem.pucTXPhysBufAddr,
  250. GFP_KERNEL);
  251. if ((0 == BT_CVSD_Mem.pucTXPhysBufAddr)
  252. || (NULL == BT_CVSD_Mem.pucTXVirtBufAddr)) {
  253. pr_debug
  254. ("AudDrv_btcvsd_Allocate_Buffer dma_alloc_coherent TX fail\n");
  255. return -1;
  256. }
  257. memset((void *)BT_CVSD_Mem.pucTXVirtBufAddr, 0, BT_CVSD_Mem.u4TXBufferSize);
  258. PRINTK_AUDDRV("BT_CVSD_Mem.pucTXVirtBufAddr = 0x%p BT_CVSD_Mem.pucTXPhysBufAddr = 0x%x\n",
  259. BT_CVSD_Mem.pucTXVirtBufAddr, BT_CVSD_Mem.pucTXPhysBufAddr);
  260. btsco.pTX = (BT_SCO_TX_T *) (BT_CVSD_Mem.pucTXVirtBufAddr);
  261. btsco.pTX->u4BufferSize = SCO_TX_PACKER_BUF_NUM * SCO_TX_ENCODE_SIZE;
  262. }
  263. }
  264. pr_debug("AudDrv_btcvsd_Allocate_Buffer(-)\n");
  265. return 0;
  266. }
  267. static int AudDrv_btcvsd_Free_Buffer(struct file *fp, kal_uint8 isRX)
  268. {
  269. pr_debug("AudDrv_btcvsd_Free_Buffer(+) isRX=%d\n", isRX);
  270. if (isRX == 1) {
  271. if ((BT_CVSD_Mem.pucRXVirtBufAddr != NULL)
  272. && (BT_CVSD_Mem.pucRXPhysBufAddr != 0)) {
  273. PRINTK_AUDDRV("AudDrv_btcvsd_Free_Buffer dma_free_coherent RXVirtBufAddr=%p,RXPhysBufAddr=%x",
  274. BT_CVSD_Mem.pucRXVirtBufAddr, BT_CVSD_Mem.pucRXPhysBufAddr);
  275. btsco.pRX = NULL;
  276. dma_free_coherent(0, BT_CVSD_Mem.u4RXBufferSize,
  277. BT_CVSD_Mem.pucRXVirtBufAddr,
  278. BT_CVSD_Mem.pucRXPhysBufAddr);
  279. BT_CVSD_Mem.u4RXBufferSize = 0;
  280. BT_CVSD_Mem.pucRXVirtBufAddr = NULL;
  281. BT_CVSD_Mem.pucRXPhysBufAddr = 0;
  282. } else {
  283. PRINTK_AUDDRV("btcvsd_Free_Buffer can't dma_free_coherent RXVBufAddr=%p,RXPhBufAddr=0x%x\n",
  284. BT_CVSD_Mem.pucRXVirtBufAddr, BT_CVSD_Mem.pucRXPhysBufAddr);
  285. return -1;
  286. }
  287. } else {
  288. if ((BT_CVSD_Mem.pucTXVirtBufAddr != NULL) && (BT_CVSD_Mem.pucTXPhysBufAddr != 0)) {
  289. /*pr_err("btcvsd_Free_Buffer dma_free_coherent pucTXVirtBufAddr = %p,pucTXPhysBufAddr = %x\n",
  290. BT_CVSD_Mem.pucTXVirtBufAddr, BT_CVSD_Mem.pucTXPhysBufAddr);*/
  291. btsco.pTX = NULL;
  292. dma_free_coherent(0, BT_CVSD_Mem.u4TXBufferSize,
  293. BT_CVSD_Mem.pucTXVirtBufAddr,
  294. BT_CVSD_Mem.pucTXPhysBufAddr);
  295. BT_CVSD_Mem.u4TXBufferSize = 0;
  296. BT_CVSD_Mem.pucTXVirtBufAddr = NULL;
  297. BT_CVSD_Mem.pucTXPhysBufAddr = 0;
  298. } else {
  299. PRINTK_AUDDRV("btcvsd_Free_Buffer cannot dma_free_coherent TXVBufAddr=%p,TXPhBufAddr=0x%x\n",
  300. BT_CVSD_Mem.pucTXVirtBufAddr, BT_CVSD_Mem.pucTXPhysBufAddr);
  301. return -1;
  302. }
  303. }
  304. pr_debug("AudDrv_btcvsd_Free_Buffer(-)\n");
  305. return 0;
  306. }
  307. /*****************************************************************************
  308. * FILE OPERATION FUNCTION
  309. * AudDrv_btcvsd_ioctl
  310. *
  311. * DESCRIPTION
  312. * IOCTL Msg handle
  313. *
  314. *****************************************************************************
  315. */
  316. static long AudDrv_btcvsd_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
  317. {
  318. int ret = 0;
  319. pr_debug("AudDrv_btcvsd_ioctl cmd = 0x%x arg = %lu\n", cmd, arg);
  320. switch (cmd) {
  321. case ALLOCATE_FREE_BTCVSD_BUF:{
  322. /* 0: allocate TX bufs*/
  323. /* 1: free TX buf*/
  324. /* 2: allocate RX buf*/
  325. /* 3: free TX buf*/
  326. if (arg == 0)
  327. ret = AudDrv_btcvsd_Allocate_Buffer(fp, 0);
  328. else if (arg == 1)
  329. ret = AudDrv_btcvsd_Free_Buffer(fp, 0);
  330. else if (arg == 2)
  331. ret = AudDrv_btcvsd_Allocate_Buffer(fp, 1);
  332. else if (arg == 3)
  333. ret = AudDrv_btcvsd_Free_Buffer(fp, 1);
  334. break;
  335. }
  336. case SET_BTCVSD_STATE:{
  337. pr_debug("AudDrv SET_BTCVSD_STATE\n");
  338. if (arg == BT_SCO_TXSTATE_DIRECT_LOOPBACK) {
  339. btsco.uTXState = arg;
  340. btsco.uRXState = arg;
  341. } else if ((arg & 0x10) == 0) { /*TX state*/
  342. btsco.uTXState = arg;
  343. pr_debug("SET_BTCVSD_STATE set btsco.uTXState to 0x%lu\n", arg);
  344. } else { /*RX state*/
  345. btsco.uRXState = arg;
  346. pr_debug("SET_BTCVSD_STATE set btsco.uRXState to %lu\n", arg);
  347. }
  348. if (btsco.uTXState == BT_SCO_TXSTATE_IDLE
  349. && btsco.uRXState == BT_SCO_RXSTATE_IDLE) {
  350. pr_debug("SET_BTCVSD_STATE disable BT IRQ disableBTirq = %d\n",
  351. disableBTirq);
  352. if (disableBTirq == 0) {
  353. disable_irq(btcvsd_irq_number);
  354. Disable_CVSD_Wakeup();
  355. disableBTirq = 1;
  356. }
  357. } else {
  358. if (disableBTirq == 1) {
  359. pr_debug
  360. ("SET_BTCVSD_STATE enable BT IRQ disableBTirq = %d\n",
  361. disableBTirq);
  362. enable_irq(btcvsd_irq_number);
  363. Enable_CVSD_Wakeup();
  364. disableBTirq = 0;
  365. }
  366. }
  367. break;
  368. }
  369. case GET_BTCVSD_STATE:{
  370. break;
  371. }
  372. default:{
  373. pr_debug("AudDrv_btcvsd_ioctl Fail command: %x\n", cmd);
  374. ret = -1;
  375. break;
  376. }
  377. }
  378. return ret;
  379. }
  380. #ifdef CONFIG_COMPAT
  381. static long AudDrv_btcvsd_compat_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
  382. {
  383. long ret;
  384. pr_debug("AudDrv_btcvsd_compat_ioctl cmd = 0x%x arg = %lu\n", cmd, arg);
  385. if (!fp->f_op || !fp->f_op->unlocked_ioctl)
  386. return -ENOTTY;
  387. ret = fp->f_op->unlocked_ioctl(fp, cmd, arg);
  388. if (ret < 0)
  389. pr_debug("AudDrv_btcvsd_compat_ioctl Fail\n");
  390. else
  391. pr_debug("-AudDrv_btcvsd_compat_ioctl\n");
  392. return ret;
  393. }
  394. #endif
  395. /*=============================================================================================
  396. BT SCO Internal Function
  397. =============================================================================================*/
  398. static void AudDrv_BTCVSD_DataTransfer(BT_SCO_DIRECT uDir, kal_uint8 *pSrc,
  399. kal_uint8 *pDst, kal_uint32 uBlockSize,
  400. kal_uint32 uBlockNum, CVSD_STATE uState)
  401. {
  402. kal_int32 i, j;
  403. if (uBlockSize == 60 || uBlockSize == 120 || uBlockSize == 20) {
  404. kal_uint32 *pSrc32 = (kal_uint32 *) pSrc;
  405. kal_uint32 *pDst32 = (kal_uint32 *) pDst;
  406. for (i = 0; i < (uBlockSize * uBlockNum / 4); i++)
  407. *pDst32++ = *pSrc32++;
  408. } else {
  409. kal_uint16 *pSrc16 = (kal_uint16 *) pSrc;
  410. kal_uint16 *pDst16 = (kal_uint16 *) pDst;
  411. for (j = 0; j < uBlockNum; j++) {
  412. for (i = 0; i < (uBlockSize / 2); i++)
  413. *pDst16++ = *pSrc16++;
  414. if (uDir == BT_SCO_DIRECT_BT2ARM)
  415. pSrc16++;
  416. else
  417. pDst16++;
  418. }
  419. }
  420. }
  421. static void AudDrv_BTCVSD_ReadFromBT(kal_uint8 uLen,
  422. kal_uint32 uPacketLength, kal_uint32 uPacketNumber,
  423. kal_uint32 uBlockSize, kal_uint32 uControl)
  424. {
  425. kal_int32 i;
  426. kal_uint16 pv;
  427. kal_uint8 *pSrc;
  428. kal_uint8 *pPacketBuf;
  429. unsigned long flags;
  430. unsigned long connsys_addr_rx, ap_addr_rx;
  431. PRINTK_AUDDRV("AudDrv_BTCVSD_ReadFromBT(+) btsco.pRX->iPacket_w=%d\n",
  432. btsco.pRX->iPacket_w);
  433. connsys_addr_rx = *bt_hw_REG_PACKET_R;
  434. ap_addr_rx = (unsigned long)BTSYS_SRAM_BANK2_BASE_ADDRESS + (connsys_addr_rx & 0xFFFF);
  435. PRINTK_AUDDRV("AudDrv_BTCVSD_ReadFromBT connsys_addr_rx=0x%lx,ap_addr_rx=0x%lx\n",
  436. connsys_addr_rx, ap_addr_rx);
  437. pSrc = (kal_uint8 *) ap_addr_rx;
  438. PRINTK_AUDDRV("AudDrv_BTCVSD_ReadFromBT()uPacketLength=%d,uPacketNumber=%d, btsco.uRXState=%d\n",
  439. uPacketLength, uPacketNumber, btsco.uRXState);
  440. AudDrv_BTCVSD_DataTransfer(BT_SCO_DIRECT_BT2ARM, pSrc, btsco.pRX->TempPacketBuf,
  441. uPacketLength, uPacketNumber, btsco.uRXState);
  442. PRINTK_AUDDRV("AudDrv_BTCVSD_ReadFromBT()AudDrv_BTCVSD_DataTransfer DONE!!!,uControl=0x%x,uLen=%d\n",
  443. uControl, uLen);
  444. spin_lock_irqsave(&auddrv_BTCVSDRX_lock, flags);
  445. for (i = 0; i < uBlockSize; i++) {
  446. #ifdef TEST_PACKETLOSS
  447. packet_cnt++;
  448. if (packet_cnt == 30) {
  449. pr_debug("AudDrv_BTCVSD_ReadFromBT()Test Packet Loss\n");
  450. memset((void *)uSilencePattern, 0x55, SCO_RX_PLC_SIZE);
  451. memcpy(btsco.pRX->PacketBuf[btsco.pRX->iPacket_w & SCO_RX_PACKET_MASK],
  452. (void *)&uSilencePattern, SCO_RX_PLC_SIZE);
  453. pv = 0;
  454. packet_cnt = 0;
  455. } else {
  456. memcpy(btsco.pRX->PacketBuf[btsco.pRX->iPacket_w & SCO_RX_PACKET_MASK],
  457. btsco.pRX->TempPacketBuf + (SCO_RX_PLC_SIZE * i), SCO_RX_PLC_SIZE);
  458. if ((uControl & btsco_PacketValidMask[uLen][i]) ==
  459. btsco_PacketValidMask[uLen][i]) {
  460. pv = 1;
  461. } else {
  462. pv = 0;
  463. }
  464. }
  465. #else
  466. memcpy(btsco.pRX->PacketBuf[btsco.pRX->iPacket_w & SCO_RX_PACKET_MASK],
  467. btsco.pRX->TempPacketBuf + (SCO_RX_PLC_SIZE * i), SCO_RX_PLC_SIZE);
  468. BUG_ON(uLen >= BT_SCO_CVSD_MAX);
  469. if ((uControl & btsco_PacketValidMask[uLen][i]) == btsco_PacketValidMask[uLen][i])
  470. pv = 1;
  471. else
  472. pv = 0;
  473. #endif
  474. pPacketBuf = (kal_uint8 *) btsco.pRX->PacketBuf + (btsco.pRX->iPacket_w &
  475. SCO_RX_PACKET_MASK) *
  476. (SCO_RX_PLC_SIZE + BTSCO_CVSD_PACKET_VALID_SIZE) + SCO_RX_PLC_SIZE;
  477. memcpy((void *)pPacketBuf, (void *)&pv, BTSCO_CVSD_PACKET_VALID_SIZE);
  478. btsco.pRX->iPacket_w++;
  479. }
  480. spin_unlock_irqrestore(&auddrv_BTCVSDRX_lock, flags);
  481. PRINTK_AUDDRV("AudDrv_BTCVSD_ReadFromBT(-) btsco.pRX->iPacket_w=%d\n",
  482. btsco.pRX->iPacket_w);
  483. }
  484. static void AudDrv_BTCVSD_WriteToBT(BT_SCO_PACKET_LEN uLen,
  485. kal_uint32 uPacketLength, kal_uint32 uPacketNumber,
  486. kal_uint32 uBlockSize)
  487. {
  488. kal_int32 i;
  489. unsigned long flags;
  490. kal_uint8 *pDst;
  491. unsigned long connsys_addr_tx, ap_addr_tx;
  492. /*pr_debug("AudDrv_BTCVSD_WriteToBT(+) btsco.pTX->iPacket_r=%d\n",btsco.pTX->iPacket_r);*/
  493. spin_lock_irqsave(&auddrv_BTCVSDTX_lock, flags);
  494. if (btsco.pTX != NULL) {
  495. for (i = 0; i < uBlockSize; i++) {
  496. memcpy((void *)(btsco.pTX->TempPacketBuf + (SCO_TX_ENCODE_SIZE * i)),
  497. (void *)(btsco.
  498. pTX->PacketBuf[btsco.pTX->iPacket_r & SCO_TX_PACKET_MASK]),
  499. SCO_TX_ENCODE_SIZE);
  500. btsco.pTX->iPacket_r++;
  501. }
  502. }
  503. spin_unlock_irqrestore(&auddrv_BTCVSDTX_lock, flags);
  504. connsys_addr_tx = *bt_hw_REG_PACKET_W;
  505. ap_addr_tx = (unsigned long)BTSYS_SRAM_BANK2_BASE_ADDRESS + (connsys_addr_tx & 0xFFFF);
  506. PRINTK_AUDDRV("AudDrv_BTCVSD_WriteToBT connsys_addr_tx=0x%lx,ap_addr_tx=0x%lx\n",
  507. connsys_addr_tx, ap_addr_tx);
  508. pDst = (kal_uint8 *) ap_addr_tx;
  509. if (btsco.pTX != NULL) {
  510. AudDrv_BTCVSD_DataTransfer(BT_SCO_DIRECT_ARM2BT, btsco.pTX->TempPacketBuf, pDst,
  511. uPacketLength, uPacketNumber, btsco.uTXState);
  512. }
  513. /*pr_debug("AudDrv_BTCVSD_WriteToBT(-),btsco.pTX->iPacket_r=%d\n",btsco.pTX->iPacket_r);*/
  514. }
  515. static int AudDrv_BTCVSD_IRQ_handler(void)
  516. {
  517. kal_uint32 uPacketNumber, uPacketLength, uBufferCount_TX,
  518. uBufferCount_RX, uControl;
  519. kal_uint8 uPacketType;
  520. PRINTK_AUDDRV("AudDrv_BTCVSD_IRQ_handler FILL PACKETBUF\n");
  521. if ((btsco.uRXState != BT_SCO_RXSTATE_RUNNING && btsco.uRXState != BT_SCO_RXSTATE_ENDING)
  522. && (btsco.uTXState != BT_SCO_TXSTATE_RUNNING && btsco.uTXState != BT_SCO_TXSTATE_ENDING)
  523. && (btsco.uTXState != BT_SCO_TXSTATE_DIRECT_LOOPBACK)) {
  524. pr_debug
  525. ("AudDrv_BTCVSD_IRQ_handler in idle state: btsco.uRXState: %d, btsco.uTXState: %d\n",
  526. btsco.uRXState, btsco.uTXState);
  527. *bt_hw_REG_CONTROL &= ~BT_CVSD_CLEAR;
  528. goto AudDrv_BTCVSD_IRQ_handler_exit;
  529. }
  530. uControl = *bt_hw_REG_CONTROL;
  531. uPacketType = (uControl >> 18) & 0x7;
  532. PRINTK_AUDDRV("AudDrv_BTCVSD_IRQ_handler BT uControl =0x%x, BT uPacketType=%d\n",
  533. uControl, uPacketType);
  534. if (((uControl >> 31) & 1) == 0) {
  535. *bt_hw_REG_CONTROL &= ~BT_CVSD_CLEAR;
  536. goto AudDrv_BTCVSD_IRQ_handler_exit;
  537. }
  538. BUG_ON(uPacketType >= BT_SCO_CVSD_MAX);
  539. uPacketLength = (kal_uint32) btsco_PacketInfo[uPacketType][0];
  540. uPacketNumber = (kal_uint32) btsco_PacketInfo[uPacketType][1];
  541. uBufferCount_TX = (kal_uint32) btsco_PacketInfo[uPacketType][2];
  542. uBufferCount_RX = (kal_uint32) btsco_PacketInfo[uPacketType][3];
  543. PRINTK_AUDDRV("AudDrv_BTCVSD_IRQ_handler uPacketLength=%d, uPacketNumber=%d, uBufferCount_TX=%d,_RX=%d\n",
  544. uPacketLength, uPacketNumber, uBufferCount_TX, uBufferCount_RX);
  545. PRINTK_AUDDRV("btsco.uTXState=0x%x,btsco.uRXState=0x%x\n", btsco.uTXState, btsco.uRXState);
  546. if (btsco.pTX && btsco.uTXState == BT_SCO_TXSTATE_DIRECT_LOOPBACK) {
  547. kal_uint8 *pSrc, *pDst;
  548. unsigned long connsys_addr_rx, ap_addr_rx, connsys_addr_tx, ap_addr_tx;
  549. connsys_addr_rx = *bt_hw_REG_PACKET_R;
  550. ap_addr_rx = (unsigned long)BTSYS_SRAM_BANK2_BASE_ADDRESS +
  551. (connsys_addr_rx & 0xFFFF);
  552. PRINTK_AUDDRV("AudDrv_BTCVSD_ReadFromBT connsys_addr_rx=0x%lx,ap_addr_rx=0x%lx\n",
  553. connsys_addr_rx, ap_addr_rx);
  554. pSrc = (kal_uint8 *) ap_addr_rx;
  555. connsys_addr_tx = *bt_hw_REG_PACKET_W;
  556. ap_addr_tx = (unsigned long)BTSYS_SRAM_BANK2_BASE_ADDRESS +
  557. (connsys_addr_tx & 0xFFFF);
  558. PRINTK_AUDDRV("AudDrv_BTCVSD_WriteToBT connsys_addr_tx=0x%lx,ap_addr_tx=0x%lx\n",
  559. connsys_addr_tx, ap_addr_tx);
  560. pDst = (kal_uint8 *) ap_addr_tx;
  561. AudDrv_BTCVSD_DataTransfer(BT_SCO_DIRECT_BT2ARM, pSrc, btsco.pTX->TempPacketBuf,
  562. uPacketLength, uPacketNumber, BT_SCO_RXSTATE_RUNNING);
  563. AudDrv_BTCVSD_DataTransfer(BT_SCO_DIRECT_ARM2BT, btsco.pTX->TempPacketBuf, pDst,
  564. uPacketLength, uPacketNumber, BT_SCO_TXSTATE_RUNNING);
  565. writeToBT_cnt++;
  566. readFromBT_cnt++;
  567. } else {
  568. if (btsco.pRX) {
  569. if (btsco.uRXState == BT_SCO_RXSTATE_RUNNING
  570. || btsco.uRXState == BT_SCO_RXSTATE_ENDING) {
  571. PRINTK_AUDDRV("AudDrv_BTCVSD_IRQ_handler Overflow=%d,Pck_w=%d,_r=%d,BufCnt=%d\n",
  572. btsco.pRX->fOverflow, btsco.pRX->iPacket_w,
  573. btsco.pRX->iPacket_r, uBufferCount_RX);
  574. if (btsco.pRX->fOverflow) {
  575. if (btsco.pRX->iPacket_w - btsco.pRX->iPacket_r <=
  576. SCO_RX_PACKER_BUF_NUM - 2 * uBufferCount_RX) {
  577. /*free space is larger then twice interrupt rx data size*/
  578. btsco.pRX->fOverflow = false; /* KAL_FALSE; */
  579. pr_debug("AudDrv_BTCVSD_IRQ_handler pRX->fOverflow FALSE!!!\n");
  580. }
  581. }
  582. if (!btsco.pRX->fOverflow
  583. && (btsco.pRX->iPacket_w - btsco.pRX->iPacket_r <=
  584. SCO_RX_PACKER_BUF_NUM - uBufferCount_RX)) {
  585. AudDrv_BTCVSD_ReadFromBT(uPacketType, uPacketLength,
  586. uPacketNumber, uBufferCount_RX,
  587. uControl);
  588. readFromBT_cnt++;
  589. } else {
  590. btsco.pRX->fOverflow = true; /* KAL_TRUE; */
  591. pr_debug
  592. ("AudDrv_BTCVSD_IRQ_handler pRX->fOverflow TRUE!!!\n");
  593. }
  594. }
  595. }
  596. if (btsco.pTX) {
  597. if (btsco.uTXState == BT_SCO_TXSTATE_RUNNING
  598. || btsco.uTXState == BT_SCO_TXSTATE_ENDING) {
  599. PRINTK_AUDDRV("AudDrv_BTCVSD_IRQ_handler TX->Underflow=%d,Pck_w=%d,_r=%d,BufCnt=%d\n",
  600. btsco.pTX->fUnderflow, btsco.pTX->iPacket_w,
  601. btsco.pTX->iPacket_r, uBufferCount_TX);
  602. if (btsco.pTX->fUnderflow) {
  603. /*prepared data is larger then twice interrupt tx data size*/
  604. if (btsco.pTX->iPacket_w - btsco.pTX->iPacket_r >=
  605. 2 * uBufferCount_TX) {
  606. btsco.pTX->fUnderflow = false; /* KAL_FALSE; */
  607. pr_debug
  608. ("AudDrv_BTCVSD_IRQ_handler pTX->fUnderflow FALSE!!!\n");
  609. }
  610. }
  611. if ((!btsco.pTX->fUnderflow
  612. && (btsco.pTX->iPacket_w - btsco.pTX->iPacket_r >=
  613. uBufferCount_TX))
  614. || btsco.uTXState == BT_SCO_TXSTATE_ENDING) {
  615. AudDrv_BTCVSD_WriteToBT(uPacketType, uPacketLength,
  616. uPacketNumber, uBufferCount_TX);
  617. writeToBT_cnt++;
  618. } else {
  619. btsco.pTX->fUnderflow = true; /* KAL_TRUE; */
  620. pr_debug
  621. ("AudDrv_BTCVSD_IRQ_handler pTX->fUnderflow TRUE!!!\n");
  622. }
  623. }
  624. }
  625. }
  626. PRINTK_AUDDRV("writeToBT_cnt=%d, readFromBT_cnt=%d\n", writeToBT_cnt, readFromBT_cnt);
  627. *bt_hw_REG_CONTROL &= ~BT_CVSD_CLEAR;
  628. BTCVSD_read_wait_queue_flag = 1;
  629. wake_up_interruptible(&BTCVSD_Read_Wait_Queue);
  630. BTCVSD_write_wait_queue_flag = 1;
  631. wake_up_interruptible(&BTCVSD_Write_Wait_Queue);
  632. AudDrv_BTCVSD_IRQ_handler_exit:
  633. return IRQ_HANDLED;
  634. }
  635. static int AudDrv_btcvsd_probe(struct platform_device *dev)
  636. {
  637. int ret = 0;
  638. pr_debug("AudDrv_btcvsd_probe\n");
  639. dev->dev.coherent_dma_mask = DMA_BIT_MASK(64);
  640. if (!dev->dev.dma_mask)
  641. dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
  642. mDev = &dev->dev;
  643. #ifdef CONFIG_OF
  644. Auddrv_BTCVSD_Irq_Map();
  645. #endif
  646. ret =
  647. request_irq(btcvsd_irq_number, (irq_handler_t) AudDrv_BTCVSD_IRQ_handler,
  648. IRQF_TRIGGER_LOW /*IRQF_TRIGGER_FALLING */ , "BTCVSD_ISR_Handle", dev);
  649. if (ret < 0) {
  650. pr_debug("AudDrv_btcvsd_probe request_irq btcvsd_irq_number(%d) Fail\n",
  651. btcvsd_irq_number);
  652. }
  653. /* inremap to INFRA sys */
  654. #ifdef CONFIG_OF
  655. Auddrv_BTCVSD_Address_Map();
  656. INFRA_MISC_ADDRESS = (volatile kal_uint32 *)(infra_base + infra_misc_offset);
  657. #else
  658. AUDIO_INFRA_BASE_VIRTUAL = ioremap_nocache(AUDIO_INFRA_BASE_PHYSICAL, 0x1000);
  659. INFRA_MISC_ADDRESS = (volatile kal_uint32 *)(AUDIO_INFRA_BASE_VIRTUAL + INFRA_MISC_OFFSET);
  660. #endif
  661. pr_debug("[BTCVSD probe] INFRA_MISC_ADDRESS = %p\n", INFRA_MISC_ADDRESS);
  662. pr_debug("AudDrv_btcvsd_probe disable BT IRQ disableBTirq = %d\n", disableBTirq);
  663. if (disableBTirq == 0) {
  664. disable_irq(btcvsd_irq_number);
  665. Disable_CVSD_Wakeup();
  666. disableBTirq = 1;
  667. }
  668. /* init */
  669. memset((void *)&BT_CVSD_Mem, 0, sizeof(CVSD_MEMBLOCK_T));
  670. memset((void *)&btsco, 0, sizeof(btsco));
  671. btsco.uTXState = BT_SCO_TXSTATE_IDLE;
  672. btsco.uRXState = BT_SCO_RXSTATE_IDLE;
  673. /* ioremap to BT HW register base address */
  674. #ifdef CONFIG_OF
  675. BTSYS_PKV_BASE_ADDRESS = (void *)btsys_pkv_physical_base;
  676. BTSYS_SRAM_BANK2_BASE_ADDRESS = (void *)btsys_sram_bank2_physical_base;
  677. bt_hw_REG_PACKET_R = BTSYS_PKV_BASE_ADDRESS + cvsd_mcu_read_offset;
  678. bt_hw_REG_PACKET_W = BTSYS_PKV_BASE_ADDRESS + cvsd_mcu_write_offset;
  679. bt_hw_REG_CONTROL = BTSYS_PKV_BASE_ADDRESS + cvsd_packet_indicator;
  680. #else
  681. BTSYS_PKV_BASE_ADDRESS = ioremap_nocache(AUDIO_BTSYS_PKV_PHYSICAL_BASE, 0x10000);
  682. BTSYS_SRAM_BANK2_BASE_ADDRESS =
  683. ioremap_nocache(AUDIO_BTSYS_SRAM_BANK2_PHYSICAL_BASE, 0x10000);
  684. bt_hw_REG_PACKET_R = (volatile kal_uint32 *)(BTSYS_PKV_BASE_ADDRESS + CVSD_MCU_READ_OFFSET);
  685. bt_hw_REG_PACKET_W = (volatile kal_uint32 *)(BTSYS_PKV_BASE_ADDRESS +
  686. CVSD_MCU_WRITE_OFFSET);
  687. bt_hw_REG_CONTROL = (volatile kal_uint32 *)(BTSYS_PKV_BASE_ADDRESS + CVSD_PACKET_INDICATOR);
  688. #endif
  689. pr_debug("[BTCVSD probe] BTSYS_PKV_BASE_ADDRESS = %p BTSYS_SRAM_BANK2_BASE_ADDRESS = %p\n",
  690. BTSYS_PKV_BASE_ADDRESS, BTSYS_SRAM_BANK2_BASE_ADDRESS);
  691. pr_debug("-AudDrv_btcvsd_probe\n");
  692. return 0;
  693. }
  694. static int AudDrv_btcvsd_open(struct inode *inode, struct file *fp)
  695. {
  696. PRINTK_AUDDRV(ANDROID_LOG_INFO, "Sound",
  697. "AudDrv_btcvsd_open do nothing inode:%p, file:%pss\n", inode, fp);
  698. return 0;
  699. }
  700. static ssize_t AudDrv_btcvsd_write(struct file *fp, const char __user *data,
  701. size_t count, loff_t *offset)
  702. {
  703. int written_size = count, ret = 0, copy_size = 0, BTSCOTX_WriteIdx;
  704. unsigned long flags;
  705. char *data_w_ptr = (char *)data;
  706. kal_uint64 write_timeout_limit;
  707. if ((btsco.pTX == NULL) || (btsco.pTX->PacketBuf == NULL)
  708. || (btsco.pTX->u4BufferSize == 0)) {
  709. pr_err("AudDrv_btcvsd_write btsco.pTX||btsco.pTX->PacketBuf==NULL||pTX->u4BufferSize==0!!!\n");
  710. msleep(60);
  711. return written_size;
  712. }
  713. /*ns*/
  714. write_timeout_limit =
  715. ((kal_uint64) SCO_TX_PACKER_BUF_NUM * SCO_TX_ENCODE_SIZE * 16 * 1000000000) / 2 / 2 / 64000;
  716. while (count) {
  717. /*pr_debug("AudDrv_btcvsd_write btsco.pTX->iPacket_w=%d, btsco.pTX->iPacket_r=%d\n",
  718. btsco.pTX->iPacket_w, btsco.pTX->iPacket_r);*/
  719. spin_lock_irqsave(&auddrv_BTCVSDTX_lock, flags);
  720. /* free space of TX packet buffer */
  721. copy_size = btsco.pTX->u4BufferSize - (btsco.pTX->iPacket_w - btsco.pTX->iPacket_r)
  722. * SCO_TX_ENCODE_SIZE;
  723. spin_unlock_irqrestore(&auddrv_BTCVSDTX_lock, flags);
  724. if (count <= (kal_uint32) copy_size)
  725. copy_size = count;
  726. /*pr_debug("AudDrv_btcvsd_write count=%d, copy_size=%d\n",count, copy_size);*/
  727. /*copysize must be multiple of SCO_TX_ENCODE_SIZE*/
  728. BUG_ON(!(copy_size % SCO_TX_ENCODE_SIZE == 0));
  729. if (copy_size != 0) {
  730. spin_lock_irqsave(&auddrv_BTCVSDTX_lock, flags);
  731. BTSCOTX_WriteIdx = (btsco.pTX->iPacket_w & SCO_TX_PACKET_MASK) *
  732. SCO_TX_ENCODE_SIZE;
  733. spin_unlock_irqrestore(&auddrv_BTCVSDTX_lock, flags);
  734. if (BTSCOTX_WriteIdx + copy_size < btsco.pTX->u4BufferSize) { /* copy once */
  735. if (!access_ok(VERIFY_READ, data_w_ptr, copy_size)) {
  736. pr_debug
  737. ("AudDrv_btcvsd_write 0ptr invalid data_w_ptr=%lx, size=%d\n",
  738. (unsigned long)data_w_ptr, copy_size);
  739. pr_debug
  740. ("AudDrv_btcvsd_write u4BufferSize=%d, BTSCOTX_WriteIdx=%d\n",
  741. btsco.pTX->u4BufferSize, BTSCOTX_WriteIdx);
  742. } else {
  743. /*PRINTK_AUDDRV("mcmcpy btsco.pTX->PacketBuf+BTSCOTX_WriteIdx= %x,
  744. data_w_ptr = %p, copy_size = %x\n", btsco.pTX->PacketBuf+BTSCOTX_WriteIdx,
  745. data_w_ptr,copy_size);*/
  746. if (copy_from_user
  747. ((void *)((kal_uint8 *) btsco.pTX->PacketBuf +
  748. BTSCOTX_WriteIdx),
  749. (const void __user *)data_w_ptr, copy_size)) {
  750. pr_debug
  751. ("AudDrv_btcvsd_write Fail copy_from_user\n");
  752. return -1;
  753. }
  754. }
  755. spin_lock_irqsave(&auddrv_BTCVSDTX_lock, flags);
  756. btsco.pTX->iPacket_w += copy_size / SCO_TX_ENCODE_SIZE;
  757. spin_unlock_irqrestore(&auddrv_BTCVSDTX_lock, flags);
  758. data_w_ptr += copy_size;
  759. count -= copy_size;
  760. /*pr_debug("AudDrv_btcvsd_write finish1, copy_size:%d, pTX->iPacket_w:%d,
  761. pTX->iPacket_r=%d, count=%d \r\n", copy_size,btsco.pTX->iPacket_w,
  762. btsco.pTX->iPacket_r,count);*/
  763. } else { /* copy twice */
  764. kal_int32 size_1 = 0, size_2 = 0;
  765. size_1 = btsco.pTX->u4BufferSize - BTSCOTX_WriteIdx;
  766. size_2 = copy_size - size_1;
  767. /*pr_debug("AudDrv_btcvsd_write size_1=%d, size_2=%d\n",size_1,size_2);*/
  768. BUG_ON(!(size_1 % SCO_TX_ENCODE_SIZE == 0));
  769. BUG_ON(!(size_2 % SCO_TX_ENCODE_SIZE == 0));
  770. if (!access_ok(VERIFY_READ, data_w_ptr, size_1)) {
  771. pr_debug
  772. ("AudDrv_btcvsd_write 1ptr invalid data_w_ptr=%lx, size_1=%d\n",
  773. (unsigned long)data_w_ptr, size_1);
  774. pr_debug
  775. ("AudDrv_btcvsd_write u4BufferSize=%d, BTSCOTX_WriteIdx=%d\n",
  776. btsco.pTX->u4BufferSize, BTSCOTX_WriteIdx);
  777. } else {
  778. /*PRINTK_AUDDRV("mcmcpy btsco.pTX->PacketBuf+BTSCOTX_WriteIdx= %x
  779. data_w_ptr = %p size_1 = %x\n", btsco.pTX->PacketBuf+BTSCOTX_WriteIdx,
  780. data_w_ptr,size_1);*/
  781. if ((copy_from_user
  782. ((void *)((kal_uint8 *) btsco.pTX->PacketBuf +
  783. BTSCOTX_WriteIdx),
  784. (const void __user *)data_w_ptr, size_1))) {
  785. pr_debug("AudDrv_write Fail 1 copy_from_user\n");
  786. return -1;
  787. }
  788. }
  789. spin_lock_irqsave(&auddrv_BTCVSDTX_lock, flags);
  790. btsco.pTX->iPacket_w += size_1 / SCO_TX_ENCODE_SIZE;
  791. spin_unlock_irqrestore(&auddrv_BTCVSDTX_lock, flags);
  792. if (!access_ok(VERIFY_READ, data_w_ptr + size_1, size_2)) {
  793. pr_debug
  794. ("AudDrv_btcvsd_write 2ptr invalid data_w_ptr=%lx, size_1=%d, size_2=%d\n",
  795. (unsigned long)data_w_ptr, size_1, size_2);
  796. pr_debug
  797. ("AudDrv_btcvsd_write u4BufferSize=%d, pTX->iPacket_w=%d\n",
  798. btsco.pTX->u4BufferSize, btsco.pTX->iPacket_w);
  799. } else {
  800. /*PRINTK_AUDDRV("mcmcpy btsco.pTX->PacketBuf+BTSCOTX_WriteIdx+size_1= %x,
  801. data_w_ptr+size_1 = %p, size_2 = %x\n"
  802. , btsco.pTX->PacketBuf+BTSCOTX_WriteIdx+size_1, data_w_ptr+size_1,size_2);*/
  803. if ((copy_from_user
  804. ((void *)((kal_uint8 *) btsco.pTX->PacketBuf),
  805. (const void __user *)(data_w_ptr + size_1),
  806. size_2))) {
  807. pr_debug
  808. ("AudDrv_btcvsd_write Fail 2 copy_from_user\n");
  809. return -1;
  810. }
  811. }
  812. spin_lock_irqsave(&auddrv_BTCVSDTX_lock, flags);
  813. btsco.pTX->iPacket_w += size_2 / SCO_TX_ENCODE_SIZE;
  814. spin_unlock_irqrestore(&auddrv_BTCVSDTX_lock, flags);
  815. count -= copy_size;
  816. data_w_ptr += copy_size;
  817. /*pr_debug("AudDrv_btcvsd_write finish2, copy size:%d, pTX->iPacket_w=%d,
  818. pTX->iPacket_r=%d, count:%d\r\n", copy_size,btsco.pTX->iPacket_w,
  819. btsco.pTX->iPacket_r,count );*/
  820. }
  821. }
  822. if (count != 0) {
  823. kal_uint64 t1, t2;
  824. /*pr_debug("AudDrv_btcvsd_write WAITING...btsco.pTX->iPacket_w=%d,
  825. count=%d\n",btsco.pTX->iPacket_w,count);*/
  826. t1 = sched_clock();
  827. BTCVSD_write_wait_queue_flag = 0;
  828. ret = wait_event_interruptible_timeout(BTCVSD_Write_Wait_Queue,
  829. BTCVSD_write_wait_queue_flag,
  830. nsecs_to_jiffies(write_timeout_limit));
  831. t2 = sched_clock();
  832. /*pr_debug("AudDrv_btcvsd_write WAKEUP...count=%d\n",count);*/
  833. t2 = t2 - t1; /* in ns (10^9) */
  834. if (t2 > write_timeout_limit) {
  835. pr_debug
  836. ("AudDrv_btcvsd_write timeout, [Warning](%llu)ns, write_timeout_limit(%llu)\n",
  837. t2, write_timeout_limit);
  838. return written_size;
  839. }
  840. }
  841. /* here need to wait for interrupt handler */
  842. }
  843. PRINTK_AUDDRV("AudDrv_btcvsd_write written_size = %d, write_timeout_limit=%llu\n",
  844. written_size, write_timeout_limit);
  845. return written_size;
  846. }
  847. static ssize_t AudDrv_btcvsd_read(struct file *fp, char __user *data,
  848. size_t count, loff_t *offset)
  849. {
  850. char *Read_Data_Ptr = (char *)data;
  851. ssize_t ret, read_size = 0, read_count = 0, BTSCORX_ReadIdx_tmp;
  852. unsigned long u4DataRemained;
  853. unsigned long flags;
  854. kal_uint64 read_timeout_limit;
  855. if ((btsco.pRX == NULL) || (btsco.pRX->PacketBuf == NULL)
  856. || (btsco.pRX->u4BufferSize == 0)) {
  857. pr_err("AudDrv_btcvsd_read btsco.pRX|| btsco.pRX->PacketBuf==NULL||pRX->u4BufferSize == 0!\n");
  858. msleep(60);
  859. return -1;
  860. }
  861. read_timeout_limit = ((kal_uint64) SCO_RX_PACKER_BUF_NUM * SCO_RX_PLC_SIZE * 16 *
  862. 1000000000) / 2 / 2 / 64000;
  863. while (count) {
  864. PRINTK_AUDDRV("AudDrv_btcvsd_read btsco.pRX->iPacket_w=%d,iPacket_r=%d,count=%zu\n",
  865. btsco.pRX->iPacket_w, btsco.pRX->iPacket_r, count);
  866. spin_lock_irqsave(&auddrv_BTCVSDRX_lock, flags);
  867. /* available data in RX packet buffer */
  868. u4DataRemained = (btsco.pRX->iPacket_w - btsco.pRX->iPacket_r)*
  869. (SCO_RX_PLC_SIZE+BTSCO_CVSD_PACKET_VALID_SIZE);
  870. if (count > u4DataRemained)
  871. read_size = u4DataRemained;
  872. else
  873. read_size = count;
  874. BTSCORX_ReadIdx_tmp = (btsco.pRX->iPacket_r & SCO_RX_PACKET_MASK) *
  875. (SCO_RX_PLC_SIZE + BTSCO_CVSD_PACKET_VALID_SIZE);
  876. spin_unlock_irqrestore(&auddrv_BTCVSDRX_lock, flags);
  877. BUG_ON(!(read_size % (SCO_RX_PLC_SIZE + BTSCO_CVSD_PACKET_VALID_SIZE) == 0));
  878. PRINTK_AUDDRV("AudDrv_btcvsd_read read_size=%zu, BTSCORX_ReadIdx_tmp=%zu\n",
  879. read_size, BTSCORX_ReadIdx_tmp);
  880. if (BTSCORX_ReadIdx_tmp + read_size < btsco.pRX->u4BufferSize) {
  881. /* copy once */
  882. PRINTK_AUDDRV("AudDrv_btcvsd_read 1 copy_to_user target=0x%p,source=0x%p,read_size=%zu\n",
  883. Read_Data_Ptr,
  884. ((unsigned char *)btsco.pRX->PacketBuf + BTSCORX_ReadIdx_tmp),
  885. read_size);
  886. if (copy_to_user((void __user *)Read_Data_Ptr,
  887. (void *)((kal_uint8 *) btsco.pRX->PacketBuf + BTSCORX_ReadIdx_tmp), read_size)) {
  888. pr_debug("AudDrv_btcvsd_read Fail 1 copy to user Ptr:%p,PcktBuf:%p,RIdx_tmp:%zu,r_sz:%zu",
  889. Read_Data_Ptr, (kal_uint8 *) btsco.pRX->PacketBuf, BTSCORX_ReadIdx_tmp, read_size);
  890. if (read_count == 0)
  891. return -1;
  892. else
  893. return read_count;
  894. }
  895. read_count += read_size;
  896. spin_lock_irqsave(&auddrv_BTCVSDRX_lock, flags);
  897. /* 2 byte is packetvalid info */
  898. btsco.pRX->iPacket_r += read_size / (SCO_RX_PLC_SIZE + BTSCO_CVSD_PACKET_VALID_SIZE);
  899. spin_unlock_irqrestore(&auddrv_BTCVSDRX_lock, flags);
  900. Read_Data_Ptr += read_size;
  901. count -= read_size;
  902. PRINTK_AUDDRV("AudDrv_btcvsd_read finish1, r_sz:%zu, iPacket_r:0x%x,iPacket_w:%x,count:%zu\r\n",
  903. read_size, btsco.pRX->iPacket_r, btsco.pRX->iPacket_w, count);
  904. }
  905. /* copy twice */
  906. else {
  907. unsigned long size_1 = btsco.pRX->u4BufferSize - BTSCORX_ReadIdx_tmp;
  908. unsigned long size_2 = read_size - size_1;
  909. PRINTK_AUDDRV("AudDrv_btcvsd_read 2-2 copy_to_user target=%p, source=0x%p, size_1=%zu\n",
  910. Read_Data_Ptr, ((unsigned char *)btsco.pRX->PacketBuf + BTSCORX_ReadIdx_tmp), size_1);
  911. if (copy_to_user
  912. ((void __user *)Read_Data_Ptr,
  913. (void *)((kal_uint8 *) btsco.pRX->PacketBuf + BTSCORX_ReadIdx_tmp),
  914. size_1)) {
  915. pr_debug("AudDrv_btcvsd_read Fail 2 copy to user R_Ptr:%p, PacketBuf:%p,RIdx_tmp:0x%zu, r_sz:%zu",
  916. Read_Data_Ptr, btsco.pRX->PacketBuf, BTSCORX_ReadIdx_tmp, read_size);
  917. if (read_count == 0)
  918. return -1;
  919. else
  920. return read_count;
  921. }
  922. read_count += size_1;
  923. spin_lock_irqsave(&auddrv_BTCVSDRX_lock, flags);
  924. /* 2 byte is packetvalid info */
  925. btsco.pRX->iPacket_r += size_1 / (SCO_RX_PLC_SIZE + BTSCO_CVSD_PACKET_VALID_SIZE);
  926. spin_unlock_irqrestore(&auddrv_BTCVSDRX_lock, flags);
  927. PRINTK_AUDDRV("AudDrv_btcvsd_read 2-2 copy_to_user target=0x%p, source=0x%p,size_2=%zu\n",
  928. (Read_Data_Ptr + size_1),
  929. ((unsigned char *)btsco.pRX->PacketBuf + BTSCORX_ReadIdx_tmp + size_1),
  930. size_2);
  931. if (copy_to_user
  932. ((void __user *)(Read_Data_Ptr + size_1),
  933. (void *)((kal_uint8 *) btsco.pRX->PacketBuf), size_2)) {
  934. if (read_count == 0)
  935. return -1;
  936. else
  937. return read_count;
  938. }
  939. read_count += size_2;
  940. spin_lock_irqsave(&auddrv_BTCVSDRX_lock, flags);
  941. /* 2 byte is packetvalid info */
  942. btsco.pRX->iPacket_r += size_2 / (SCO_RX_PLC_SIZE + BTSCO_CVSD_PACKET_VALID_SIZE);
  943. spin_unlock_irqrestore(&auddrv_BTCVSDRX_lock, flags);
  944. count -= read_size;
  945. Read_Data_Ptr += read_size;
  946. /*PRINTK_AUDDRV("AudDrv_btcvsd_read finish3, copy size_2:%zu, pRX->iPacket_r:0x%x,
  947. pRX->iPacket_w:0x%x u4DataRemained:%zu\r\n",
  948. size_2, btsco.pRX->iPacket_r, btsco.pRX->iPacket_w, u4DataRemained);*/
  949. }
  950. if (count != 0) {
  951. kal_uint64 t1, t2;
  952. PRINTK_AUDDRV("AudDrv_btcvsd_read WAITING... pRX->iPacket_r=0x%x, count=%zu\n",
  953. btsco.pRX->iPacket_r, count);
  954. t1 = sched_clock();
  955. BTCVSD_read_wait_queue_flag = 0;
  956. ret = wait_event_interruptible_timeout(BTCVSD_Read_Wait_Queue,
  957. BTCVSD_read_wait_queue_flag,
  958. nsecs_to_jiffies(read_timeout_limit));
  959. t2 = sched_clock();
  960. PRINTK_AUDDRV("AudDrv_btcvsd_read WAKEUP...count=%zu\n", count);
  961. t2 = t2 - t1; /* in ns (10^9) */
  962. if (t2 > read_timeout_limit) {
  963. pr_debug("AudDrv_btcvsd_read timeout, [Warning](%llu)ns, read_timeout_limit(%llu)\n",
  964. t2, read_timeout_limit);
  965. return read_count;
  966. }
  967. }
  968. }
  969. PRINTK_AUDDRV("AudDrv_btcvsd_read read_count = %zu,read_timeout_limit=%llu\n",
  970. read_count, read_timeout_limit);
  971. return read_count;
  972. }
  973. /**************************************************************************
  974. * STRUCT
  975. * File Operations and misc device
  976. *
  977. **************************************************************************/
  978. static const struct file_operations AudDrv_btcvsd_fops = {
  979. .owner = THIS_MODULE,
  980. .open = AudDrv_btcvsd_open,
  981. .unlocked_ioctl = AudDrv_btcvsd_ioctl,
  982. #ifdef CONFIG_COMPAT
  983. .compat_ioctl = AudDrv_btcvsd_compat_ioctl,
  984. #endif
  985. .write = AudDrv_btcvsd_write,
  986. .read = AudDrv_btcvsd_read,
  987. };
  988. static struct miscdevice AudDrv_btcvsd_device = {
  989. .minor = MISC_DYNAMIC_MINOR,
  990. .name = "ebc",
  991. .fops = &AudDrv_btcvsd_fops,
  992. };
  993. /***************************************************************************
  994. * FUNCTION
  995. * AudDrv_btcvsd_mod_init / AudDrv_btcvsd_mod_exit
  996. *
  997. * DESCRIPTION
  998. * Module init and de-init (only be called when system boot up)
  999. *
  1000. **************************************************************************/
  1001. #ifdef CONFIG_OF
  1002. static const struct of_device_id audio_bt_cvsd_of_ids[] = {
  1003. {.compatible = "mediatek,audio_bt_cvsd",},
  1004. {}
  1005. };
  1006. #endif
  1007. static struct platform_driver AudDrv_btcvsd = {
  1008. .probe = AudDrv_btcvsd_probe,
  1009. .driver = {
  1010. .name = auddrv_btcvsd_name,
  1011. .owner = THIS_MODULE,
  1012. #ifdef CONFIG_OF
  1013. .of_match_table = audio_bt_cvsd_of_ids,
  1014. #endif
  1015. },
  1016. };
  1017. #ifndef CONFIG_OF
  1018. static struct platform_device *mtk_btcvsd_dev;
  1019. #endif
  1020. static int AudDrv_btcvsd_mod_init(void)
  1021. {
  1022. int ret = 0;
  1023. pr_debug("+AudDrv_btcvsd_mod_init\n");
  1024. #ifndef CONFIG_OF
  1025. mtk_btcvsd_dev = platform_device_alloc(auddrv_btcvsd_name, -1);
  1026. if (!mtk_btcvsd_dev) {
  1027. pr_debug("-AudDrv_btcvsd_mod_init, platform_device_alloc() fail, return\n");
  1028. return -ENOMEM;
  1029. }
  1030. ret = platform_device_add(mtk_btcvsd_dev);
  1031. if (ret != 0) {
  1032. pr_debug("-AudDrv_btcvsd_mod_init, platform_device_add() fail, return\n");
  1033. platform_device_put(mtk_btcvsd_dev);
  1034. return ret;
  1035. }
  1036. #endif
  1037. /* Register platform DRIVER */
  1038. ret = platform_driver_register(&AudDrv_btcvsd);
  1039. if (ret) {
  1040. pr_debug("AudDrv Fail:%d - Register DRIVER\n", ret);
  1041. return ret;
  1042. }
  1043. /* register MISC device */
  1044. if (ret == misc_register(&AudDrv_btcvsd_device)) {
  1045. pr_debug("AudDrv_btcvsd_mod_init misc_register Fail:%d\n", ret);
  1046. return ret;
  1047. }
  1048. pr_debug("-AudDrv_btcvsd_mod_init\n");
  1049. return 0;
  1050. }
  1051. static void AudDrv_btcvsd_mod_exit(void)
  1052. {
  1053. PRINTK_AUDDRV("+AudDrv_btcvsd_mod_exit\n");
  1054. /*
  1055. remove_proc_entry("audio", NULL);
  1056. platform_driver_unregister(&AudDrv_btcvsd);
  1057. */
  1058. PRINTK_AUDDRV("-AudDrv_btcvsd_mod_exit\n");
  1059. }
  1060. MODULE_LICENSE("GPL");
  1061. MODULE_DESCRIPTION(AUDDRV_BTCVSD_NAME);
  1062. MODULE_AUTHOR(AUDDRV_AUTHOR);
  1063. module_init(AudDrv_btcvsd_mod_init);
  1064. module_exit(AudDrv_btcvsd_mod_exit);