mtk_btif.c 86 KB

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  1. /*-----------linux system header files----------------*/
  2. #include <linux/module.h>
  3. #include <linux/kernel.h>
  4. #include <linux/device.h>
  5. #include <linux/errno.h>
  6. #include <linux/platform_device.h>
  7. #include <linux/fs.h>
  8. #include <linux/cdev.h>
  9. #include <linux/poll.h>
  10. /*#include <mach/eint.h>*/
  11. /*-----------driver own header files----------------*/
  12. #ifdef CONFIG_COMPAT
  13. #include <linux/compat.h>
  14. #endif
  15. #ifdef DFT_TAG
  16. #undef DFT_TAG
  17. #endif
  18. #define DFT_TAG "MTK-BTIF"
  19. #define BTIF_CDEV_SUPPORT 1
  20. #include "btif_pub.h"
  21. #include "btif_dma_pub.h"
  22. #include "mtk_btif_exp.h"
  23. #include "mtk_btif.h"
  24. /*-----------static function declearation----------------*/
  25. static int mtk_btif_probe(struct platform_device *pdev);
  26. static int mtk_btif_remove(struct platform_device *pdev);
  27. static int mtk_btif_suspend(struct platform_device *pdev, pm_message_t state);
  28. static int mtk_btif_resume(struct platform_device *pdev);
  29. static int mtk_btif_drv_resume(struct device *dev);
  30. static int mtk_btif_drv_suspend(struct device *pdev);
  31. static int mtk_btif_restore_noirq(struct device *device);
  32. static int btif_file_open(struct inode *pinode, struct file *pfile);
  33. static int btif_file_release(struct inode *pinode, struct file *pfile);
  34. static ssize_t btif_file_read(struct file *pfile,
  35. char __user *buf, size_t count, loff_t *f_ops);
  36. static unsigned int btif_poll(struct file *filp, poll_table *wait);
  37. static int _btif_irq_reg(P_MTK_BTIF_IRQ_STR p_irq,
  38. mtk_btif_irq_handler irq_handler, void *data);
  39. static int _btif_irq_free(P_MTK_BTIF_IRQ_STR p_irq, void *data);
  40. static int _btif_irq_ctrl(P_MTK_BTIF_IRQ_STR p_irq, bool en);
  41. static int _btif_irq_ctrl_sync(P_MTK_BTIF_IRQ_STR p_irq, bool en);
  42. static irqreturn_t btif_irq_handler(int irq, void *data);
  43. static unsigned int btif_pio_rx_data_receiver(P_MTK_BTIF_INFO_STR p_btif_info,
  44. unsigned char *p_buf,
  45. unsigned int buf_len);
  46. static irqreturn_t btif_tx_dma_irq_handler(int irq, void *data);
  47. static irqreturn_t btif_rx_dma_irq_handler(int irq, void *data);
  48. static unsigned int btif_dma_rx_data_receiver(P_MTK_DMA_INFO_STR p_dma_info,
  49. unsigned char *p_buf,
  50. unsigned int buf_len);
  51. static int _btif_controller_tx_setup(p_mtk_btif p_btif);
  52. static int _btif_controller_tx_free(p_mtk_btif p_btif);
  53. static int _btif_controller_rx_setup(p_mtk_btif p_btif);
  54. static int _btif_controller_rx_free(p_mtk_btif p_btif);
  55. static int _btif_tx_pio_setup(p_mtk_btif p_btif);
  56. static int _btif_rx_pio_setup(p_mtk_btif p_btif);
  57. static int _btif_rx_dma_setup(p_mtk_btif p_btif);
  58. static int _btif_rx_dma_free(p_mtk_btif p_btif);
  59. static int _btif_tx_dma_setup(p_mtk_btif p_btif);
  60. static int _btif_tx_dma_free(p_mtk_btif p_btif);
  61. static int _btif_controller_setup(p_mtk_btif p_btif);
  62. static int _btif_controller_free(p_mtk_btif p_btif);
  63. static int _btif_pio_write(p_mtk_btif p_btif,
  64. const unsigned char *p_buf, unsigned int buf_len);
  65. static int _btif_dma_write(p_mtk_btif p_btif,
  66. const unsigned char *p_buf, unsigned int buf_len);
  67. static unsigned int btif_bbs_wr_direct(p_btif_buf_str p_bbs,
  68. unsigned char *p_buf, unsigned int buf_len);
  69. static unsigned int btif_bbs_read(p_btif_buf_str p_bbs,
  70. unsigned char *p_buf, unsigned int buf_len);
  71. static unsigned int btif_bbs_write(p_btif_buf_str p_bbs,
  72. unsigned char *p_buf, unsigned int buf_len);
  73. static void btif_dump_bbs_str(unsigned char *p_str, p_btif_buf_str p_bbs);
  74. static int _btif_dump_memory(char *str, unsigned char *p_buf, unsigned int buf_len);
  75. static int _btif_rx_btm_deinit(p_mtk_btif p_btif);
  76. static int _btif_rx_btm_sched(p_mtk_btif p_btif);
  77. static int _btif_rx_btm_init(p_mtk_btif p_btif);
  78. static void btif_rx_tasklet(unsigned long func_data);
  79. static void btif_rx_worker(struct work_struct *p_work);
  80. static int btif_rx_thread(void *p_data);
  81. static int btif_rx_data_consummer(p_mtk_btif p_btif);
  82. static int _btif_tx_ctx_init(p_mtk_btif p_btif);
  83. static int _btif_tx_ctx_deinit(p_mtk_btif p_btif);
  84. static void btif_tx_worker(struct work_struct *p_work);
  85. static int _btif_state_deinit(p_mtk_btif p_btif);
  86. static int _btif_state_release(p_mtk_btif p_btif);
  87. static ENUM_BTIF_STATE _btif_state_get(p_mtk_btif p_btif);
  88. static int _btif_state_set(p_mtk_btif p_btif, ENUM_BTIF_STATE state);
  89. static int _btif_state_hold(p_mtk_btif p_btif);
  90. static int _btif_state_init(p_mtk_btif p_btif);
  91. static int _btif_dpidle_notify_ctrl(p_mtk_btif p_btif,
  92. ENUM_BTIF_DPIDLE_CTRL en_flag);
  93. static int _btif_enter_dpidle(p_mtk_btif p_btif);
  94. static int _btif_exit_dpidle(p_mtk_btif p_btif);
  95. static int _btif_exit_dpidle_from_sus(p_mtk_btif p_btif);
  96. static int _btif_exit_dpidle_from_dpidle(p_mtk_btif p_btif);
  97. static int _btif_enter_dpidle_from_on(p_mtk_btif p_btif);
  98. static int _btif_enter_dpidle_from_sus(p_mtk_btif p_btif);
  99. static int _btif_vfifo_deinit(p_mtk_btif_dma p_dma);
  100. static int _btif_vfifo_init(p_mtk_btif_dma p_dma);
  101. static bool _btif_is_tx_complete(p_mtk_btif p_btif);
  102. static int _btif_init(p_mtk_btif p_btif);
  103. static int _btif_lpbk_ctrl(p_mtk_btif p_btif, bool flag);
  104. static int btif_rx_dma_mode_set(int en);
  105. static int btif_tx_dma_mode_set(int en);
  106. static int _btif_send_data(p_mtk_btif p_btif,
  107. const unsigned char *p_buf, unsigned int buf_len);
  108. /*-----------end of static function declearation----------------*/
  109. static const char *g_state[B_S_MAX] = {
  110. "OFF",
  111. "SUSPEND",
  112. "DPIDLE",
  113. "ON",
  114. };
  115. /*-----------BTIF setting--------------*/
  116. mtk_btif_setting g_btif_setting[BTIF_PORT_NR] = {
  117. {
  118. .tx_mode = BTIF_TX_MODE,
  119. .rx_mode = BTIF_RX_MODE,
  120. .rx_type = BTIF_RX_BTM_CTX,
  121. .tx_type = BTIF_TX_CTX,
  122. },
  123. };
  124. mtk_btif g_btif[BTIF_PORT_NR] = {
  125. {
  126. .open_counter = 0,
  127. .state = B_S_OFF,
  128. .setting = &g_btif_setting[0],
  129. .p_tx_dma = NULL,
  130. .p_rx_dma = NULL,
  131. .rx_cb = NULL,
  132. .p_btif_info = NULL,
  133. },
  134. };
  135. mtk_btif_dma g_dma[BTIF_PORT_NR][BTIF_DIR_MAX] = {
  136. {
  137. {
  138. .p_btif = NULL,
  139. .dir = BTIF_TX,
  140. .p_dma_info = NULL,
  141. .entry = ATOMIC_INIT(0),
  142. },
  143. {
  144. .p_btif = NULL,
  145. .dir = BTIF_RX,
  146. .p_dma_info = NULL,
  147. .entry = ATOMIC_INIT(0),
  148. },
  149. },
  150. };
  151. #define G_MAX_PKG_LEN (7 * 1024)
  152. static int g_max_pkg_len = G_MAX_PKG_LEN; /*DMA vFIFO is set to 8 * 1024, we set this to 7/8 * vFIFO size*/
  153. static int g_max_pding_data_size = BTIF_RX_BUFFER_SIZE * 3 / 4;
  154. static int mtk_btif_dbg_lvl = BTIF_LOG_INFO;
  155. #if BTIF_RXD_BE_BLOCKED_DETECT
  156. static struct timeval btif_rxd_time_stamp[MAX_BTIF_RXD_TIME_REC];
  157. #endif
  158. /*-----------Platform bus related structures----------------*/
  159. #define DRV_NAME "mtk_btif"
  160. #ifdef CONFIG_OF
  161. const struct of_device_id apbtif_of_ids[] = {
  162. { .compatible = "mediatek,btif", },
  163. {}
  164. };
  165. #endif
  166. const struct dev_pm_ops mtk_btif_drv_pm_ops = {
  167. .restore_noirq = mtk_btif_restore_noirq,
  168. .suspend = mtk_btif_drv_suspend,
  169. .resume = mtk_btif_drv_resume,
  170. };
  171. struct platform_driver mtk_btif_dev_drv = {
  172. .probe = mtk_btif_probe,
  173. .remove = mtk_btif_remove,
  174. #ifdef CONFIG_PM
  175. .suspend = mtk_btif_suspend,
  176. .resume = mtk_btif_resume,
  177. #endif
  178. .driver = {
  179. .name = DRV_NAME,
  180. .owner = THIS_MODULE,
  181. #ifdef CONFIG_PM
  182. .pm = &mtk_btif_drv_pm_ops,
  183. #endif
  184. #ifdef CONFIG_OF
  185. .of_match_table = apbtif_of_ids,
  186. #endif
  187. }
  188. };
  189. #define BTIF_STATE_RELEASE(x) _btif_state_release(x)
  190. /*-----------End of Platform bus related structures----------------*/
  191. /*-----------platform bus related operation APIs----------------*/
  192. static int mtk_btif_probe(struct platform_device *pdev)
  193. {
  194. /*Chaozhong: ToDo: to be implement*/
  195. /*register IRQ for BTIF and Tx Rx DMA and disable them by default*/
  196. BTIF_INFO_FUNC("DO BTIF PROBE\n");
  197. platform_set_drvdata(pdev, &g_btif[0]);
  198. g_btif[0].private_data = (struct device *)&pdev->dev;
  199. #if !defined(CONFIG_MTK_CLKMGR)
  200. hal_btif_clk_get_and_prepare(pdev);
  201. #endif
  202. return 0;
  203. }
  204. static int mtk_btif_remove(struct platform_device *pdev)
  205. {
  206. /*Chaozhong: ToDo: to be implement*/
  207. BTIF_INFO_FUNC("DO BTIF REMOVE\n");
  208. platform_set_drvdata(pdev, NULL);
  209. g_btif[0].private_data = NULL;
  210. return 0;
  211. }
  212. int _btif_suspend(p_mtk_btif p_btif)
  213. {
  214. int i_ret;
  215. if (_btif_state_hold(p_btif))
  216. return E_BTIF_INTR;
  217. if (NULL != p_btif) {
  218. if (!(p_btif->enable))
  219. i_ret = 0;
  220. else {
  221. if (B_S_ON == _btif_state_get(p_btif)) {
  222. BTIF_ERR_FUNC("BTIF in ON state,",
  223. "there are data need to be send or recev,suspend fail\n");
  224. i_ret = -1;
  225. } else {
  226. /*before disable BTIF controller and DMA controller
  227. we need to set BTIF to ON state*/
  228. i_ret = _btif_exit_dpidle(p_btif);
  229. if (0 == i_ret) {
  230. i_ret += _btif_controller_free(p_btif);
  231. i_ret = _btif_controller_tx_free(p_btif);
  232. i_ret += _btif_controller_rx_free(p_btif);
  233. }
  234. if (0 != i_ret) {
  235. BTIF_INFO_FUNC("failed\n");
  236. /*Chaozhong: what if failed*/
  237. } else {
  238. BTIF_INFO_FUNC("succeed\n");
  239. i_ret = _btif_state_set(p_btif, B_S_SUSPEND);
  240. if (i_ret && _btif_init(p_btif)) {
  241. /*Chaozhong:BTIF re-init failed? what to do*/
  242. i_ret = _btif_state_set(p_btif, B_S_OFF);
  243. }
  244. }
  245. }
  246. }
  247. } else
  248. i_ret = -1;
  249. BTIF_STATE_RELEASE(p_btif);
  250. return i_ret;
  251. }
  252. static int mtk_btif_drv_suspend(struct device *dev)
  253. {
  254. struct platform_device *pdev = to_platform_device(dev);
  255. pm_message_t state = PMSG_SUSPEND;
  256. return mtk_btif_suspend(pdev, state);
  257. }
  258. static int mtk_btif_drv_resume(struct device *dev)
  259. {
  260. struct platform_device *pdev = to_platform_device(dev);
  261. return mtk_btif_resume(pdev);
  262. }
  263. static int mtk_btif_suspend(struct platform_device *pdev, pm_message_t state)
  264. {
  265. int i_ret = 0;
  266. p_mtk_btif p_btif = NULL;
  267. /*Chaozhong: ToDo: to be implement*/
  268. BTIF_DBG_FUNC("++\n");
  269. p_btif = platform_get_drvdata(pdev);
  270. i_ret = _btif_suspend(p_btif);
  271. BTIF_DBG_FUNC("--, i_ret:%d\n", i_ret);
  272. return i_ret;
  273. }
  274. int _btif_restore_noirq(p_mtk_btif p_btif)
  275. {
  276. int i_ret = 0;
  277. /*BTIF IRQ restore no irq*/
  278. i_ret = hal_btif_pm_ops(p_btif->p_btif_info, BTIF_PM_RESTORE_NOIRQ);
  279. if (0 == i_ret) {
  280. BTIF_INFO_FUNC("BTIF HW IRQ restore succeed\n");
  281. } else {
  282. BTIF_INFO_FUNC("BTIF HW IRQ restore failed, i_ret:%d\n", i_ret);
  283. return i_ret;
  284. }
  285. /*BTIF DMA restore no irq*/
  286. if (p_btif->tx_mode & BTIF_MODE_DMA) {
  287. i_ret = hal_dma_pm_ops(p_btif->p_tx_dma->p_dma_info,
  288. BTIF_PM_RESTORE_NOIRQ);
  289. if (0 == i_ret) {
  290. BTIF_INFO_FUNC("BTIF Tx DMA IRQ restore succeed\n");
  291. } else {
  292. BTIF_INFO_FUNC
  293. ("BTIF Tx DMA IRQ restore failed, i_ret:%d\n",
  294. i_ret);
  295. return i_ret;
  296. }
  297. }
  298. if (p_btif->rx_mode & BTIF_MODE_DMA) {
  299. i_ret = hal_dma_pm_ops(p_btif->p_rx_dma->p_dma_info,
  300. BTIF_PM_RESTORE_NOIRQ);
  301. if (0 == i_ret) {
  302. BTIF_INFO_FUNC("BTIF Rx DMA IRQ restore succeed\n");
  303. } else {
  304. BTIF_INFO_FUNC
  305. ("BTIF Rx DMA IRQ restore failed, i_ret:%d\n",
  306. i_ret);
  307. return i_ret;
  308. }
  309. }
  310. return i_ret;
  311. }
  312. static int mtk_btif_restore_noirq(struct device *dev)
  313. {
  314. int i_ret = 0;
  315. struct platform_device *pdev = to_platform_device(dev);
  316. p_mtk_btif p_btif = platform_get_drvdata(pdev);
  317. BTIF_INFO_FUNC("++\n");
  318. if (_btif_state_hold(p_btif))
  319. return E_BTIF_INTR;
  320. if (p_btif->enable)
  321. BTIF_ERR_FUNC("!!!-----------------!BTIF is not closed before IPOH shutdown!!!---------------!\n");
  322. BUG_ON(p_btif->enable);
  323. i_ret = _btif_restore_noirq(p_btif);
  324. BTIF_STATE_RELEASE(p_btif);
  325. BTIF_INFO_FUNC("--\n");
  326. return 0;
  327. }
  328. int _btif_resume(p_mtk_btif p_btif)
  329. {
  330. int i_ret = 0;
  331. ENUM_BTIF_STATE state = B_S_MAX;
  332. if (_btif_state_hold(p_btif))
  333. return E_BTIF_INTR;
  334. if (NULL != p_btif) {
  335. state = _btif_state_get(p_btif);
  336. if (!(p_btif->enable))
  337. i_ret = 0;
  338. else if (state == B_S_SUSPEND)
  339. i_ret = _btif_enter_dpidle(p_btif);
  340. else
  341. BTIF_INFO_FUNC
  342. ("BTIF state: %s before resume, do nothing\n", g_state[state]);
  343. } else
  344. i_ret = -1;
  345. BTIF_STATE_RELEASE(p_btif);
  346. return i_ret;
  347. }
  348. static int mtk_btif_resume(struct platform_device *pdev)
  349. {
  350. int i_ret = 0;
  351. p_mtk_btif p_btif = NULL;
  352. /*Chaozhong: ToDo: to be implement*/
  353. BTIF_DBG_FUNC("++\n");
  354. p_btif = platform_get_drvdata(pdev);
  355. i_ret = _btif_resume(p_btif);
  356. BTIF_DBG_FUNC("--, i_ret:%d\n", i_ret);
  357. return 0;
  358. }
  359. /*-----------device node----------------*/
  360. #if BTIF_CDEV_SUPPORT
  361. dev_t btif_dev;
  362. struct class *p_btif_class;
  363. struct device *p_btif_dev;
  364. const char *p_btif_dev_name = "btif";
  365. static struct semaphore wr_mtx;
  366. static struct semaphore rd_mtx;
  367. unsigned char wr_buf[2048];
  368. unsigned char rd_buf[2048];
  369. static int rx_notify_flag;
  370. static DECLARE_WAIT_QUEUE_HEAD(btif_wq);
  371. static int btif_file_open(struct inode *pinode, struct file *pfile);
  372. static int btif_file_release(struct inode *pinode, struct file *pfile);
  373. static ssize_t btif_file_read(struct file *pfile,
  374. char __user *buf, size_t count, loff_t *f_ops);
  375. static ssize_t btif_file_write(struct file *filp,
  376. const char __user *buf, size_t count, loff_t *f_pos);
  377. static long btif_unlocked_ioctl(struct file *filp, unsigned int cmd,
  378. unsigned long arg);
  379. #ifdef CONFIG_COMPAT
  380. static long btif_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg);
  381. #endif
  382. static struct cdev btif_dev_c;
  383. static wait_queue_head_t btif_read_inq; /* read queues */
  384. const struct file_operations mtk_btif_fops = {
  385. .owner = THIS_MODULE,
  386. .open = btif_file_open,
  387. .release = btif_file_release,
  388. .read = btif_file_read,
  389. .write = btif_file_write,
  390. .unlocked_ioctl = btif_unlocked_ioctl,
  391. #ifdef CONFIG_COMPAT
  392. .compat_ioctl = btif_compat_ioctl,
  393. #endif
  394. .poll = btif_poll,
  395. };
  396. static int btif_chrdev_init(void)
  397. {
  398. int i_ret;
  399. int i_err;
  400. /* alloc device number dynamically */
  401. i_ret = alloc_chrdev_region(&btif_dev, 0, 1, p_btif_dev_name);
  402. if (i_ret) {
  403. BTIF_ERR_FUNC("devuce number allocation failed, i_ret:%d\n",
  404. i_ret);
  405. } else {
  406. BTIF_INFO_FUNC("devuce number allocation succeed\n");
  407. }
  408. cdev_init(&btif_dev_c, &mtk_btif_fops);
  409. btif_dev_c.owner = THIS_MODULE;
  410. i_err = cdev_add(&btif_dev_c, btif_dev, 1);
  411. if (i_err) {
  412. BTIF_ERR_FUNC("error add btif dev to kernel, error code:%d\n",
  413. i_err);
  414. unregister_chrdev_region(btif_dev, 1);
  415. btif_dev = 0;
  416. return -1;
  417. }
  418. BTIF_INFO_FUNC("add btif dev to kernel succeed\n");
  419. p_btif_class = class_create(THIS_MODULE, p_btif_dev_name);
  420. if (IS_ERR(p_btif_class)) {
  421. BTIF_ERR_FUNC("error happened when doing class_create\n");
  422. unregister_chrdev_region(btif_dev, 1);
  423. btif_dev = 0;
  424. return -2;
  425. }
  426. BTIF_INFO_FUNC("create class for btif succeed\n");
  427. p_btif_dev = device_create(p_btif_class,
  428. NULL, btif_dev, 0, p_btif_dev_name);
  429. if (IS_ERR(p_btif_dev)) {
  430. BTIF_ERR_FUNC("error happened when doing device_create\n");
  431. class_destroy(p_btif_class);
  432. p_btif_class = NULL;
  433. unregister_chrdev_region(btif_dev, 1);
  434. btif_dev = 0;
  435. return -3;
  436. }
  437. BTIF_INFO_FUNC("create device for btif succeed\n");
  438. return 0;
  439. }
  440. void btif_rx_notify_cb(void)
  441. {
  442. BTIF_DBG_FUNC("++\n");
  443. rx_notify_flag = 1;
  444. wake_up(&btif_wq);
  445. wake_up_interruptible(&btif_read_inq);
  446. BTIF_DBG_FUNC("--\n");
  447. }
  448. unsigned int btif_poll(struct file *filp, poll_table *wait)
  449. {
  450. unsigned int mask = 0;
  451. unsigned int ava_len = 0;
  452. /* btif_bbs_read(&(g_btif[0].btif_buf), rd_buf, sizeof(rd_buf)); */
  453. unsigned int wr_idx = g_btif[0].btif_buf.wr_idx;
  454. /* BTIF_Rx_IRQ_Disable(); */
  455. ava_len = BBS_COUNT_CUR(&(g_btif[0].btif_buf), wr_idx);
  456. BTIF_INFO_FUNC("++\n");
  457. if (0 == ava_len) {
  458. poll_wait(filp, &btif_read_inq, wait);
  459. wr_idx = g_btif[0].btif_buf.wr_idx;
  460. ava_len = BBS_COUNT_CUR(&(g_btif[0].btif_buf), wr_idx);
  461. /* btif_bbs_read(&(g_btif[0].btif_buf), rd_buf, sizeof(rd_buf)); */
  462. if (ava_len)
  463. mask |= POLLIN | POLLRDNORM; /* readable */
  464. } else {
  465. mask |= POLLIN | POLLRDNORM; /* readable */
  466. }
  467. /*make for writable*/
  468. mask |= POLLOUT | POLLWRNORM; /* writable */
  469. BTIF_INFO_FUNC("--, mask:%d\n", mask);
  470. return mask;
  471. }
  472. static int _btif_file_open(void)
  473. {
  474. int i_ret = -1;
  475. p_mtk_btif p_btif = &g_btif[0];
  476. BTIF_INFO_FUNC("++\n");
  477. /*Chaozhong: ToDo: to be implement*/
  478. i_ret = btif_open(p_btif);
  479. if ((0 != i_ret) && (E_BTIF_ALREADY_OPEN != i_ret)) {
  480. BTIF_ERR_FUNC("btif_open failed, error code:%d\n", i_ret);
  481. } else {
  482. BTIF_INFO_FUNC("btif_open succeed\n");
  483. i_ret = 0;
  484. }
  485. /*semaphore for read and write operation init*/
  486. sema_init(&wr_mtx, 1);
  487. sema_init(&rd_mtx, 1);
  488. /*buffer for read and write init*/
  489. memset(wr_buf, 0, sizeof(wr_buf));
  490. memset(rd_buf, 0, sizeof(rd_buf));
  491. init_waitqueue_head(&(btif_read_inq));
  492. btif_rx_notify_reg(p_btif, btif_rx_notify_cb);
  493. BTIF_INFO_FUNC("--\n");
  494. return i_ret;
  495. }
  496. static int _btif_file_close(void)
  497. {
  498. int i_ret = -1;
  499. BTIF_INFO_FUNC("++\n");
  500. /*Chaozhong: ToDo: to be implement*/
  501. i_ret = btif_close(&g_btif[0]);
  502. if (0 != i_ret)
  503. BTIF_ERR_FUNC("btif_close failed, error code:%d\n", i_ret);
  504. else
  505. BTIF_INFO_FUNC("btif_close succeed\n");
  506. BTIF_INFO_FUNC("--\n");
  507. return i_ret;
  508. }
  509. static int btif_file_open(struct inode *pinode, struct file *pfile)
  510. {
  511. int i_ret = -1;
  512. BTIF_INFO_FUNC("pid:%d\n", current->pid);
  513. i_ret = 0;
  514. return i_ret;
  515. }
  516. static int btif_file_release(struct inode *pinode, struct file *pfile)
  517. {
  518. int i_ret = -1;
  519. BTIF_INFO_FUNC("pid:%d\n", current->pid);
  520. i_ret = 0;
  521. return i_ret;
  522. }
  523. static ssize_t btif_file_read(struct file *pfile,
  524. char __user *buf, size_t count, loff_t *f_ops)
  525. {
  526. int i_ret = 0;
  527. int rd_len = 0;
  528. BTIF_INFO_FUNC("++\n");
  529. down(&rd_mtx);
  530. rd_len = btif_bbs_read(&(g_btif[0].btif_buf), rd_buf, sizeof(rd_buf));
  531. while (0 == rd_len) {
  532. if (pfile->f_flags & O_NONBLOCK)
  533. break;
  534. wait_event(btif_wq, rx_notify_flag != 0);
  535. rx_notify_flag = 0;
  536. rd_len =
  537. btif_bbs_read(&(g_btif[0].btif_buf), rd_buf,
  538. sizeof(rd_buf));
  539. }
  540. if (0 == rd_len)
  541. i_ret = 0;
  542. else if ((0 < rd_len) && (0 == copy_to_user(buf, rd_buf, rd_len)))
  543. i_ret = rd_len;
  544. else
  545. i_ret = -EFAULT;
  546. up(&rd_mtx);
  547. BTIF_INFO_FUNC("--, i_ret:%d\n", i_ret);
  548. return i_ret;
  549. }
  550. ssize_t btif_file_write(struct file *filp,
  551. const char __user *buf, size_t count, loff_t *f_pos)
  552. {
  553. int i_ret = 0;
  554. int copy_size = 0;
  555. copy_size = count > sizeof(wr_buf) ? sizeof(wr_buf) : count;
  556. BTIF_INFO_FUNC("++\n");
  557. down(&wr_mtx);
  558. if (copy_from_user(&wr_buf[0], &buf[0], copy_size))
  559. i_ret = -EFAULT;
  560. else
  561. i_ret = btif_send_data(&g_btif[0], wr_buf, copy_size);
  562. up(&wr_mtx);
  563. BTIF_INFO_FUNC("--, i_ret:%d\n", i_ret);
  564. return i_ret;
  565. }
  566. #ifdef CONFIG_COMPAT
  567. long btif_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
  568. {
  569. long ret;
  570. BTIF_INFO_FUNC("cmd[0x%x]\n", cmd);
  571. ret = btif_unlocked_ioctl(filp, cmd, arg);
  572. return ret;
  573. }
  574. #endif
  575. long btif_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
  576. {
  577. #define BTIF_IOC_MAGIC 0xb0
  578. #define BTIF_IOCTL_OPEN _IOW(BTIF_IOC_MAGIC, 1, int)
  579. #define BTIF_IOCTL_CLOSE _IOW(BTIF_IOC_MAGIC, 2, int)
  580. #define BTIF_IOCTL_LPBK_CTRL _IOWR(BTIF_IOC_MAGIC, 3, int)
  581. #define BTIF_IOCTL_LOG_FUNC_CTRL _IOWR(BTIF_IOC_MAGIC, 4, int)
  582. #define BTIF_IOCTL_RT_LOG_CTRL _IOWR(BTIF_IOC_MAGIC, 5, int)
  583. #define BTIF_IOCTL_LOG_DUMP _IOWR(BTIF_IOC_MAGIC, 6, int)
  584. #define BTIF_IOCTL_REG_DUMP _IOWR(BTIF_IOC_MAGIC, 7, int)
  585. #define BTIF_IOCTL_DMA_CTRL _IOWR(BTIF_IOC_MAGIC, 8, int)
  586. long ret = 0;
  587. /* unsigned char p_buf[NAME_MAX + 1]; */
  588. p_mtk_btif p_btif = &g_btif[0];
  589. BTIF_INFO_FUNC("++\n");
  590. BTIF_DBG_FUNC("cmd (%u), arg (0x%lx)\n", cmd, arg);
  591. switch (cmd) {
  592. case BTIF_IOCTL_OPEN:
  593. ret = _btif_file_open();
  594. break;
  595. case BTIF_IOCTL_CLOSE:
  596. ret = _btif_file_close();
  597. break;
  598. case BTIF_IOCTL_LPBK_CTRL:
  599. ret = btif_lpbk_ctrl(p_btif, 0 == arg ? 0 : 1);
  600. break;
  601. case BTIF_IOCTL_LOG_FUNC_CTRL:
  602. if (0 == arg) {
  603. ret += btif_log_buf_disable(&p_btif->tx_log);
  604. ret += btif_log_buf_disable(&p_btif->rx_log);
  605. } else {
  606. ret += btif_log_buf_enable(&p_btif->tx_log);
  607. ret += btif_log_buf_enable(&p_btif->rx_log);
  608. }
  609. break;
  610. case BTIF_IOCTL_RT_LOG_CTRL:
  611. if (0 == arg) {
  612. ret += btif_log_output_disable(&p_btif->tx_log);
  613. ret += btif_log_output_disable(&p_btif->rx_log);
  614. } else {
  615. ret += btif_log_output_enable(&p_btif->tx_log);
  616. ret += btif_log_output_enable(&p_btif->rx_log);
  617. }
  618. break;
  619. case BTIF_IOCTL_LOG_DUMP:
  620. ret += btif_log_buf_dmp_out(&p_btif->tx_log);
  621. ret += btif_log_buf_dmp_out(&p_btif->rx_log);
  622. break;
  623. case BTIF_IOCTL_REG_DUMP:
  624. ret += btif_dump_reg(p_btif);
  625. break;
  626. case BTIF_IOCTL_DMA_CTRL:
  627. if (0 == arg) {
  628. ret += btif_tx_dma_mode_set(0);
  629. ret += btif_rx_dma_mode_set(0);
  630. } else {
  631. ret += btif_tx_dma_mode_set(1);
  632. ret += btif_rx_dma_mode_set(1);
  633. }
  634. break;
  635. default:
  636. BTIF_INFO_FUNC("unknown cmd(%d)\n", cmd);
  637. ret = -2;
  638. break;
  639. }
  640. BTIF_INFO_FUNC("--\n");
  641. return ret;
  642. }
  643. #endif
  644. /*-----------device property----------------*/
  645. static ssize_t driver_flag_read(struct device_driver *drv, char *buf)
  646. {
  647. return sprintf(buf, "btif driver debug level:%d\n", mtk_btif_dbg_lvl);
  648. }
  649. static ssize_t driver_flag_set(struct device_driver *drv,
  650. const char *buffer, size_t count)
  651. {
  652. char buf[256];
  653. char *p_buf;
  654. unsigned long len = count;
  655. long x = 0;
  656. long y = 0;
  657. long z = 0;
  658. int result = 0;
  659. char *p_token = NULL;
  660. char *p_delimiter = " \t";
  661. BTIF_INFO_FUNC("buffer = %s, count = %zd\n", buffer, count);
  662. if (len >= sizeof(buf)) {
  663. BTIF_ERR_FUNC("input handling fail!\n");
  664. len = sizeof(buf) - 1;
  665. return -1;
  666. }
  667. memcpy(buf, buffer, sizeof(buf));
  668. p_buf = buf;
  669. p_token = strsep(&p_buf, p_delimiter);
  670. if (p_token != NULL) {
  671. result = kstrtol(p_token, 16, &x);
  672. BTIF_INFO_FUNC("x = 0x%08x\n\r", x);
  673. } else
  674. x = 0;
  675. /* x = (NULL != p_token) ? kstrtol(p_token, 16, NULL) : 0;*/
  676. p_token = strsep(&p_buf, "\t\n ");
  677. if (p_token != NULL) {
  678. result = kstrtol(p_token, 16, &y);
  679. BTIF_INFO_FUNC("y = 0x%08x\n\r", y);
  680. } else
  681. y = 0;
  682. p_token = strsep(&p_buf, "\t\n ");
  683. if (p_token != NULL)
  684. result = kstrtol(p_token, 16, &z);
  685. else
  686. z = 0;
  687. BTIF_INFO_FUNC("x(0x%08x), y(0x%08x), z(0x%08x)\n\r", x, y, z);
  688. switch (x) {
  689. case 1:
  690. mtk_btif_exp_open_test();
  691. break;
  692. case 2:
  693. mtk_btif_exp_close_test();
  694. break;
  695. case 3:
  696. mtk_btif_exp_write_test();
  697. break;
  698. case 4:
  699. mtk_btif_exp_enter_dpidle_test();
  700. break;
  701. case 5:
  702. mtk_btif_exp_exit_dpidle_test();
  703. break;
  704. case 6:
  705. mtk_btif_exp_suspend_test();
  706. break;
  707. case 7:
  708. mtk_btif_exp_resume_test();
  709. break;
  710. case 8:
  711. if (y > BTIF_LOG_LOUD)
  712. mtk_btif_dbg_lvl = BTIF_LOG_LOUD;
  713. else if (y < BTIF_LOG_ERR)
  714. mtk_btif_dbg_lvl = BTIF_LOG_WARN;
  715. else
  716. mtk_btif_dbg_lvl = y;
  717. BTIF_ERR_FUNC("mtk_btif_dbg_lvl set to %d\n", mtk_btif_dbg_lvl);
  718. break;
  719. case 9:
  720. mtk_btif_exp_open_test();
  721. mtk_btif_exp_write_test();
  722. mtk_btif_exp_close_test();
  723. break;
  724. case 0xa:
  725. mtk_btif_exp_log_debug_test(y);
  726. break;
  727. case 0xb:
  728. btif_tx_dma_mode_set(1);
  729. btif_rx_dma_mode_set(1);
  730. break;
  731. case 0xc:
  732. btif_tx_dma_mode_set(0);
  733. btif_rx_dma_mode_set(0);
  734. break;
  735. case 0xd:
  736. mtk_btif_exp_restore_noirq_test();
  737. break;
  738. case 0xe:
  739. btif_wakeup_consys_no_id();
  740. break;
  741. case 0xf:
  742. mtk_btif_exp_clock_ctrl(y);
  743. break;
  744. case 0x10:
  745. y = y > G_MAX_PKG_LEN ? G_MAX_PKG_LEN : y;
  746. y = y < 1024 ? 1024 : y;
  747. BTIF_INFO_FUNC("g_max_pkg_len is set to %d\n", y);
  748. g_max_pkg_len = y;
  749. break;
  750. case 0x11:
  751. y = y > BTIF_RX_BUFFER_SIZE ? BTIF_RX_BUFFER_SIZE : y;
  752. y = y < 1024 ? 1024 : y;
  753. BTIF_INFO_FUNC("g_max_pding_data_size is set to %d\n", y);
  754. g_max_pding_data_size = y;
  755. break;
  756. default:
  757. mtk_btif_exp_open_test();
  758. mtk_btif_exp_write_stress_test(3030, 1);
  759. mtk_btif_exp_close_test();
  760. BTIF_WARN_FUNC("not supported.\n");
  761. break;
  762. }
  763. return count;
  764. }
  765. static DRIVER_ATTR(flag, S_IRUGO | S_IWUSR, driver_flag_read, driver_flag_set);
  766. /*-----------End of platform bus related operation APIs------------*/
  767. /*-----------------------platform driver ----------------*/
  768. int _btif_irq_reg(P_MTK_BTIF_IRQ_STR p_irq,
  769. mtk_btif_irq_handler irq_handler, void *data)
  770. {
  771. int i_ret = -1;
  772. unsigned int irq_id;
  773. unsigned int flag;
  774. if ((NULL == p_irq) || (NULL == irq_handler))
  775. return E_BTIF_INVAL_PARAM;
  776. if (!(p_irq->is_irq_sup)) {
  777. BTIF_WARN_FUNC("%s is not supported\n", p_irq->name);
  778. return 0;
  779. }
  780. irq_id = p_irq->irq_id;
  781. #ifdef CONFIG_OF
  782. flag = p_irq->irq_flags;
  783. #else
  784. switch (p_irq->sens_type) {
  785. case IRQ_SENS_EDGE:
  786. if (IRQ_EDGE_FALL == p_irq->edge_type)
  787. flag = IRQF_TRIGGER_FALLING;
  788. else if (IRQ_EDGE_RAISE == p_irq->edge_type)
  789. flag = IRQF_TRIGGER_RISING;
  790. else if (IRQ_EDGE_BOTH == p_irq->edge_type)
  791. flag = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  792. else
  793. /*make this as default type */
  794. flag = IRQF_TRIGGER_FALLING;
  795. break;
  796. case IRQ_SENS_LVL:
  797. if (IRQ_LVL_LOW == p_irq->lvl_type)
  798. flag = IRQF_TRIGGER_LOW;
  799. else if (IRQ_LVL_HIGH == p_irq->lvl_type)
  800. flag = IRQF_TRIGGER_HIGH;
  801. else
  802. /*make this as default type */
  803. flag = IRQF_TRIGGER_LOW;
  804. break;
  805. default:
  806. /*make this as default type */
  807. flag = IRQF_TRIGGER_LOW;
  808. break;
  809. }
  810. #endif
  811. p_irq->p_irq_handler = irq_handler;
  812. i_ret = request_irq(irq_id,
  813. (irq_handler_t) irq_handler,
  814. flag, p_irq->name, data);
  815. if (i_ret)
  816. return i_ret;
  817. p_irq->reg_flag = true;
  818. return 0;
  819. }
  820. int _btif_irq_free(P_MTK_BTIF_IRQ_STR p_irq, void *data)
  821. {
  822. int i_ret = 0;
  823. unsigned int eint_num = p_irq->irq_id;
  824. if ((p_irq->is_irq_sup) && (p_irq->reg_flag)) {
  825. _btif_irq_ctrl(p_irq, false);
  826. free_irq(eint_num, data);
  827. p_irq->reg_flag = false;
  828. }
  829. /*do nothing for this operation*/
  830. return i_ret;
  831. }
  832. int _btif_irq_ctrl(P_MTK_BTIF_IRQ_STR p_irq, bool en)
  833. {
  834. unsigned int eint_num = p_irq->irq_id;
  835. if (en)
  836. enable_irq(eint_num);
  837. else
  838. disable_irq_nosync(eint_num);
  839. return 0;
  840. }
  841. int _btif_irq_ctrl_sync(P_MTK_BTIF_IRQ_STR p_irq, bool en)
  842. {
  843. unsigned int eint_num = p_irq->irq_id;
  844. if (en)
  845. enable_irq(eint_num);
  846. else
  847. disable_irq(eint_num);
  848. return 0;
  849. }
  850. irqreturn_t btif_irq_handler(int irq, void *data)
  851. {
  852. /*search BTIF? just use index 0*/
  853. /*Chaozhong: do we need lock here?*/
  854. p_mtk_btif p_btif = (p_mtk_btif) data; /*&(g_btif[index]); */
  855. BTIF_DBG_FUNC("++, p_btif(0x%p)\n", data);
  856. _btif_irq_ctrl(p_btif->p_btif_info->p_irq, false);
  857. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  858. hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_ENABLE);
  859. #endif
  860. hal_btif_irq_handler(p_btif->p_btif_info, NULL, 0);
  861. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  862. hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_DISABLE);
  863. #endif
  864. _btif_irq_ctrl(p_btif->p_btif_info->p_irq, true);
  865. _btif_rx_btm_sched(p_btif);
  866. BTIF_DBG_FUNC("--\n");
  867. return IRQ_HANDLED;
  868. }
  869. irqreturn_t btif_tx_dma_irq_handler(int irq, void *data)
  870. {
  871. /*search BTIF? just use index 0*/
  872. p_mtk_btif p_btif = (p_mtk_btif) data; /*&(g_btif[index]); */
  873. p_mtk_btif_dma p_tx_dma = p_btif->p_tx_dma;
  874. P_MTK_DMA_INFO_STR p_dma_info = p_tx_dma->p_dma_info;
  875. BTIF_DBG_FUNC("++, p_btif(0x%p)\n", data);
  876. _btif_irq_ctrl(p_dma_info->p_irq, false);
  877. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  878. hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_ENABLE);
  879. #endif
  880. hal_tx_dma_irq_handler(p_dma_info);
  881. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  882. hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_DISABLE);
  883. #endif
  884. _btif_irq_ctrl(p_dma_info->p_irq, true);
  885. BTIF_DBG_FUNC("--\n");
  886. return IRQ_HANDLED;
  887. }
  888. irqreturn_t btif_rx_dma_irq_handler(int irq, void *data)
  889. {
  890. /*search BTIF? just use index 0*/
  891. p_mtk_btif p_btif = (p_mtk_btif) data; /*&(g_btif[index]); */
  892. p_mtk_btif_dma p_rx_dma = p_btif->p_rx_dma;
  893. P_MTK_DMA_INFO_STR p_rx_dma_info = p_rx_dma->p_dma_info;
  894. BTIF_DBG_FUNC("++, p_btif(0x%p)\n", data);
  895. _btif_irq_ctrl(p_rx_dma_info->p_irq, false);
  896. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  897. hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_ENABLE);
  898. hal_btif_dma_clk_ctrl(p_rx_dma_info, CLK_OUT_ENABLE);
  899. #endif
  900. hal_rx_dma_irq_handler(p_rx_dma_info, NULL, 0);
  901. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  902. hal_btif_dma_clk_ctrl(p_rx_dma_info, CLK_OUT_DISABLE);
  903. hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_DISABLE);
  904. #endif
  905. _btif_irq_ctrl(p_rx_dma_info->p_irq, true);
  906. _btif_rx_btm_sched(p_btif);
  907. BTIF_DBG_FUNC("--\n");
  908. return IRQ_HANDLED;
  909. }
  910. unsigned int btif_dma_rx_data_receiver(P_MTK_DMA_INFO_STR p_dma_info,
  911. unsigned char *p_buf,
  912. unsigned int buf_len)
  913. {
  914. unsigned int index = 0;
  915. p_mtk_btif p_btif = &(g_btif[index]);
  916. #if 0
  917. _btif_dump_memory("<DMA Rx>", p_buf, buf_len);
  918. #endif
  919. btif_bbs_write(&(p_btif->btif_buf), p_buf, buf_len);
  920. /*save DMA Rx packet here*/
  921. if (0 < buf_len)
  922. btif_log_buf_dmp_in(&p_btif->rx_log, p_buf, buf_len);
  923. return 0;
  924. }
  925. unsigned int btif_pio_rx_data_receiver(P_MTK_BTIF_INFO_STR p_btif_info,
  926. unsigned char *p_buf,
  927. unsigned int buf_len)
  928. {
  929. unsigned int index = 0;
  930. p_mtk_btif p_btif = &(g_btif[index]);
  931. #if 0
  932. _btif_dump_memory("<PIO Rx>", p_buf, buf_len);
  933. #endif
  934. btif_bbs_write(&(p_btif->btif_buf), p_buf, buf_len);
  935. /*save PIO Rx packet here*/
  936. if (0 < buf_len)
  937. btif_log_buf_dmp_in(&p_btif->rx_log, p_buf, buf_len);
  938. return 0;
  939. }
  940. bool btif_parser_wmt_evt(p_mtk_btif p_btif,
  941. const char *sub_str,
  942. unsigned int str_len)
  943. {
  944. unsigned int data_cnt = 0;
  945. unsigned int copy_cnt = 0;
  946. char *local_buf = NULL;
  947. bool b_ret = false;
  948. p_btif_buf_str p_bbs = &(p_btif->btif_buf);
  949. unsigned int wr_idx = p_bbs->wr_idx;
  950. unsigned int rd_idx = p_bbs->rd_idx;
  951. data_cnt = copy_cnt = BBS_COUNT(p_bbs);
  952. if (data_cnt < str_len) {
  953. BTIF_WARN_FUNC("there is not enough data for parser,need(%d),have(%d)\n", str_len, data_cnt);
  954. return false;
  955. }
  956. BTIF_INFO_FUNC("data count in bbs buffer:%d,wr_idx(%d),rd_idx(%d)\n", data_cnt, wr_idx, rd_idx);
  957. local_buf = vmalloc((data_cnt + 3) & ~0x3UL);
  958. if (!local_buf) {
  959. BTIF_WARN_FUNC("vmalloc memory fail\n");
  960. return false;
  961. }
  962. if (wr_idx >= rd_idx) {
  963. memcpy(local_buf, BBS_PTR(p_bbs, rd_idx), copy_cnt);
  964. } else {
  965. unsigned int tail_len = BBS_SIZE(p_bbs) - rd_idx;
  966. BTIF_INFO_FUNC("tail_Len(%d)\n", tail_len);
  967. memcpy(local_buf, BBS_PTR(p_bbs, rd_idx), tail_len);
  968. memcpy(local_buf + tail_len, BBS_PTR(p_bbs, 0), copy_cnt - tail_len);
  969. }
  970. do {
  971. int i = 0;
  972. int j = 0;
  973. int k = 0;
  974. int d = 0;
  975. BTIF_INFO_FUNC("sub_str_len:%d\n", str_len);
  976. for (i = 0; i < copy_cnt; i++) {
  977. BTIF_DBG_FUNC("i:%d\n", i);
  978. k = i;
  979. while (1) {
  980. if ((j >= str_len) || (k >= copy_cnt) || (sub_str[j++] != local_buf[k++]))
  981. break;
  982. }
  983. if (j == str_len) {
  984. for (d = i; d < (str_len + i); d++)
  985. BTIF_INFO_FUNC("0x%2x", local_buf[d]);
  986. BTIF_INFO_FUNC("find sub str index:%d\n", i);
  987. b_ret = true;
  988. break;
  989. }
  990. if (j < str_len)
  991. j = 0;
  992. }
  993. } while (0);
  994. vfree(local_buf);
  995. return b_ret;
  996. }
  997. int _btif_controller_tx_setup(p_mtk_btif p_btif)
  998. {
  999. int i_ret = -1;
  1000. if (BTIF_MODE_DMA == p_btif->tx_mode) {
  1001. i_ret = _btif_tx_dma_setup(p_btif);
  1002. if (i_ret) {
  1003. BTIF_ERR_FUNC("_btif_tx_dma_setup failed,i_ret(%d),",
  1004. "set tx to PIO mode\n", i_ret);
  1005. i_ret = _btif_tx_pio_setup(p_btif);
  1006. }
  1007. } else
  1008. /*enable Tx PIO mode*/
  1009. i_ret = _btif_tx_pio_setup(p_btif);
  1010. return i_ret;
  1011. }
  1012. int _btif_controller_tx_free(p_mtk_btif p_btif)
  1013. {
  1014. int i_ret = -1;
  1015. if (BTIF_MODE_DMA == p_btif->tx_mode) {
  1016. i_ret = _btif_tx_dma_free(p_btif);
  1017. if (i_ret) {
  1018. BTIF_ERR_FUNC("_btif_tx_dma_free failed, i_ret(%d)\n",
  1019. i_ret);
  1020. }
  1021. } else {
  1022. /*do nothing for Tx PIO mode*/
  1023. }
  1024. return i_ret;
  1025. }
  1026. int _btif_controller_rx_setup(p_mtk_btif p_btif)
  1027. {
  1028. int i_ret = -1;
  1029. if (BTIF_MODE_DMA == p_btif->rx_mode) {
  1030. i_ret = _btif_rx_dma_setup(p_btif);
  1031. if (i_ret) {
  1032. BTIF_ERR_FUNC("_btif_tx_dma_setup failed, i_ret(%d),",
  1033. "set tx to PIO mode\n", i_ret);
  1034. i_ret = _btif_rx_pio_setup(p_btif);
  1035. }
  1036. } else {
  1037. /*enable Tx PIO mode*/
  1038. i_ret = _btif_rx_pio_setup(p_btif);
  1039. }
  1040. return i_ret;
  1041. }
  1042. int _btif_controller_rx_free(p_mtk_btif p_btif)
  1043. {
  1044. int i_ret = -1;
  1045. if (BTIF_MODE_DMA == p_btif->rx_mode) {
  1046. i_ret = _btif_rx_dma_free(p_btif);
  1047. if (i_ret) {
  1048. BTIF_ERR_FUNC("_btif_rx_dma_free failed, i_ret(%d)\n",
  1049. i_ret);
  1050. }
  1051. } else {
  1052. /*do nothing for Rx PIO mode*/
  1053. }
  1054. return i_ret;
  1055. }
  1056. int _btif_tx_pio_setup(p_mtk_btif p_btif)
  1057. {
  1058. int i_ret = -1;
  1059. P_MTK_BTIF_INFO_STR p_btif_info = p_btif->p_btif_info;
  1060. /*set Tx to PIO mode*/
  1061. p_btif->tx_mode = BTIF_MODE_PIO;
  1062. /*enable Tx PIO mode*/
  1063. i_ret = hal_btif_tx_mode_ctrl(p_btif_info, BTIF_MODE_PIO);
  1064. return i_ret;
  1065. }
  1066. int _btif_rx_pio_setup(p_mtk_btif p_btif)
  1067. {
  1068. int i_ret = -1;
  1069. P_MTK_BTIF_INFO_STR p_btif_info = p_btif->p_btif_info;
  1070. P_MTK_BTIF_IRQ_STR p_btif_irq = p_btif_info->p_irq;
  1071. p_btif->rx_mode = BTIF_MODE_PIO;
  1072. /*Enable Rx IRQ*/
  1073. _btif_irq_ctrl(p_btif_irq, true);
  1074. /*enable Rx PIO mode*/
  1075. i_ret = hal_btif_rx_mode_ctrl(p_btif_info, BTIF_MODE_PIO);
  1076. return i_ret;
  1077. }
  1078. int _btif_rx_dma_setup(p_mtk_btif p_btif)
  1079. {
  1080. int i_ret = -1;
  1081. P_MTK_BTIF_INFO_STR p_btif_info = NULL;
  1082. P_MTK_BTIF_IRQ_STR p_btif_irq = NULL;
  1083. P_MTK_DMA_INFO_STR p_dma_info = p_btif->p_rx_dma->p_dma_info;
  1084. p_btif_info = p_btif->p_btif_info;
  1085. p_btif_irq = p_dma_info->p_irq;
  1086. /*vFIFO reset*/
  1087. hal_btif_vfifo_reset(p_dma_info);
  1088. i_ret = hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_ENABLE);
  1089. if (i_ret) {
  1090. BTIF_ERR_FUNC("hal_btif_dma_clk_ctrl failed, i_ret(%d),",
  1091. "set rx to pio mode\n", i_ret);
  1092. /*DMA control failed set Rx to PIO mode*/
  1093. return _btif_rx_pio_setup(p_btif);
  1094. }
  1095. /*hardware init*/
  1096. hal_btif_dma_hw_init(p_dma_info);
  1097. hal_btif_dma_rx_cb_reg(p_dma_info,
  1098. (dma_rx_buf_write) btif_dma_rx_data_receiver);
  1099. /*DMA controller enable*/
  1100. i_ret = hal_btif_dma_ctrl(p_dma_info, DMA_CTRL_ENABLE);
  1101. if (i_ret) {
  1102. BTIF_ERR_FUNC("hal_btif_dma_ctrl failed, i_ret(%d),",
  1103. "set rx to pio mode\n", i_ret);
  1104. hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_DISABLE);
  1105. /*DMA control failed set Rx to PIO mode*/
  1106. i_ret = _btif_rx_pio_setup(p_btif);
  1107. } else {
  1108. /*enable Rx DMA mode*/
  1109. hal_btif_rx_mode_ctrl(p_btif_info, BTIF_MODE_DMA);
  1110. /*DMA Rx IRQ register*/
  1111. _btif_irq_reg(p_btif_irq, btif_rx_dma_irq_handler, p_btif);
  1112. #if 0
  1113. /*Enable DMA Rx IRQ*/
  1114. _btif_irq_ctrl(p_btif_irq, true);
  1115. #endif
  1116. BTIF_DBG_FUNC("succeed\n");
  1117. }
  1118. return i_ret;
  1119. }
  1120. int _btif_rx_dma_free(p_mtk_btif p_btif)
  1121. {
  1122. P_MTK_DMA_INFO_STR p_dma_info = p_btif->p_rx_dma->p_dma_info;
  1123. P_MTK_BTIF_IRQ_STR p_irq = p_btif->p_rx_dma->p_dma_info->p_irq;
  1124. hal_btif_dma_rx_cb_reg(p_dma_info, (dma_rx_buf_write) NULL);
  1125. _btif_irq_free(p_irq, p_btif);
  1126. /*disable BTIF Rx DMA channel*/
  1127. hal_btif_dma_ctrl(p_dma_info, DMA_CTRL_DISABLE);
  1128. /*disable clock output*/
  1129. return hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_DISABLE);
  1130. }
  1131. int _btif_tx_dma_setup(p_mtk_btif p_btif)
  1132. {
  1133. int i_ret = -1;
  1134. P_MTK_BTIF_INFO_STR p_btif_info = p_btif->p_btif_info;
  1135. P_MTK_DMA_INFO_STR p_dma_info = p_btif->p_tx_dma->p_dma_info;
  1136. P_MTK_BTIF_IRQ_STR p_btif_irq = p_dma_info->p_irq;
  1137. /*vFIFO reset*/
  1138. hal_btif_vfifo_reset(p_dma_info);
  1139. i_ret = hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_ENABLE);
  1140. if (i_ret) {
  1141. BTIF_ERR_FUNC("hal_btif_dma_clk_ctrl failed, i_ret(%d)\n",
  1142. i_ret);
  1143. return i_ret;
  1144. }
  1145. /*DMA controller setup*/
  1146. hal_btif_dma_hw_init(p_dma_info);
  1147. /*DMA HW Enable*/
  1148. i_ret = hal_btif_dma_ctrl(p_dma_info, DMA_CTRL_ENABLE);
  1149. if (i_ret) {
  1150. BTIF_ERR_FUNC("hal_btif_dma_ctrl failed, i_ret(%d),",
  1151. "set tx to pio mode\n", i_ret);
  1152. #if !(MTK_BTIF_ENABLE_CLK_REF_COUNTER)
  1153. hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_DISABLE);
  1154. #endif
  1155. _btif_tx_pio_setup(p_btif);
  1156. } else {
  1157. hal_btif_tx_mode_ctrl(p_btif_info, BTIF_MODE_DMA);
  1158. /*DMA Tx IRQ register*/
  1159. _btif_irq_reg(p_btif_irq, btif_tx_dma_irq_handler, p_btif);
  1160. #if 0
  1161. /*disable DMA Tx IRQ*/
  1162. _btif_irq_ctrl(p_btif_irq, false);
  1163. #endif
  1164. BTIF_DBG_FUNC("succeed\n");
  1165. }
  1166. return i_ret;
  1167. }
  1168. int _btif_tx_dma_free(p_mtk_btif p_btif)
  1169. {
  1170. P_MTK_DMA_INFO_STR p_dma_info = p_btif->p_tx_dma->p_dma_info;
  1171. P_MTK_BTIF_IRQ_STR p_irq = p_btif->p_tx_dma->p_dma_info->p_irq;
  1172. _btif_irq_free(p_irq, p_btif);
  1173. /*disable BTIF Tx DMA channel*/
  1174. hal_btif_dma_ctrl(p_dma_info, DMA_CTRL_DISABLE);
  1175. /*disable clock output*/
  1176. return hal_btif_dma_clk_ctrl(p_dma_info, CLK_OUT_DISABLE);
  1177. }
  1178. int btif_lpbk_ctrl(p_mtk_btif p_btif, bool flag)
  1179. {
  1180. int i_ret = -1;
  1181. /*hold state mechine lock*/
  1182. if (_btif_state_hold(p_btif))
  1183. return E_BTIF_INTR;
  1184. #if 0
  1185. state = _btif_state_get(p_btif);
  1186. if (p_btif->enable && B_S_ON == state)
  1187. i_ret = _btif_lpbk_ctrl(p_btif, flag);
  1188. else
  1189. i_ret = E_BTIF_INVAL_STATE;
  1190. #endif
  1191. i_ret = _btif_exit_dpidle(p_btif);
  1192. if (0 == i_ret)
  1193. i_ret = _btif_lpbk_ctrl(p_btif, flag);
  1194. else
  1195. i_ret = E_BTIF_INVAL_STATE;
  1196. BTIF_STATE_RELEASE(p_btif);
  1197. return i_ret;
  1198. }
  1199. int _btif_lpbk_ctrl(p_mtk_btif p_btif, bool flag)
  1200. {
  1201. int i_ret = -1;
  1202. if (flag) {
  1203. i_ret = hal_btif_loopback_ctrl(p_btif->p_btif_info, true);
  1204. BTIF_DBG_FUNC("loopback function enabled\n");
  1205. } else {
  1206. i_ret = hal_btif_loopback_ctrl(p_btif->p_btif_info, false);
  1207. BTIF_DBG_FUNC("loopback function disabled\n");
  1208. }
  1209. if (0 == i_ret)
  1210. p_btif->lpbk_flag = flag;
  1211. return i_ret;
  1212. }
  1213. int btif_clock_ctrl(p_mtk_btif p_btif, int en)
  1214. {
  1215. int i_ret = 0;
  1216. P_MTK_BTIF_INFO_STR p_btif_info = p_btif->p_btif_info;
  1217. ENUM_CLOCK_CTRL ctrl_flag = en == 0 ? CLK_OUT_DISABLE : CLK_OUT_ENABLE;
  1218. i_ret = hal_btif_clk_ctrl(p_btif_info, ctrl_flag);
  1219. if (BTIF_MODE_DMA == p_btif->rx_mode)
  1220. i_ret += hal_btif_dma_clk_ctrl(p_btif->p_rx_dma->p_dma_info, ctrl_flag);
  1221. if (BTIF_MODE_DMA == p_btif->tx_mode)
  1222. i_ret += hal_btif_dma_clk_ctrl(p_btif->p_tx_dma->p_dma_info, ctrl_flag);
  1223. return i_ret;
  1224. }
  1225. int _btif_controller_setup(p_mtk_btif p_btif)
  1226. {
  1227. int i_ret = -1;
  1228. P_MTK_BTIF_INFO_STR p_btif_info = p_btif->p_btif_info;
  1229. P_MTK_BTIF_IRQ_STR p_btif_irq = p_btif_info->p_irq;
  1230. /*BTIF rx buffer init*/
  1231. /* memset(p_btif->rx_buf, 0, BTIF_RX_BUFFER_SIZE); */
  1232. BBS_INIT(&(p_btif->btif_buf));
  1233. /************************************************/
  1234. hal_btif_rx_cb_reg(p_btif_info,
  1235. (btif_rx_buf_write) btif_pio_rx_data_receiver);
  1236. i_ret = hal_btif_clk_ctrl(p_btif_info, CLK_OUT_ENABLE);
  1237. if (i_ret) {
  1238. BTIF_ERR_FUNC("hal_btif_clk_ctrl failed, i_ret(%d)\n", i_ret);
  1239. return i_ret;
  1240. }
  1241. /*BTIF controller init*/
  1242. i_ret = hal_btif_hw_init(p_btif_info);
  1243. if (i_ret) {
  1244. hal_btif_clk_ctrl(p_btif_info, CLK_OUT_DISABLE);
  1245. BTIF_ERR_FUNC("hal_btif_hw_init failed, i_ret(%d)\n", i_ret);
  1246. return i_ret;
  1247. }
  1248. _btif_lpbk_ctrl(p_btif, p_btif->lpbk_flag);
  1249. /*BTIF IRQ register*/
  1250. i_ret = _btif_irq_reg(p_btif_irq, btif_irq_handler, p_btif);
  1251. if (i_ret) {
  1252. hal_btif_clk_ctrl(p_btif_info, CLK_OUT_DISABLE);
  1253. BTIF_ERR_FUNC("_btif_irq_reg failed, i_ret(%d)\n", i_ret);
  1254. return i_ret;
  1255. }
  1256. /*disable IRQ*/
  1257. _btif_irq_ctrl(p_btif_irq, false);
  1258. i_ret = 0;
  1259. BTIF_DBG_FUNC("succeed\n");
  1260. return i_ret;
  1261. }
  1262. int _btif_controller_free(p_mtk_btif p_btif)
  1263. {
  1264. /*No need to set BTIF to PIO mode, only enable BTIF CG*/
  1265. hal_btif_rx_cb_reg(p_btif->p_btif_info, (btif_rx_buf_write) NULL);
  1266. _btif_irq_free(p_btif->p_btif_info->p_irq, p_btif);
  1267. return hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_DISABLE);
  1268. }
  1269. int _btif_init(p_mtk_btif p_btif)
  1270. {
  1271. int i_ret = 0;
  1272. i_ret = _btif_controller_setup(p_btif);
  1273. if (i_ret) {
  1274. BTIF_ERR_FUNC("_btif_controller_init failed, i_ret(%d)\n",
  1275. i_ret);
  1276. _btif_dpidle_notify_ctrl(p_btif, BTIF_DPIDLE_ENABLE);
  1277. BTIF_STATE_RELEASE(p_btif);
  1278. return i_ret;
  1279. }
  1280. i_ret = _btif_controller_tx_setup(p_btif);
  1281. if (i_ret) {
  1282. BTIF_ERR_FUNC("_btif_controller_tx_setup failed, i_ret(%d)\n",
  1283. i_ret);
  1284. _btif_controller_free(p_btif);
  1285. _btif_dpidle_notify_ctrl(p_btif, BTIF_DPIDLE_ENABLE);
  1286. BTIF_STATE_RELEASE(p_btif);
  1287. return i_ret;
  1288. }
  1289. i_ret = _btif_controller_rx_setup(p_btif);
  1290. if (i_ret) {
  1291. BTIF_ERR_FUNC("_btif_controller_tx_setup failed, i_ret(%d)\n",
  1292. i_ret);
  1293. _btif_controller_tx_free(p_btif);
  1294. _btif_controller_free(p_btif);
  1295. _btif_dpidle_notify_ctrl(p_btif, BTIF_DPIDLE_ENABLE);
  1296. BTIF_STATE_RELEASE(p_btif);
  1297. return i_ret;
  1298. }
  1299. return i_ret;
  1300. }
  1301. int btif_open(p_mtk_btif p_btif)
  1302. {
  1303. int i_ret = -1;
  1304. if (p_btif->enable)
  1305. return E_BTIF_ALREADY_OPEN;
  1306. /*hold state mechine lock*/
  1307. if (_btif_state_hold(p_btif))
  1308. return E_BTIF_INTR;
  1309. /*disable deepidle*/
  1310. _btif_dpidle_notify_ctrl(p_btif, BTIF_DPIDLE_DISABLE);
  1311. i_ret = _btif_init(p_btif);
  1312. if (0 == i_ret) {
  1313. /*set BTIF's enable flag*/
  1314. p_btif->enable = true;
  1315. _btif_state_set(p_btif, B_S_ON);
  1316. } else {
  1317. _btif_dpidle_notify_ctrl(p_btif, BTIF_DPIDLE_ENABLE);
  1318. }
  1319. btif_log_buf_reset(&p_btif->tx_log);
  1320. btif_log_buf_reset(&p_btif->rx_log);
  1321. BTIF_STATE_RELEASE(p_btif);
  1322. BTIF_DBG_FUNC("BTIF's Tx Mode:%d, Rx Mode(%d)\n",
  1323. p_btif->tx_mode, p_btif->rx_mode);
  1324. return i_ret;
  1325. }
  1326. int btif_close(p_mtk_btif p_btif)
  1327. {
  1328. int i_ret = 0;
  1329. if (!(p_btif->enable))
  1330. return E_BTIF_NOT_OPEN;
  1331. /*hold state mechine lock*/
  1332. if (_btif_state_hold(p_btif))
  1333. return E_BTIF_INTR;
  1334. /*always set state back to B_S_ON before do close operation*/
  1335. _btif_exit_dpidle(p_btif);
  1336. /*set BTIF's state to disable state*/
  1337. p_btif->enable = false;
  1338. _btif_controller_free(p_btif);
  1339. _btif_controller_tx_free(p_btif);
  1340. _btif_controller_rx_free(p_btif);
  1341. /*reset BTIF's rx_cb function*/
  1342. p_btif->rx_cb = NULL;
  1343. p_btif->rx_notify = NULL;
  1344. p_btif->lpbk_flag = false;
  1345. /*set state mechine to B_S_OFF*/
  1346. _btif_state_set(p_btif, B_S_OFF);
  1347. btif_log_buf_disable(&p_btif->tx_log);
  1348. btif_log_buf_disable(&p_btif->rx_log);
  1349. BTIF_STATE_RELEASE(p_btif);
  1350. return i_ret;
  1351. }
  1352. int _btif_exit_dpidle(p_mtk_btif p_btif)
  1353. {
  1354. int i_ret = -1;
  1355. ENUM_BTIF_STATE state = B_S_MAX;
  1356. state = _btif_state_get(p_btif);
  1357. switch (state) {
  1358. case B_S_DPIDLE:
  1359. i_ret = _btif_exit_dpidle_from_dpidle(p_btif);
  1360. break;
  1361. case B_S_SUSPEND:
  1362. /*in suspend state, need to do reinit of btif*/
  1363. i_ret = _btif_exit_dpidle_from_sus(p_btif);
  1364. break;
  1365. case B_S_OFF:
  1366. i_ret = _btif_init(p_btif);
  1367. break;
  1368. case B_S_ON:
  1369. i_ret = 0; /* for btif_close case */
  1370. break;
  1371. default:
  1372. i_ret = E_BTIF_INVAL_PARAM;
  1373. BTIF_INFO_FUNC("invalid state change:%d->\n", state, B_S_ON);
  1374. break;
  1375. }
  1376. if (0 == i_ret)
  1377. i_ret = _btif_state_set(p_btif, B_S_ON);
  1378. return i_ret;
  1379. }
  1380. int btif_exit_dpidle(p_mtk_btif p_btif)
  1381. {
  1382. int i_ret = 0;
  1383. /*hold state mechine lock*/
  1384. if (_btif_state_hold(p_btif))
  1385. return E_BTIF_INTR;
  1386. i_ret = _btif_exit_dpidle(p_btif);
  1387. BTIF_STATE_RELEASE(p_btif);
  1388. return i_ret;
  1389. }
  1390. int _btif_enter_dpidle(p_mtk_btif p_btif)
  1391. {
  1392. int i_ret = 0;
  1393. ENUM_BTIF_STATE state = B_S_MAX;
  1394. state = _btif_state_get(p_btif);
  1395. if (B_S_ON == state) {
  1396. i_ret = _btif_enter_dpidle_from_on(p_btif);
  1397. } else if (B_S_SUSPEND == state) {
  1398. /*do reinit and enter deepidle*/
  1399. i_ret = _btif_enter_dpidle_from_sus(p_btif);
  1400. } else if (B_S_DPIDLE == state) {
  1401. /*do nothing*/
  1402. i_ret = 0;
  1403. } else {
  1404. BTIF_WARN_FUNC("operation is not allowed, current state:%d\n",
  1405. state);
  1406. i_ret = E_BTIF_INVAL_STATE;
  1407. }
  1408. /*anyway, set to B_S_DPIDLE state*/
  1409. if (0 == i_ret)
  1410. i_ret = _btif_state_set(p_btif, B_S_DPIDLE);
  1411. return i_ret;
  1412. }
  1413. int btif_enter_dpidle(p_mtk_btif p_btif)
  1414. {
  1415. int i_ret = 0;
  1416. /*hold state mechine lock*/
  1417. if (_btif_state_hold(p_btif))
  1418. return E_BTIF_INTR;
  1419. i_ret = _btif_enter_dpidle(p_btif);
  1420. BTIF_STATE_RELEASE(p_btif);
  1421. return i_ret;
  1422. }
  1423. int _btif_exit_dpidle_from_dpidle(p_mtk_btif p_btif)
  1424. {
  1425. int i_ret = 0;
  1426. /*in dpidle state, only need to open related clock*/
  1427. if (p_btif->tx_mode == BTIF_MODE_DMA) {
  1428. /*enable BTIF Tx DMA's clock*/
  1429. i_ret += hal_btif_dma_clk_ctrl(p_btif->p_tx_dma->p_dma_info,
  1430. CLK_OUT_ENABLE);
  1431. }
  1432. if (p_btif->rx_mode == BTIF_MODE_DMA) {
  1433. /*enable BTIF Rx DMA's clock*/
  1434. i_ret += hal_btif_dma_clk_ctrl(p_btif->p_rx_dma->p_dma_info,
  1435. CLK_OUT_ENABLE);
  1436. }
  1437. /*enable BTIF's clock*/
  1438. i_ret += hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_ENABLE);
  1439. if (0 != i_ret)
  1440. BTIF_WARN_FUNC("failed, i_ret:%d\n", i_ret);
  1441. return i_ret;
  1442. }
  1443. int _btif_exit_dpidle_from_sus(p_mtk_btif p_btif)
  1444. {
  1445. /*in suspend state, need to do driver re-init*/
  1446. int i_ret = _btif_init(p_btif);
  1447. return i_ret;
  1448. }
  1449. int _btif_enter_dpidle_from_sus(p_mtk_btif p_btif)
  1450. {
  1451. /*do driiver reinit*/
  1452. int i_ret = _btif_init(p_btif);
  1453. if (0 == i_ret)
  1454. i_ret = _btif_enter_dpidle_from_on(p_btif);
  1455. return i_ret;
  1456. }
  1457. int _btif_enter_dpidle_from_on(p_mtk_btif p_btif)
  1458. {
  1459. #define MAX_WAIT_TIME_MS 5000
  1460. /*this max wait time cannot exceed 12s,
  1461. because dpm will monitor each device's
  1462. resume/suspend process by start up a watch dog timer of 12s
  1463. incase of one driver's suspend/resume process block other device's suspend/resume
  1464. */
  1465. int i_ret = 0;
  1466. unsigned int retry = 0;
  1467. unsigned int wait_period = 1;
  1468. unsigned int max_retry = MAX_WAIT_TIME_MS / wait_period;
  1469. struct timeval timer_start;
  1470. struct timeval timer_now;
  1471. do_gettimeofday(&timer_start);
  1472. while ((!_btif_is_tx_complete(p_btif)) && (retry < max_retry)) {
  1473. do_gettimeofday(&timer_now);
  1474. if ((MAX_WAIT_TIME_MS/1000) <= (timer_now.tv_sec - timer_start.tv_sec)) {
  1475. BTIF_WARN_FUNC("max retry timer expired, timer_start.tv_sec:%d, timer_now.tv_sec:%d,",
  1476. "retry:%d\n", timer_start.tv_sec, timer_now.tv_sec, retry);
  1477. break;
  1478. }
  1479. msleep(wait_period);
  1480. retry++;
  1481. }
  1482. if (retry < max_retry) {
  1483. if (p_btif->tx_mode == BTIF_MODE_DMA) {
  1484. /*disable BTIF Tx DMA's clock*/
  1485. i_ret +=
  1486. hal_btif_dma_clk_ctrl(p_btif->p_tx_dma->p_dma_info,
  1487. CLK_OUT_DISABLE);
  1488. }
  1489. if (p_btif->rx_mode == BTIF_MODE_DMA) {
  1490. /*disable BTIF Rx DMA's clock*/
  1491. i_ret +=
  1492. hal_btif_dma_clk_ctrl(p_btif->p_rx_dma->p_dma_info,
  1493. CLK_OUT_DISABLE);
  1494. }
  1495. /*disable BTIF's clock*/
  1496. i_ret +=
  1497. hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_DISABLE);
  1498. if (i_ret)
  1499. BTIF_WARN_FUNC("failed, i_ret:%d\n", i_ret);
  1500. } else
  1501. i_ret = -1;
  1502. return i_ret;
  1503. }
  1504. int _btif_dpidle_notify_ctrl(p_mtk_btif p_btif, ENUM_BTIF_DPIDLE_CTRL en_flag)
  1505. {
  1506. /*call WCP's API to control deepidle's enable/disable*/
  1507. if (BTIF_DPIDLE_DISABLE == en_flag)
  1508. hal_btif_pm_ops(p_btif->p_btif_info, BTIF_PM_DPIDLE_DIS);
  1509. else
  1510. hal_btif_pm_ops(p_btif->p_btif_info, BTIF_PM_DPIDLE_EN);
  1511. return 0;
  1512. }
  1513. int btif_rx_cb_reg(p_mtk_btif p_btif, MTK_WCN_BTIF_RX_CB rx_cb)
  1514. {
  1515. if (p_btif->rx_cb) {
  1516. BTIF_WARN_FUNC
  1517. ("rx cb already exist, rewrite from (0x%p) to (0x%p)\n",
  1518. p_btif->rx_cb, rx_cb);
  1519. }
  1520. p_btif->rx_cb = rx_cb;
  1521. return 0;
  1522. }
  1523. int btif_raise_wak_signal(p_mtk_btif p_btif)
  1524. {
  1525. int i_ret = 0;
  1526. P_MTK_BTIF_INFO_STR p_btif_info = p_btif->p_btif_info;
  1527. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  1528. hal_btif_clk_ctrl(p_btif->p_btif_info, CLK_OUT_ENABLE);
  1529. #endif
  1530. i_ret = hal_btif_raise_wak_sig(p_btif_info);
  1531. #if MTK_BTIF_ENABLE_CLK_REF_COUNTER
  1532. hal_btif_clk_ctrl(p_btif_info, CLK_OUT_DISABLE);
  1533. #endif
  1534. return i_ret;
  1535. }
  1536. bool _btif_is_tx_complete(p_mtk_btif p_btif)
  1537. {
  1538. bool b_ret = false;
  1539. ENUM_BTIF_MODE tx_mode = p_btif->tx_mode;
  1540. /*make sure BTIF tx finished in PIO mode
  1541. make sure BTIF tx finished and DMA tx finished in DMA mode
  1542. */
  1543. if (BTIF_MODE_DMA == tx_mode) {
  1544. b_ret = hal_dma_is_tx_complete(p_btif->p_tx_dma->p_dma_info);
  1545. if (b_ret == false) {
  1546. BTIF_DBG_FUNC("Tx DMA is not finished\n");
  1547. return b_ret;
  1548. }
  1549. }
  1550. b_ret = hal_btif_is_tx_complete(p_btif->p_btif_info);
  1551. if (b_ret == false) {
  1552. BTIF_DBG_FUNC("BTIF Tx is not finished\n");
  1553. return b_ret;
  1554. }
  1555. b_ret = true;
  1556. return b_ret;
  1557. }
  1558. /*--------------------------------Functions-------------------------------------------*/
  1559. static int _btif_vfifo_init(p_mtk_btif_dma p_dma)
  1560. {
  1561. P_DMA_VFIFO p_vfifo = NULL;
  1562. struct device *dev = NULL;
  1563. p_mtk_btif p_btif = NULL;
  1564. if (NULL == p_dma) {
  1565. BTIF_ERR_FUNC("p_dma is NULL\n");
  1566. return E_BTIF_INVAL_PARAM;
  1567. }
  1568. p_btif = (p_mtk_btif)p_dma->p_btif;
  1569. if (NULL == p_btif) {
  1570. BTIF_ERR_FUNC("invalid parameter: p_btif(0x%p)\n", p_btif);
  1571. return E_BTIF_INVAL_PARAM;
  1572. }
  1573. dev = (struct device *)p_btif->private_data;
  1574. if (NULL == dev)
  1575. BTIF_WARN_FUNC("Null dev pointer!!!!\n");
  1576. p_vfifo = p_dma->p_dma_info->p_vfifo;
  1577. if (NULL != p_vfifo->p_vir_addr) {
  1578. BTIF_ERR_FUNC
  1579. ("BTIF vFIFO memory already allocated, do nothing\n");
  1580. return E_BTIF_BAD_POINTER;
  1581. }
  1582. /*vFIFO memory allocation*/
  1583. p_vfifo->p_vir_addr = dma_zalloc_coherent(dev,
  1584. p_vfifo->vfifo_size,
  1585. &p_vfifo->phy_addr, GFP_DMA | GFP_DMA32);
  1586. if (NULL == p_vfifo->p_vir_addr) {
  1587. BTIF_ERR_FUNC("alloc vFIFO memory for BTIF failed\n");
  1588. return E_BTIF_FAIL;
  1589. }
  1590. if (sizeof(dma_addr_t) == sizeof(unsigned long long))
  1591. BTIF_INFO_FUNC("alloc vFIFO for BTIF succeed in arch64,vir addr:0x%p,",
  1592. "phy addr:0x%llx\n", p_vfifo->p_vir_addr, p_vfifo->phy_addr);
  1593. else
  1594. BTIF_INFO_FUNC("alloc vFIFO for BTIF succeed in arch32,vir addr:0x%p,",
  1595. "phy addr:0x%08x\n", p_vfifo->p_vir_addr, p_vfifo->phy_addr);
  1596. return 0;
  1597. }
  1598. static int _btif_vfifo_deinit(p_mtk_btif_dma p_dma)
  1599. {
  1600. P_DMA_VFIFO p_vfifo = NULL;
  1601. struct device *dev = NULL;
  1602. p_mtk_btif p_btif = NULL;
  1603. if (NULL == p_dma) {
  1604. BTIF_ERR_FUNC("p_dma is NULL\n");
  1605. return E_BTIF_INVAL_PARAM;
  1606. }
  1607. p_btif = (p_mtk_btif)p_dma->p_btif;
  1608. if (NULL == p_btif) {
  1609. BTIF_ERR_FUNC("invalid parameter: p_btif(0x%p)\n", p_btif);
  1610. return E_BTIF_INVAL_PARAM;
  1611. }
  1612. dev = (struct device *)p_btif->private_data;
  1613. if (NULL == dev)
  1614. BTIF_WARN_FUNC("Null dev pointer!!!!\n");
  1615. p_vfifo = p_dma->p_dma_info->p_vfifo;
  1616. /*free DMA memory if allocated successfully before*/
  1617. if (NULL != p_vfifo->p_vir_addr) {
  1618. dma_free_coherent(dev,
  1619. p_vfifo->vfifo_size,
  1620. p_vfifo->p_vir_addr, p_vfifo->phy_addr);
  1621. p_vfifo->p_vir_addr = NULL;
  1622. }
  1623. return 0;
  1624. }
  1625. static int _btif_state_init(p_mtk_btif p_btif)
  1626. {
  1627. if (NULL == p_btif) {
  1628. BTIF_ERR_FUNC("p_btif is NULL\n");
  1629. return E_BTIF_INVAL_PARAM;
  1630. }
  1631. p_btif->state = B_S_OFF;
  1632. mutex_init(&(p_btif->state_mtx));
  1633. return 0;
  1634. }
  1635. static int _btif_state_hold(p_mtk_btif p_btif)
  1636. {
  1637. return mutex_lock_killable(&(p_btif->state_mtx));
  1638. }
  1639. static int _btif_state_set(p_mtk_btif p_btif, ENUM_BTIF_STATE state)
  1640. {
  1641. /*chaozhong: To do: need to finished state mechine here*/
  1642. int i_ret = 0;
  1643. int ori_state = p_btif->state;
  1644. if (ori_state == state) {
  1645. BTIF_INFO_FUNC("already in %s state\n", g_state[state]);
  1646. return i_ret;
  1647. }
  1648. if ((B_S_OFF <= state) && (B_S_MAX > state)) {
  1649. BTIF_DBG_FUNC("%s->%s request\n", g_state[ori_state],
  1650. g_state[state]);
  1651. if (B_S_ON == state)
  1652. _btif_dpidle_notify_ctrl(p_btif, BTIF_DPIDLE_DISABLE);
  1653. switch (ori_state) {
  1654. case B_S_ON:
  1655. /*B_S_ON can only be switched to B_S_OFF, B_S_SUSPEND and B_S_DPIDLE*/
  1656. /*B_S_ON->B_S_OFF : do nothing here*/
  1657. /*B_S_ON->B_S_DPLE : disable clock backup
  1658. BTIF and DMA controller's register if necessary*/
  1659. if (B_S_DPIDLE == state) {
  1660. /*clock controlled id done in _btif_enter_dpidle*/
  1661. p_btif->state = state;
  1662. i_ret = 0;
  1663. } else if (B_S_OFF == state) {
  1664. /*clock controlled is done in btif_close*/
  1665. p_btif->state = state;
  1666. i_ret = 0;
  1667. } else if (B_S_SUSPEND == state) {
  1668. /*clock controlled is done in btif_close*/
  1669. p_btif->state = state;
  1670. i_ret = 0;
  1671. } else {
  1672. BTIF_ERR_FUNC("%s->%s is not allowed\n",
  1673. g_state[ori_state],
  1674. g_state[state]);
  1675. i_ret = E_BTIF_INVAL_STATE;
  1676. }
  1677. break;
  1678. case B_S_DPIDLE:
  1679. /*B_S_DPIDLE can only be switched to B_S_ON and B_S_SUSPEND*/
  1680. /*B_S_DPIDLE-> B_S_ON: do nothing for this moment*/
  1681. /*B_S_DPIDLE-> B_S_SUSPEND:
  1682. disable clock backup BTIF and DMA controller's register if necessary*/
  1683. if (B_S_ON == state) {
  1684. /*clock controlled id done in _btif_exit_dpidle*/
  1685. p_btif->state = state;
  1686. i_ret = 0;
  1687. } else if (B_S_SUSPEND == state) {
  1688. /*clock controlled is done in _btif_exit_dpidle*/
  1689. p_btif->state = state;
  1690. i_ret = 0;
  1691. } else {
  1692. BTIF_ERR_FUNC("%s->%s is not allowed\n",
  1693. g_state[ori_state],
  1694. g_state[state]);
  1695. i_ret = E_BTIF_INVAL_STATE;
  1696. }
  1697. break;
  1698. case B_S_SUSPEND:
  1699. /*B_S_SUSPEND can be switched to B_S_IDLE and B_S_ON*/
  1700. /*reinit BTIF controller and DMA controller*/
  1701. if (B_S_DPIDLE == state) {
  1702. /*system call resume API, do resume operation,
  1703. change to deepidle state*/
  1704. p_btif->state = state;
  1705. i_ret = 0;
  1706. } else if (B_S_ON == state) {
  1707. /*when stp want to send data before
  1708. system do resume operation*/
  1709. p_btif->state = state;
  1710. i_ret = 0;
  1711. } else {
  1712. BTIF_ERR_FUNC("%s->%s is not allowed\n",
  1713. g_state[ori_state],
  1714. g_state[state]);
  1715. i_ret = E_BTIF_INVAL_STATE;
  1716. }
  1717. break;
  1718. case B_S_OFF:{
  1719. /*B_S_OFF can only be switched to B_S_ON*/
  1720. if (B_S_ON == state) {
  1721. /*clock controlled is done in btif_open*/
  1722. p_btif->state = state;
  1723. i_ret = 0;
  1724. } else {
  1725. BTIF_ERR_FUNC("%s->%s is not allowed\n",
  1726. g_state[ori_state],
  1727. g_state[state]);
  1728. i_ret = E_BTIF_INVAL_STATE;
  1729. }
  1730. }
  1731. break;
  1732. default:
  1733. /*no this possibility*/
  1734. BTIF_ERR_FUNC
  1735. ("state change request is not allowed, this should never happen\n");
  1736. break;
  1737. }
  1738. if (B_S_ON != state)
  1739. _btif_dpidle_notify_ctrl(p_btif, BTIF_DPIDLE_ENABLE);
  1740. } else {
  1741. i_ret = E_BTIF_INVAL_PARAM;
  1742. BTIF_ERR_FUNC("invalid state:%d, do nothing\n", state);
  1743. }
  1744. return i_ret;
  1745. }
  1746. static ENUM_BTIF_STATE _btif_state_get(p_mtk_btif p_btif)
  1747. {
  1748. return p_btif->state;
  1749. }
  1750. static int _btif_state_release(p_mtk_btif p_btif)
  1751. {
  1752. int i_ret = 0;
  1753. BTIF_MUTEX_UNLOCK(&(p_btif->state_mtx));
  1754. return i_ret;
  1755. }
  1756. static int _btif_state_deinit(p_mtk_btif p_btif)
  1757. {
  1758. if (NULL == p_btif) {
  1759. BTIF_ERR_FUNC("p_btif is NULL\n");
  1760. return E_BTIF_INVAL_PARAM;
  1761. }
  1762. p_btif->state = B_S_OFF;
  1763. mutex_destroy(&(p_btif->state_mtx));
  1764. return 0;
  1765. }
  1766. static int btif_rx_data_consummer(p_mtk_btif p_btif)
  1767. {
  1768. unsigned int length = 0;
  1769. unsigned char *p_buf = NULL;
  1770. /*get BTIF rx buffer's information*/
  1771. p_btif_buf_str p_bbs = &(p_btif->btif_buf);
  1772. /*wr_idx of btif_buf may be modified in IRQ handler,
  1773. in order not to be effected by case in which irq interrupt this operation,
  1774. we record wr_idx here*/
  1775. unsigned int wr_idx = p_bbs->wr_idx;
  1776. length = BBS_COUNT_CUR(p_bbs, wr_idx);
  1777. /*make sure length of rx buffer data > 0*/
  1778. do {
  1779. if (0 < length) {
  1780. /*check if rx_cb empty or not, if registered ,
  1781. call user's rx callback to handle these data*/
  1782. if (p_btif->rx_cb) {
  1783. if (p_bbs->rd_idx <= wr_idx) {
  1784. p_buf = BBS_PTR(p_bbs, p_bbs->rd_idx);
  1785. /* p_buf = &(p_bbs->buf[p_bbs->rd_idx]); */
  1786. /* length = BBS_COUNT(p_bbs); */
  1787. length = (wr_idx >= (p_bbs)->rd_idx) ?
  1788. (wr_idx - (p_bbs)->rd_idx) :
  1789. BBS_SIZE(p_bbs) -
  1790. ((p_bbs)->rd_idx - wr_idx);
  1791. if (p_btif->rx_cb)
  1792. (*(p_btif->rx_cb)) (p_buf, length);
  1793. else
  1794. BTIF_ERR_FUNC("p_btif->rx_cb is NULL\n");
  1795. /*update rx data read index*/
  1796. p_bbs->rd_idx = wr_idx;
  1797. } else {
  1798. unsigned int len_tail =
  1799. BBS_SIZE(p_bbs) - (p_bbs)->rd_idx;
  1800. /*p_buf = &(p_bbs->buf[p_bbs->->rd_idx]);*/
  1801. p_buf = BBS_PTR(p_bbs, p_bbs->rd_idx);
  1802. if (p_btif->rx_cb)
  1803. (*(p_btif->rx_cb)) (p_buf, len_tail);
  1804. else
  1805. BTIF_ERR_FUNC("p_btif->rx_cb is NULL\n");
  1806. length = BBS_COUNT_CUR(p_bbs, wr_idx);
  1807. length -= len_tail;
  1808. /*p_buf = &(p_bbs->buf[0]);*/
  1809. p_buf = BBS_PTR(p_bbs, 0);
  1810. if (p_btif->rx_cb)
  1811. (*(p_btif->rx_cb)) (p_buf, length);
  1812. else
  1813. BTIF_ERR_FUNC("p_btif->rx_cb is NULL\n");
  1814. /*update rx data read index*/
  1815. p_bbs->rd_idx = wr_idx;
  1816. }
  1817. } else if (NULL != p_btif->rx_notify) {
  1818. (*p_btif->rx_notify) ();
  1819. } else {
  1820. BTIF_WARN_FUNC
  1821. ("p_btif:0x%p, both rx_notify and rx_cb are NULL\n",
  1822. p_btif);
  1823. break;
  1824. }
  1825. } else {
  1826. BTIF_DBG_FUNC("length:%d\n", length);
  1827. break;
  1828. }
  1829. wr_idx = p_bbs->wr_idx;
  1830. length = BBS_COUNT_CUR(p_bbs, wr_idx);
  1831. } while (1);
  1832. return length;
  1833. }
  1834. #if BTIF_RXD_BE_BLOCKED_DETECT
  1835. static int mtk_btif_rxd_be_blocked_by_timer(void)
  1836. {
  1837. int ret = 0;
  1838. int counter = 0;
  1839. unsigned int i;
  1840. struct timeval now;
  1841. int time_gap[MAX_BTIF_RXD_TIME_REC];
  1842. do_gettimeofday(&now);
  1843. for (i = 0; i < MAX_BTIF_RXD_TIME_REC; i++) {
  1844. BTIF_INFO_FUNC("btif_rxd_time_stamp[%d]=%d.%d\n", i,
  1845. btif_rxd_time_stamp[i].tv_sec, btif_rxd_time_stamp[i].tv_usec);
  1846. if (now.tv_sec >= btif_rxd_time_stamp[i].tv_sec) {
  1847. time_gap[i] = now.tv_sec - btif_rxd_time_stamp[i].tv_sec;
  1848. time_gap[i] *= 1000000; /*second*/
  1849. if (now.tv_usec >= btif_rxd_time_stamp[i].tv_usec)
  1850. time_gap[i] += now.tv_usec - btif_rxd_time_stamp[i].tv_usec;
  1851. else
  1852. time_gap[i] += 1000000 - now.tv_usec + btif_rxd_time_stamp[i].tv_usec;
  1853. if (time_gap[i] > 1000000)
  1854. counter++;
  1855. BTIF_INFO_FUNC("time_gap[%d]=%d,counter:%d\n", i, time_gap[i], counter);
  1856. } else {
  1857. time_gap[i] = 0;
  1858. BTIF_ERR_FUNC("abnormal case now:%d < time_stamp[%d]:%d\n", now.tv_sec,
  1859. i, btif_rxd_time_stamp[i].tv_usec);
  1860. }
  1861. }
  1862. if (counter > (MAX_BTIF_RXD_TIME_REC - 2))
  1863. ret = 1;
  1864. return ret;
  1865. }
  1866. static int mtk_btif_rxd_be_blocked_by_data(void)
  1867. {
  1868. unsigned int out_index = 0;
  1869. unsigned int in_index = 0;
  1870. unsigned int dump_size = 0;
  1871. unsigned int len = 0;
  1872. unsigned long flags;
  1873. unsigned int sync_pkt_n = 0;
  1874. P_BTIF_LOG_BUF_T p_log_buf = NULL;
  1875. P_BTIF_LOG_QUEUE_T p_log_que = NULL;
  1876. p_mtk_btif p_btif = &(g_btif[0]);
  1877. p_log_que = &p_btif->rx_log;
  1878. spin_lock_irqsave(&p_log_que->lock, flags);
  1879. in_index = p_log_que->in;
  1880. dump_size = p_log_que->size;
  1881. out_index = p_log_que->size >=
  1882. BTIF_LOG_ENTRY_NUM ? in_index : (BTIF_LOG_ENTRY_NUM -
  1883. p_log_que->size +
  1884. in_index) % BTIF_LOG_ENTRY_NUM;
  1885. if (0 != dump_size) {
  1886. while (dump_size--) {
  1887. p_log_buf = p_log_que->p_queue[0] + out_index;
  1888. len = p_log_buf->len;
  1889. if (len > BTIF_LOG_SZ)
  1890. len = BTIF_LOG_SZ;
  1891. if ((0x7f == *(p_log_buf->buffer)) && (0x7f == *(p_log_buf->buffer + 1))) {
  1892. sync_pkt_n++;
  1893. BTIF_INFO_FUNC("tx pkt_count:%d is sync pkt\n", out_index);
  1894. }
  1895. out_index++;
  1896. out_index %= BTIF_LOG_ENTRY_NUM;
  1897. }
  1898. }
  1899. if (0 == sync_pkt_n)
  1900. BTIF_ERR_FUNC("there is no sync pkt in BTIF buffer\n");
  1901. else
  1902. BTIF_ERR_FUNC("there are %d sync pkt in BTIF buffer\n", sync_pkt_n);
  1903. spin_unlock_irqrestore(&p_log_que->lock, flags);
  1904. return sync_pkt_n;
  1905. }
  1906. int mtk_btif_rxd_be_blocked_flag_get(void)
  1907. {
  1908. int ret = 0;
  1909. int condition1 = 0, condition2 = 0;
  1910. condition1 = mtk_btif_rxd_be_blocked_by_timer();
  1911. condition2 = mtk_btif_rxd_be_blocked_by_data();
  1912. if (condition1 && condition2) {
  1913. BTIF_ERR_FUNC("btif_rxd thread be blocked too long!\n");
  1914. ret = 1;
  1915. }
  1916. return ret;
  1917. }
  1918. #endif
  1919. static int btif_rx_thread(void *p_data)
  1920. {
  1921. #if BTIF_RXD_BE_BLOCKED_DETECT
  1922. unsigned int i = 0;
  1923. #endif
  1924. p_mtk_btif p_btif = (p_mtk_btif)p_data;
  1925. while (1) {
  1926. if (p_btif->enable) {
  1927. /*if BTIF is enabled we will polling if there's any data received at least each 360ms*/
  1928. wait_for_completion_interruptible_timeout(&p_btif->rx_comp, msecs_to_jiffies(360));
  1929. } else {
  1930. /*if BTIF is not enabled, stop polling*/
  1931. wait_for_completion_interruptible(&p_btif->rx_comp);
  1932. }
  1933. if (kthread_should_stop()) {
  1934. BTIF_WARN_FUNC("btif rx thread stoping ...\n");
  1935. break;
  1936. }
  1937. #ifdef BTIF_RXD_BE_BLOCKED_DETECT
  1938. do_gettimeofday(&btif_rxd_time_stamp[i]);
  1939. i++;
  1940. if (i >= MAX_BTIF_RXD_TIME_REC)
  1941. i = 0;
  1942. #endif
  1943. btif_rx_data_consummer(p_btif);
  1944. }
  1945. return 0;
  1946. }
  1947. static void btif_rx_worker(struct work_struct *p_work)
  1948. {
  1949. /*get mtk_btif's pointer*/
  1950. p_mtk_btif p_btif = container_of(p_work, mtk_btif, rx_work);
  1951. BTIF_DBG_FUNC("p_btif:0x%p\n", p_btif);
  1952. /*lock rx_mutex*/
  1953. if (mutex_lock_killable(&(p_btif->rx_mtx))) {
  1954. BTIF_ERR_FUNC("mutex_lock_killable return failed\n");
  1955. return;
  1956. }
  1957. btif_rx_data_consummer(p_btif);
  1958. BTIF_MUTEX_UNLOCK(&(p_btif->rx_mtx));
  1959. }
  1960. static void btif_tx_worker(struct work_struct *p_work)
  1961. {
  1962. int i_ret = 0;
  1963. int leng_sent = 0;
  1964. /*tx fifo out*/
  1965. int how_much_get = 0;
  1966. unsigned char local_buf[384];
  1967. /*get mtk_btif's pointer*/
  1968. p_mtk_btif p_btif = container_of(p_work, mtk_btif, tx_work);
  1969. BTIF_DBG_FUNC("p_btif:0x%p\n", p_btif);
  1970. if (mutex_lock_killable(&(p_btif->tx_mtx))) {
  1971. BTIF_ERR_FUNC("mutex_lock_killable return failed\n");
  1972. return;
  1973. }
  1974. how_much_get =
  1975. kfifo_out(p_btif->p_tx_fifo, local_buf, sizeof(local_buf));
  1976. do {
  1977. while (leng_sent < how_much_get) {
  1978. i_ret = _btif_send_data(p_btif,
  1979. local_buf + leng_sent,
  1980. how_much_get - leng_sent);
  1981. if (0 < i_ret) {
  1982. leng_sent += i_ret;
  1983. } else if (0 == i_ret) {
  1984. BTIF_WARN_FUNC
  1985. ("_btif_send_data return 0, retry\n");
  1986. } else {
  1987. BTIF_WARN_FUNC
  1988. ("btif send data fail,reset tx fifo, i_ret(%d)\n",
  1989. i_ret);
  1990. kfifo_reset(p_btif->p_tx_fifo);
  1991. break;
  1992. }
  1993. }
  1994. how_much_get =
  1995. kfifo_out(p_btif->p_tx_fifo, local_buf, sizeof(local_buf));
  1996. leng_sent = 0;
  1997. } while (0 < how_much_get);
  1998. BTIF_MUTEX_UNLOCK(&(p_btif->tx_mtx));
  1999. }
  2000. static void btif_rx_tasklet(unsigned long func_data)
  2001. {
  2002. unsigned long flags;
  2003. /*get mtk_btif's pointer*/
  2004. p_mtk_btif p_btif = (p_mtk_btif) func_data;
  2005. BTIF_DBG_FUNC("p_btif:0x%p\n", p_btif);
  2006. /*lock rx_spinlock*/
  2007. spin_lock_irqsave(&p_btif->rx_tasklet_spinlock, flags);
  2008. btif_rx_data_consummer(p_btif);
  2009. spin_unlock_irqrestore(&p_btif->rx_tasklet_spinlock, flags);
  2010. }
  2011. static int _btif_tx_ctx_init(p_mtk_btif p_btif)
  2012. {
  2013. int i_ret = -1;
  2014. if (NULL == p_btif) {
  2015. BTIF_ERR_FUNC("p_btif is NULL\n");
  2016. return E_BTIF_INVAL_PARAM;
  2017. }
  2018. if (BTIF_TX_SINGLE_CTX == p_btif->tx_ctx) {
  2019. p_btif->p_tx_wq = create_singlethread_workqueue("btif_txd");
  2020. if (!(p_btif->p_tx_wq)) {
  2021. BTIF_ERR_FUNC
  2022. ("create_singlethread_workqueue for tx thread fail\n");
  2023. i_ret = -ENOMEM;
  2024. goto btm_init_err;
  2025. }
  2026. mutex_init(&(p_btif->tx_mtx));
  2027. /* init btif tx work */
  2028. INIT_WORK(&(p_btif->tx_work), btif_tx_worker);
  2029. BTIF_INFO_FUNC("btif_tx_worker init succeed\n");
  2030. p_btif->p_tx_fifo = kzalloc(sizeof(struct kfifo), GFP_ATOMIC);
  2031. if (NULL == p_btif->p_tx_fifo) {
  2032. i_ret = -ENOMEM;
  2033. BTIF_ERR_FUNC("kzalloc for p_btif->p_tx_fifo failed\n");
  2034. goto btm_init_err;
  2035. }
  2036. i_ret = kfifo_alloc(p_btif->p_tx_fifo,
  2037. BTIF_TX_FIFO_SIZE, GFP_ATOMIC);
  2038. if (0 != i_ret) {
  2039. BTIF_ERR_FUNC("kfifo_alloc failed, errno(%d)\n", i_ret);
  2040. i_ret = -ENOMEM;
  2041. goto btm_init_err;
  2042. }
  2043. } else if (BTIF_TX_USER_CTX == p_btif->tx_ctx) {
  2044. BTIF_INFO_FUNC
  2045. ("nothing is done when btif tx in user's thread\n");
  2046. } else {
  2047. BTIF_ERR_FUNC("unsupported tx context type:%d\n",
  2048. p_btif->tx_ctx);
  2049. goto btm_init_err;
  2050. }
  2051. BTIF_INFO_FUNC("succeed\n");
  2052. i_ret = 0;
  2053. return i_ret;
  2054. btm_init_err:
  2055. if (BTIF_TX_SINGLE_CTX == p_btif->tx_ctx) {
  2056. if (p_btif->p_tx_wq) {
  2057. destroy_workqueue(p_btif->p_tx_wq);
  2058. p_btif->p_tx_wq = NULL;
  2059. BTIF_INFO_FUNC("btif_tx_workqueue destroyed\n");
  2060. }
  2061. kfree(p_btif->p_tx_fifo);
  2062. }
  2063. return i_ret;
  2064. }
  2065. static int _btif_tx_ctx_deinit(p_mtk_btif p_btif)
  2066. {
  2067. int i_ret = 0;
  2068. if (BTIF_TX_SINGLE_CTX == p_btif->tx_ctx) {
  2069. if (p_btif->p_tx_wq) {
  2070. destroy_workqueue(p_btif->p_tx_wq);
  2071. p_btif->p_tx_wq = NULL;
  2072. BTIF_INFO_FUNC("btif_tx_workqueue destroyed\n");
  2073. }
  2074. if (p_btif->p_tx_fifo) {
  2075. kfifo_free(p_btif->p_tx_fifo);
  2076. kfree(p_btif->p_tx_fifo);
  2077. p_btif->p_tx_fifo = NULL;
  2078. }
  2079. }
  2080. return i_ret;
  2081. }
  2082. static int _btif_rx_btm_init(p_mtk_btif p_btif)
  2083. {
  2084. int i_ret = -1;
  2085. if (NULL == p_btif) {
  2086. BTIF_ERR_FUNC("p_btif is NULL\n");
  2087. return E_BTIF_INVAL_PARAM;
  2088. }
  2089. if (BTIF_THREAD_CTX == p_btif->btm_type) {
  2090. init_completion(&p_btif->rx_comp);
  2091. /*create kernel thread for later rx data handle*/
  2092. p_btif->p_task = kthread_create(btif_rx_thread, p_btif, "btif_rxd");
  2093. if (NULL == p_btif->p_task) {
  2094. BTIF_ERR_FUNC("kthread_create fail\n");
  2095. i_ret = -ENOMEM;
  2096. goto btm_init_err;
  2097. }
  2098. #if ENABLE_BTIF_RX_THREAD_RT_SCHED
  2099. {
  2100. int i_ret = -1;
  2101. int policy = SCHED_FIFO;
  2102. struct sched_param param;
  2103. param.sched_priority = MAX_RT_PRIO - 20;
  2104. i_ret = sched_setscheduler(p_btif->p_task, policy, &param);
  2105. if (0 != i_ret)
  2106. BTIF_WARN_FUNC("set RT to btif_rxd workqueue failed\n");
  2107. else
  2108. BTIF_INFO_FUNC("set RT to btif_rxd workqueue succeed\n");
  2109. }
  2110. #endif
  2111. wake_up_process(p_btif->p_task);
  2112. BTIF_INFO_FUNC("btif_rxd start to work!\n");
  2113. } else if (BTIF_WQ_CTX == p_btif->btm_type) {
  2114. p_btif->p_rx_wq = create_singlethread_workqueue("btif_rxwq");
  2115. if (!(p_btif->p_rx_wq)) {
  2116. BTIF_ERR_FUNC("create_singlethread_workqueue fail\n");
  2117. i_ret = -ENOMEM;
  2118. goto btm_init_err;
  2119. }
  2120. mutex_init(&(p_btif->rx_mtx));
  2121. /* init btif rx work */
  2122. INIT_WORK(&(p_btif->rx_work), btif_rx_worker);
  2123. BTIF_INFO_FUNC("btif_rx_worker init succeed\n");
  2124. } else if (BTIF_TASKLET_CTX == p_btif->btm_type) {
  2125. /*init rx tasklet*/
  2126. tasklet_init(&(p_btif->rx_tasklet), btif_rx_tasklet,
  2127. (unsigned long)p_btif);
  2128. spin_lock_init(&(p_btif->rx_tasklet_spinlock));
  2129. BTIF_INFO_FUNC("btif_rx_tasklet init succeed\n");
  2130. } else {
  2131. BTIF_ERR_FUNC("unsupported rx context type:%d\n",
  2132. p_btif->btm_type);
  2133. }
  2134. /*spinlock init*/
  2135. spin_lock_init(&(p_btif->rx_irq_spinlock));
  2136. BTIF_INFO_FUNC("rx_spin_lock init succeed\n");
  2137. i_ret = 0;
  2138. return i_ret;
  2139. btm_init_err:
  2140. if (BTIF_THREAD_CTX == p_btif->btm_type) {
  2141. /*do nothing*/
  2142. BTIF_INFO_FUNC("failed\n");
  2143. } else if (BTIF_WQ_CTX == p_btif->btm_type) {
  2144. if (p_btif->p_rx_wq) {
  2145. destroy_workqueue(p_btif->p_rx_wq);
  2146. p_btif->p_rx_wq = NULL;
  2147. BTIF_INFO_FUNC("btif_rx_workqueue destroyed\n");
  2148. }
  2149. }
  2150. return i_ret;
  2151. }
  2152. static int _btif_rx_btm_sched(p_mtk_btif p_btif)
  2153. {
  2154. if (NULL == p_btif) {
  2155. BTIF_ERR_FUNC("p_btif is NULL\n");
  2156. return E_BTIF_INVAL_PARAM;
  2157. }
  2158. if (BTIF_THREAD_CTX == p_btif->btm_type) {
  2159. complete(&p_btif->rx_comp);
  2160. BTIF_DBG_FUNC("schedule btif_rx_thread\n");
  2161. } else if (BTIF_WQ_CTX == p_btif->btm_type) {
  2162. queue_work(p_btif->p_rx_wq, &(p_btif->rx_work));
  2163. BTIF_DBG_FUNC("schedule btif_rx_worker\n");
  2164. } else if (BTIF_TASKLET_CTX == p_btif->btm_type) {
  2165. /*schedule it!*/
  2166. tasklet_schedule(&(p_btif->rx_tasklet));
  2167. BTIF_DBG_FUNC("schedule btif_rx_tasklet\n");
  2168. } else {
  2169. BTIF_ERR_FUNC("unsupported rx context type:%d\n",
  2170. p_btif->btm_type);
  2171. }
  2172. return 0;
  2173. }
  2174. static int _btif_rx_btm_deinit(p_mtk_btif p_btif)
  2175. {
  2176. if (NULL == p_btif) {
  2177. BTIF_ERR_FUNC("p_btif is NULL\n");
  2178. return E_BTIF_INVAL_PARAM;
  2179. }
  2180. if (BTIF_THREAD_CTX == p_btif->btm_type) {
  2181. if (NULL != p_btif->p_task) {
  2182. BTIF_INFO_FUNC("signaling btif rx thread to stop ...\n");
  2183. kthread_stop(p_btif->p_task);
  2184. }
  2185. } else if (BTIF_WQ_CTX == p_btif->btm_type) {
  2186. if (p_btif->p_rx_wq) {
  2187. cancel_work_sync(&(p_btif->rx_work));
  2188. BTIF_INFO_FUNC("btif_rx_worker cancelled\n");
  2189. destroy_workqueue(p_btif->p_rx_wq);
  2190. p_btif->p_rx_wq = NULL;
  2191. BTIF_INFO_FUNC("btif_rx_workqueue destroyed\n");
  2192. }
  2193. mutex_destroy(&(p_btif->rx_mtx));
  2194. } else if (BTIF_TASKLET_CTX == p_btif->btm_type) {
  2195. tasklet_kill(&(p_btif->rx_tasklet));
  2196. BTIF_INFO_FUNC("rx_tasklet killed\n");
  2197. } else {
  2198. BTIF_ERR_FUNC("unsupported rx context type:%d\n",
  2199. p_btif->btm_type);
  2200. }
  2201. spin_lock_init(&(p_btif->rx_irq_spinlock));
  2202. return 0;
  2203. }
  2204. void btif_dump_bbs_str(unsigned char *p_str, p_btif_buf_str p_bbs)
  2205. {
  2206. BTIF_INFO_FUNC
  2207. ("%s UBS:0x%p\n Size:0x%p\n read:0x%08x\n write:0x%08x\n",
  2208. p_str, p_bbs, p_bbs->size, p_bbs->rd_idx, p_bbs->wr_idx);
  2209. }
  2210. unsigned int btif_bbs_write(p_btif_buf_str p_bbs,
  2211. unsigned char *p_buf, unsigned int buf_len)
  2212. {
  2213. /*in IRQ context, so read operation won't interrupt this operation*/
  2214. unsigned int wr_len = 0;
  2215. unsigned int emp_len = BBS_LEFT(p_bbs);
  2216. unsigned int ava_len = emp_len - 1;
  2217. p_mtk_btif p_btif = container_of(p_bbs, mtk_btif, btif_buf);
  2218. if (0 >= ava_len) {
  2219. BTIF_ERR_FUNC
  2220. ("no empty space left for write, (%d)ava_len, (%d)to write\n",
  2221. ava_len, buf_len);
  2222. hal_btif_dump_reg(p_btif->p_btif_info, REG_BTIF_ALL);
  2223. hal_dma_dump_reg(p_btif->p_rx_dma->p_dma_info, REG_RX_DMA_ALL);
  2224. return 0;
  2225. }
  2226. if (ava_len < buf_len) {
  2227. BTIF_ERR_FUNC("BTIF overrun, (%d)empty, (%d)needed\n",
  2228. emp_len, buf_len);
  2229. hal_btif_dump_reg(p_btif->p_btif_info, REG_BTIF_ALL);
  2230. hal_dma_dump_reg(p_btif->p_rx_dma->p_dma_info, REG_RX_DMA_ALL);
  2231. _btif_dump_memory("<DMA Rx vFIFO>", p_buf, buf_len);
  2232. }
  2233. if (buf_len >= g_max_pkg_len) {
  2234. BTIF_WARN_FUNC("buf_len too long, (%d)ava_len, (%d)to write\n",
  2235. ava_len, buf_len);
  2236. hal_btif_dump_reg(p_btif->p_btif_info, REG_BTIF_ALL);
  2237. hal_dma_dump_reg(p_btif->p_rx_dma->p_dma_info, REG_RX_DMA_ALL);
  2238. _btif_dump_memory("<DMA Rx vFIFO>", p_buf, buf_len);
  2239. }
  2240. wr_len = min(buf_len, ava_len);
  2241. btif_bbs_wr_direct(p_bbs, p_buf, wr_len);
  2242. if (BBS_COUNT(p_bbs) >= g_max_pding_data_size) {
  2243. BTIF_WARN_FUNC("Rx buf_len too long, size(%d)\n",
  2244. BBS_COUNT(p_bbs));
  2245. btif_dump_bbs_str("Rx buffer tooo long", p_bbs);
  2246. hal_btif_dump_reg(p_btif->p_btif_info, REG_BTIF_ALL);
  2247. hal_dma_dump_reg(p_btif->p_rx_dma->p_dma_info, REG_RX_DMA_ALL);
  2248. _btif_dump_memory("<DMA Rx vFIFO>", p_buf, buf_len);
  2249. BBS_INIT(p_bbs);
  2250. }
  2251. return wr_len;
  2252. }
  2253. unsigned int btif_bbs_read(p_btif_buf_str p_bbs,
  2254. unsigned char *p_buf, unsigned int buf_len)
  2255. {
  2256. unsigned int rd_len = 0;
  2257. unsigned int ava_len = 0;
  2258. unsigned int wr_idx = p_bbs->wr_idx;
  2259. ava_len = BBS_COUNT_CUR(p_bbs, wr_idx);
  2260. if (ava_len >= 4096) {
  2261. BTIF_WARN_FUNC("ava_len too long, size(%d)\n", ava_len);
  2262. btif_dump_bbs_str("Rx buffer tooo long", p_bbs);
  2263. }
  2264. if (0 != ava_len) {
  2265. if (buf_len >= ava_len) {
  2266. rd_len = ava_len;
  2267. if (wr_idx >= (p_bbs)->rd_idx) {
  2268. memcpy(p_buf, BBS_PTR(p_bbs,
  2269. p_bbs->rd_idx),
  2270. ava_len);
  2271. (p_bbs)->rd_idx = wr_idx;
  2272. } else {
  2273. unsigned int tail_len = BBS_SIZE(p_bbs) -
  2274. (p_bbs)->rd_idx;
  2275. memcpy(p_buf, BBS_PTR(p_bbs,
  2276. p_bbs->rd_idx),
  2277. tail_len);
  2278. memcpy(p_buf + tail_len, BBS_PTR(p_bbs,
  2279. 0), ava_len - tail_len);
  2280. (p_bbs)->rd_idx = wr_idx;
  2281. }
  2282. } else {
  2283. rd_len = buf_len;
  2284. if (wr_idx >= (p_bbs)->rd_idx) {
  2285. memcpy(p_buf, BBS_PTR(p_bbs,
  2286. p_bbs->rd_idx),
  2287. rd_len);
  2288. (p_bbs)->rd_idx = (p_bbs)->rd_idx + rd_len;
  2289. } else {
  2290. unsigned int tail_len = BBS_SIZE(p_bbs) -
  2291. (p_bbs)->rd_idx;
  2292. if (tail_len >= rd_len) {
  2293. memcpy(p_buf, BBS_PTR(p_bbs, p_bbs->rd_idx),
  2294. rd_len);
  2295. (p_bbs)->rd_idx =
  2296. ((p_bbs)->rd_idx + rd_len) & (BBS_MASK(p_bbs));
  2297. } else {
  2298. memcpy(p_buf, BBS_PTR(p_bbs, p_bbs->rd_idx), tail_len);
  2299. memcpy(p_buf + tail_len,
  2300. (p_bbs)->p_buf, rd_len - tail_len);
  2301. (p_bbs)->rd_idx = rd_len - tail_len;
  2302. }
  2303. }
  2304. }
  2305. }
  2306. mb();
  2307. return rd_len;
  2308. }
  2309. unsigned int btif_bbs_wr_direct(p_btif_buf_str p_bbs,
  2310. unsigned char *p_buf, unsigned int buf_len)
  2311. {
  2312. unsigned int tail_len = 0;
  2313. unsigned int l = 0;
  2314. unsigned int tmp_wr_idx = p_bbs->wr_idx;
  2315. tail_len = BBS_SIZE(p_bbs) - (tmp_wr_idx & BBS_MASK(p_bbs));
  2316. l = min(tail_len, buf_len);
  2317. memcpy((p_bbs->p_buf) + (tmp_wr_idx & BBS_MASK(p_bbs)), p_buf, l);
  2318. memcpy(p_bbs->p_buf, p_buf + l, buf_len - l);
  2319. mb();
  2320. tmp_wr_idx += buf_len;
  2321. tmp_wr_idx &= BBS_MASK(p_bbs);
  2322. p_bbs->wr_idx = tmp_wr_idx;
  2323. mb();
  2324. return buf_len;
  2325. }
  2326. int _btif_dma_write(p_mtk_btif p_btif,
  2327. const unsigned char *p_buf, unsigned int buf_len)
  2328. {
  2329. unsigned int i_ret = 0;
  2330. unsigned int retry = 0;
  2331. unsigned int max_tx_retry = 10;
  2332. P_MTK_DMA_INFO_STR p_dma_info = p_btif->p_tx_dma->p_dma_info;
  2333. _btif_irq_ctrl_sync(p_dma_info->p_irq, false);
  2334. do {
  2335. /*wait until tx is allowed*/
  2336. while (!hal_dma_is_tx_allow(p_dma_info) &&
  2337. (retry < max_tx_retry)) {
  2338. retry++;
  2339. if (retry >= max_tx_retry) {
  2340. BTIF_ERR_FUNC("wait for tx allowed timeout\n");
  2341. break;
  2342. }
  2343. }
  2344. if (retry >= max_tx_retry)
  2345. break;
  2346. if (buf_len <= hal_dma_get_ava_room(p_dma_info))
  2347. i_ret = hal_dma_send_data(p_dma_info, p_buf, buf_len);
  2348. else
  2349. i_ret = 0;
  2350. } while (0);
  2351. _btif_irq_ctrl_sync(p_dma_info->p_irq, true);
  2352. return i_ret;
  2353. }
  2354. int _btif_pio_write(p_mtk_btif p_btif,
  2355. const unsigned char *p_buf, unsigned int buf_len)
  2356. {
  2357. unsigned int i_ret = 0;
  2358. unsigned int sent_len = 0;
  2359. unsigned int retry = 0;
  2360. unsigned int max_tx_retry = 10;
  2361. P_MTK_BTIF_INFO_STR p_btif_info = p_btif->p_btif_info;
  2362. while ((sent_len < buf_len)) {
  2363. if (hal_btif_is_tx_allow(p_btif_info)) {
  2364. i_ret = hal_btif_send_data(p_btif_info,
  2365. p_buf + sent_len,
  2366. buf_len - sent_len);
  2367. if (0 < i_ret) {
  2368. sent_len += i_ret;
  2369. BTIF_DBG_FUNC("lent sent:%d, total sent:%d\n",
  2370. i_ret, sent_len);
  2371. retry = 0;
  2372. }
  2373. }
  2374. if ((++retry > max_tx_retry) || (0 > i_ret)) {
  2375. BTIF_INFO_FUNC("exceed retry times limit :%d\n", retry);
  2376. break;
  2377. }
  2378. }
  2379. i_ret = sent_len;
  2380. return i_ret;
  2381. }
  2382. int _btif_dump_memory(char *str, unsigned char *p_buf, unsigned int buf_len)
  2383. {
  2384. unsigned int idx = 0;
  2385. pr_debug("%s:, length:%d\n", str, buf_len);
  2386. for (idx = 0; idx < buf_len;) {
  2387. pr_debug("%02x ", p_buf[idx]);
  2388. idx++;
  2389. if (0 == idx % 8)
  2390. pr_debug("\n");
  2391. }
  2392. return 0;
  2393. }
  2394. int btif_send_data(p_mtk_btif p_btif,
  2395. const unsigned char *p_buf, unsigned int buf_len)
  2396. {
  2397. int i_ret = 0;
  2398. if (BTIF_TX_USER_CTX == p_btif->tx_ctx) {
  2399. i_ret = _btif_send_data(p_btif, p_buf, buf_len);
  2400. } else if (BTIF_TX_SINGLE_CTX == p_btif->tx_ctx) {
  2401. int length = 0;
  2402. /*tx fifo in*/
  2403. length = kfifo_in(p_btif->p_tx_fifo,
  2404. (unsigned char *)p_buf, buf_len);
  2405. if (length == buf_len) {
  2406. queue_work(p_btif->p_tx_wq, &(p_btif->tx_work));
  2407. BTIF_DBG_FUNC("schedule btif_tx_worker\n");
  2408. i_ret = length;
  2409. } else {
  2410. i_ret = 0;
  2411. BTIF_ERR_FUNC("fifo in failed, target len(%d),in len(%d),",
  2412. "don't schedule btif_tx_worker\n", buf_len, length);
  2413. }
  2414. } else {
  2415. BTIF_ERR_FUNC("invalid btif tx context:%d\n", p_btif->tx_ctx);
  2416. i_ret = 0;
  2417. }
  2418. return i_ret;
  2419. }
  2420. int _btif_send_data(p_mtk_btif p_btif,
  2421. const unsigned char *p_buf, unsigned int buf_len)
  2422. {
  2423. int i_ret = 0;
  2424. unsigned int state = 0;
  2425. /*make sure BTIF in ON state before doing tx operation*/
  2426. if (_btif_state_hold(p_btif))
  2427. return E_BTIF_INTR;
  2428. state = _btif_state_get(p_btif);
  2429. if (B_S_ON != state)
  2430. i_ret = _btif_exit_dpidle(p_btif);
  2431. if (0 != i_ret) {
  2432. i_ret = E_BTIF_INVAL_STATE;
  2433. } else if (BTIF_MODE_DMA == p_btif->tx_mode) {
  2434. /*_btif_dump_memory("tx data:", p_buf, buf_len);*/
  2435. i_ret = _btif_dma_write(p_btif, p_buf, buf_len);
  2436. } else if (BTIF_MODE_PIO == p_btif->tx_mode) {
  2437. /*_btif_dump_memory("tx data:", p_buf, buf_len);*/
  2438. i_ret = _btif_pio_write(p_btif, p_buf, buf_len);
  2439. } else {
  2440. BTIF_ERR_FUNC("invalid tx mode:%d\n", p_btif->tx_mode);
  2441. i_ret = 0;
  2442. }
  2443. /*save Tx packet here*/
  2444. if (0 < i_ret)
  2445. btif_log_buf_dmp_in(&p_btif->tx_log, p_buf, i_ret);
  2446. BTIF_STATE_RELEASE(p_btif);
  2447. return i_ret;
  2448. }
  2449. int btif_dump_reg(p_mtk_btif p_btif)
  2450. {
  2451. int i_ret = 0;
  2452. unsigned int ori_state = 0;
  2453. /*make sure BTIF in ON state before doing tx operation*/
  2454. if (_btif_state_hold(p_btif))
  2455. return E_BTIF_INTR;
  2456. ori_state = _btif_state_get(p_btif);
  2457. if (B_S_OFF == ori_state) {
  2458. i_ret = E_BTIF_INVAL_STATE;
  2459. BTIF_ERR_FUNC
  2460. ("BTIF in OFF state, ",
  2461. "should no need to dump register, ",
  2462. "please check wmt's operation is okay or not.\n");
  2463. goto dmp_reg_err;
  2464. }
  2465. if ((B_S_ON != ori_state) && (B_S_MAX > ori_state)) {
  2466. BTIF_ERR_FUNC("BTIF's original state is %s, not B_S_ON\n", g_state[ori_state]);
  2467. BTIF_ERR_FUNC("!!!-<-<-<This should never happen in normal mode>->->-!!!");
  2468. i_ret = _btif_exit_dpidle(p_btif);
  2469. }
  2470. if (0 != i_ret) {
  2471. i_ret = E_BTIF_INVAL_STATE;
  2472. BTIF_ERR_FUNC("switch to B_S_ON failed\n");
  2473. goto dmp_reg_err;
  2474. }
  2475. /*dump BTIF register*/
  2476. hal_btif_dump_reg(p_btif->p_btif_info, REG_BTIF_ALL);
  2477. /*dump BTIF Tx DMA channel register if in DMA mode*/
  2478. if (BTIF_MODE_DMA == p_btif->tx_mode)
  2479. hal_dma_dump_reg(p_btif->p_tx_dma->p_dma_info, REG_TX_DMA_ALL);
  2480. else
  2481. BTIF_INFO_FUNC("BTIF Tx in PIO mode,no need to dump Tx DMA's register\n");
  2482. /*dump BTIF Rx DMA channel register if in DMA mode*/
  2483. if (BTIF_MODE_DMA == p_btif->rx_mode)
  2484. hal_dma_dump_reg(p_btif->p_rx_dma->p_dma_info, REG_RX_DMA_ALL);
  2485. else
  2486. BTIF_INFO_FUNC("BTIF Rx in PIO mode,no need to dump Rx DMA's register\n");
  2487. switch (ori_state) {
  2488. case B_S_SUSPEND:
  2489. /*return to dpidle state*/
  2490. /* break; */
  2491. case B_S_DPIDLE:
  2492. /*return to dpidle state*/
  2493. _btif_enter_dpidle(p_btif);
  2494. break;
  2495. case B_S_ON:
  2496. /*nothing needs to be done*/
  2497. break;
  2498. default:
  2499. break;
  2500. }
  2501. dmp_reg_err:
  2502. BTIF_STATE_RELEASE(p_btif);
  2503. return i_ret;
  2504. }
  2505. int btif_rx_notify_reg(p_mtk_btif p_btif, MTK_BTIF_RX_NOTIFY rx_notify)
  2506. {
  2507. if (p_btif->rx_notify) {
  2508. BTIF_WARN_FUNC
  2509. ("rx cb already exist, rewrite from (0x%p) to (0x%p)\n",
  2510. p_btif->rx_notify, rx_notify);
  2511. }
  2512. p_btif->rx_notify = rx_notify;
  2513. return 0;
  2514. }
  2515. int btif_dump_data(char *p_buf, int len)
  2516. {
  2517. unsigned int idx = 0;
  2518. for (idx = 0; idx < len; idx++, p_buf++) {
  2519. pr_debug("%02x ", *p_buf);
  2520. if (7 == (idx % 8))
  2521. pr_debug("\n");
  2522. }
  2523. pr_debug("\n");
  2524. return 0;
  2525. }
  2526. int btif_log_buf_dmp_in(P_BTIF_LOG_QUEUE_T p_log_que, const char *p_buf,
  2527. int len)
  2528. {
  2529. P_BTIF_LOG_BUF_T p_log_buf = NULL;
  2530. char *dir = NULL;
  2531. struct timeval *p_timer = NULL;
  2532. unsigned long flags;
  2533. bool output_flag = false;
  2534. BTIF_DBG_FUNC("++\n");
  2535. if ((NULL == p_log_que) || (NULL == p_buf) || (0 == len)) {
  2536. BTIF_ERR_FUNC("invalid parameter, p_log_que(0x%x), buf(0x%x), ",
  2537. "len(%d)\n", p_log_que, p_buf, len);
  2538. return 0;
  2539. }
  2540. if (!(p_log_que->enable))
  2541. return 0;
  2542. dir = p_log_que->dir == BTIF_TX ? "Tx" : "Rx";
  2543. output_flag = p_log_que->output_flag;
  2544. spin_lock_irqsave(&(p_log_que->lock), flags);
  2545. /*get next log buffer for record usage*/
  2546. p_log_buf = p_log_que->p_queue[0] + p_log_que->in;
  2547. p_timer = &p_log_buf->timer;
  2548. /*log time stamp*/
  2549. do_gettimeofday(p_timer);
  2550. /*record data information including length and content*/
  2551. p_log_buf->len = len;
  2552. memcpy(p_log_buf->buffer, p_buf, len > BTIF_LOG_SZ ? BTIF_LOG_SZ : len);
  2553. /*update log queue size information*/
  2554. p_log_que->size++;
  2555. p_log_que->size = p_log_que->size >
  2556. BTIF_LOG_ENTRY_NUM ? BTIF_LOG_ENTRY_NUM : p_log_que->size;
  2557. /*update log queue index information*/
  2558. p_log_que->in++;
  2559. p_log_que->in %= BTIF_LOG_ENTRY_NUM;
  2560. spin_unlock_irqrestore(&p_log_que->lock, flags);
  2561. /*check if log dynamic output function is enabled or not*/
  2562. if (output_flag) {
  2563. pr_debug("BTIF-DBG, dir:%s, %d.%ds len:%d\n",
  2564. dir, (int)p_timer->tv_sec, (int)p_timer->tv_usec, len);
  2565. /*output buffer content*/
  2566. btif_dump_data((char *)p_buf, len);
  2567. }
  2568. BTIF_DBG_FUNC("--\n");
  2569. return 0;
  2570. }
  2571. int btif_log_buf_dmp_out(P_BTIF_LOG_QUEUE_T p_log_que)
  2572. {
  2573. P_BTIF_LOG_BUF_T p_log_buf = NULL;
  2574. unsigned int out_index = 0;
  2575. unsigned int in_index = 0;
  2576. unsigned int dump_size = 0;
  2577. unsigned char *p_buf = NULL;
  2578. unsigned int len = 0;
  2579. unsigned int pkt_count = 0;
  2580. unsigned char *p_dir = NULL;
  2581. struct timeval *p_timer = NULL;
  2582. unsigned long flags;
  2583. #if 0 /* no matter enable or not, we allowed output */
  2584. if (!(p_log_que->enable))
  2585. return;
  2586. #endif
  2587. BTIF_DBG_FUNC("++\n");
  2588. spin_lock_irqsave(&p_log_que->lock, flags);
  2589. in_index = p_log_que->in;
  2590. dump_size = p_log_que->size;
  2591. out_index = p_log_que->size >=
  2592. BTIF_LOG_ENTRY_NUM ? in_index : (BTIF_LOG_ENTRY_NUM -
  2593. p_log_que->size +
  2594. in_index) % BTIF_LOG_ENTRY_NUM;
  2595. p_dir = BTIF_TX == p_log_que->dir ? "Tx" : "Rx";
  2596. BTIF_INFO_FUNC("btif %s log buffer size:%d\n", p_dir, dump_size);
  2597. if (0 != dump_size) {
  2598. while (dump_size--) {
  2599. p_log_buf = p_log_que->p_queue[0] + out_index;
  2600. len = p_log_buf->len;
  2601. p_buf = p_log_buf->buffer;
  2602. p_timer = &p_log_buf->timer;
  2603. len = len > BTIF_LOG_SZ ? BTIF_LOG_SZ : len;
  2604. BTIF_INFO_FUNC("dir:%s, pkt_count:%d, %d.%ds len:%d\n",
  2605. p_dir,
  2606. pkt_count++,
  2607. (int)p_timer->tv_sec,
  2608. (int)p_timer->tv_usec, len);
  2609. /*output buffer content*/
  2610. btif_dump_data(p_log_buf->buffer, len);
  2611. out_index++;
  2612. out_index %= BTIF_LOG_ENTRY_NUM;
  2613. }
  2614. }
  2615. spin_unlock_irqrestore(&p_log_que->lock, flags);
  2616. BTIF_DBG_FUNC("--\n");
  2617. return 0;
  2618. }
  2619. int btif_log_buf_enable(P_BTIF_LOG_QUEUE_T p_log_que)
  2620. {
  2621. unsigned long flags;
  2622. spin_lock_irqsave(&p_log_que->lock, flags);
  2623. p_log_que->enable = true;
  2624. spin_unlock_irqrestore(&p_log_que->lock, flags);
  2625. BTIF_INFO_FUNC("enable %s log function\n",
  2626. p_log_que->dir == BTIF_TX ? "Tx" : "Rx");
  2627. return 0;
  2628. }
  2629. int btif_log_buf_disable(P_BTIF_LOG_QUEUE_T p_log_que)
  2630. {
  2631. unsigned long flags;
  2632. spin_lock_irqsave(&p_log_que->lock, flags);
  2633. p_log_que->enable = false;
  2634. spin_unlock_irqrestore(&p_log_que->lock, flags);
  2635. BTIF_INFO_FUNC("disable %s log function\n",
  2636. p_log_que->dir == BTIF_TX ? "Tx" : "Rx");
  2637. return 0;
  2638. }
  2639. int btif_log_output_enable(P_BTIF_LOG_QUEUE_T p_log_que)
  2640. {
  2641. unsigned long flags;
  2642. spin_lock_irqsave(&p_log_que->lock, flags);
  2643. p_log_que->output_flag = true;
  2644. spin_unlock_irqrestore(&p_log_que->lock, flags);
  2645. BTIF_INFO_FUNC("%s log rt output enabled\n",
  2646. p_log_que->dir == BTIF_TX ? "Tx" : "Rx");
  2647. return 0;
  2648. }
  2649. int btif_log_output_disable(P_BTIF_LOG_QUEUE_T p_log_que)
  2650. {
  2651. unsigned long flags;
  2652. spin_lock_irqsave(&p_log_que->lock, flags);
  2653. p_log_que->output_flag = false;
  2654. spin_unlock_irqrestore(&p_log_que->lock, flags);
  2655. BTIF_INFO_FUNC("%s log rt output disabled\n",
  2656. p_log_que->dir == BTIF_TX ? "Tx" : "Rx");
  2657. return 0;
  2658. }
  2659. int btif_log_buf_reset(P_BTIF_LOG_QUEUE_T p_log_que)
  2660. {
  2661. unsigned long flags;
  2662. spin_lock_irqsave(&p_log_que->lock, flags);
  2663. /*tx log buffer init*/
  2664. p_log_que->in = 0;
  2665. p_log_que->out = 0;
  2666. p_log_que->size = 0;
  2667. p_log_que->enable = true;
  2668. memset((p_log_que->p_queue[0]), 0, sizeof(BTIF_LOG_BUF_T));
  2669. spin_unlock_irqrestore(&p_log_que->lock, flags);
  2670. BTIF_DBG_FUNC("reset %s log buffer\n",
  2671. p_log_que->dir == BTIF_TX ? "Tx" : "Rx");
  2672. return 0;
  2673. }
  2674. int btif_log_buf_init(p_mtk_btif p_btif)
  2675. {
  2676. /*tx log buffer init*/
  2677. p_btif->tx_log.dir = BTIF_TX;
  2678. p_btif->tx_log.in = 0;
  2679. p_btif->tx_log.out = 0;
  2680. p_btif->tx_log.size = 0;
  2681. p_btif->tx_log.output_flag = false;
  2682. p_btif->tx_log.enable = true;
  2683. spin_lock_init(&(p_btif->tx_log.lock));
  2684. BTIF_DBG_FUNC("tx_log.p_queue:0x%p\n", p_btif->tx_log.p_queue[0]);
  2685. memset((p_btif->tx_log.p_queue[0]), 0, sizeof(BTIF_LOG_BUF_T));
  2686. /*rx log buffer init*/
  2687. p_btif->rx_log.dir = BTIF_RX;
  2688. p_btif->rx_log.in = 0;
  2689. p_btif->rx_log.out = 0;
  2690. p_btif->rx_log.size = 0;
  2691. p_btif->rx_log.output_flag = false;
  2692. p_btif->rx_log.enable = true;
  2693. spin_lock_init(&(p_btif->rx_log.lock));
  2694. BTIF_DBG_FUNC("rx_log.p_queue:0x%p\n", p_btif->rx_log.p_queue[0]);
  2695. memset((p_btif->rx_log.p_queue[0]), 0, sizeof(BTIF_LOG_BUF_T));
  2696. return 0;
  2697. }
  2698. int btif_tx_dma_mode_set(int en)
  2699. {
  2700. int index = 0;
  2701. ENUM_BTIF_MODE mode = (1 == en) ? BTIF_MODE_DMA : BTIF_MODE_PIO;
  2702. for (index = 0; index < BTIF_PORT_NR; index++)
  2703. g_btif[index].tx_mode = mode;
  2704. return 0;
  2705. }
  2706. int btif_rx_dma_mode_set(int en)
  2707. {
  2708. int index = 0;
  2709. ENUM_BTIF_MODE mode = (1 == en) ? BTIF_MODE_DMA : BTIF_MODE_PIO;
  2710. for (index = 0; index < BTIF_PORT_NR; index++)
  2711. g_btif[index].rx_mode = mode;
  2712. return 0;
  2713. }
  2714. static int BTIF_init(void)
  2715. {
  2716. int i_ret = -1;
  2717. int index = 0;
  2718. p_mtk_btif_dma p_tx_dma = NULL;
  2719. p_mtk_btif_dma p_rx_dma = NULL;
  2720. unsigned char *p_btif_buffer = NULL;
  2721. unsigned char *p_tx_queue = NULL;
  2722. unsigned char *p_rx_queue = NULL;
  2723. BTIF_DBG_FUNC("++\n");
  2724. /*Platform Driver initialization*/
  2725. i_ret = platform_driver_register(&mtk_btif_dev_drv);
  2726. if (i_ret) {
  2727. BTIF_ERR_FUNC("BTIF platform driver registered failed, ret(%d)\n", i_ret);
  2728. goto err_exit1;
  2729. }
  2730. i_ret = driver_create_file(&mtk_btif_dev_drv.driver, &driver_attr_flag);
  2731. if (i_ret)
  2732. BTIF_ERR_FUNC("BTIF pdriver_create_file failed, ret(%d)\n", i_ret);
  2733. /*SW init*/
  2734. for (index = 0; index < BTIF_PORT_NR; index++) {
  2735. p_btif_buffer = kmalloc(BTIF_RX_BUFFER_SIZE, GFP_ATOMIC);
  2736. if (!p_btif_buffer) {
  2737. BTIF_ERR_FUNC("p_btif_buffer kmalloc memory fail\n");
  2738. return -1;
  2739. }
  2740. BTIF_INFO_FUNC("p_btif_buffer get memory 0x%p\n", p_btif_buffer);
  2741. p_tx_queue = kmalloc_array(BTIF_LOG_ENTRY_NUM, sizeof(BTIF_LOG_BUF_T), GFP_ATOMIC);
  2742. if (!p_tx_queue) {
  2743. BTIF_ERR_FUNC("p_tx_queue kmalloc memory fail\n");
  2744. kfree(p_btif_buffer);
  2745. return -1;
  2746. }
  2747. BTIF_INFO_FUNC("p_tx_queue get memory 0x%p\n", p_tx_queue);
  2748. p_rx_queue = kmalloc_array(BTIF_LOG_ENTRY_NUM, sizeof(BTIF_LOG_BUF_T), GFP_ATOMIC);
  2749. if (!p_rx_queue) {
  2750. BTIF_ERR_FUNC("p_rx_queue kmalloc memory fail\n");
  2751. kfree(p_btif_buffer);
  2752. kfree(p_tx_queue);
  2753. return -1;
  2754. }
  2755. BTIF_INFO_FUNC("p_rx_queue get memory 0x%p\n", p_rx_queue);
  2756. INIT_LIST_HEAD(&(g_btif[index].user_list));
  2757. BBS_INIT(&(g_btif[index].btif_buf));
  2758. g_btif[index].enable = false;
  2759. g_btif[index].open_counter = 0;
  2760. g_btif[index].setting = &g_btif_setting[index];
  2761. g_btif[index].p_btif_info = hal_btif_info_get();
  2762. g_btif[index].tx_mode = g_btif_setting[index].tx_mode;
  2763. g_btif[index].rx_mode = g_btif_setting[index].rx_mode;
  2764. g_btif[index].btm_type = g_btif_setting[index].rx_type;
  2765. g_btif[index].tx_ctx = g_btif_setting[index].tx_type;
  2766. g_btif[index].lpbk_flag = false;
  2767. g_btif[index].rx_cb = NULL;
  2768. g_btif[index].rx_notify = NULL;
  2769. g_btif[index].btif_buf.p_buf = p_btif_buffer;
  2770. g_btif[index].tx_log.p_queue[0] = (P_BTIF_LOG_BUF_T) p_tx_queue;
  2771. g_btif[index].rx_log.p_queue[0] = (P_BTIF_LOG_BUF_T) p_rx_queue;
  2772. btif_log_buf_init(&g_btif[index]);
  2773. #if !(MTK_BTIF_ENABLE_CLK_REF_COUNTER)
  2774. /*enable BTIF clock gating by default*/
  2775. i_ret = hal_btif_clk_ctrl(g_btif[index].p_btif_info,
  2776. CLK_OUT_DISABLE);
  2777. if (0 != i_ret) {
  2778. BTIF_ERR_FUNC("BTIF controller CG failed\n");
  2779. goto err_exit2;
  2780. }
  2781. #endif
  2782. /*viftual FIFO memory must be physical continious, \
  2783. because DMA will access it directly without MMU*/
  2784. #if ENABLE_BTIF_TX_DMA
  2785. p_tx_dma = &g_dma[index][BTIF_TX];
  2786. g_btif[index].p_tx_dma = p_tx_dma;
  2787. p_tx_dma->dir = BTIF_TX;
  2788. p_tx_dma->p_btif = &(g_btif[index]);
  2789. /*DMA Tx vFIFO initialization*/
  2790. p_tx_dma->p_dma_info = hal_btif_dma_info_get(DMA_DIR_TX);
  2791. /*spinlock init*/
  2792. spin_lock_init(&(p_tx_dma->iolock));
  2793. /*entry setup*/
  2794. atomic_set(&(p_tx_dma->entry), 0);
  2795. /*vFIFO initialization*/
  2796. i_ret = _btif_vfifo_init(p_tx_dma);
  2797. if (0 != i_ret) {
  2798. BTIF_ERR_FUNC("BTIF Tx vFIFO allocation failed\n");
  2799. goto err_exit2;
  2800. }
  2801. #if !(MTK_BTIF_ENABLE_CLK_REF_COUNTER)
  2802. /*enable BTIF Tx DMA channel's clock gating by default*/
  2803. i_ret = hal_btif_dma_clk_ctrl(p_tx_dma->p_dma_info,
  2804. CLK_OUT_DISABLE);
  2805. if (0 != i_ret) {
  2806. BTIF_ERR_FUNC("BTIF Tx DMA's CG failed\n");
  2807. goto err_exit2;
  2808. }
  2809. #endif
  2810. #else
  2811. g_btif[index].p_tx_dma = NULL;
  2812. /*force tx mode to DMA no matter what it is in default setting*/
  2813. g_btif[index].tx_mode = BTIF_MODE_PIO;
  2814. #endif
  2815. #if ENABLE_BTIF_RX_DMA
  2816. p_rx_dma = &g_dma[index][BTIF_RX];
  2817. g_btif[index].p_rx_dma = p_rx_dma;
  2818. p_rx_dma->p_btif = &(g_btif[index]);
  2819. p_rx_dma->dir = BTIF_RX;
  2820. /*DMA Tx vFIFO initialization*/
  2821. p_rx_dma->p_dma_info = hal_btif_dma_info_get(DMA_DIR_RX);
  2822. /*spinlock init*/
  2823. spin_lock_init(&(p_rx_dma->iolock));
  2824. /*entry setup*/
  2825. atomic_set(&(p_rx_dma->entry), 0);
  2826. /*vFIFO initialization*/
  2827. i_ret = _btif_vfifo_init(p_rx_dma);
  2828. if (0 != i_ret) {
  2829. BTIF_ERR_FUNC("BTIF Rx vFIFO allocation failed\n");
  2830. goto err_exit2;
  2831. }
  2832. #if !(MTK_BTIF_ENABLE_CLK_REF_COUNTER)
  2833. /*enable BTIF Tx DMA channel's clock gating by default*/
  2834. i_ret = hal_btif_dma_clk_ctrl(p_rx_dma->p_dma_info,
  2835. CLK_OUT_DISABLE);
  2836. if (0 != i_ret) {
  2837. BTIF_ERR_FUNC("BTIF Rx DMA's CG failed\n");
  2838. goto err_exit2;
  2839. }
  2840. #endif
  2841. #else
  2842. g_btif[index].p_rx_dma = NULL;
  2843. /*force rx mode to DMA no matter what it is in default setting*/
  2844. g_btif[index].rx_mode = BTIF_MODE_PIO;
  2845. #endif
  2846. /*PM state mechine initialization*/
  2847. i_ret = _btif_state_init(&(g_btif[index]));
  2848. if (0 != i_ret) {
  2849. BTIF_ERR_FUNC("BTIF state mechanism init failed\n");
  2850. goto err_exit2;
  2851. }
  2852. /*Rx bottom half initialization*/
  2853. i_ret = _btif_rx_btm_init(&(g_btif[index]));
  2854. if (0 != i_ret) {
  2855. BTIF_ERR_FUNC("BTIF Rx btm init failed\n");
  2856. goto err_exit3;
  2857. }
  2858. i_ret = _btif_tx_ctx_init(&(g_btif[index]));
  2859. if (0 != i_ret) {
  2860. BTIF_ERR_FUNC("BTIF Tx context init failed\n");
  2861. goto err_exit4;
  2862. }
  2863. /*Character Device initialization*/
  2864. /*Chaozhong: ToDo: to be initialized*/
  2865. mutex_init(&g_btif[index].ops_mtx);
  2866. }
  2867. /*Debug purpose initialization*/
  2868. #if BTIF_CDEV_SUPPORT
  2869. btif_chrdev_init();
  2870. #endif
  2871. return 0;
  2872. err_exit4:
  2873. for (index = 0; index < BTIF_PORT_NR; index++)
  2874. _btif_tx_ctx_deinit(&(g_btif[index]));
  2875. err_exit3:
  2876. for (index = 0; index < BTIF_PORT_NR; index++) {
  2877. _btif_rx_btm_deinit(&(g_btif[index]));
  2878. _btif_state_deinit(&(g_btif[index]));
  2879. }
  2880. err_exit2:
  2881. for (index = 0; index < BTIF_PORT_NR; index++) {
  2882. p_tx_dma = &g_dma[index][BTIF_TX];
  2883. p_rx_dma = &g_dma[index][BTIF_RX];
  2884. #if ENABLE_BTIF_TX_DMA
  2885. _btif_vfifo_deinit(p_tx_dma);
  2886. #endif
  2887. #if ENABLE_BTIF_RX_DMA
  2888. _btif_vfifo_deinit(p_rx_dma);
  2889. #endif
  2890. g_btif[index].open_counter = 0;
  2891. g_btif[index].enable = false;
  2892. }
  2893. driver_remove_file(&mtk_btif_dev_drv.driver, &driver_attr_flag);
  2894. platform_driver_unregister(&mtk_btif_dev_drv);
  2895. err_exit1:
  2896. i_ret = -1;
  2897. BTIF_DBG_FUNC("--\n");
  2898. return i_ret;
  2899. }
  2900. static void BTIF_exit(void)
  2901. {
  2902. unsigned int index = 0;
  2903. p_mtk_btif_dma p_tx_dma = NULL;
  2904. p_mtk_btif_dma p_rx_dma = NULL;
  2905. BTIF_DBG_FUNC("++\n");
  2906. for (index = 0; index < BTIF_PORT_NR; index++) {
  2907. g_btif[index].open_counter = 0;
  2908. g_btif[index].enable = false;
  2909. p_tx_dma = &g_dma[index][BTIF_TX];
  2910. p_rx_dma = &g_dma[index][BTIF_RX];
  2911. #if ENABLE_BTIF_TX_DMA
  2912. _btif_vfifo_deinit(p_tx_dma);
  2913. #endif
  2914. #if ENABLE_BTIF_RX_DMA
  2915. _btif_vfifo_deinit(p_rx_dma);
  2916. #endif
  2917. _btif_state_deinit(&(g_btif[index]));
  2918. _btif_rx_btm_deinit(&(g_btif[index]));
  2919. mutex_destroy(&g_btif[index].ops_mtx);
  2920. }
  2921. #if !defined(CONFIG_MTK_CLKMGR)
  2922. hal_btif_clk_unprepare();
  2923. #endif
  2924. driver_remove_file(&mtk_btif_dev_drv.driver, &driver_attr_flag);
  2925. platform_driver_unregister(&mtk_btif_dev_drv);
  2926. BTIF_DBG_FUNC("--\n");
  2927. }
  2928. int mtk_btif_hal_get_log_lvl(void)
  2929. {
  2930. return mtk_btif_dbg_lvl;
  2931. }
  2932. /*---------------------------------------------------------------------------*/
  2933. module_init(BTIF_init);
  2934. module_exit(BTIF_exit);
  2935. /*---------------------------------------------------------------------------*/
  2936. MODULE_AUTHOR("MBJ/WCN/SE/SS1/Chaozhong.Liang");
  2937. MODULE_DESCRIPTION("MTK BTIF Driver$1.0$");
  2938. MODULE_LICENSE("GPL");
  2939. /*---------------------------------------------------------------------------*/