mt6630_fm_lib.c 63 KB

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  1. #include <linux/delay.h>
  2. #include <linux/slab.h>
  3. #include <linux/vmalloc.h>
  4. #include "stp_exp.h"
  5. #include "wmt_exp.h"
  6. #include "fm_typedef.h"
  7. #include "fm_dbg.h"
  8. #include "fm_err.h"
  9. #include "fm_interface.h"
  10. #include "fm_stdlib.h"
  11. #include "fm_patch.h"
  12. #include "fm_utils.h"
  13. #include "fm_link.h"
  14. #include "fm_config.h"
  15. #include "fm_private.h"
  16. #include "mt6630_fm_reg.h"
  17. #include "mt6630_fm.h"
  18. #include "mt6630_fm_lib.h"
  19. #include "mt6630_fm_cmd.h"
  20. #include "mt6630_fm_cust_cfg.h"
  21. static struct fm_patch_tbl mt6630_patch_tbl[5] = {
  22. {FM_ROM_V1, "/etc/firmware/mt6630/mt6630_fm_v1_patch.bin",
  23. "/etc/firmware/mt6630/mt6630_fm_v1_coeff.bin", NULL, NULL},
  24. {FM_ROM_V2, "/etc/firmware/mt6630/mt6630_fm_v2_patch.bin",
  25. "/etc/firmware/mt6630/mt6630_fm_v2_coeff.bin", NULL, NULL},
  26. {FM_ROM_V3, "/etc/firmware/mt6630/mt6630_fm_v3_patch.bin",
  27. "/etc/firmware/mt6630/mt6630_fm_v3_coeff.bin", NULL, NULL},
  28. {FM_ROM_V4, "/etc/firmware/mt6630/mt6630_fm_v4_patch.bin",
  29. "/etc/firmware/mt6630/mt6630_fm_v4_coeff.bin", NULL, NULL},
  30. {FM_ROM_V5, "/etc/firmware/mt6630/mt6630_fm_v5_patch.bin",
  31. "/etc/firmware/mt6630/mt6630_fm_v5_coeff.bin", NULL, NULL},
  32. };
  33. static struct fm_patch_tbl mt6630_patch_tbl_tx[5] = {
  34. {FM_ROM_V1, "/etc/firmware/mt6630/mt6630_fm_v1_patch_tx.bin",
  35. "/etc/firmware/mt6630/mt6630_fm_v1_coeff_tx.bin", NULL, NULL},
  36. {FM_ROM_V2, "/etc/firmware/mt6630/mt6630_fm_v2_patch_tx.bin",
  37. "/etc/firmware/mt6630/mt6630_fm_v2_coeff_tx.bin", NULL, NULL},
  38. {FM_ROM_V3, "/etc/firmware/mt6630/mt6630_fm_v3_patch_tx.bin",
  39. "/etc/firmware/mt6630/mt6630_fm_v3_coeff_tx.bin", NULL, NULL},
  40. {FM_ROM_V4, "/etc/firmware/mt6630/mt6630_fm_v4_patch_tx.bin",
  41. "/etc/firmware/mt6630/mt6630_fm_v4_coeff_tx.bin", NULL, NULL},
  42. {FM_ROM_V5, "/etc/firmware/mt6630/mt6630_fm_v5_patch_tx.bin",
  43. "/etc/firmware/mt6630/mt6630_fm_v5_coeff_tx.bin", NULL, NULL},
  44. };
  45. static struct fm_hw_info mt6630_hw_info = {
  46. .chip_id = 0x00006630,
  47. .eco_ver = 0x00000000,
  48. .rom_ver = 0x00000000,
  49. .patch_ver = 0x00000000,
  50. .reserve = 0x00000000,
  51. };
  52. #define PATCH_SEG_LEN 512
  53. static fm_u8 *cmd_buf;
  54. static struct fm_lock *cmd_buf_lock;
  55. static struct fm_callback *fm_cb_op;
  56. static struct fm_res_ctx *mt6630_res;
  57. static fm_u8 fm_packaging = 1; /*0:QFN,1:WLCSP */
  58. static fm_u32 fm_sant_flag; /* 1,Short Antenna; 0, Long Antenna */
  59. static fm_s32 mt6630_is_dese_chan(fm_u16 freq);
  60. #if 0
  61. static fm_s32 mt6630_mcu_dese(fm_u16 freq, void *arg);
  62. #endif
  63. static fm_s32 mt6630_gps_dese(fm_u16 freq, void *arg);
  64. static fm_s32 mt6630_I2s_Setting(fm_s32 onoff, fm_s32 mode, fm_s32 sample);
  65. static fm_u16 mt6630_chan_para_get(fm_u16 freq);
  66. static fm_s32 mt6630_desense_check(fm_u16 freq, fm_s32 rssi);
  67. static fm_bool mt6630_TDD_chan_check(fm_u16 freq);
  68. static fm_s32 mt6630_soft_mute_tune(fm_u16 freq, fm_s32 *rssi, fm_bool *valid);
  69. static fm_s32 mt6630_pwron(fm_s32 data)
  70. {
  71. if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_on(WMTDRV_TYPE_FM)) {
  72. FM_LOG_ERR(FM_ERR | CHIP, "WMT turn on FM Fail!\n");
  73. return -FM_ELINK;
  74. }
  75. FM_LOG_NTC(FM_NTC | CHIP, "WMT turn on FM OK!\n");
  76. return 0;
  77. }
  78. static fm_s32 mt6630_pwroff(fm_s32 data)
  79. {
  80. if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_off(WMTDRV_TYPE_FM)) {
  81. FM_LOG_ERR(FM_ERR | CHIP, "WMT turn off FM Fail!\n");
  82. return -FM_ELINK;
  83. }
  84. FM_LOG_NTC(FM_NTC | CHIP, "WMT turn off FM OK!\n");
  85. return 0;
  86. }
  87. static fm_s32 Delayms(fm_u32 data)
  88. {
  89. FM_LOG_DBG(FM_DBG | CHIP, "delay %dms\n", data);
  90. msleep(data);
  91. return 0;
  92. }
  93. static fm_s32 Delayus(fm_u32 data)
  94. {
  95. FM_LOG_DBG(FM_DBG | CHIP, "delay %dus\n", data);
  96. udelay(data);
  97. return 0;
  98. }
  99. fm_s32 mt6630_get_read_result(struct fm_res_ctx *result)
  100. {
  101. if (result == NULL) {
  102. pr_err("%s,invalid pointer\n", __func__);
  103. return -FM_EPARA;
  104. }
  105. mt6630_res = result;
  106. return 0;
  107. }
  108. static fm_s32 mt6630_read(fm_u8 addr, fm_u16 *val)
  109. {
  110. fm_s32 ret = 0;
  111. fm_u16 pkt_size;
  112. if (FM_LOCK(cmd_buf_lock))
  113. return -FM_ELOCK;
  114. pkt_size = mt6630_get_reg(cmd_buf, TX_BUF_SIZE, addr);
  115. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_FSPI_RD, SW_RETRY_CNT, FSPI_RD_TIMEOUT, mt6630_get_read_result);
  116. if (!ret && mt6630_res)
  117. *val = mt6630_res->fspi_rd;
  118. FM_UNLOCK(cmd_buf_lock);
  119. return ret;
  120. }
  121. static fm_s32 mt6630_write(fm_u8 addr, fm_u16 val)
  122. {
  123. fm_s32 ret = 0;
  124. fm_u16 pkt_size;
  125. if (FM_LOCK(cmd_buf_lock))
  126. return -FM_ELOCK;
  127. pkt_size = mt6630_set_reg(cmd_buf, TX_BUF_SIZE, addr, val);
  128. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_FSPI_WR, SW_RETRY_CNT, FSPI_WR_TIMEOUT, NULL);
  129. FM_UNLOCK(cmd_buf_lock);
  130. return ret;
  131. }
  132. static fm_s32 mt6630_set_bits(fm_u8 addr, fm_u16 bits, fm_u16 mask)
  133. {
  134. fm_s32 ret = 0;
  135. fm_u16 pkt_size;
  136. if (FM_LOCK(cmd_buf_lock))
  137. return -FM_ELOCK;
  138. pkt_size = mt6630_set_bits_reg(cmd_buf, TX_BUF_SIZE, addr, bits, mask);
  139. ret = fm_cmd_tx(cmd_buf, pkt_size, (1 << 0x11), SW_RETRY_CNT, FSPI_WR_TIMEOUT, NULL);
  140. /* 0x11 this opcode won't be parsed as an opcode, so set here as spcial case. */
  141. FM_UNLOCK(cmd_buf_lock);
  142. return ret;
  143. }
  144. static fm_s32 mt6630_host_read(fm_u32 addr, fm_u32 *val)
  145. {
  146. fm_s32 ret = 0;
  147. fm_u16 pkt_size;
  148. if (FM_LOCK(cmd_buf_lock))
  149. return -FM_ELOCK;
  150. pkt_size = mt6630_host_get_reg(cmd_buf, TX_BUF_SIZE, addr);
  151. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_HOST_READ, SW_RETRY_CNT, FSPI_RD_TIMEOUT, mt6630_get_read_result);
  152. if (!ret && mt6630_res)
  153. *val = mt6630_res->cspi_rd;
  154. FM_UNLOCK(cmd_buf_lock);
  155. return ret;
  156. }
  157. static fm_s32 mt6630_host_write(fm_u32 addr, fm_u32 val)
  158. {
  159. fm_s32 ret = 0;
  160. fm_u16 pkt_size;
  161. if (FM_LOCK(cmd_buf_lock))
  162. return -FM_ELOCK;
  163. pkt_size = mt6630_host_set_reg(cmd_buf, TX_BUF_SIZE, addr, val);
  164. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_HOST_WRITE, SW_RETRY_CNT, FSPI_WR_TIMEOUT, NULL);
  165. FM_UNLOCK(cmd_buf_lock);
  166. return ret;
  167. }
  168. static fm_u16 mt6630_get_chipid(void)
  169. {
  170. return 0x6630;
  171. }
  172. /* MT6630_SetAntennaType - set Antenna type
  173. * @type - 1,Short Antenna; 0, Long Antenna
  174. */
  175. static fm_s32 mt6630_SetAntennaType(fm_s32 type)
  176. {
  177. fm_u16 dataRead;
  178. FM_LOG_NTC(FM_NTC | CHIP, "set ana to %s\n", type ? "short" : "long");
  179. if (fm_packaging == 0) {
  180. fm_sant_flag = type;
  181. } else {
  182. mt6630_read(FM_MAIN_CG2_CTRL, &dataRead);
  183. if (type)
  184. dataRead |= ANTENNA_TYPE;
  185. else
  186. dataRead &= (~ANTENNA_TYPE);
  187. mt6630_write(FM_MAIN_CG2_CTRL, dataRead);
  188. }
  189. return 0;
  190. }
  191. static fm_s32 mt6630_GetAntennaType(void)
  192. {
  193. fm_u16 dataRead;
  194. if (fm_packaging == 0)
  195. return fm_sant_flag;
  196. mt6630_read(FM_MAIN_CG2_CTRL, &dataRead);
  197. FM_LOG_NTC(FM_NTC | CHIP, "get ana type: %s\n", (dataRead & ANTENNA_TYPE) ? "short" : "long");
  198. if (dataRead & ANTENNA_TYPE)
  199. return FM_ANA_SHORT; /* short antenna */
  200. else
  201. return FM_ANA_LONG; /* long antenna */
  202. }
  203. static fm_s32 mt6630_Mute(fm_bool mute)
  204. {
  205. fm_s32 ret = 0;
  206. fm_u16 dataRead;
  207. FM_LOG_NTC(FM_NTC | CHIP, "set %s\n", mute ? "mute" : "unmute");
  208. mt6630_read(FM_MAIN_CTRL, &dataRead);
  209. if (mute == 1)
  210. ret = mt6630_write(FM_MAIN_CTRL, (dataRead & 0xFFDF) | 0x0020);
  211. else
  212. ret = mt6630_write(FM_MAIN_CTRL, (dataRead & 0xFFDF));
  213. return ret;
  214. }
  215. static fm_s32 mt6630_RampDown(void)
  216. {
  217. fm_s32 ret = 0;
  218. fm_u16 pkt_size;
  219. /* fm_u16 tmp; */
  220. FM_LOG_NTC(FM_NTC | CHIP, "ramp down\n");
  221. ret = mt6630_write(FM_MAIN_EXTINTRMASK, 0x0000);
  222. if (ret) {
  223. FM_LOG_ERR(FM_ERR | CHIP, "ramp down write FM_MAIN_EXTINTRMASK failed\n");
  224. return ret;
  225. }
  226. if (FM_LOCK(cmd_buf_lock))
  227. return -FM_ELOCK;
  228. pkt_size = mt6630_rampdown(cmd_buf, TX_BUF_SIZE);
  229. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_RAMPDOWN, SW_RETRY_CNT, RAMPDOWN_TIMEOUT, NULL);
  230. FM_UNLOCK(cmd_buf_lock);
  231. if (ret) {
  232. FM_LOG_ERR(FM_ERR | CHIP, "ramp down failed\n");
  233. return ret;
  234. }
  235. ret = mt6630_write(FM_MAIN_EXTINTRMASK, 0x0021);
  236. if (ret)
  237. FM_LOG_ERR(FM_ERR | CHIP, "ramp down write FM_MAIN_EXTINTRMASK failed\n");
  238. return ret;
  239. }
  240. static fm_s32 mt6630_get_rom_version(void)
  241. {
  242. fm_u16 tmp;
  243. fm_s32 ret;
  244. /* DSP rom code version request enable --- set 0x61 b15=1 */
  245. mt6630_set_bits(0x61, 0x8000, 0x7FFF);
  246. /* Release ASIP reset --- set 0x61 b1=1 */
  247. mt6630_set_bits(0x61, 0x0002, 0xFFFD);
  248. /* Enable ASIP power --- set 0x61 b0=0 */
  249. mt6630_set_bits(0x61, 0x0000, 0xFFFE);
  250. /* Wait DSP code version ready --- wait 1ms */
  251. do {
  252. Delayus(1000);
  253. ret = mt6630_read(0x84, &tmp);
  254. /* ret=-4 means signal got when control FM. usually get sig 9 to kill FM process. */
  255. /* now cancel FM power up sequence is recommended. */
  256. if (ret)
  257. return ret;
  258. FM_LOG_DBG(FM_DBG | CHIP, "0x84=%x\n", tmp);
  259. } while (tmp != 0x0001);
  260. /* Get FM DSP code version --- rd 0x83[15:8] */
  261. mt6630_read(0x83, &tmp);
  262. FM_LOG_NTC(FM_NTC | CHIP, "DSP ver=0x%x\n", tmp);
  263. tmp = (tmp >> 8);
  264. /* DSP rom code version request disable --- set 0x61 b15=0 */
  265. mt6630_set_bits(0x61, 0x0000, 0x7FFF);
  266. /* Reset ASIP --- set 0x61[1:0] = 1 */
  267. mt6630_set_bits(0x61, 0x0001, 0xFFFC);
  268. /* FM_LOG_NTC(CHIP, "ROM version: v%d\n", (fm_s32)tmp); */
  269. return (fm_s32) tmp;
  270. }
  271. static fm_s32 mt6630_get_patch_path(fm_s32 ver, const fm_s8 **ppath, struct fm_patch_tbl *patch_tbl)
  272. {
  273. fm_s32 i;
  274. fm_s32 max = FM_ROM_MAX;
  275. /* check if the ROM version is defined or not */
  276. for (i = 0; i < max; i++) {
  277. if ((patch_tbl[i].idx == ver) && (fm_file_exist(patch_tbl[i].patch) == 0)) {
  278. *ppath = patch_tbl[i].patch;
  279. FM_LOG_NTC(FM_NTC | CHIP, "Get ROM version OK\n");
  280. return 0;
  281. }
  282. }
  283. /* the ROM version isn't defined, find a latest patch instead */
  284. for (i = max; i > 0; i--) {
  285. if (fm_file_exist(patch_tbl[i - 1].patch) == 0) {
  286. *ppath = patch_tbl[i - 1].patch;
  287. FM_LOG_ERR(FM_ERR | CHIP, "undefined ROM version\n");
  288. return 0;
  289. }
  290. }
  291. /* get path failed */
  292. FM_LOG_ERR(FM_ERR | CHIP, "No valid patch file\n");
  293. return -FM_EPATCH;
  294. }
  295. static fm_s32 mt6630_get_coeff_path(fm_s32 ver, const fm_s8 **ppath, struct fm_patch_tbl *patch_tbl)
  296. {
  297. fm_s32 i;
  298. fm_s32 max = FM_ROM_MAX;
  299. /* check if the ROM version is defined or not */
  300. for (i = 0; i < max; i++) {
  301. if ((patch_tbl[i].idx == ver) && (fm_file_exist(patch_tbl[i].coeff) == 0)) {
  302. *ppath = patch_tbl[i].coeff;
  303. FM_LOG_NTC(FM_NTC | CHIP, "Get ROM version OK\n");
  304. return 0;
  305. }
  306. }
  307. /* the ROM version isn't defined, find a latest patch instead */
  308. for (i = max; i > 0; i--) {
  309. if (fm_file_exist(patch_tbl[i - 1].coeff) == 0) {
  310. *ppath = patch_tbl[i - 1].coeff;
  311. FM_LOG_ERR(FM_ERR | CHIP, "undefined ROM version\n");
  312. return 1;
  313. }
  314. }
  315. /* get path failed */
  316. FM_LOG_ERR(FM_ERR | CHIP, "No valid coeff file\n");
  317. return -FM_EPATCH;
  318. }
  319. /*
  320. * mt6630_DspPatch - DSP download procedure
  321. * @img - source dsp bin code
  322. * @len - patch length in byte
  323. * @type - rom/patch/coefficient/hw_coefficient
  324. */
  325. static fm_s32 mt6630_DspPatch(const fm_u8 *img, fm_s32 len, enum IMG_TYPE type)
  326. {
  327. fm_u8 seg_num;
  328. fm_u8 seg_id = 0;
  329. fm_s32 seg_len;
  330. fm_s32 ret = 0;
  331. fm_u16 pkt_size;
  332. if (img == NULL) {
  333. pr_err("%s,invalid pointer\n", __func__);
  334. return -FM_EPARA;
  335. }
  336. if (len <= 0)
  337. return -1;
  338. seg_num = len / PATCH_SEG_LEN + 1;
  339. FM_LOG_NTC(FM_NTC | CHIP, "binary len:%d, seg num:%d\n", len, seg_num);
  340. switch (type) {
  341. #if 0
  342. case IMG_ROM:
  343. for (seg_id = 0; seg_id < seg_num; seg_id++) {
  344. seg_len = ((seg_id + 1) < seg_num) ? PATCH_SEG_LEN : (len % PATCH_SEG_LEN);
  345. FM_LOG_NTC(CHIP, "rom,[seg_id:%d], [seg_len:%d]\n", seg_id, seg_len);
  346. if (FM_LOCK(cmd_buf_lock))
  347. return -FM_ELOCK;
  348. pkt_size =
  349. mt6630_rom_download(cmd_buf, TX_BUF_SIZE, seg_num, seg_id,
  350. &img[seg_id * PATCH_SEG_LEN], seg_len);
  351. FM_LOG_NTC(CHIP, "pkt_size:%d\n", (fm_s32) pkt_size);
  352. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_ROM, SW_RETRY_CNT, ROM_TIMEOUT, NULL);
  353. FM_UNLOCK(cmd_buf_lock);
  354. if (ret) {
  355. FM_LOG_ERR(CHIP, "mt6630_rom_download failed\n");
  356. return ret;
  357. }
  358. }
  359. break;
  360. #endif
  361. case IMG_PATCH:
  362. for (seg_id = 0; seg_id < seg_num; seg_id++) {
  363. seg_len = ((seg_id + 1) < seg_num) ? PATCH_SEG_LEN : (len % PATCH_SEG_LEN);
  364. FM_LOG_NTC(FM_NTC | CHIP, "patch,[seg_id:%d], [seg_len:%d]\n", seg_id, seg_len);
  365. if (FM_LOCK(cmd_buf_lock))
  366. return -FM_ELOCK;
  367. pkt_size =
  368. mt6630_patch_download(cmd_buf, TX_BUF_SIZE, seg_num, seg_id,
  369. &img[seg_id * PATCH_SEG_LEN], seg_len);
  370. FM_LOG_NTC(FM_NTC | CHIP, "pkt_size:%d\n", (fm_s32) pkt_size);
  371. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_PATCH, SW_RETRY_CNT, PATCH_TIMEOUT, NULL);
  372. FM_UNLOCK(cmd_buf_lock);
  373. if (ret) {
  374. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_patch_download failed\n");
  375. return ret;
  376. }
  377. }
  378. break;
  379. #if 0
  380. case IMG_HW_COEFFICIENT:
  381. for (seg_id = 0; seg_id < seg_num; seg_id++) {
  382. seg_len = ((seg_id + 1) < seg_num) ? PATCH_SEG_LEN : (len % PATCH_SEG_LEN);
  383. FM_LOG_NTC(CHIP, "hwcoeff,[seg_id:%d], [seg_len:%d]\n", seg_id, seg_len);
  384. if (FM_LOCK(cmd_buf_lock))
  385. return -FM_ELOCK;
  386. pkt_size =
  387. mt6630_hwcoeff_download(cmd_buf, TX_BUF_SIZE, seg_num, seg_id,
  388. &img[seg_id * PATCH_SEG_LEN], seg_len);
  389. FM_LOG_NTC(CHIP, "pkt_size:%d\n", (fm_s32) pkt_size);
  390. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_HWCOEFF, SW_RETRY_CNT, HWCOEFF_TIMEOUT, NULL);
  391. FM_UNLOCK(cmd_buf_lock);
  392. if (ret) {
  393. FM_LOG_ERR(CHIP, "mt6630_hwcoeff_download failed\n");
  394. return ret;
  395. }
  396. }
  397. break;
  398. #endif
  399. case IMG_COEFFICIENT:
  400. for (seg_id = 0; seg_id < seg_num; seg_id++) {
  401. seg_len = ((seg_id + 1) < seg_num) ? PATCH_SEG_LEN : (len % PATCH_SEG_LEN);
  402. FM_LOG_NTC(FM_NTC | CHIP, "coeff,[seg_id:%d], [seg_len:%d]\n", seg_id, seg_len);
  403. if (FM_LOCK(cmd_buf_lock))
  404. return -FM_ELOCK;
  405. pkt_size =
  406. mt6630_coeff_download(cmd_buf, TX_BUF_SIZE, seg_num, seg_id,
  407. &img[seg_id * PATCH_SEG_LEN], seg_len);
  408. FM_LOG_NTC(FM_NTC | CHIP, "pkt_size:%d\n", (fm_s32) pkt_size);
  409. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_COEFF, SW_RETRY_CNT, COEFF_TIMEOUT, NULL);
  410. FM_UNLOCK(cmd_buf_lock);
  411. if (ret) {
  412. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_coeff_download failed\n");
  413. return ret;
  414. }
  415. }
  416. break;
  417. default:
  418. break;
  419. }
  420. return 0;
  421. }
  422. static fm_s32 mt6630_pwrup_top_setting(void)
  423. {
  424. fm_s32 ret = 0, value = 0;
  425. /* A0.1 Turn on FM buffer */
  426. ret = mt6630_host_read(0x8102123c, &value);
  427. if (ret) {
  428. FM_LOG_ERR(FM_ERR | CHIP, " 0x8102123c rd failed\n");
  429. return ret;
  430. }
  431. ret = mt6630_host_write(0x8102123c, value & 0xFFFFFFBF);
  432. if (ret) {
  433. FM_LOG_ERR(FM_ERR | CHIP, " 0x8102123c wr failed\n");
  434. return ret;
  435. }
  436. /* A0.2 Set xtal no off when FM on */
  437. ret = mt6630_host_read(0x81021134, &value);
  438. if (ret) {
  439. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021134 rd failed\n");
  440. return ret;
  441. }
  442. ret = mt6630_host_write(0x81021134, value | 0x80);
  443. if (ret) {
  444. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021134 wr failed\n");
  445. return ret;
  446. }
  447. /* A0.3 Set top off always on when FM on */
  448. ret = mt6630_host_read(0x81020010, &value);
  449. if (ret) {
  450. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020010 rd failed\n");
  451. return ret;
  452. }
  453. ret = mt6630_host_write(0x81020010, value & 0xFFFDFFFF);
  454. if (ret) {
  455. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020010 wr failed\n");
  456. return ret;
  457. }
  458. /* A0.4 Always enable PALDO when FM on */
  459. ret = mt6630_host_read(0x81021430, &value);
  460. if (ret) {
  461. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021430 rd failed\n");
  462. return ret;
  463. }
  464. ret = mt6630_host_write(0x81021430, value | 0x80000000);
  465. if (ret) {
  466. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021430 wr failed\n");
  467. return ret;
  468. }
  469. /* A0.5 */
  470. Delayus(240);
  471. /* A0.6 MTCMOS Control */
  472. ret = mt6630_host_read(0x81020008, &value);
  473. if (ret) {
  474. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 rd failed\n");
  475. return ret;
  476. }
  477. ret = mt6630_host_write(0x81020008, value | 0x00000030);
  478. if (ret) {
  479. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 wr failed\n");
  480. return ret;
  481. }
  482. /* A0.7 */
  483. Delayus(20);
  484. /* A0.8 release power on reset */
  485. ret = mt6630_host_read(0x81020008, &value);
  486. if (ret) {
  487. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 rd failed\n");
  488. return ret;
  489. }
  490. ret = mt6630_host_write(0x81020008, value | 0x00000001);
  491. if (ret) {
  492. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 wr failed\n");
  493. return ret;
  494. }
  495. /* A0.9 enable fspi_mas_bclk_ck */
  496. ret = mt6630_host_read(0x80000108, &value);
  497. if (ret) {
  498. FM_LOG_ERR(FM_ERR | CHIP, " 0x80000108 rd failed\n");
  499. return ret;
  500. }
  501. ret = mt6630_host_write(0x80000108, value | 0x00000100);
  502. if (ret) {
  503. FM_LOG_ERR(FM_ERR | CHIP, " 0x80000108 wr failed\n");
  504. return ret;
  505. }
  506. return ret;
  507. }
  508. static fm_s32 mt6630_pwrdown_top_setting(void)
  509. {
  510. fm_s32 ret = 0, value = 0;
  511. /* B0.1 disable fspi_mas_bclk_ck */
  512. ret = mt6630_host_read(0x80000104, &value);
  513. if (ret) {
  514. FM_LOG_ERR(FM_ERR | CHIP, " 0x80000104 rd failed\n");
  515. return ret;
  516. }
  517. ret = mt6630_host_write(0x80000104, value | 0x00000100);
  518. if (ret) {
  519. FM_LOG_ERR(FM_ERR | CHIP, " 0x80000104 wr failed\n");
  520. return ret;
  521. }
  522. /* B0.2 set power off reset */
  523. ret = mt6630_host_read(0x81020008, &value);
  524. if (ret) {
  525. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 rd failed\n");
  526. return ret;
  527. }
  528. ret = mt6630_host_write(0x81020008, value & 0xFFFFFFFE);
  529. if (ret) {
  530. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 wr failed\n");
  531. return ret;
  532. }
  533. /* B0.3 */
  534. Delayus(20);
  535. /* B0.4 disable MTCMOS & set Iso_en */
  536. ret = mt6630_host_read(0x81020008, &value);
  537. if (ret) {
  538. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 rd failed\n");
  539. return ret;
  540. }
  541. ret = mt6630_host_write(0x81020008, value & 0xFFFFFFEF);
  542. if (ret) {
  543. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020008 wr failed\n");
  544. return ret;
  545. }
  546. /* B0.5 Turn off FM buffer */
  547. ret = mt6630_host_read(0x8102123c, &value);
  548. if (ret) {
  549. FM_LOG_ERR(FM_ERR | CHIP, " 0x8102123c rd failed\n");
  550. return ret;
  551. }
  552. ret = mt6630_host_write(0x8102123c, value | 0x40);
  553. if (ret) {
  554. FM_LOG_ERR(FM_ERR | CHIP, " 0x8102123c wr failed\n");
  555. return ret;
  556. }
  557. /* B0.6 Clear xtal no off when FM off */
  558. ret = mt6630_host_read(0x81021134, &value);
  559. if (ret) {
  560. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021134 rd failed\n");
  561. return ret;
  562. }
  563. ret = mt6630_host_write(0x81021134, value & 0xFFFFFF7F);
  564. if (ret) {
  565. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021134 wr failed\n");
  566. return ret;
  567. }
  568. /* B0.7 Clear top off always on when FM off */
  569. ret = mt6630_host_read(0x81020010, &value);
  570. if (ret) {
  571. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020010 rd failed\n");
  572. return ret;
  573. }
  574. ret = mt6630_host_write(0x81020010, value | 0x20000);
  575. if (ret) {
  576. FM_LOG_ERR(FM_ERR | CHIP, " 0x81020010 wr failed\n");
  577. return ret;
  578. }
  579. /* B0.9 Disable PALDO when FM off */
  580. ret = mt6630_host_read(0x81021430, &value);
  581. if (ret) {
  582. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021430 rd failed\n");
  583. return ret;
  584. }
  585. ret = mt6630_host_write(0x81021430, value & 0x7FFFFFFF);
  586. if (ret) {
  587. FM_LOG_ERR(FM_ERR | CHIP, " 0x81021430 wr failed\n");
  588. return ret;
  589. }
  590. return ret;
  591. }
  592. static fm_s32 mt6630_pwrup_DSP_download(struct fm_patch_tbl *patch_tbl)
  593. {
  594. #define PATCH_BUF_SIZE (4096*6)
  595. fm_s32 ret = 0;
  596. const fm_s8 *path_patch = NULL;
  597. const fm_s8 *path_coeff = NULL;
  598. fm_s32 patch_len = 0;
  599. fm_u8 *dsp_buf = NULL;
  600. fm_u16 tmp_reg = 0;
  601. mt6630_hw_info.eco_ver = (fm_s32) mtk_wcn_wmt_hwver_get();
  602. FM_LOG_NTC(CHIP, "ECO version:0x%08x\n", mt6630_hw_info.eco_ver);
  603. mt6630_hw_info.eco_ver += 1;
  604. /* FM ROM code version request */
  605. ret = mt6630_get_rom_version();
  606. if (ret >= 0) {
  607. mt6630_hw_info.rom_ver = ret;
  608. FM_LOG_NTC(FM_NTC | CHIP, "ROM version: v%d\n", mt6630_hw_info.rom_ver);
  609. } else {
  610. FM_LOG_ERR(FM_ERR | CHIP, "get ROM version failed\n");
  611. /* ret=-4 means signal got when control FM. usually get sig 9 to kill FM process. */
  612. /* now cancel FM power up sequence is recommended. */
  613. return ret;
  614. }
  615. /* Wholechip FM Power Up: step 3, download patch */
  616. dsp_buf = fm_vmalloc(PATCH_BUF_SIZE);
  617. if (!dsp_buf) {
  618. FM_LOG_ERR(FM_ERR | CHIP, "-ENOMEM\n");
  619. return -ENOMEM;
  620. }
  621. ret = mt6630_get_patch_path(mt6630_hw_info.rom_ver, &path_patch, patch_tbl);
  622. if (ret) {
  623. FM_LOG_ERR(FM_ERR | CHIP, " mt6630_get_patch_path failed\n");
  624. goto out;
  625. }
  626. patch_len = fm_file_read(path_patch, dsp_buf, PATCH_BUF_SIZE, 0);
  627. ret = mt6630_DspPatch((const fm_u8 *)dsp_buf, patch_len, IMG_PATCH);
  628. if (ret) {
  629. FM_LOG_ERR(FM_ERR | CHIP, " DL DSPpatch failed\n");
  630. goto out;
  631. }
  632. ret = mt6630_get_coeff_path(mt6630_hw_info.rom_ver, &path_coeff, patch_tbl);
  633. if (ret == -FM_EPATCH) {
  634. FM_LOG_ERR(FM_ERR | CHIP, " mt6630_get_coeff_path failed\n");
  635. goto out;
  636. }
  637. patch_len = fm_file_read(path_coeff, dsp_buf, PATCH_BUF_SIZE, 0);
  638. mt6630_hw_info.rom_ver += 1;
  639. tmp_reg = dsp_buf[38] | (dsp_buf[39] << 8); /* to be confirmed */
  640. mt6630_hw_info.patch_ver = (fm_s32) tmp_reg;
  641. FM_LOG_NTC(FM_NTC | CHIP, "Patch version: 0x%08x\n", mt6630_hw_info.patch_ver);
  642. if (ret == 1) {
  643. dsp_buf[4] = 0x00; /* if we found rom version undefined, we should disable patch */
  644. dsp_buf[5] = 0x00;
  645. }
  646. ret = mt6630_DspPatch((const fm_u8 *)dsp_buf, patch_len, IMG_COEFFICIENT);
  647. if (ret) {
  648. FM_LOG_ERR(FM_ERR | CHIP, " DL DSPcoeff failed\n");
  649. goto out;
  650. }
  651. mt6630_write(0x90, 0x0040);
  652. mt6630_write(0x90, 0x0000);
  653. out:
  654. if (dsp_buf) {
  655. fm_vfree(dsp_buf);
  656. dsp_buf = NULL;
  657. }
  658. return ret;
  659. }
  660. static fm_s32 mt6630_PowerUp(fm_u16 *chip_id, fm_u16 *device_id)
  661. {
  662. fm_s32 ret = 0, reg = 0;
  663. fm_u16 pkt_size;
  664. fm_u16 tmp_reg = 0;
  665. if (chip_id == NULL) {
  666. pr_err("%s,invalid pointer\n", __func__);
  667. return -FM_EPARA;
  668. }
  669. if (device_id == NULL) {
  670. pr_err("%s,invalid pointer\n", __func__);
  671. return -FM_EPARA;
  672. }
  673. FM_LOG_DBG(FM_DBG | CHIP, "pwr on seq......\n");
  674. ret = mt6630_host_read(0x80021010, &reg);
  675. if (ret) {
  676. FM_LOG_ERR(FM_ERR | CHIP, "packaging rd failed\n");
  677. } else {
  678. fm_packaging = (reg & 0x00008000) >> 15;
  679. FM_LOG_NTC(FM_NTC | CHIP, "fm_packaging: %d\n", fm_packaging);
  680. }
  681. ret = mt6630_pwrup_top_setting();
  682. if (ret) {
  683. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrup_top_setting failed\n");
  684. return ret;
  685. }
  686. if (FM_LOCK(cmd_buf_lock))
  687. return -FM_ELOCK;
  688. pkt_size = mt6630_pwrup_clock_on(cmd_buf, TX_BUF_SIZE);
  689. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_EN, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  690. FM_UNLOCK(cmd_buf_lock);
  691. if (ret) {
  692. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrup_clock_on failed\n");
  693. return ret;
  694. }
  695. /* read HW version */
  696. mt6630_read(0x62, &tmp_reg);
  697. *chip_id = tmp_reg;
  698. *device_id = tmp_reg;
  699. mt6630_hw_info.chip_id = (fm_s32) tmp_reg;
  700. FM_LOG_NTC(FM_NTC | CHIP, "chip_id:0x%04x\n", tmp_reg);
  701. if (mt6630_hw_info.chip_id != 0x6630) {
  702. FM_LOG_NTC(FM_NTC | CHIP, "fm sys error!\n");
  703. return -FM_EPARA;
  704. }
  705. ret = mt6630_pwrup_DSP_download(mt6630_patch_tbl);
  706. if (ret) {
  707. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrup_DSP_download failed\n");
  708. return ret;
  709. }
  710. if ((mt6630_fm_config.aud_cfg.aud_path == FM_AUD_MRGIF)
  711. || (mt6630_fm_config.aud_cfg.aud_path == FM_AUD_I2S)) {
  712. mt6630_I2s_Setting(FM_I2S_ON, mt6630_fm_config.aud_cfg.i2s_info.mode,
  713. mt6630_fm_config.aud_cfg.i2s_info.rate);
  714. /* mt_combo_audio_ctrl(COMBO_AUDIO_STATE_2); */
  715. mtk_wcn_cmb_stub_audio_ctrl((CMB_STUB_AIF_X) CMB_STUB_AIF_2);
  716. }
  717. /* Wholechip FM Power Up: step 4, FM Digital Init: fm_rgf_maincon */
  718. if (FM_LOCK(cmd_buf_lock))
  719. return -FM_ELOCK;
  720. pkt_size = mt6630_pwrup_digital_init(cmd_buf, TX_BUF_SIZE);
  721. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_EN, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  722. FM_UNLOCK(cmd_buf_lock);
  723. if (ret) {
  724. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrup_digital_init failed\n");
  725. return ret;
  726. }
  727. FM_LOG_NTC(FM_NTC | CHIP, "pwr on seq ok\n");
  728. return ret;
  729. }
  730. static fm_s32 mt6630_PowerDown(void)
  731. {
  732. fm_s32 ret = 0;
  733. fm_u16 pkt_size;
  734. fm_u16 dataRead;
  735. FM_LOG_DBG(FM_DBG | CHIP, "pwr down seq\n");
  736. /*SW work around for MCUFA issue.
  737. *if interrupt happen before doing rampdown, DSP can't switch MCUFA back well.
  738. * In case read interrupt, and clean if interrupt found before rampdown.
  739. */
  740. mt6630_read(FM_MAIN_INTR, &dataRead);
  741. if (dataRead & 0x1)
  742. mt6630_write(FM_MAIN_INTR, dataRead); /* clear status flag */
  743. /* mt6630_RampDown(); */
  744. if (FM_LOCK(cmd_buf_lock))
  745. return -FM_ELOCK;
  746. pkt_size = mt6630_pwrdown(cmd_buf, TX_BUF_SIZE);
  747. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_EN, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  748. FM_UNLOCK(cmd_buf_lock);
  749. if (ret) {
  750. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrdown failed\n");
  751. return ret;
  752. }
  753. ret = mt6630_pwrdown_top_setting();
  754. if (ret) {
  755. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrdown_top_setting failed\n");
  756. return ret;
  757. }
  758. return ret;
  759. }
  760. /* just for dgb */
  761. static fm_bool mt6630_SetFreq(fm_u16 freq)
  762. {
  763. fm_s32 ret = 0;
  764. fm_u16 pkt_size;
  765. fm_u16 chan_para = 0;
  766. fm_cb_op->cur_freq_set(freq);
  767. #if 0
  768. /* MCU clock adjust if need */
  769. ret = mt6630_mcu_dese(freq, NULL);
  770. if (ret < 0)
  771. WCN_DBG(FM_ERR | MAIN, "mt6630_mcu_dese FAIL:%d\n", ret);
  772. WCN_DBG(FM_INF | MAIN, "MCU %d\n", ret);
  773. #endif
  774. /* GPS clock adjust if need */
  775. ret = mt6630_gps_dese(freq, NULL);
  776. if (ret < 0)
  777. WCN_DBG(FM_ERR | MAIN, "mt6630_gps_dese FAIL:%d\n", ret);
  778. WCN_DBG(FM_INF | MAIN, "GPS %d\n", ret);
  779. ret = mt6630_write(0x60, 0x0007);
  780. if (ret)
  781. WCN_DBG(FM_ALT | MAIN, "set freq write 0x60 fail\n");
  782. if (mt6630_TDD_chan_check(freq)) {
  783. ret = mt6630_set_bits(0x30, 0x0004, 0xFFF9); /* use TDD solution */
  784. if (ret)
  785. WCN_DBG(FM_ALT | MAIN, "set freq write 0x30 fail\n");
  786. } else {
  787. ret = mt6630_set_bits(0x30, 0x0000, 0xFFF9); /* default use FDD solution */
  788. if (ret)
  789. WCN_DBG(FM_ALT | MAIN, "set freq write 0x30 fail\n");
  790. }
  791. ret = mt6630_write(0x60, 0x000F);
  792. if (ret)
  793. WCN_DBG(FM_ALT | MAIN, "set freq write 0x60 fail\n");
  794. chan_para = mt6630_chan_para_get(freq);
  795. FM_LOG_DBG(FM_DBG | CHIP, "%d chan para = %d\n", (fm_s32) freq, (fm_s32) chan_para);
  796. if (FM_LOCK(cmd_buf_lock))
  797. return fm_false;
  798. pkt_size = mt6630_tune(cmd_buf, TX_BUF_SIZE, freq, chan_para);
  799. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_TUNE | FLAG_TUNE_DONE, SW_RETRY_CNT, TUNE_TIMEOUT, NULL);
  800. FM_UNLOCK(cmd_buf_lock);
  801. if (ret) {
  802. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_tune failed\n");
  803. return fm_false;
  804. }
  805. FM_LOG_DBG(FM_DBG | CHIP, "set freq to %d ok\n", freq);
  806. return fm_true;
  807. }
  808. #define FM_CQI_LOG_PATH "/mnt/sdcard/fmcqilog"
  809. static fm_s32 mt6630_full_cqi_get(fm_s32 min_freq, fm_s32 max_freq, fm_s32 space, fm_s32 cnt)
  810. {
  811. fm_s32 ret = 0;
  812. fm_u16 pkt_size;
  813. fm_u16 freq, orig_freq;
  814. fm_s32 i, j, k;
  815. fm_s32 space_val, max, min, num;
  816. struct mt6630_full_cqi *p_cqi;
  817. fm_u8 *cqi_log_title = "Freq, RSSI, PAMD, PR, FPAMD, MR, ATDC, PRX, ATDEV, SMGain, DltaRSSI\n";
  818. fm_u8 cqi_log_buf[100] = { 0 };
  819. fm_s32 pos;
  820. fm_u8 cqi_log_path[100] = { 0 };
  821. FM_LOG_NTC(FM_NTC | CHIP, "6630 cqi log start\n");
  822. /* for soft-mute tune, and get cqi */
  823. freq = fm_cb_op->cur_freq_get();
  824. if (0 == fm_get_channel_space(freq))
  825. freq *= 10;
  826. /* get cqi */
  827. orig_freq = freq;
  828. if (0 == fm_get_channel_space(min_freq))
  829. min = min_freq * 10;
  830. else
  831. min = min_freq;
  832. if (0 == fm_get_channel_space(max_freq))
  833. max = max_freq * 10;
  834. else
  835. max = max_freq;
  836. if (space == 0x0001)
  837. space_val = 5; /* 50Khz */
  838. else if (space == 0x0002)
  839. space_val = 10; /* 100Khz */
  840. else if (space == 0x0004)
  841. space_val = 20; /* 200Khz */
  842. else
  843. space_val = 10;
  844. num = (max - min) / space_val + 1; /* Eg, (8760 - 8750) / 10 + 1 = 2 */
  845. for (k = 0; (10000 == orig_freq) && (0xffffffff == g_dbg_level) && (k < cnt); k++) {
  846. FM_LOG_NTC(FM_NTC | CHIP, "cqi file:%d\n", k + 1);
  847. freq = min;
  848. pos = 0;
  849. fm_memcpy(cqi_log_path, FM_CQI_LOG_PATH, strlen(FM_CQI_LOG_PATH));
  850. sprintf(&cqi_log_path[strlen(FM_CQI_LOG_PATH)], "%d.txt", k + 1);
  851. fm_file_write(cqi_log_path, cqi_log_title, strlen(cqi_log_title), &pos);
  852. for (j = 0; j < num; j++) {
  853. if (FM_LOCK(cmd_buf_lock))
  854. return -FM_ELOCK;
  855. pkt_size = mt6630_full_cqi_req(cmd_buf, TX_BUF_SIZE, &freq, 1, 1);
  856. ret =
  857. fm_cmd_tx(cmd_buf, pkt_size, FLAG_SM_TUNE, SW_RETRY_CNT,
  858. SM_TUNE_TIMEOUT, mt6630_get_read_result);
  859. FM_UNLOCK(cmd_buf_lock);
  860. if (!ret && mt6630_res) {
  861. FM_LOG_NTC(FM_NTC | CHIP, "smt cqi size %d\n", mt6630_res->cqi[0]);
  862. p_cqi = (struct mt6630_full_cqi *)&mt6630_res->cqi[2];
  863. for (i = 0; i < mt6630_res->cqi[1]; i++) {
  864. /* just for debug */
  865. FM_LOG_NTC(FM_NTC | CHIP,
  866. "freq %d, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x\n",
  867. p_cqi[i].ch, p_cqi[i].rssi, p_cqi[i].pamd,
  868. p_cqi[i].pr, p_cqi[i].fpamd, p_cqi[i].mr,
  869. p_cqi[i].atdc, p_cqi[i].prx, p_cqi[i].atdev,
  870. p_cqi[i].smg, p_cqi[i].drssi);
  871. /* format to buffer */
  872. sprintf(cqi_log_buf,
  873. "%04d,%04x,%04x,%04x,%04x,%04x,%04x,%04x,%04x,%04x,%04x,\n",
  874. p_cqi[i].ch, p_cqi[i].rssi, p_cqi[i].pamd,
  875. p_cqi[i].pr, p_cqi[i].fpamd, p_cqi[i].mr,
  876. p_cqi[i].atdc, p_cqi[i].prx, p_cqi[i].atdev,
  877. p_cqi[i].smg, p_cqi[i].drssi);
  878. /* write back to log file */
  879. fm_file_write(cqi_log_path, cqi_log_buf, strlen(cqi_log_buf), &pos);
  880. }
  881. } else {
  882. FM_LOG_ERR(FM_ERR | CHIP, "smt get CQI failed\n");
  883. ret = -1;
  884. }
  885. freq += space_val;
  886. }
  887. fm_cb_op->cur_freq_set(0); /* avoid run too much times */
  888. }
  889. FM_LOG_NTC(FM_NTC | CHIP, "6630 cqi log done\n");
  890. return ret;
  891. }
  892. /*
  893. * mt6630_GetCurRSSI - get current freq's RSSI value
  894. * RS=RSSI
  895. * If RS>511, then RSSI(dBm)= (RS-1024)/16*6
  896. * else RSSI(dBm)= RS/16*6
  897. */
  898. static fm_s32 mt6630_GetCurRSSI(fm_s32 *pRSSI)
  899. {
  900. fm_u16 tmp_reg;
  901. /* TODO: check reg */
  902. mt6630_read(FM_RSSI_IND, &tmp_reg);
  903. tmp_reg = tmp_reg & 0x03ff;
  904. if (pRSSI) {
  905. *pRSSI = (tmp_reg > 511) ? (((tmp_reg - 1024) * 6) >> 4) : ((tmp_reg * 6) >> 4);
  906. FM_LOG_DBG(FM_DBG | CHIP, "rssi:%d, dBm:%d\n", tmp_reg, *pRSSI);
  907. } else {
  908. WCN_DBG(FM_ERR | CHIP, "get rssi para error\n");
  909. return -FM_EPARA;
  910. }
  911. return 0;
  912. }
  913. static fm_u16 mt6630_vol_tbl[16] = {
  914. 0x0000, 0x0519, 0x066A, 0x0814,
  915. 0x0A2B, 0x0CCD, 0x101D, 0x1449,
  916. 0x198A, 0x2027, 0x287A, 0x32F5,
  917. 0x4027, 0x50C3, 0x65AD, 0x7FFF
  918. };
  919. static fm_s32 mt6630_SetVol(fm_u8 vol)
  920. {
  921. fm_s32 ret = 0;
  922. /* TODO: check reg */
  923. vol = (vol > 15) ? 15 : vol;
  924. ret = mt6630_write(0x7D, mt6630_vol_tbl[vol]);
  925. if (ret) {
  926. WCN_DBG(FM_ERR | CHIP, "Set vol=%d Failed\n", vol);
  927. return ret;
  928. }
  929. FM_LOG_DBG(FM_DBG | CHIP, "Set vol=%d OK\n", vol);
  930. if (vol == 10) {
  931. fm_print_cmd_fifo(); /* just for debug */
  932. fm_print_evt_fifo();
  933. }
  934. return 0;
  935. }
  936. static fm_s32 mt6630_GetVol(fm_u8 *pVol)
  937. {
  938. int ret = 0;
  939. fm_u16 tmp;
  940. fm_s32 i;
  941. if (pVol == NULL) {
  942. pr_err("%s,invalid pointer\n", __func__);
  943. return -FM_EPARA;
  944. }
  945. /* TODO: check reg */
  946. ret = mt6630_read(0x7D, &tmp);
  947. if (ret) {
  948. *pVol = 0;
  949. WCN_DBG(FM_ERR | CHIP, "Get vol Failed\n");
  950. return ret;
  951. }
  952. for (i = 0; i < 16; i++) {
  953. if (mt6630_vol_tbl[i] == tmp) {
  954. *pVol = i;
  955. break;
  956. }
  957. }
  958. FM_LOG_DBG(FM_DBG | CHIP, "Get vol=%d OK\n", *pVol);
  959. return 0;
  960. }
  961. static fm_s32 mt6630_dump_reg(void)
  962. {
  963. fm_s32 i;
  964. fm_u16 TmpReg;
  965. for (i = 0; i < 0xff; i++) {
  966. mt6630_read(i, &TmpReg);
  967. FM_LOG_NTC(FM_NTC | CHIP, "0x%02x=0x%04x\n", i, TmpReg);
  968. }
  969. return 0;
  970. }
  971. static fm_bool mt6630_GetMonoStereo(fm_u16 *pMonoStereo)
  972. {
  973. #define FM_BF_STEREO 0x1000
  974. fm_u16 TmpReg;
  975. /* TODO: check reg */
  976. if (pMonoStereo) {
  977. mt6630_read(FM_RSSI_IND, &TmpReg);
  978. *pMonoStereo = (TmpReg & FM_BF_STEREO) >> 12;
  979. } else {
  980. WCN_DBG(FM_ERR | CHIP, "MonoStero: para err\n");
  981. return fm_false;
  982. }
  983. FM_LOG_DBG(FM_DBG | CHIP, "MonoStero:0x%04x\n", *pMonoStereo);
  984. return fm_true;
  985. }
  986. static fm_s32 mt6630_SetMonoStereo(fm_s32 MonoStereo)
  987. {
  988. fm_s32 ret = 0;
  989. #define FM_FORCE_MS 0x0008
  990. FM_LOG_DBG(FM_DBG | CHIP, "set to %s\n", MonoStereo ? "mono" : "auto");
  991. /* TODO: check reg */
  992. mt6630_write(0x60, 0x3007);
  993. if (MonoStereo)
  994. ret = mt6630_set_bits(0x75, FM_FORCE_MS, ~FM_FORCE_MS);
  995. else
  996. ret = mt6630_set_bits(0x75, 0x0000, ~FM_FORCE_MS);
  997. return ret;
  998. }
  999. static fm_s32 mt6630_GetCapArray(fm_s32 *ca)
  1000. {
  1001. fm_u16 dataRead;
  1002. fm_u16 tmp = 0;
  1003. /* TODO: check reg */
  1004. if (ca == NULL) {
  1005. pr_err("%s,invalid pointer\n", __func__);
  1006. return -FM_EPARA;
  1007. }
  1008. mt6630_read(0x60, &tmp);
  1009. mt6630_write(0x60, tmp & 0xFFF7); /* 0x60 D3=0 */
  1010. mt6630_read(0x26, &dataRead);
  1011. *ca = dataRead;
  1012. mt6630_write(0x60, tmp); /* 0x60 D3=1 */
  1013. return 0;
  1014. }
  1015. /*
  1016. * mt6630_GetCurPamd - get current freq's PAMD value
  1017. * PA=PAMD
  1018. * If PA>511 then PAMD(dB)= (PA-1024)/16*6,
  1019. * else PAMD(dB)=PA/16*6
  1020. */
  1021. static fm_bool mt6630_GetCurPamd(fm_u16 *pPamdLevl)
  1022. {
  1023. fm_u16 tmp_reg;
  1024. fm_u16 dBvalue, valid_cnt = 0;
  1025. int i, total = 0;
  1026. for (i = 0; i < 8; i++) {
  1027. /* TODO: check reg */
  1028. if (mt6630_read(FM_ADDR_PAMD, &tmp_reg)) {
  1029. *pPamdLevl = 0;
  1030. return fm_false;
  1031. }
  1032. tmp_reg &= 0x03FF;
  1033. dBvalue = (tmp_reg > 256) ? ((512 - tmp_reg) * 6 / 16) : 0;
  1034. if (dBvalue != 0) {
  1035. total += dBvalue;
  1036. valid_cnt++;
  1037. FM_LOG_DBG(FM_DBG | CHIP, "[%d]PAMD=%d\n", i, dBvalue);
  1038. }
  1039. Delayms(3);
  1040. }
  1041. if (valid_cnt != 0)
  1042. *pPamdLevl = total / valid_cnt;
  1043. else
  1044. *pPamdLevl = 0;
  1045. FM_LOG_NTC(FM_NTC | CHIP, "PAMD=%d\n", *pPamdLevl);
  1046. return fm_true;
  1047. }
  1048. static fm_s32 MT6630_FMOverBT(fm_bool enable)
  1049. {
  1050. fm_s32 ret = 0;
  1051. WCN_DBG(FM_NTC | CHIP, "+%s():\n", __func__);
  1052. if (enable == fm_true) {
  1053. /* change I2S to slave mode and 48K sample rate */
  1054. if (mt6630_I2s_Setting(FM_I2S_ON, FM_I2S_SLAVE, FM_I2S_48K))
  1055. goto out;
  1056. WCN_DBG(FM_NTC | CHIP, "set FM via BT controller\n");
  1057. } else if (enable == fm_false) {
  1058. /* change I2S to master mode and 44.1K sample rate */
  1059. if (mt6630_I2s_Setting(FM_I2S_ON, FM_I2S_MASTER, FM_I2S_44K))
  1060. goto out;
  1061. WCN_DBG(FM_NTC | CHIP, "set FM via Host\n");
  1062. } else {
  1063. WCN_DBG(FM_ERR | CHIP, "%s()\n", __func__);
  1064. ret = -FM_EPARA;
  1065. goto out;
  1066. }
  1067. out:
  1068. WCN_DBG(FM_NTC | CHIP, "-%s():[ret=%d]\n", __func__, ret);
  1069. return ret;
  1070. }
  1071. /*
  1072. * mt6630_I2s_Setting - set the I2S state on MT6630
  1073. * @onoff - I2S on/off
  1074. * @mode - I2S mode: Master or Slave
  1075. *
  1076. * Return:0, if success; error code, if failed
  1077. */
  1078. static fm_s32 mt6630_I2s_Setting(fm_s32 onoff, fm_s32 mode, fm_s32 sample)
  1079. {
  1080. fm_u16 tmp_state = 0;
  1081. fm_u16 tmp_mode = 0;
  1082. fm_u16 tmp_sample = 0;
  1083. fm_s32 ret = 0;
  1084. if (onoff == FM_I2S_ON) {
  1085. tmp_state = 0x0003; /* I2S enable and standard I2S mode, 0x9B D0,D1=1 */
  1086. mt6630_fm_config.aud_cfg.i2s_info.status = FM_I2S_ON;
  1087. } else if (onoff == FM_I2S_OFF) {
  1088. tmp_state = 0x0000; /* I2S off, 0x9B D0,D1=0 */
  1089. mt6630_fm_config.aud_cfg.i2s_info.status = FM_I2S_OFF;
  1090. } else {
  1091. WCN_DBG(FM_ERR | CHIP, "%s():[onoff=%d]\n", __func__, onoff);
  1092. ret = -FM_EPARA;
  1093. goto out;
  1094. }
  1095. if (mode == FM_I2S_MASTER) {
  1096. tmp_mode = 0x0000; /* 6630 as I2S master, set 0x9B D3=0 */
  1097. mt6630_fm_config.aud_cfg.i2s_info.mode = FM_I2S_MASTER;
  1098. } else if (mode == FM_I2S_SLAVE) {
  1099. tmp_mode = 0x0008; /* 6630 as I2S slave, set 0x9B D3=1 */
  1100. mt6630_fm_config.aud_cfg.i2s_info.mode = FM_I2S_SLAVE;
  1101. } else {
  1102. WCN_DBG(FM_ERR | CHIP, "%s():[mode=%d]\n", __func__, mode);
  1103. ret = -FM_EPARA;
  1104. goto out;
  1105. }
  1106. if (sample == FM_I2S_32K) {
  1107. tmp_sample = 0x0000; /* 6630 I2S 32KHz sample rate, 0x5F D11~12 */
  1108. mt6630_fm_config.aud_cfg.i2s_info.rate = FM_I2S_32K;
  1109. } else if (sample == FM_I2S_44K) {
  1110. tmp_sample = 0x0800; /* 6630 I2S 44.1KHz sample rate */
  1111. mt6630_fm_config.aud_cfg.i2s_info.rate = FM_I2S_44K;
  1112. } else if (sample == FM_I2S_48K) {
  1113. tmp_sample = 0x1000; /* 6630 I2S 48KHz sample rate */
  1114. mt6630_fm_config.aud_cfg.i2s_info.rate = FM_I2S_48K;
  1115. } else {
  1116. WCN_DBG(FM_ERR | CHIP, "%s():[sample=%d]\n", __func__, sample);
  1117. ret = -FM_EPARA;
  1118. goto out;
  1119. }
  1120. ret = mt6630_write(0x60, 0x7);
  1121. if (ret)
  1122. goto out;
  1123. ret = mt6630_set_bits(0x5F, tmp_sample, 0xE7FF);
  1124. if (ret)
  1125. goto out;
  1126. ret = mt6630_set_bits(0x9B, tmp_mode, 0xFFF7);
  1127. if (ret)
  1128. goto out;
  1129. ret = mt6630_set_bits(0x9B, tmp_state, 0xFFFC);
  1130. if (ret)
  1131. goto out;
  1132. /* F0.4 enable ft */
  1133. ret = mt6630_set_bits(0x56, 0x1, 0xFFFE);
  1134. if (ret)
  1135. goto out;
  1136. ret = mt6630_write(0x60, 0xf);
  1137. if (ret)
  1138. goto out;
  1139. FM_LOG_NTC(FM_NTC | CHIP, "[onoff=%s][mode=%s][sample=%d](0)33KHz,(1)44.1KHz,(2)48KHz\n",
  1140. (onoff == FM_I2S_ON) ? "On" : "Off", (mode == FM_I2S_MASTER) ? "Master" : "Slave", sample);
  1141. out:
  1142. return ret;
  1143. }
  1144. static fm_s32 mt6630fm_get_audio_info(fm_audio_info_t *data)
  1145. {
  1146. memcpy(data, &mt6630_fm_config.aud_cfg, sizeof(fm_audio_info_t));
  1147. return 0;
  1148. }
  1149. static fm_s32 mt6630_i2s_info_get(fm_s32 *ponoff, fm_s32 *pmode, fm_s32 *psample)
  1150. {
  1151. *ponoff = mt6630_fm_config.aud_cfg.i2s_info.status;
  1152. *pmode = mt6630_fm_config.aud_cfg.i2s_info.mode;
  1153. *psample = mt6630_fm_config.aud_cfg.i2s_info.rate;
  1154. return 0;
  1155. }
  1156. static fm_s32 mt6630_hw_info_get(struct fm_hw_info *req)
  1157. {
  1158. if (req == NULL) {
  1159. pr_err("%s,invalid pointer\n", __func__);
  1160. return -FM_EPARA;
  1161. }
  1162. req->chip_id = mt6630_hw_info.chip_id;
  1163. req->eco_ver = mt6630_hw_info.eco_ver;
  1164. req->patch_ver = mt6630_hw_info.patch_ver;
  1165. req->rom_ver = mt6630_hw_info.rom_ver;
  1166. return 0;
  1167. }
  1168. static fm_s32 mt6630_pre_search(void)
  1169. {
  1170. mt6630_RampDown();
  1171. return 0;
  1172. }
  1173. static fm_s32 mt6630_restore_search(void)
  1174. {
  1175. mt6630_RampDown();
  1176. return 0;
  1177. }
  1178. /*
  1179. freq: 8750~10800
  1180. valid: fm_true-valid channel,fm_false-invalid channel
  1181. return: fm_true- smt success, fm_false-smt fail
  1182. */
  1183. static fm_s32 mt6630_soft_mute_tune(fm_u16 freq, fm_s32 *rssi, fm_bool *valid)
  1184. {
  1185. fm_s32 ret = 0;
  1186. fm_u16 pkt_size;
  1187. /* fm_u16 freq;//, orig_freq; */
  1188. struct mt6630_full_cqi *p_cqi;
  1189. fm_s32 RSSI = 0, PAMD = 0, MR = 0, ATDC = 0;
  1190. fm_u32 PRX = 0, ATDEV = 0;
  1191. fm_u16 softmuteGainLvl = 0;
  1192. ret = mt6630_chan_para_get(freq);
  1193. if (ret == 2)
  1194. ret = mt6630_set_bits(FM_CHANNEL_SET, 0x2000, 0x0FFF); /* mdf HiLo */
  1195. else
  1196. ret = mt6630_set_bits(FM_CHANNEL_SET, 0x0000, 0x0FFF); /* clear FA/HL/ATJ */
  1197. #if 0
  1198. mt6630_write(0x60, 0x0007);
  1199. if (mt6630_TDD_chan_check(freq))
  1200. mt6630_set_bits(0x30, 0x0004, 0xFFF9); /* use TDD solution */
  1201. else
  1202. mt6630_set_bits(0x30, 0x0000, 0xFFF9); /* default use FDD solution */
  1203. mt6630_write(0x60, 0x000F);
  1204. #endif
  1205. if (FM_LOCK(cmd_buf_lock))
  1206. return -FM_ELOCK;
  1207. pkt_size = mt6630_full_cqi_req(cmd_buf, TX_BUF_SIZE, &freq, 1, 1);
  1208. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_SM_TUNE, SW_RETRY_CNT, SM_TUNE_TIMEOUT, mt6630_get_read_result);
  1209. FM_UNLOCK(cmd_buf_lock);
  1210. if (!ret && mt6630_res) {
  1211. FM_LOG_NTC(FM_NTC | CHIP, "smt cqi size %d\n", mt6630_res->cqi[0]);
  1212. p_cqi = (struct mt6630_full_cqi *)&mt6630_res->cqi[2];
  1213. /* just for debug */
  1214. FM_LOG_NTC(FM_NTC | CHIP,
  1215. "freq %d, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x\n",
  1216. p_cqi->ch, p_cqi->rssi, p_cqi->pamd, p_cqi->pr, p_cqi->fpamd, p_cqi->mr,
  1217. p_cqi->atdc, p_cqi->prx, p_cqi->atdev, p_cqi->smg, p_cqi->drssi);
  1218. RSSI = ((p_cqi->rssi & 0x03FF) >= 512) ? ((p_cqi->rssi & 0x03FF) - 1024) : (p_cqi->rssi & 0x03FF);
  1219. PAMD = ((p_cqi->pamd & 0x1FF) >= 256) ? ((p_cqi->pamd & 0x01FF) - 512) : (p_cqi->pamd & 0x01FF);
  1220. MR = ((p_cqi->mr & 0x01FF) >= 256) ? ((p_cqi->mr & 0x01FF) - 512) : (p_cqi->mr & 0x01FF);
  1221. ATDC = (p_cqi->atdc >= 32768) ? (65536 - p_cqi->atdc) : (p_cqi->atdc);
  1222. if (ATDC < 0)
  1223. ATDC = (~(ATDC)) - 1; /* Get abs value of ATDC */
  1224. PRX = (p_cqi->prx & 0x00FF);
  1225. ATDEV = p_cqi->atdev;
  1226. softmuteGainLvl = p_cqi->smg;
  1227. /* check if the channel is valid according to each CQIs */
  1228. if ((RSSI >= mt6630_fm_config.rx_cfg.long_ana_rssi_th)
  1229. && (PAMD <= mt6630_fm_config.rx_cfg.pamd_th)
  1230. && (ATDC <= mt6630_fm_config.rx_cfg.atdc_th)
  1231. && (MR >= mt6630_fm_config.rx_cfg.mr_th)
  1232. && (PRX >= mt6630_fm_config.rx_cfg.prx_th)
  1233. && (ATDEV >= ATDC) /* sync scan algorithm */
  1234. && (softmuteGainLvl >= mt6630_fm_config.rx_cfg.smg_th)) {
  1235. *valid = fm_true;
  1236. } else {
  1237. *valid = fm_false;
  1238. }
  1239. *rssi = RSSI;
  1240. /* if(RSSI < -296)
  1241. FM_LOG_NTC(FM_NTC | CHIP, "rssi\n");
  1242. else if(PAMD > -12)
  1243. FM_LOG_NTC(FM_NTC | CHIP, "PAMD\n");
  1244. else if(ATDC > 3496)
  1245. FM_LOG_NTC(FM_NTC | CHIP, "ATDC\n");
  1246. else if(MR < -67)
  1247. FM_LOG_NTC(FM_NTC | CHIP, "MR\n");
  1248. else if(PRX < 80)
  1249. FM_LOG_NTC(FM_NTC | CHIP, "PRX\n");
  1250. else if(ATDEV < ATDC)
  1251. FM_LOG_NTC(FM_NTC | CHIP, "ATDEV\n");
  1252. else if(softmuteGainLvl < 16421)
  1253. FM_LOG_NTC(FM_NTC | CHIP, "softmuteGainLvl\n");
  1254. */
  1255. } else {
  1256. FM_LOG_ERR(FM_ERR | CHIP, "smt get CQI failed\n");
  1257. return fm_false;
  1258. }
  1259. FM_LOG_NTC(FM_NTC | CHIP, "valid=%d\n", *valid);
  1260. return fm_true;
  1261. }
  1262. /*
  1263. parm:
  1264. parm.th_type: 0, RSSI. 1,desense RSSI. 2,SMG.
  1265. parm.th_val: threshold value
  1266. */
  1267. static fm_s32 mt6630_set_search_th(fm_s32 idx, fm_s32 val, fm_s32 reserve)
  1268. {
  1269. switch (idx) {
  1270. case 0: {
  1271. mt6630_fm_config.rx_cfg.long_ana_rssi_th = val;
  1272. WCN_DBG(FM_NTC | CHIP, "set rssi th =%d\n", val);
  1273. break;
  1274. }
  1275. case 1: {
  1276. mt6630_fm_config.rx_cfg.desene_rssi_th = val;
  1277. WCN_DBG(FM_NTC | CHIP, "set desense rssi th =%d\n", val);
  1278. break;
  1279. }
  1280. case 2: {
  1281. mt6630_fm_config.rx_cfg.smg_th = val;
  1282. WCN_DBG(FM_NTC | CHIP, "set smg th =%d\n", val);
  1283. break;
  1284. }
  1285. default:
  1286. break;
  1287. }
  1288. return 0;
  1289. }
  1290. #if 0
  1291. static const fm_u16 mt6630_mcu_dese_list[] = {
  1292. 0 /* 7630, 7800, 7940, 8320, 9260, 9600, 9710, 9920, 10400, 10410 */
  1293. };
  1294. static const fm_u16 mt6630_gps_dese_list[] = {
  1295. 0 /* 7850, 7860 */
  1296. };
  1297. #endif
  1298. static const fm_s8 mt6630_chan_para_map[] = {
  1299. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 6500~6595 */
  1300. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 6600~6695 */
  1301. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, /* 6700~6795 */
  1302. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 6800~6895 */
  1303. 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 6900~6995 */
  1304. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7000~7095 */
  1305. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7100~7195 */
  1306. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7200~7295 */
  1307. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7300~7395 */
  1308. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7400~7495 */
  1309. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7500~7595 */
  1310. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, /* 7600~7695 */
  1311. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7700~7795 */
  1312. 8, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7800~7895 */
  1313. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 7900~7995 */
  1314. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8000~8095 */
  1315. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8100~8195 */
  1316. 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8200~8295 */
  1317. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, /* 8300~8395 */
  1318. 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8400~8495 */
  1319. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8500~8595 */
  1320. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8600~8695 */
  1321. 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8700~8795 */
  1322. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8800~8895 */
  1323. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 8900~8995 */
  1324. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9000~9095 */
  1325. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9100~9195 */
  1326. 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9200~9295 */
  1327. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9300~9395 */
  1328. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9400~9495 */
  1329. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9500~9595 */
  1330. 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9600~9695 */
  1331. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9700~9795 */
  1332. 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 9800~9895 */
  1333. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, /* 9900~9995 */
  1334. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 10000~10095 */
  1335. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 10100~10195 */
  1336. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, /* 10200~10295 */
  1337. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, /* 10300~10395 */
  1338. 8, 0, 2, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 10400~10495 */
  1339. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, /* 10500~10595 */
  1340. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 10600~10695 */
  1341. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, /* 10700~10795 */
  1342. 0 /* 10800 */
  1343. };
  1344. static const fm_u16 mt6630_TDD_list[] = {
  1345. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 6500~6595 */
  1346. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 6600~6695 */
  1347. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 6700~6795 */
  1348. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 6800~6895 */
  1349. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 6900~6995 */
  1350. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7000~7095 */
  1351. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7100~7195 */
  1352. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7200~7295 */
  1353. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7300~7395 */
  1354. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7400~7495 */
  1355. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7500~7595 */
  1356. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7600~7695 */
  1357. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7700~7795 */
  1358. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7800~7895 */
  1359. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 7900~7995 */
  1360. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8000~8095 */
  1361. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8100~8195 */
  1362. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8200~8295 */
  1363. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8300~8395 */
  1364. 0x0101, 0x0000, 0x0000, 0x0000, 0x0000, /* 8400~8495 */
  1365. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8500~8595 */
  1366. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8600~8695 */
  1367. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8700~8795 */
  1368. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8800~8895 */
  1369. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 8900~8995 */
  1370. 0x0000, 0x0000, 0x0101, 0x0101, 0x0101, /* 9000~9095 */
  1371. 0x0101, 0x0000, 0x0000, 0x0000, 0x0000, /* 9100~9195 */
  1372. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 9200~9295 */
  1373. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 9300~9395 */
  1374. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 9400~9495 */
  1375. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 9500~9595 */
  1376. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 9600~9695 */
  1377. 0x0000, 0x0000, 0x0000, 0x0000, 0x0100, /* 9700~9795 */
  1378. 0x0101, 0x0101, 0x0101, 0x0101, 0x0101, /* 9800~9895 */
  1379. 0x0101, 0x0101, 0x0001, 0x0000, 0x0000, /* 9900~9995 */
  1380. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 10000~10095 */
  1381. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 10100~10195 */
  1382. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 10200~10295 */
  1383. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 10300~10395 */
  1384. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 10400~10495 */
  1385. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 10500~10595 */
  1386. 0x0000, 0x0000, 0x0000, 0x0000, 0x0100, /* 10600~10695 */
  1387. 0x0101, 0x0101, 0x0101, 0x0101, 0x0101, /* 10700~10795 */
  1388. 0x0001 /* 10800 */
  1389. };
  1390. static const fm_u16 mt6630_TDD_Mask[] = {
  1391. 0x0001, 0x0010, 0x0100, 0x1000
  1392. };
  1393. static const fm_u16 mt6630_scan_dese_list[] = {
  1394. 7800, 9210, 9220, 9600, 9980, 10400, 10750, 10760
  1395. };
  1396. /* return value: 0, not a de-sense channel; 1, this is a de-sense channel; else error no */
  1397. static fm_s32 mt6630_is_dese_chan(fm_u16 freq)
  1398. {
  1399. fm_s32 size;
  1400. /* return 0;//HQA only :skip desense channel check. */
  1401. size = sizeof(mt6630_scan_dese_list) / sizeof(mt6630_scan_dese_list[0]);
  1402. if (0 == fm_get_channel_space(freq))
  1403. freq *= 10;
  1404. while (size) {
  1405. if (mt6630_scan_dese_list[size - 1] == freq)
  1406. return 1;
  1407. size--;
  1408. }
  1409. return 0;
  1410. }
  1411. static fm_bool mt6630_TDD_chan_check(fm_u16 freq)
  1412. {
  1413. fm_u32 i = 0;
  1414. fm_u16 freq_tmp = freq;
  1415. fm_s32 ret = 0;
  1416. ret = fm_get_channel_space(freq_tmp);
  1417. if (0 == ret)
  1418. freq_tmp *= 10;
  1419. else if (-1 == ret)
  1420. return fm_false;
  1421. i = (freq_tmp - 6500) / 5;
  1422. if (mt6630_TDD_list[i / 4] & mt6630_TDD_Mask[i % 4]) {
  1423. WCN_DBG(FM_DBG | CHIP, "Freq %d use TDD solution\n", freq);
  1424. return fm_true;
  1425. } else
  1426. return fm_false;
  1427. }
  1428. /* return value:
  1429. 1, is desense channel and rssi is less than threshold;
  1430. 0, not desense channel or it is but rssi is more than threshold.*/
  1431. static fm_s32 mt6630_desense_check(fm_u16 freq, fm_s32 rssi)
  1432. {
  1433. if (mt6630_is_dese_chan(freq)) {
  1434. if (rssi < mt6630_fm_config.rx_cfg.desene_rssi_th)
  1435. return 1;
  1436. FM_LOG_DBG(FM_DBG | CHIP, "desen_rssi %d th:%d\n", rssi, mt6630_fm_config.rx_cfg.desene_rssi_th);
  1437. }
  1438. return 0;
  1439. }
  1440. /* get channel parameter, HL side/ FA / ATJ */
  1441. static fm_u16 mt6630_chan_para_get(fm_u16 freq)
  1442. {
  1443. fm_s32 pos, size;
  1444. /* return 0;//for HQA only: skip FA/HL/ATJ */
  1445. if (0 == fm_get_channel_space(freq))
  1446. freq *= 10;
  1447. if (freq < 6500)
  1448. return 0;
  1449. pos = (freq - 6500) / 5;
  1450. size = sizeof(mt6630_chan_para_map) / sizeof(mt6630_chan_para_map[0]);
  1451. pos = (pos < 0) ? 0 : pos;
  1452. pos = (pos > (size - 1)) ? (size - 1) : pos;
  1453. return mt6630_chan_para_map[pos];
  1454. }
  1455. static fm_s32 mt6630_gps_dese(fm_u16 freq, void *arg)
  1456. {
  1457. fm_gps_desense_t state = FM_GPS_DESE_DISABLE;
  1458. if (0 == fm_get_channel_space(freq))
  1459. freq *= 10;
  1460. WCN_DBG(FM_DBG | CHIP, "%s, [freq=%d]\n", __func__, (int)freq);
  1461. if (state != FM_GPS_DESE_ENABLE) {
  1462. if ((freq >= 7800) && (freq <= 8000))
  1463. state = FM_GPS_DESE_ENABLE;
  1464. }
  1465. /* request 6630 GPS change clk */
  1466. if (state == FM_GPS_DESE_DISABLE) {
  1467. if (!mtk_wcn_wmt_dsns_ctrl(WMTDSNS_FM_GPS_DISABLE))
  1468. return -1;
  1469. return 0;
  1470. }
  1471. if (!mtk_wcn_wmt_dsns_ctrl(WMTDSNS_FM_GPS_ENABLE))
  1472. return -1;
  1473. return 1;
  1474. }
  1475. /******************************Tx function********************************************/
  1476. static fm_s32 mt6630_Tx_Support(fm_s32 *sup)
  1477. {
  1478. *sup = 1;
  1479. return 0;
  1480. }
  1481. static fm_s32 mt6630_rdsTx_Support(fm_s32 *sup)
  1482. {
  1483. *sup = 1;
  1484. return 0;
  1485. }
  1486. static fm_s32 MT6630_Rds_Tx_Enable(void)
  1487. {
  1488. fm_s32 ret = 0;
  1489. fm_u16 pkt_size;
  1490. if (FM_LOCK(cmd_buf_lock))
  1491. return -FM_ELOCK;
  1492. pkt_size = mt6630_tx_rdson_deviation(cmd_buf, TX_BUF_SIZE);
  1493. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_RDS_TX, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  1494. FM_UNLOCK(cmd_buf_lock);
  1495. if (ret) {
  1496. WCN_DBG(FM_ALT | CHIP, "mt6630_tx_rdson_deviation failed\n");
  1497. return ret;
  1498. }
  1499. mt6630_set_bits(0xC7, 0x0800, 0xF7FF);
  1500. return 0;
  1501. }
  1502. static fm_s32 MT6630_Rds_Tx_Disable(void)
  1503. {
  1504. fm_s32 ret = 0;
  1505. fm_u16 pkt_size;
  1506. if (FM_LOCK(cmd_buf_lock))
  1507. return -FM_ELOCK;
  1508. pkt_size = mt6630_pwrup_tx_deviation(cmd_buf, TX_BUF_SIZE);
  1509. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_EN, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  1510. FM_UNLOCK(cmd_buf_lock);
  1511. if (ret) {
  1512. WCN_DBG(FM_ALT | CHIP, "mt6630_pwrup_tx_deviation failed\n");
  1513. return ret;
  1514. }
  1515. mt6630_set_bits(0xC7, 0x0000, 0xF7FF);
  1516. return 0;
  1517. }
  1518. /*
  1519. pi: pi code,
  1520. ps: block B,C,D
  1521. other_rds: NULL now
  1522. other_rds_cnt:0 now
  1523. */
  1524. static fm_s32 MT6630_Rds_Tx(fm_u16 pi, fm_u16 *ps, fm_u16 *other_rds, fm_u8 other_rds_cnt)
  1525. {
  1526. fm_s32 ret = 0;
  1527. fm_u16 pkt_size = 0;
  1528. WCN_DBG(FM_NTC | RDSC,
  1529. "+%s():PI=0x%04x, PS=0x%04x/0x%04x/0x%04x/0x%04x, other_rds_cnt=%d\n", __func__,
  1530. pi, ps[0], ps[1], ps[2], ps[3], other_rds_cnt);
  1531. if (FM_LOCK(cmd_buf_lock))
  1532. return -FM_ELOCK;
  1533. pkt_size = mt6630_rds_tx(cmd_buf, TX_BUF_SIZE, pi, ps, other_rds, other_rds_cnt);
  1534. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_RDS_TX, SW_RETRY_CNT, RDS_TX_TIMEOUT, NULL);
  1535. FM_UNLOCK(cmd_buf_lock);
  1536. return ret;
  1537. }
  1538. /*
  1539. freq: 8750~10800
  1540. valid: fm_true-valid channel,fm_false-invalid channel
  1541. return: fm_true- smt success, fm_false-smt fail
  1542. */
  1543. static fm_s32 mt6630_soft_mute_tune_Tx(fm_u16 freq, fm_s32 *rssi, fm_bool *valid)
  1544. {
  1545. fm_s32 ret = 0;
  1546. fm_u16 pkt_size;
  1547. struct mt6630_full_cqi *p_cqi;
  1548. fm_s32 RSSI = 0, PAMD = 0, MR = 0, ATDC = 0;
  1549. fm_u32 PRX = 0, ATDEV = 0;
  1550. fm_u16 softmuteGainLvl = 0;
  1551. ret = mt6630_chan_para_get(freq);
  1552. if (ret == 2)
  1553. ret = mt6630_set_bits(FM_CHANNEL_SET, 0x2000, 0x0FFF); /* mdf HiLo */
  1554. else
  1555. ret = mt6630_set_bits(FM_CHANNEL_SET, 0x0000, 0x0FFF); /* clear FA/HL/ATJ */
  1556. mt6630_write(0x60, 0x0007);
  1557. if (mt6630_TDD_chan_check(freq))
  1558. mt6630_set_bits(0x30, 0x0004, 0xFFF9); /* use TDD solution */
  1559. else
  1560. mt6630_set_bits(0x30, 0x0000, 0xFFF9); /* default use FDD solution */
  1561. mt6630_write(0x60, 0x000F);
  1562. if (FM_LOCK(cmd_buf_lock))
  1563. return -FM_ELOCK;
  1564. pkt_size = mt6630_full_cqi_req(cmd_buf, TX_BUF_SIZE, &freq, 1, 1);
  1565. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_SM_TUNE, SW_RETRY_CNT, SM_TUNE_TIMEOUT, mt6630_get_read_result);
  1566. FM_UNLOCK(cmd_buf_lock);
  1567. if (!ret && mt6630_res) {
  1568. FM_LOG_NTC(FM_NTC | CHIP, "smt cqi size %d\n", mt6630_res->cqi[0]);
  1569. p_cqi = (struct mt6630_full_cqi *)&mt6630_res->cqi[2];
  1570. /* just for debug */
  1571. FM_LOG_NTC(FM_NTC | CHIP,
  1572. "freq %d, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x, 0x%04x\n",
  1573. p_cqi->ch, p_cqi->rssi, p_cqi->pamd, p_cqi->pr, p_cqi->fpamd, p_cqi->mr,
  1574. p_cqi->atdc, p_cqi->prx, p_cqi->atdev, p_cqi->smg, p_cqi->drssi);
  1575. RSSI = ((p_cqi->rssi & 0x03FF) >= 512) ? ((p_cqi->rssi & 0x03FF) - 1024) : (p_cqi->rssi & 0x03FF);
  1576. PAMD = ((p_cqi->pamd & 0x1FF) >= 256) ? ((p_cqi->pamd & 0x01FF) - 512) : (p_cqi->pamd & 0x01FF);
  1577. MR = ((p_cqi->mr & 0x01FF) >= 256) ? ((p_cqi->mr & 0x01FF) - 512) : (p_cqi->mr & 0x01FF);
  1578. ATDC = (p_cqi->atdc >= 32768) ? (65536 - p_cqi->atdc) : (p_cqi->atdc);
  1579. if (ATDC < 0)
  1580. ATDC = (~(ATDC)) - 1; /* Get abs value of ATDC */
  1581. PRX = (p_cqi->prx & 0x00FF);
  1582. ATDEV = p_cqi->atdev;
  1583. softmuteGainLvl = p_cqi->smg;
  1584. /* check if the channel is valid according to each CQIs */
  1585. if ((PAMD > mt6630_fm_config.tx_cfg.pamd_th)
  1586. && (MR <= mt6630_fm_config.tx_cfg.mr_th)
  1587. && (softmuteGainLvl < mt6630_fm_config.tx_cfg.smg_th))
  1588. *valid = fm_true;
  1589. else
  1590. *valid = fm_false;
  1591. *rssi = RSSI;
  1592. } else {
  1593. FM_LOG_ERR(FM_ERR | CHIP, "smt get CQI failed\n");
  1594. return fm_false;
  1595. }
  1596. FM_LOG_NTC(FM_NTC | CHIP, "valid=%d\n", *valid);
  1597. return fm_true;
  1598. }
  1599. #define TX_ABANDON_BAND_LOW1 7320
  1600. #define TX_ABANDON_BAND_HIGH1 7450
  1601. #define TX_ABANDON_BAND_LOW2 9760
  1602. #define TX_ABANDON_BAND_HIGH2 9940
  1603. static fm_s32 mt6630_TxScan(fm_u16 min_freq,
  1604. fm_u16 max_freq,
  1605. fm_u16 *pFreq, fm_u16 *pScanTBL, fm_u16 *ScanTBLsize, fm_u16 scandir, fm_u16 space)
  1606. {
  1607. fm_s32 i = 0, ret = 0;
  1608. fm_u16 freq = *pFreq;
  1609. fm_u16 scan_cnt = *ScanTBLsize;
  1610. fm_u16 cnt = 0;
  1611. fm_s32 rssi = 0;
  1612. fm_s32 step;
  1613. fm_bool valid = fm_false;
  1614. fm_s32 total_no = 0;
  1615. WCN_DBG(FM_NTC | CHIP, "+%s():\n", __func__);
  1616. if ((!pScanTBL) || (*ScanTBLsize < FM_TX_SCAN_MIN) || (*ScanTBLsize > FM_TX_SCAN_MAX)) {
  1617. WCN_DBG(FM_ERR | CHIP, "invalid scan table\n");
  1618. ret = -FM_EPARA;
  1619. return 1;
  1620. }
  1621. if (0 == fm_get_channel_space(freq))
  1622. *pFreq *= 10;
  1623. if (0 == fm_get_channel_space(max_freq))
  1624. max_freq *= 10;
  1625. if (0 == fm_get_channel_space(min_freq))
  1626. min_freq *= 10;
  1627. WCN_DBG(FM_NTC | CHIP,
  1628. "[freq=%d], [max_freq=%d],[min_freq=%d],[scan BTL size=%d],[scandir=%d],[space=%d]\n",
  1629. *pFreq, max_freq, min_freq, *ScanTBLsize, scandir, space);
  1630. cnt = 0;
  1631. if (space == FM_SPACE_200K)
  1632. step = 20;
  1633. else if (space == FM_SPACE_50K)
  1634. step = 5;
  1635. else
  1636. step = 10;
  1637. total_no = (max_freq - min_freq) / step + 1;
  1638. if (scandir == FM_TX_SCAN_UP) {
  1639. for (i = ((*pFreq - min_freq) / step); i < total_no; i++) {
  1640. freq = min_freq + step * i;
  1641. /* FM desense GPS */
  1642. if ((freq >= TX_ABANDON_BAND_LOW1) && (freq <= TX_ABANDON_BAND_HIGH1)) {
  1643. freq = TX_ABANDON_BAND_HIGH1 + 10;
  1644. i = (freq - min_freq) / step;
  1645. }
  1646. if ((freq >= TX_ABANDON_BAND_LOW2) && (freq <= TX_ABANDON_BAND_HIGH2)) {
  1647. freq = TX_ABANDON_BAND_HIGH2 + 10;
  1648. i = (freq - min_freq) / step;
  1649. }
  1650. ret = mt6630_soft_mute_tune_Tx(freq, &rssi, &valid);
  1651. if (ret == fm_false) {
  1652. WCN_DBG(FM_ERR | CHIP, "mt6630_soft_mute_tune_tx failed\n");
  1653. return 1;
  1654. }
  1655. if (valid == fm_true) {
  1656. *(pScanTBL + cnt) = freq; /* strore the valid empty channel */
  1657. cnt++;
  1658. WCN_DBG(FM_NTC | CHIP, "empty channel:[freq=%d] [cnt=%d]\n", freq, cnt);
  1659. }
  1660. if (cnt >= scan_cnt)
  1661. break;
  1662. }
  1663. if (cnt < scan_cnt) {
  1664. for (i = 0; i < ((*pFreq - min_freq) / step); i++) {
  1665. freq = min_freq + step * i;
  1666. /* FM desense GPS */
  1667. if ((freq >= TX_ABANDON_BAND_LOW1) && (freq <= TX_ABANDON_BAND_HIGH1)) {
  1668. freq = TX_ABANDON_BAND_HIGH1 + 10;
  1669. i = (freq - min_freq) / step;
  1670. }
  1671. if ((freq >= TX_ABANDON_BAND_LOW2) && (freq <= TX_ABANDON_BAND_HIGH2)) {
  1672. freq = TX_ABANDON_BAND_HIGH2 + 10;
  1673. i = (freq - min_freq) / step;
  1674. }
  1675. if (i >= ((*pFreq - min_freq) / step))
  1676. break;
  1677. ret = mt6630_soft_mute_tune_Tx(freq, &rssi, &valid);
  1678. if (ret == fm_false) {
  1679. WCN_DBG(FM_ERR | CHIP, "mt6630_soft_mute_tune failed\n");
  1680. return 1;
  1681. }
  1682. if (valid == fm_true) {
  1683. *(pScanTBL + cnt) = freq; /* strore the valid empty channel */
  1684. cnt++;
  1685. WCN_DBG(FM_NTC | CHIP, "empty channel:[freq=%d] [cnt=%d]\n", freq, cnt);
  1686. }
  1687. if (cnt >= scan_cnt)
  1688. break;
  1689. }
  1690. }
  1691. } else {
  1692. for (i = ((*pFreq - min_freq) / step - 1); i >= 0; i--) {
  1693. freq = min_freq + step * i;
  1694. /* FM desense GPS */
  1695. if ((freq >= TX_ABANDON_BAND_LOW1) && (freq <= TX_ABANDON_BAND_HIGH1)) {
  1696. freq = TX_ABANDON_BAND_LOW1 - 10;
  1697. i = (freq - min_freq) / step;
  1698. }
  1699. if ((freq >= TX_ABANDON_BAND_LOW2) && (freq <= TX_ABANDON_BAND_HIGH2)) {
  1700. freq = TX_ABANDON_BAND_LOW2 - 10;
  1701. i = (freq - min_freq) / step;
  1702. }
  1703. ret = mt6630_soft_mute_tune_Tx(freq, &rssi, &valid);
  1704. if (ret == fm_false) {
  1705. WCN_DBG(FM_ERR | CHIP, "mt6630_soft_mute_tune failed\n");
  1706. return 1;
  1707. }
  1708. if (valid == fm_true) {
  1709. *(pScanTBL + cnt) = freq; /* strore the valid empty channel */
  1710. cnt++;
  1711. WCN_DBG(FM_NTC | CHIP, "empty channel:[freq=%d] [cnt=%d]\n", freq, cnt);
  1712. }
  1713. if (cnt >= scan_cnt)
  1714. break;
  1715. }
  1716. if (cnt < scan_cnt) {
  1717. for (i = (total_no - 1); i > ((*pFreq - min_freq) / step); i--) {
  1718. freq = min_freq + step * i;
  1719. /* FM desense GPS */
  1720. if ((freq >= TX_ABANDON_BAND_LOW1) && (freq <= TX_ABANDON_BAND_HIGH1)) {
  1721. freq = TX_ABANDON_BAND_LOW1 - 10;
  1722. i = (freq - min_freq) / step;
  1723. }
  1724. if ((freq >= TX_ABANDON_BAND_LOW2) && (freq <= TX_ABANDON_BAND_HIGH2)) {
  1725. freq = TX_ABANDON_BAND_LOW2 - 10;
  1726. i = (freq - min_freq) / step;
  1727. }
  1728. if (i <= ((*pFreq - min_freq) / step))
  1729. break;
  1730. ret = mt6630_soft_mute_tune_Tx(freq, &rssi, &valid);
  1731. if (ret == fm_false) {
  1732. WCN_DBG(FM_ERR | CHIP, "mt6630_soft_mute_tune failed\n");
  1733. return 1;
  1734. }
  1735. if (valid == fm_true) {
  1736. *(pScanTBL + cnt) = freq; /* strore the valid empty channel */
  1737. cnt++;
  1738. WCN_DBG(FM_NTC | CHIP, "empty channel:[freq=%d] [cnt=%d]\n", freq, cnt);
  1739. }
  1740. if (cnt >= scan_cnt)
  1741. break;
  1742. }
  1743. }
  1744. }
  1745. *ScanTBLsize = cnt;
  1746. WCN_DBG(FM_NTC | CHIP, "completed, [cnt=%d],[freq=%d]\n", cnt, freq);
  1747. /* return 875~1080 */
  1748. for (i = 0; i < cnt; i++) {
  1749. if (1 == fm_get_channel_space(*(pScanTBL + i)) && space != FM_SPACE_50K)
  1750. *(pScanTBL + i) = *(pScanTBL + i) / 10;
  1751. }
  1752. WCN_DBG(FM_NTC | CHIP, "-%s():[ret=%d]\n", __func__, ret);
  1753. return 0;
  1754. }
  1755. static fm_s32 mt6630_PowerUpTx(void)
  1756. {
  1757. fm_s32 ret = 0;
  1758. fm_u16 pkt_size;
  1759. fm_u16 dataRead;
  1760. FM_LOG_NTC(FM_NTC | CHIP, "pwr on Tx seq......\n");
  1761. ret = mt6630_pwrup_top_setting();
  1762. if (ret) {
  1763. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrup_top_setting failed\n");
  1764. return ret;
  1765. }
  1766. if (FM_LOCK(cmd_buf_lock))
  1767. return -FM_ELOCK;
  1768. pkt_size = mt6630_pwrup_clock_on_tx(cmd_buf, TX_BUF_SIZE);
  1769. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_EN, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  1770. FM_UNLOCK(cmd_buf_lock);
  1771. if (ret) {
  1772. WCN_DBG(FM_ALT | CHIP, "mt6630_pwrup_clock_on_tx failed\n");
  1773. return ret;
  1774. }
  1775. mt6630_read(0x62, &dataRead);
  1776. WCN_DBG(FM_NTC | CHIP, "Tx on chipid=%x\n", dataRead);
  1777. ret = mt6630_pwrup_DSP_download(mt6630_patch_tbl_tx);
  1778. if (ret) {
  1779. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_pwrup_DSP_download failed\n");
  1780. return ret;
  1781. }
  1782. if ((mt6630_fm_config.aud_cfg.aud_path == FM_AUD_MRGIF)
  1783. || (mt6630_fm_config.aud_cfg.aud_path == FM_AUD_I2S)) {
  1784. mt6630_I2s_Setting(FM_I2S_ON, mt6630_fm_config.aud_cfg.i2s_info.mode,
  1785. mt6630_fm_config.aud_cfg.i2s_info.rate);
  1786. /* mtk_wcn_cmb_stub_audio_ctrl((CMB_STUB_AIF_X)CMB_STUB_AIF_2);//no need to do? */
  1787. WCN_DBG(FM_NTC | CHIP, "pwron set I2S on ok\n");
  1788. }
  1789. if (FM_LOCK(cmd_buf_lock))
  1790. return -FM_ELOCK;
  1791. pkt_size = mt6630_pwrup_digital_init(cmd_buf, TX_BUF_SIZE);
  1792. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_EN, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  1793. FM_UNLOCK(cmd_buf_lock);
  1794. if (ret) {
  1795. WCN_DBG(FM_ALT | CHIP, "mt6630_dig_init failed\n");
  1796. return ret;
  1797. }
  1798. if (FM_LOCK(cmd_buf_lock))
  1799. return -FM_ELOCK;
  1800. pkt_size = mt6630_pwrup_tx_deviation(cmd_buf, TX_BUF_SIZE);
  1801. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_EN, SW_RETRY_CNT, EN_TIMEOUT, NULL);
  1802. FM_UNLOCK(cmd_buf_lock);
  1803. if (ret) {
  1804. WCN_DBG(FM_ALT | CHIP, "mt6630_pwrup__tx_deviation failed\n");
  1805. return ret;
  1806. }
  1807. WCN_DBG(FM_DBG | CHIP, "pwr on tx seq ok\n");
  1808. return ret;
  1809. }
  1810. static fm_s32 mt6630_PowerDownTx(void)
  1811. {
  1812. fm_s32 ret = 0;
  1813. ret = mt6630_PowerDown();
  1814. if (ret) {
  1815. FM_LOG_ERR(FM_ERR | CHIP, "mt6630_PowerDownTx failed\n");
  1816. return ret;
  1817. }
  1818. return ret;
  1819. }
  1820. static fm_u16 mt6630_Hside_list_Tx[] = { 7720, 8045 };
  1821. static fm_bool mt6630_HiSide_chan_check_Tx(fm_u16 freq)
  1822. {
  1823. /* fm_s32 pos, size; */
  1824. fm_u32 i = 0, count = 0;
  1825. /* return 0;//for HQA only: skip FA/HL/ATJ */
  1826. if (0 == fm_get_channel_space(freq))
  1827. freq *= 10;
  1828. if (freq < 6500)
  1829. return fm_false;
  1830. count = sizeof(mt6630_Hside_list_Tx) / sizeof(mt6630_Hside_list_Tx[0]);
  1831. for (i = 0; i < count; i++) {
  1832. if (freq == mt6630_Hside_list_Tx[i])
  1833. return fm_true;
  1834. }
  1835. return fm_false;
  1836. }
  1837. static fm_bool MT6630_SetFreq_Tx(fm_u16 freq)
  1838. {
  1839. fm_s32 ret = 0;
  1840. fm_u16 pkt_size;
  1841. fm_u16 chan_para = 0;
  1842. ret = mt6630_RampDown();
  1843. if (ret) {
  1844. WCN_DBG(FM_ALT | CHIP, "mt6630_RampDown failed\n");
  1845. return ret;
  1846. }
  1847. if (fm_true == mt6630_HiSide_chan_check_Tx(freq)) {
  1848. FM_LOG_DBG(FM_DBG | CHIP, "%d chan para = %d\n", (fm_s32) freq, (fm_s32) chan_para);
  1849. ret = mt6630_set_bits(FM_CHANNEL_SET, 0x2000, 0x0FFF); /* mdf HiLo */
  1850. } else
  1851. ret = mt6630_set_bits(FM_CHANNEL_SET, 0x0000, 0xEFFF); /* clear HiLo */
  1852. if (ret) {
  1853. WCN_DBG(FM_ALT | CHIP, "mt6630_set_bits failed\n");
  1854. return ret;
  1855. }
  1856. /* fm_cb_op->cur_freq_set(freq); */
  1857. /* start tune */
  1858. if (FM_LOCK(cmd_buf_lock))
  1859. return -FM_ELOCK;
  1860. pkt_size = mt6630_tune_tx(cmd_buf, TX_BUF_SIZE, freq, 0);
  1861. ret = fm_cmd_tx(cmd_buf, pkt_size, FLAG_TUNE | FLAG_TUNE_DONE, SW_RETRY_CNT, TUNE_TIMEOUT, NULL);
  1862. FM_UNLOCK(cmd_buf_lock);
  1863. if (ret) {
  1864. WCN_DBG(FM_ALT | CHIP, "mt6630_tune_tx failed\n");
  1865. return ret;
  1866. }
  1867. WCN_DBG(FM_DBG | CHIP, "mt6630_tune_tx to %d ok\n", freq);
  1868. return fm_true;
  1869. }
  1870. fm_s32 MT6630fm_low_ops_register(struct fm_lowlevel_ops *ops)
  1871. {
  1872. fm_s32 ret = 0;
  1873. /* Basic functions. */
  1874. if (ops == NULL) {
  1875. pr_err("%s,invalid pointer\n", __func__);
  1876. return -FM_EPARA;
  1877. }
  1878. if (ops->cb.cur_freq_get == NULL) {
  1879. pr_err("%s,invalid pointer\n", __func__);
  1880. return -FM_EPARA;
  1881. }
  1882. if (ops->cb.cur_freq_set == NULL) {
  1883. pr_err("%s,invalid pointer\n", __func__);
  1884. return -FM_EPARA;
  1885. }
  1886. fm_cb_op = &ops->cb;
  1887. ops->bi.pwron = mt6630_pwron;
  1888. ops->bi.pwroff = mt6630_pwroff;
  1889. ops->bi.msdelay = Delayms;
  1890. ops->bi.usdelay = Delayus;
  1891. ops->bi.read = mt6630_read;
  1892. ops->bi.write = mt6630_write;
  1893. /* ops->bi.top_read = mt6630_top_read; */
  1894. /* ops->bi.top_write = mt6630_top_write; */
  1895. ops->bi.host_read = mt6630_host_read;
  1896. ops->bi.host_write = mt6630_host_write;
  1897. ops->bi.setbits = mt6630_set_bits;
  1898. ops->bi.chipid_get = mt6630_get_chipid;
  1899. ops->bi.mute = mt6630_Mute;
  1900. ops->bi.rampdown = mt6630_RampDown;
  1901. ops->bi.pwrupseq = mt6630_PowerUp;
  1902. ops->bi.pwrdownseq = mt6630_PowerDown;
  1903. ops->bi.setfreq = mt6630_SetFreq;
  1904. /* ops->bi.low_pwr_wa = MT6630fm_low_power_wa_default; */
  1905. ops->bi.i2s_set = mt6630_I2s_Setting;
  1906. ops->bi.rssiget = mt6630_GetCurRSSI;
  1907. ops->bi.volset = mt6630_SetVol;
  1908. ops->bi.volget = mt6630_GetVol;
  1909. ops->bi.dumpreg = mt6630_dump_reg;
  1910. ops->bi.msget = mt6630_GetMonoStereo;
  1911. ops->bi.msset = mt6630_SetMonoStereo;
  1912. ops->bi.pamdget = mt6630_GetCurPamd;
  1913. /* ops->bi.em = mt6630_em_test; */
  1914. ops->bi.anaswitch = mt6630_SetAntennaType;
  1915. ops->bi.anaget = mt6630_GetAntennaType;
  1916. ops->bi.caparray_get = mt6630_GetCapArray;
  1917. ops->bi.hwinfo_get = mt6630_hw_info_get;
  1918. ops->bi.fm_via_bt = MT6630_FMOverBT;
  1919. ops->bi.i2s_get = mt6630_i2s_info_get;
  1920. ops->bi.is_dese_chan = mt6630_is_dese_chan;
  1921. ops->bi.softmute_tune = mt6630_soft_mute_tune;
  1922. ops->bi.desense_check = mt6630_desense_check;
  1923. ops->bi.cqi_log = mt6630_full_cqi_get;
  1924. ops->bi.pre_search = mt6630_pre_search;
  1925. ops->bi.restore_search = mt6630_restore_search;
  1926. ops->bi.set_search_th = mt6630_set_search_th;
  1927. ops->bi.get_aud_info = mt6630fm_get_audio_info;
  1928. /*****tx function****/
  1929. ops->ri.rdstx_support = mt6630_rdsTx_Support;
  1930. ops->bi.tx_support = mt6630_Tx_Support;
  1931. ops->bi.pwrupseq_tx = mt6630_PowerUpTx;
  1932. ops->bi.tune_tx = MT6630_SetFreq_Tx;
  1933. ops->bi.pwrdownseq_tx = mt6630_PowerDownTx;
  1934. ops->bi.tx_scan = mt6630_TxScan;
  1935. ops->ri.rds_tx = MT6630_Rds_Tx;
  1936. ops->ri.rds_tx_enable = MT6630_Rds_Tx_Enable;
  1937. ops->ri.rds_tx_disable = MT6630_Rds_Tx_Disable;
  1938. /* ops->bi.tx_pwr_ctrl = MT6630_TX_PWR_CTRL; */
  1939. /* ops->bi.rtc_drift_ctrl = MT6630_RTC_Drift_CTRL; */
  1940. /* ops->bi.tx_desense_wifi = MT6630_TX_DESENSE; */
  1941. cmd_buf_lock = fm_lock_create("30_cmd");
  1942. ret = fm_lock_get(cmd_buf_lock);
  1943. cmd_buf = fm_zalloc(TX_BUF_SIZE + 1);
  1944. if (!cmd_buf) {
  1945. FM_LOG_ERR(FM_ERR | CHIP, "6630 fm lib alloc tx buf failed\n");
  1946. ret = -1;
  1947. }
  1948. return ret;
  1949. }
  1950. fm_s32 MT6630fm_low_ops_unregister(struct fm_lowlevel_ops *ops)
  1951. {
  1952. fm_s32 ret = 0;
  1953. /* Basic functions. */
  1954. if (ops == NULL) {
  1955. pr_err("%s,invalid pointer\n", __func__);
  1956. return -FM_EPARA;
  1957. }
  1958. if (cmd_buf) {
  1959. fm_free(cmd_buf);
  1960. cmd_buf = NULL;
  1961. }
  1962. ret = fm_lock_put(cmd_buf_lock);
  1963. fm_memset(&ops->bi, 0, sizeof(struct fm_basic_interface));
  1964. return ret;
  1965. }