hdmi_drv.h 9.7 KB

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  1. #ifndef __HDMI_DRV_H__
  2. #define __HDMI_DRV_H__
  3. #ifdef HDMI_MT8193_SUPPORT
  4. #include "mt8193hdmictrl.h"
  5. #include "mt8193edid.h"
  6. #include "mt8193cec.h"
  7. #define AVD_TMR_ISR_TICKS 10
  8. #define MDI_BOUCING_TIMING 50 /* 20 //20ms */
  9. enum HDMI_TASK_COMMAND_TYPE_T {
  10. HDMI_CEC_CMD = 0,
  11. HDMI_PLUG_DETECT_CMD,
  12. HDMI_HDCP_PROTOCAL_CMD,
  13. HDMI_DISABLE_HDMI_TASK_CMD,
  14. MAX_HDMI_TMR_NUMBER
  15. };
  16. #endif
  17. #ifndef ARY_SIZE
  18. #define ARY_SIZE(x) (sizeof((x)) / sizeof((x[0])))
  19. #endif
  20. enum HDMI_POLARITY {
  21. HDMI_POLARITY_RISING = 0,
  22. HDMI_POLARITY_FALLING = 1
  23. };
  24. enum HDMI_CLOCK_PHASE {
  25. HDMI_CLOCK_PHASE_0 = 0,
  26. HDMI_CLOCK_PHASE_90 = 1
  27. };
  28. enum HDMI_COLOR_ORDER {
  29. HDMI_COLOR_ORDER_RGB = 0,
  30. HDMI_COLOR_ORDER_BGR = 1
  31. };
  32. enum IO_DRIVING_CURRENT {
  33. IO_DRIVING_CURRENT_8MA = (1 << 0),
  34. IO_DRIVING_CURRENT_4MA = (1 << 1),
  35. IO_DRIVING_CURRENT_2MA = (1 << 2),
  36. IO_DRIVING_CURRENT_SLEW_CNTL = (1 << 3),
  37. };
  38. #if !defined(HDMI_MT8193_SUPPORT)
  39. enum HDMI_VIDEO_RESOLUTION {
  40. HDMI_VIDEO_720x480p_60Hz = 0,
  41. HDMI_VIDEO_1440x480i_60Hz = 1,
  42. HDMI_VIDEO_1280x720p_60Hz = 2,
  43. HDMI_VIDEO_1920x1080i_60Hz = 5,
  44. HDMI_VIDEO_1920x1080p_30Hz = 6,
  45. HDMI_VIDEO_720x480i_60Hz = 0xD,
  46. HDMI_VIDEO_1920x1080p_60Hz = 0x0b,
  47. HDMI_VIDEO_RESOLUTION_NUM
  48. };
  49. #endif
  50. enum TEST_CASE_TYPE {
  51. Test_RGB888 = 0
  52. , Test_YUV422 = 1
  53. , Test_YUV444 = 2
  54. , Test_Reserved = 3
  55. };
  56. enum HDMI_VIDEO_INPUT_FORMAT {
  57. HDMI_VIN_FORMAT_RGB565,
  58. HDMI_VIN_FORMAT_RGB666,
  59. HDMI_VIN_FORMAT_RGB888,
  60. };
  61. enum HDMI_VIDEO_OUTPUT_FORMAT {
  62. HDMI_VOUT_FORMAT_RGB888,
  63. HDMI_VOUT_FORMAT_YUV422,
  64. HDMI_VOUT_FORMAT_YUV444,
  65. HDMI_VOUT_FORMAT_2D = 1<<16,
  66. HDMI_VOUT_FORMAT_3D_SBS = 1<<17,
  67. HDMI_VOUT_FORMAT_3D_TAB = 1<<18,
  68. };
  69. /* Must align to MHL Tx chip driver define */
  70. enum HDMI_AUDIO_FORMAT {
  71. HDMI_AUDIO_32K_2CH = 0x01,
  72. HDMI_AUDIO_44K_2CH = 0x02,
  73. HDMI_AUDIO_48K_2CH = 0x03,
  74. HDMI_AUDIO_96K_2CH = 0x05,
  75. HDMI_AUDIO_192K_2CH = 0x07,
  76. HDMI_AUDIO_32K_8CH = 0x81,
  77. HDMI_AUDIO_44K_8CH = 0x82,
  78. HDMI_AUDIO_48K_8CH = 0x83,
  79. HDMI_AUDIO_96K_8CH = 0x85,
  80. HDMI_AUDIO_192K_8CH = 0x87,
  81. HDMI_AUDIO_INITIAL = 0xFF
  82. };
  83. struct HDMI_CONFIG {
  84. enum HDMI_VIDEO_RESOLUTION vformat;
  85. enum HDMI_VIDEO_INPUT_FORMAT vin;
  86. enum HDMI_VIDEO_OUTPUT_FORMAT vout;
  87. enum HDMI_AUDIO_FORMAT aformat;
  88. };
  89. enum HDMI_OUTPUT_MODE {
  90. HDMI_OUTPUT_MODE_LCD_MIRROR,
  91. HDMI_OUTPUT_MODE_VIDEO_MODE,
  92. HDMI_OUTPUT_MODE_DPI_BYPASS
  93. };
  94. enum HDMI_CABLE_TYPE {
  95. HDMI_CABLE,
  96. MHL_CABLE,
  97. MHL_SMB_CABLE,
  98. MHL_2_CABLE, /* /MHL 2.0 */
  99. MHL_3D_GLASSES
  100. };
  101. enum HDMI_3D_FORMAT_ENUM {
  102. HDMI_2D,
  103. HDMI_3D_SBS,
  104. HDMI_3D_TAB,
  105. HDMI_3D_FP
  106. };
  107. struct HDMI_PARAMS {
  108. unsigned int width;
  109. unsigned int height;
  110. struct HDMI_CONFIG init_config;
  111. /* polarity parameters */
  112. enum HDMI_POLARITY clk_pol;
  113. enum HDMI_POLARITY de_pol;
  114. enum HDMI_POLARITY vsync_pol;
  115. enum HDMI_POLARITY hsync_pol;
  116. /* timing parameters */
  117. unsigned int hsync_pulse_width;
  118. unsigned int hsync_back_porch;
  119. unsigned int hsync_front_porch;
  120. unsigned int vsync_pulse_width;
  121. unsigned int vsync_back_porch;
  122. unsigned int vsync_front_porch;
  123. /* output format parameters */
  124. enum HDMI_COLOR_ORDER rgb_order;
  125. /* intermediate buffers parameters */
  126. unsigned int intermediat_buffer_num; /* 2..3 */
  127. /* iopad parameters */
  128. enum IO_DRIVING_CURRENT io_driving_current;
  129. enum HDMI_OUTPUT_MODE output_mode;
  130. int is_force_awake;
  131. int is_force_landscape;
  132. unsigned int scaling_factor; /* determine the scaling of output screen size, valid value 0~10 */
  133. /* 0 means no scaling, 5 means scaling to 95%, 10 means 90% */
  134. enum HDMI_CABLE_TYPE cabletype;
  135. unsigned int HDCPSupported;
  136. #ifdef CONFIG_MTK_HDMI_3D_SUPPORT
  137. int is_3d_support;
  138. #endif
  139. unsigned int input_clock;
  140. };
  141. enum HDMI_STATE {
  142. HDMI_STATE_NO_DEVICE,
  143. HDMI_STATE_ACTIVE,
  144. HDMI_STATE_CONNECTING,
  145. HDMI_STATE_PLUGIN_ONLY,
  146. HDMI_STATE_EDID_UPDATE,
  147. HDMI_STATE_CEC_UPDATE
  148. };
  149. /* --------------------------------------------------------------------------- */
  150. struct HDMI_UTIL_FUNCS {
  151. void (*set_reset_pin)(unsigned int value);
  152. int (*set_gpio_out)(unsigned int gpio, unsigned int value);
  153. void (*udelay)(unsigned int us);
  154. void (*mdelay)(unsigned int ms);
  155. void (*wait_transfer_done)(void);
  156. void (*state_callback)(enum HDMI_STATE state);
  157. };
  158. #define SINK_480P (1 << 0)
  159. #define SINK_720P60 (1 << 1)
  160. #define SINK_1080I60 (1 << 2)
  161. #define SINK_1080P60 (1 << 3)
  162. #define SINK_480P_1440 (1 << 4)
  163. #define SINK_480P_2880 (1 << 5)
  164. #define SINK_480I (1 << 6)
  165. #define SINK_480I_1440 (1 << 7)
  166. #define SINK_480I_2880 (1 << 8)
  167. #define SINK_1080P30 (1 << 9)
  168. #define SINK_576P (1 << 10)
  169. #define SINK_720P50 (1 << 11)
  170. #define SINK_1080I50 (1 << 12)
  171. #define SINK_1080P50 (1 << 13)
  172. #define SINK_576P_1440 (1 << 14)
  173. #define SINK_576P_2880 (1 << 15)
  174. #define SINK_576I (1 << 16)
  175. #define SINK_576I_1440 (1 << 17)
  176. #define SINK_576I_2880 (1 << 18)
  177. #define SINK_1080P25 (1 << 19)
  178. #define SINK_1080P24 (1 << 20)
  179. #define SINK_1080P23976 (1 << 21)
  180. #define SINK_1080P2997 (1 << 22)
  181. #if !defined(HDMI_MT8193_SUPPORT)
  182. struct HDMI_EDID_INFO_T {
  183. unsigned int ui4_ntsc_resolution; /* use EDID_VIDEO_RES_T, there are many resolution */
  184. unsigned int ui4_pal_resolution; /* use EDID_VIDEO_RES_T */
  185. unsigned int ui4_sink_native_ntsc_resolution;
  186. unsigned int ui4_sink_native_pal_resolution;
  187. unsigned int ui4_sink_cea_ntsc_resolution; /* use EDID_VIDEO_RES_T */
  188. unsigned int ui4_sink_cea_pal_resolution; /* use EDID_VIDEO_RES_T */
  189. unsigned int ui4_sink_dtd_ntsc_resolution; /* use EDID_VIDEO_RES_T */
  190. unsigned int ui4_sink_dtd_pal_resolution; /* use EDID_VIDEO_RES_T */
  191. unsigned int ui4_sink_1st_dtd_ntsc_resolution; /* use EDID_VIDEO_RES_T */
  192. unsigned int ui4_sink_1st_dtd_pal_resolution; /* use EDID_VIDEO_RES_T */
  193. unsigned short ui2_sink_colorimetry; /* use EDID_VIDEO_COLORIMETRY_T */
  194. unsigned char ui1_sink_rgb_color_bit; /* color bit for RGB */
  195. unsigned char ui1_sink_ycbcr_color_bit; /* color bit for YCbCr */
  196. unsigned short ui2_sink_aud_dec; /* use EDID_AUDIO_DECODER_T */
  197. unsigned char ui1_sink_is_plug_in; /* 1: Plug in 0:Plug Out */
  198. unsigned int ui4_hdmi_pcm_ch_type; /* use EDID_A_FMT_CH_TYPE */
  199. unsigned int ui4_hdmi_pcm_ch3ch4ch5ch7_type; /* use EDID_A_FMT_CH_TYPE1 */
  200. unsigned int ui4_dac_pcm_ch_type; /* use EDID_A_FMT_CH_TYPE */
  201. unsigned char ui1_sink_i_latency_present;
  202. unsigned char ui1_sink_p_audio_latency;
  203. unsigned char ui1_sink_p_video_latency;
  204. unsigned char ui1_sink_i_audio_latency;
  205. unsigned char ui1_sink_i_video_latency;
  206. unsigned char ui1ExtEdid_Revision;
  207. unsigned char ui1Edid_Version;
  208. unsigned char ui1Edid_Revision;
  209. unsigned char ui1_Display_Horizontal_Size;
  210. unsigned char ui1_Display_Vertical_Size;
  211. unsigned int ui4_ID_Serial_Number;
  212. unsigned int ui4_sink_cea_3D_resolution;
  213. unsigned char ui1_sink_support_ai; /* 0: not support AI, 1:support AI */
  214. unsigned short ui2_sink_cec_address;
  215. unsigned short ui1_sink_max_tmds_clock;
  216. unsigned short ui2_sink_3D_structure;
  217. unsigned int ui4_sink_cea_FP_SUP_3D_resolution;
  218. unsigned int ui4_sink_cea_TOB_SUP_3D_resolution;
  219. unsigned int ui4_sink_cea_SBS_SUP_3D_resolution;
  220. unsigned short ui2_sink_ID_manufacturer_name; /* (08H~09H) */
  221. unsigned short ui2_sink_ID_product_code; /* (0aH~0bH) */
  222. unsigned int ui4_sink_ID_serial_number; /* (0cH~0fH) */
  223. unsigned char ui1_sink_week_of_manufacture; /* (10H) */
  224. unsigned char ui1_sink_year_of_manufacture; /* (11H) base on year 1990 */
  225. };
  226. #endif
  227. typedef void (*CABLE_INSERT_CALLBACK)(enum HDMI_STATE state);
  228. struct HDMI_DRIVER {
  229. void (*set_util_funcs)(const struct HDMI_UTIL_FUNCS *util);
  230. void (*get_params)(struct HDMI_PARAMS *params);
  231. int (*init)(void);
  232. int (*enter)(void);
  233. int (*exit)(void);
  234. void (*suspend)(void);
  235. void (*resume)(void);
  236. int (*audio_config)(enum HDMI_AUDIO_FORMAT aformat, int bitWidth);
  237. #ifdef CONFIG_MTK_HDMI_3D_SUPPORT
  238. int (*video_config)(enum HDMI_VIDEO_RESOLUTION vformat, enum HDMI_VIDEO_INPUT_FORMAT vin, int vou);
  239. #else
  240. int (*video_config)(enum HDMI_VIDEO_RESOLUTION vformat, enum HDMI_VIDEO_INPUT_FORMAT vin,
  241. enum HDMI_VIDEO_OUTPUT_FORMAT vou);
  242. #endif
  243. int (*video_enable)(bool enable);
  244. int (*audio_enable)(bool enable);
  245. int (*irq_enable)(bool enable);
  246. int (*power_on)(void);
  247. void (*power_off)(void);
  248. enum HDMI_STATE (*get_state)(void);
  249. void (*set_mode)(unsigned char ucMode);
  250. void (*dump)(void);
  251. int (*get_external_device_capablity)(void);
  252. void (*force_on)(int from_uart_drv);
  253. void (*register_callback)(CABLE_INSERT_CALLBACK cb);
  254. void (*unregister_callback)(CABLE_INSERT_CALLBACK cb);
  255. #if !defined(HDMI_MT8193_SUPPORT)
  256. void (*read)(unsigned char u8Reg);
  257. void (*write)(unsigned char u8Reg, unsigned char u8Data);
  258. void (*log_enable)(bool enable);
  259. void (*getedid)(void *pv_get_info);
  260. #else
  261. void (*read)(u16 u2Reg, u32 *p4Data);
  262. void (*write)(u16 u2Reg, u32 u4Data);
  263. void (*log_enable)(u16 enable);
  264. void (*InfoframeSetting)(u8 i1typemode, u8 i1typeselect);
  265. void (*checkedid)(u8 i1noedid);
  266. void (*colordeep)(u8 u1colorspace, u8 u1deepcolor);
  267. void (*enablehdcp)(u8 u1hdcponoff);
  268. void (*setcecrxmode)(u8 u1cecrxmode);
  269. void (*hdmistatus)(void);
  270. void (*hdcpkey)(u8 *pbhdcpkey);
  271. #if defined(HDMI_MT8193_SUPPORT)
  272. void (*getedid)(HDMI_EDID_T *pv_get_info);
  273. #else
  274. void (*getedid)(void *pv_get_info);
  275. #endif
  276. void (*setcecla)(CEC_DRV_ADDR_CFG_T *prAddr);
  277. void (*sendsltdata)(u8 *pu1Data);
  278. void (*getceccmd)(CEC_FRAME_DESCRIPTION *frame);
  279. void (*getsltdata)(CEC_SLT_DATA *rCecSltData);
  280. void (*setceccmd)(CEC_SEND_MSG_T *msg);
  281. void (*cecenable)(u8 u1EnCec);
  282. void (*getcecaddr)(CEC_ADDRESS *cecaddr);
  283. void (*mutehdmi)(u8 u1flagvideomute, u8 u1flagaudiomute);
  284. u8 (*checkedidheader)(void);
  285. #endif
  286. };
  287. /* --------------------------------------------------------------------------- */
  288. /* HDMI Driver Functions */
  289. /* --------------------------------------------------------------------------- */
  290. const struct HDMI_DRIVER *HDMI_GetDriver(void);
  291. void Notify_AP_MHL_TX_Event(unsigned int event, unsigned int event_param, void *param);
  292. extern int chip_device_id;
  293. extern bool need_reset_usb_switch;
  294. #endif /* __HDMI_DRV_H__ */