jpeg_drv_6589_dec.c 19 KB

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  1. #include <mach/mt_typedefs.h>
  2. #include <mach/sync_write.h>
  3. #include <linux/kernel.h>
  4. #include <linux/xlog.h>
  5. #define JPEG_MSG pr_debug
  6. #define JPEG_WRN pr_debug
  7. #define JPEG_ERR pr_debug
  8. #define JPEG_VEB pr_debug
  9. #include "jpeg_drv_6589_reg.h"
  10. #include "jpeg_drv_6589_common.h"
  11. #include "jpeg_drv_6589_reg.h"
  12. /* #define DUMP_REG_CMD */
  13. #define ALIGN_MASK(BIT) (((unsigned int)(BIT) >> 3) - 1)
  14. #define CHECK_ALIGN(value, align, addr) \
  15. { \
  16. if (value & (align-1)) \
  17. JPEG_WRN("WriteREG: Try to write %d to REG(%x) without %d align!!\n ", value, addr, align); \
  18. }
  19. #define TEST_JPEG_DEBUG_EN
  20. /* unsigned int _jpeg_dec_int_status = 0; */
  21. unsigned int _jpeg_dec_dump_reg_en = 0;
  22. kal_uint32 _jpeg_dec_int_status = 0;
  23. kal_uint32 _jpeg_dec_mode = 0;
  24. int jpeg_isr_dec_lisr(void)
  25. {
  26. unsigned int tmp = 0, tmp1 = 0;
  27. tmp1 = REG_JPGDEC_INTERRUPT_STATUS;
  28. tmp = tmp1 & BIT_INQST_MASK_ALLIRQ;
  29. if (tmp) {
  30. _jpeg_dec_int_status = tmp;
  31. if (_jpeg_dec_mode == 1) { /* always not clear */
  32. /* if( (tmp & BIT_INQST_MASK_PAUSE) ) */
  33. return 0;
  34. } else {
  35. /* / clear the interrupt status register */
  36. IMG_REG_WRITE(tmp, REG_ADDR_JPGDEC_INTERRUPT_STATUS); /* REG_JPGDEC_INTERRUPT_STATUS = tmp; */
  37. return 0;
  38. }
  39. }
  40. return -1;
  41. }
  42. void jpeg_drv_dec_start(void)
  43. {
  44. /* REG_JPEG_DEC_TRIG = 1; */
  45. /* mt65xx_reg_sync_writel(0x1, REG_ADDR_JPGDEC_TRIG); */
  46. IMG_REG_WRITE(0, REG_ADDR_JPGDEC_TRIG); /* REG_JPGDEC_TRIG = 0; */
  47. }
  48. /**
  49. * Call this function to reset the JPEG decoder.
  50. */
  51. void jpeg_drv_dec_soft_reset(void)
  52. {
  53. IMG_REG_WRITE(0x00, REG_ADDR_JPGDEC_RESET); /* REG_JPGDEC_RESET = 0x00; */
  54. IMG_REG_WRITE(0x01, REG_ADDR_JPGDEC_RESET); /* REG_JPGDEC_RESET = 0x01; */
  55. /* REG_JPGDEC_RESET = 0x00; */
  56. _jpeg_dec_int_status = 0;
  57. _jpeg_dec_mode = 0;
  58. }
  59. void jpeg_drv_dec_reset(void)
  60. {
  61. jpeg_drv_dec_soft_reset();
  62. jpeg_drv_dec_hard_reset();
  63. }
  64. void jpeg_drv_dec_hard_reset(void)
  65. {
  66. IMG_REG_WRITE(0x00, REG_ADDR_JPGDEC_RESET); /* REG_JPGDEC_RESET = 0x00; */
  67. IMG_REG_WRITE(0x10, REG_ADDR_JPGDEC_RESET); /* REG_JPGDEC_RESET = 0x10; */
  68. /* REG_JPGDEC_RESET = 0x00; */
  69. _jpeg_dec_int_status = 0;
  70. _jpeg_dec_mode = 0;
  71. }
  72. void wait_pr(void)
  73. {
  74. unsigned int timeout1 = 0xF;
  75. unsigned int timeout2 = 0xFFFFF;
  76. unsigned int timeout3 = 0xFFFFFFF;
  77. while (timeout1 > 0) {
  78. while (timeout2 > 0) {
  79. while (timeout3 > 0)
  80. timeout3--;
  81. timeout2--;
  82. }
  83. timeout1--;
  84. }
  85. }
  86. void jpeg_drv_dec_set_brz_factor(unsigned char yHScale, unsigned char yVScale,
  87. unsigned char cbcrHScale, unsigned char cbcrVScale)
  88. {
  89. unsigned int u4Value;
  90. /* yHScale = yHScale; */
  91. /* yVScale = yVScale; */
  92. /* cbcrHScale = cbcrHScale; */
  93. /* cbcrVScale = cbcrVScale; */
  94. #if 0
  95. if (srcFormat == JPG_COLOR_444 ||
  96. srcFormat == JPG_COLOR_422V || srcFormat == JPG_COLOR_422Vx2) {
  97. cbcrHScale++;
  98. }
  99. #endif
  100. u4Value = (cbcrVScale << BIT_BRZ_CV_SHIFT) | (cbcrHScale << BIT_BRZ_CH_SHIFT) |
  101. (yVScale << BIT_BRZ_YV_SHIFT) | (yHScale << BIT_BRZ_YH_SHIFT);
  102. IMG_REG_WRITE(u4Value, REG_ADDR_JPGDEC_BRZ_FACTOR); /* REG_JPGDEC_BRZ_FACTOR = u4Value; */
  103. }
  104. void jpeg_drv_dec_set_dst_bank0(unsigned int addr_Y, unsigned int addr_U, unsigned int addr_V)
  105. {
  106. IMG_REG_WRITE(addr_Y, REG_ADDR_JPGDEC_DEST_ADDR0_Y); /* REG_JPGDEC_DEST_ADDR0_Y = addr_Y ; */
  107. IMG_REG_WRITE(addr_U, REG_ADDR_JPGDEC_DEST_ADDR0_U); /* REG_JPGDEC_DEST_ADDR0_U = addr_U ; */
  108. IMG_REG_WRITE(addr_V, REG_ADDR_JPGDEC_DEST_ADDR0_V); /* REG_JPGDEC_DEST_ADDR0_V = addr_V ; */
  109. }
  110. void jpeg_drv_dec_set_dst_bank1(unsigned int addr_Y, unsigned int addr_U, unsigned int addr_V)
  111. {
  112. /* unsigned int u4Value; */
  113. IMG_REG_WRITE(addr_Y, REG_ADDR_JPGDEC_DEST_ADDR1_Y); /* REG_JPGDEC_DEST_ADDR1_Y = addr_Y ; */
  114. IMG_REG_WRITE(addr_U, REG_ADDR_JPGDEC_DEST_ADDR1_U); /* REG_JPGDEC_DEST_ADDR1_U = addr_U ; */
  115. IMG_REG_WRITE(addr_V, REG_ADDR_JPGDEC_DEST_ADDR1_V); /* REG_JPGDEC_DEST_ADDR1_V = addr_V ; */
  116. }
  117. int jpeg_drv_dec_set_memStride(unsigned int CompMemStride_Y, unsigned int CompMemStride_UV)
  118. {
  119. IMG_REG_WRITE((CompMemStride_Y & 0xFFFF), REG_ADDR_JPGDEC_STRIDE_Y);
  120. IMG_REG_WRITE((CompMemStride_UV & 0xFFFF), REG_ADDR_JPGDEC_STRIDE_UV);
  121. return (int)E_HWJPG_OK;
  122. }
  123. int jpeg_drv_dec_set_imgStride(unsigned int CompStride_Y, unsigned int CompStride_UV)
  124. {
  125. /* unsigned int u4Reg; */
  126. IMG_REG_WRITE((CompStride_Y & 0xFFFF), REG_ADDR_JPGDEC_IMG_STRIDE_Y);
  127. IMG_REG_WRITE((CompStride_UV & 0xFFFF), REG_ADDR_JPGDEC_IMG_STRIDE_UV);
  128. return (int)E_HWJPG_OK;
  129. }
  130. void jpeg_drv_dec_set_pause_mcu_idx(unsigned int McuIdx)
  131. {
  132. IMG_REG_WRITE((McuIdx & 0x0003FFFFFF), REG_ADDR_JPGDEC_PAUSE_MCU_NUM);
  133. }
  134. void jpeg_drv_dec_set_dec_mode(int i4DecMode)
  135. {
  136. unsigned int u4Value = i4DecMode;
  137. /* 0: full frame, 1: direct couple mode, 2: pause/resume mode, 3: Reserved */
  138. if (u4Value > 0x02)
  139. JPEG_WRN("Warning : try to set invalid decode mode, %d!!\n", u4Value);
  140. IMG_REG_WRITE((u4Value & 0x03), REG_ADDR_JPGDEC_OPERATION_MODE);
  141. }
  142. void jpeg_drv_dec_set_debug_mode(void)
  143. {
  144. unsigned int u4Value;
  145. u4Value = REG_JPGDEC_DEBUG_MODE;
  146. u4Value |= 0x80000000;
  147. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_DEBUG_MODE); /* REG_JPGDEC_DEBUG_MODE = u4Value ; */
  148. }
  149. void jpeg_drv_dec_set_bs_writePtr(unsigned int writePtr)
  150. {
  151. CHECK_ALIGN(writePtr, 16, REG_ADDR_JPGDEC_FILE_BRP);
  152. IMG_REG_WRITE((writePtr), REG_ADDR_JPGDEC_FILE_BRP); /* REG_JPGDEC_FILE_BRP = writePtr ; */
  153. }
  154. void jpeg_drv_dec_set_bs_info(unsigned int bsBase, unsigned int bsSize)
  155. {
  156. CHECK_ALIGN(bsBase, 16, REG_ADDR_JPGDEC_FILE_ADDR);
  157. CHECK_ALIGN(bsSize, 128, REG_ADDR_JPGDEC_FILE_TOTAL_SIZE);
  158. IMG_REG_WRITE((bsBase), REG_ADDR_JPGDEC_FILE_ADDR); /* REG_JPGDEC_FILE_ADDR = bsBase ; */
  159. IMG_REG_WRITE((bsSize), REG_ADDR_JPGDEC_FILE_TOTAL_SIZE); /* REG_JPGDEC_FILE_TOTAL_SIZE = bsSize; */
  160. }
  161. /* void jpeg_drv_dec_set_total_bs_size_align128(unsigned int bsSize) */
  162. /* { */
  163. /* unsigned int u4tmp; */
  164. /* */
  165. /* if(bsSize & 127){ */
  166. /* u4tmp = bsSize & (~127) ; */
  167. /* }else */
  168. /* u4tmp = bsSize ; */
  169. /* REG_JPGDEC_FILE_TOTAL_SIZE = u4tmp; */
  170. /* */
  171. /* */
  172. /* } */
  173. void jpeg_drv_dec_set_comp_id(unsigned int Y_ID, unsigned int U_ID, unsigned int V_ID)
  174. {
  175. unsigned int u4Value;
  176. u4Value = ((Y_ID & 0x00FF) << 24) | ((U_ID & 0x00FF) << 16) | ((V_ID & 0x00FF) << 8);
  177. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_COMP_ID); /* REG_JPGDEC_COMP_ID = u4Value ; */
  178. }
  179. void jpeg_drv_dec_set_total_mcu(unsigned int TotalMcuNum)
  180. {
  181. unsigned int u4Value;
  182. u4Value = TotalMcuNum - 1;
  183. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_TOTAL_MCU_NUM); /* REG_JPGDEC_TOTAL_MCU_NUM = u4Value ; */
  184. }
  185. void jpeg_drv_dec_set_comp0_du(unsigned int GrayDuNum)
  186. {
  187. unsigned int u4Value;
  188. u4Value = GrayDuNum - 1;
  189. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_COMP0_DATA_UNIT_NUM); /* REG_JPGDEC_COMP0_DATA_UNIT_NUM = u4Value ; */
  190. }
  191. void jpeg_drv_dec_set_du_membership(unsigned int u4Membership, unsigned int GMC_en,
  192. unsigned int IsGray)
  193. {
  194. #if 0
  195. /* u4Membership = u4Membership | 0x3FFFFF24 ;//111_111_111_111_111_111_111_100_100_100 */
  196. u4Membership = u4Membership | 0x24924924; /* 100_100_100_100_100_100_100_100_100_100 */
  197. #endif
  198. if (IsGray)
  199. u4Membership = (IsGray << 31) | (GMC_en << 30) | 0x3FFFFFFC;
  200. else
  201. u4Membership = (IsGray << 31) | (GMC_en << 30) | u4Membership;
  202. IMG_REG_WRITE((u4Membership), REG_ADDR_JPGDEC_DU_CTRL); /* REG_JPGDEC_DU_CTRL = u4Membership ; */
  203. }
  204. /* set q table for each component */
  205. void jpeg_drv_dec_set_q_table(kal_uint32 id0, kal_uint32 id1, kal_uint32 id2)
  206. {
  207. unsigned int u4Value;
  208. u4Value = ((id0 & 0x0f) << 8) | ((id1 & 0x0f) << 4) | ((id2 & 0x0f) << 0);
  209. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_QT_ID);
  210. #ifdef DUMP_REG_CMD
  211. JPEG_WRN("WriteREG(VLD_REG_OFST , 32'h%08x);\n",
  212. ((id0 & 0x0f) << 8) | ((id1 & 0x0f) << 4) | ((id2 & 0x0f) << 0));
  213. #endif
  214. }
  215. unsigned int jpeg_drv_dec_get_irqState(void)
  216. {
  217. unsigned int u4Value;
  218. u4Value = REG_JPGDEC_INTERRUPT_STATUS;
  219. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_INTERRUPT_STATUS);
  220. return u4Value;
  221. }
  222. unsigned int jpeg_drv_dec_get_decState(void)
  223. {
  224. unsigned int u4Value;
  225. u4Value = REG_JPGDEC_STATUS;
  226. JPEG_MSG("JPED_DEC_DRV: STATUS %x!!\n", u4Value);
  227. return u4Value;
  228. }
  229. unsigned int jpeg_drv_dec_get_decMCU(void)
  230. {
  231. unsigned int u4Value;
  232. u4Value = REG_JPGDEC_MCU_CNT;
  233. JPEG_MSG("JPED_DEC_DRV: MCU_CNT %x!!\n", u4Value);
  234. return u4Value;
  235. }
  236. void jpeg_drv_dec_set_dma_group(unsigned int McuInGroup, unsigned int GroupNum,
  237. unsigned int LastMcuNum)
  238. {
  239. unsigned int McuInGroup_1 = McuInGroup - 1;
  240. unsigned int GroupNum_1 = GroupNum - 1;
  241. unsigned int LastMcuNum_1 = LastMcuNum - 1;
  242. unsigned int u4Value;
  243. u4Value =
  244. ((McuInGroup_1 & 0x00FF) << 16) | ((GroupNum_1 & 0x007F) << 8) | (LastMcuNum_1 &
  245. 0x00FF);
  246. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_WDMA_CTRL); /* */
  247. }
  248. void jpeg_drv_dec_set_sampling_factor(unsigned int compNum, unsigned int u4Y_H, unsigned int u4Y_V,
  249. unsigned int u4U_H, unsigned int u4U_V, unsigned int u4V_H,
  250. unsigned int u4V_V)
  251. {
  252. unsigned int u4Value = 0;
  253. unsigned int u4Y_HV = (DUNUM_MAPPING(u4Y_H) << 2) | DUNUM_MAPPING(u4Y_V);
  254. unsigned int u4U_HV = (DUNUM_MAPPING(u4U_H) << 2) | DUNUM_MAPPING(u4U_V);
  255. unsigned int u4V_HV = (DUNUM_MAPPING(u4V_H) << 2) | DUNUM_MAPPING(u4V_V);
  256. /* unsigned int MCU_HV[3] ; */
  257. if (compNum == 1)
  258. u4Value = 0; /* u4Y_HV << 8; */
  259. else
  260. u4Value = (u4Y_HV << 8) | (u4U_HV << 4) | u4V_HV;
  261. IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_DU_SAMPLE); /* REG_JPGDEC_DU_SAMPLE = u4Value; */
  262. }
  263. int jpeg_drv_dec_set_config_data(JPEG_DEC_DRV_IN *config)
  264. {
  265. jpeg_drv_dec_set_sampling_factor(config->componentNum,
  266. config->hSamplingFactor[0], config->vSamplingFactor[0],
  267. config->hSamplingFactor[1], config->vSamplingFactor[1],
  268. config->hSamplingFactor[2], config->vSamplingFactor[2]);
  269. /* set BRZ factor */
  270. jpeg_drv_dec_set_brz_factor(config->lumaHorDecimate, config->lumaVerDecimate,
  271. config->cbcrHorDecimate, config->cbcrVerDecimate);
  272. /* set group DMA */
  273. jpeg_drv_dec_set_dma_group(config->dma_McuInGroup, config->dma_GroupNum,
  274. config->dma_LastMcuNum);
  275. /* set componet ID */
  276. jpeg_drv_dec_set_comp_id(config->componentID[0], config->componentID[1],
  277. config->componentID[2]);
  278. /* set BLK membership */
  279. jpeg_drv_dec_set_du_membership(config->membershipList, config->gmcEn,
  280. (config->componentNum == 1) ? 1 : 0);
  281. /* set q table id */
  282. jpeg_drv_dec_set_q_table(config->qTableSelector[0], config->qTableSelector[1],
  283. config->qTableSelector[2]);
  284. /* set dst image stride */
  285. jpeg_drv_dec_set_imgStride(config->compImgStride[0], config->compImgStride[1]);
  286. /* set dst Memory stride */
  287. /* if( config->pauseRow_en ){ */
  288. /* jpeg_drv_dec_set_memStride(config->compTileBufStride[0], config->compTileBufStride[1]); */
  289. /* }else{ */
  290. jpeg_drv_dec_set_memStride(config->compMemStride[0], config->compMemStride[1]);
  291. /* } */
  292. /* set total MCU number */
  293. jpeg_drv_dec_set_total_mcu(config->totalMCU);
  294. /* set Gray DU number */
  295. jpeg_drv_dec_set_comp0_du(config->comp0_DU);
  296. /* set pause MCU index */
  297. jpeg_drv_dec_set_pause_mcu_idx(config->pauseMCU - 1);
  298. /* set bitstream base, size */
  299. JPEG_MSG("[JPEGDRV] mode %d, Buf Base 0x%08x, Limit 0x%08x, Size 0x%08x!!\n",
  300. config->reg_OpMode, config->srcStreamAddrBase, config->srcStreamAddrWritePtr,
  301. config->srcStreamSize);
  302. jpeg_drv_dec_set_bs_info(config->srcStreamAddrBase, config->srcStreamSize);
  303. /* set bitstream write pointer */
  304. jpeg_drv_dec_set_bs_writePtr(config->srcStreamAddrWritePtr);
  305. /* set Decode Operation Mode */
  306. jpeg_drv_dec_set_dec_mode(config->reg_OpMode); /* set full frame or pause/resume */
  307. /* output bank 0 */
  308. jpeg_drv_dec_set_dst_bank0(config->outputBuffer0[0], config->outputBuffer0[1],
  309. config->outputBuffer0[2]);
  310. /* output bank 1 */
  311. jpeg_drv_dec_set_dst_bank1(config->outputBuffer1[0], config->outputBuffer1[1],
  312. config->outputBuffer1[2]);
  313. #ifdef TEST_JPEG_DEBUG_EN
  314. jpeg_drv_dec_set_debug_mode();
  315. #endif
  316. return (int)E_HWJPG_OK;
  317. }
  318. void jpeg_drv_dec_resume(unsigned int resume)
  319. {
  320. _jpeg_dec_int_status = 0;
  321. IMG_REG_WRITE((resume), REG_ADDR_JPGDEC_INTERRUPT_STATUS); /* REG_JPGDEC_INTERRUPT_STATUS = resume ; */
  322. }
  323. int jpeg_drv_dec_wait_one_row(JPEG_DEC_DRV_IN *config)
  324. {
  325. unsigned int timeout = 0x2FFFFF;
  326. unsigned int irq_status;
  327. unsigned int tri_cnt = ++config->pauseRowCnt; /* 1; */
  328. unsigned int MCU_cnt = 0;
  329. unsigned int base_Y = config->buffer_Y_PA; /* 0x89080000; */
  330. unsigned int base_CB = config->buffer_Cb_PA; /* 0x89040000; */
  331. unsigned int base_CR = config->buffer_Cr_PA; /* 0x89100000; */
  332. unsigned int ring_row_index = tri_cnt % config->tileBufRowNum;
  333. /* for( tri_cnt = 1 ; tri_cnt <= 60 ; tri_cnt++) */
  334. {
  335. /* wait done */
  336. if (config->decodeMode == JPEG_DEC_MODE_MCU_ROW) {
  337. while ((REG_JPGDEC_INTERRUPT_STATUS & BIT_INQST_MASK_ALLIRQ) == 0) {
  338. timeout--;
  339. if (timeout == 0)
  340. break;
  341. }
  342. } else {
  343. while ((REG_JPGDEC_INTERRUPT_STATUS & BIT_INQST_MASK_ALLIRQ) == 0) {
  344. timeout--;
  345. if (timeout == 0)
  346. break;
  347. }
  348. }
  349. irq_status = REG_JPGDEC_INTERRUPT_STATUS;
  350. MCU_cnt = config->mcuPerRow * (tri_cnt + 1);
  351. /* MCU_cnt = config->u4McuNumInRow * (tri_cnt+1) ; */
  352. JPEG_MSG
  353. ("JPEG_DEC_WAIT_DONE: tri_cnt %d, irq %x, MCUinRow %d, p_idx %d, %x %x %x!!\n",
  354. tri_cnt, irq_status, config->mcuPerRow, MCU_cnt,
  355. base_Y + ring_row_index * (config->buffer_Y_row_size),
  356. base_CB + ring_row_index * (config->buffer_C_row_size),
  357. base_CR + ring_row_index * (config->buffer_C_row_size));
  358. jpeg_drv_dec_set_dst_bank0(base_Y + ring_row_index * (config->buffer_Y_row_size),
  359. base_CB + ring_row_index * (config->buffer_C_row_size),
  360. base_CR + ring_row_index * (config->buffer_C_row_size));
  361. jpeg_drv_dec_set_pause_mcu_idx(MCU_cnt - 1);
  362. IMG_REG_WRITE((irq_status), REG_ADDR_JPGDEC_INTERRUPT_STATUS);
  363. /* Debug: jpeg_drv_dec_dump_reg(); */
  364. if (timeout == 0) {
  365. JPEG_ERR("Error! Decode Timeout.\n");
  366. jpeg_drv_dec_dump_reg();
  367. return 0;
  368. }
  369. JPEG_ERR("JPEG Decode Success, st %x!!\n", irq_status);
  370. }
  371. return 1;
  372. }
  373. int jpeg_drv_dec_wait(JPEG_DEC_DRV_IN *config)
  374. {
  375. unsigned int timeout = 0x2FFFFF;
  376. unsigned int irq_status;
  377. /* wait done */
  378. if (config->decodeMode == JPEG_DEC_MODE_MCU_ROW) {
  379. while ((REG_JPGDEC_INTERRUPT_STATUS & BIT_INQST_MASK_ALLIRQ) == 0) {
  380. timeout--;
  381. if (timeout == 0)
  382. break;
  383. }
  384. } else {
  385. while ((REG_JPGDEC_INTERRUPT_STATUS & BIT_INQST_MASK_ALLIRQ) == 0) {
  386. timeout--;
  387. if (timeout == 0)
  388. break;
  389. }
  390. }
  391. irq_status = REG_JPGDEC_INTERRUPT_STATUS;
  392. IMG_REG_WRITE((irq_status), REG_ADDR_JPGDEC_INTERRUPT_STATUS);
  393. /* Debug: jpeg_drv_dec_dump_reg(); */
  394. if (timeout == 0) {
  395. JPEG_ERR("Error! Decode Timeout.\n");
  396. jpeg_drv_dec_dump_reg();
  397. return 0;
  398. }
  399. JPEG_ERR("JPEG Decode Success, st %x!!\n", irq_status);
  400. return 1;
  401. }
  402. kal_uint32 jpeg_drv_dec_get_result(void)
  403. {
  404. JPEG_MSG("[JPEGDRV] get_result mode %x, irq_sts %x!!\n", _jpeg_dec_mode,
  405. _jpeg_dec_int_status);
  406. /* if(_jpeg_dec_mode == 1){ */
  407. /* if(_jpeg_dec_int_status & BIT_INQST_MASK_END ) */
  408. /* REG_JPGDEC_INTERRUPT_STATUS = _jpeg_dec_int_status ; */
  409. /* } */
  410. if (_jpeg_dec_int_status & BIT_INQST_MASK_EOF)
  411. return 0;
  412. else if (_jpeg_dec_int_status & BIT_INQST_MASK_PAUSE)
  413. return 1;
  414. else if (_jpeg_dec_int_status & BIT_INQST_MASK_UNDERFLOW)
  415. return 2;
  416. else if (_jpeg_dec_int_status & BIT_INQST_MASK_OVERFLOW)
  417. return 3;
  418. else if (_jpeg_dec_int_status & BIT_INQST_MASK_ERROR_BS)
  419. return 4;
  420. return 5;
  421. }
  422. int jpeg_drv_dec_break(void)
  423. {
  424. unsigned int timeout = 0xFFFFF;
  425. jpeg_drv_dec_soft_reset();
  426. while (((REG_JPGDEC_STATUS & BIT_DEC_ST_STATE_MASK) == BIT_DEC_ST_STATE_IDLE)) {
  427. timeout--;
  428. if (timeout == 0)
  429. break;
  430. }
  431. if (timeout == 0)
  432. return -1;
  433. return 0;
  434. }
  435. void jpeg_drv_dec_dump_key_reg(void)
  436. {
  437. unsigned int reg_value = 0;
  438. unsigned int index = 0;
  439. JPEG_WRN("<<<<<= JPEG DEC DUMP KEY =>>>>>\n");
  440. /* bank0, bank1 address */
  441. for (index = 0x140; index <= 0x154; index += 4) {
  442. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  443. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  444. wait_pr();
  445. }
  446. /* pause index */
  447. for (index = 0x170; index <= 0x170; index += 4) {
  448. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  449. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  450. wait_pr();
  451. }
  452. /* decode mode (0x17C) */
  453. /* debug (0x180) */
  454. for (index = 0x17C; index <= 0x180; index += 4) {
  455. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  456. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  457. wait_pr();
  458. }
  459. /* RDMA addr (0x200) */
  460. for (index = 0x200; index <= 0x200; index += 4) {
  461. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  462. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  463. wait_pr();
  464. }
  465. /* total MCU (0x210) */
  466. for (index = 0x210; index <= 0x210; index += 4) {
  467. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  468. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  469. wait_pr();
  470. }
  471. /* file BRP addr (0x248) */
  472. /* file size (0x24C) */
  473. for (index = 0x248; index <= 0x24C; index += 4) {
  474. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  475. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  476. wait_pr();
  477. }
  478. /* IRQ (0x274) */
  479. /* IRQ FSM (0x278) */
  480. for (index = 0x274; index <= 0x278; index += 4) {
  481. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  482. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  483. wait_pr();
  484. }
  485. /* MCU CNT (0x294) */
  486. for (index = 0x294; index <= 0x294; index += 4) {
  487. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  488. JPEG_WRN("@0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  489. wait_pr();
  490. }
  491. }
  492. void jpeg_drv_dec_dump_reg(void)
  493. {
  494. unsigned int reg_value = 0;
  495. unsigned int index = 0;
  496. JPEG_VEB("<<<<<= JPEG DEC DUMP =>>>>>\n");
  497. for (index = 0x8C; index <= 0x3FC; index += 4) {
  498. #ifdef FPGA_VERSION
  499. reg_value = *(volatile kal_uint32 *)(JPEG_DEC_BASE + index);
  500. #else
  501. IMG_REG_READ(reg_value, JPEG_DEC_BASE + index); /* reg_value = ioread32(JPEG_DEC_BASE + index); */
  502. #endif
  503. JPEG_VEB("+0x%x(%d) 0x%08x\n", index, index / 4, reg_value);
  504. wait_pr();
  505. }
  506. }
  507. void jpeg_drv_dec_rw_reg(void)
  508. {
  509. kal_uint32 i;
  510. kal_uint32 addr = 0;
  511. /* kal_uint32 restore = 0; */
  512. JPEG_VEB("=======================================\n\r");
  513. JPEG_VEB(" JPEG decoder register RW test!!!!\n\r");
  514. /* for (i = 0x8C; i < 0x3FC; i+=4) */
  515. for (i = 0x090; i <= 0x294; i += 4) {
  516. addr = JPEG_DEC_BASE + i;
  517. JPEG_VEB("addr %03x(%03d) ", i, i / 4);
  518. #if 0
  519. /* power down related register */
  520. if ((i == 0xC4) || (i == 0xC8))
  521. restore = *((volatile unsigned int *)addr);
  522. #endif
  523. *((volatile unsigned int *)addr) = 0x00000000;
  524. JPEG_VEB("write 0x00000000 read: 0x%08x\n", *((volatile unsigned int *)addr));
  525. *((volatile unsigned int *)addr) = 0xffffffff;
  526. JPEG_VEB(" write 0xffffffff read: 0x%08x\n",
  527. *((volatile unsigned int *)addr));
  528. #if 0
  529. /* power down related register */
  530. if ((i == 0xC4) || (i == 0xC8))
  531. *((volatile unsigned int *)addr) = restore;
  532. #endif
  533. wait_pr();
  534. }
  535. JPEG_VEB("=======================================\n\r\n\r");
  536. }