hx8392a_dsi_cmd.c 10 KB

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  1. #include <linux/string.h>
  2. #include <linux/wait.h>
  3. #include "lcm_drv.h"
  4. #include "ddp_irq.h"
  5. /**
  6. * Local Constants
  7. */
  8. #define FRAME_WIDTH (720)
  9. #define FRAME_HEIGHT (1280)
  10. #define REGFLAG_DELAY 0xFE
  11. #define REGFLAG_END_OF_TABLE 0xFF /* END OF REGISTERS MARKER */
  12. #define LCM_DSI_CMD_MODE 1
  13. /**
  14. * Local Variables
  15. */
  16. static LCM_UTIL_FUNCS lcm_util = {0};
  17. #define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
  18. #define UDELAY(n) (lcm_util.udelay(n))
  19. #define MDELAY(n) (lcm_util.mdelay(n))
  20. /**
  21. * Local Functions
  22. */
  23. #define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
  24. #define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
  25. #define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
  26. #define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
  27. #define read_reg lcm_util.dsi_read_reg()
  28. #define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
  29. #ifndef ASSERT
  30. #define ASSERT(expr) \
  31. do { \
  32. if (expr) \
  33. break; \
  34. pr_debug("DDP ASSERT FAILED %s, %d\n", \
  35. __FILE__, __LINE__); \
  36. BUG(); \
  37. } while (0)
  38. #endif
  39. struct LCM_setting_table {
  40. unsigned cmd;
  41. unsigned char count;
  42. unsigned char para_list[64];
  43. };
  44. /**
  45. * Note :
  46. *
  47. * Data ID will depends on the following rule.
  48. *
  49. * count of parameters > 1 => Data ID = 0x39
  50. * count of parameters = 1 => Data ID = 0x15
  51. * count of parameters = 0 => Data ID = 0x05
  52. *
  53. * Structure Format :
  54. *
  55. * {DCS command, count of parameters, {parameter list}}
  56. * {REGFLAG_DELAY, milliseconds of time, {} },
  57. * ...
  58. *
  59. * Setting ending by predefined flag
  60. *
  61. * {REGFLAG_END_OF_TABLE, 0x00, {}}
  62. */
  63. static struct LCM_setting_table lcm_initialization_setting[] = {
  64. /* sleep out */
  65. {0x11, 0, {} },
  66. {REGFLAG_DELAY, 120, {} },
  67. /* SET PASSWORD */
  68. {0xB9, 3, {0xFF, 0x83, 0x92} },
  69. {REGFLAG_DELAY, 10, {} },
  70. /* Set internal oscillator */
  71. {0xB0, 2, {0x01, 0x08} },
  72. /* set mipi 4 lane */
  73. {0xBA, 17, {0x13, 0x83, 0x00, 0xD6,
  74. 0xC5, 0x10, 0x09, 0xFF,
  75. 0x0F, 0x27, 0x03, 0x21,
  76. 0x27, 0x25, 0x20, 0x00,
  77. 0x10} },
  78. /* SET POWER */
  79. {0xB1, 13, {0x7C, 0x00, 0x43, 0xBB,
  80. 0x00, 0x1A, 0x1A, 0x2F,
  81. 0x36, 0x3F, 0x3F, 0x42,
  82. 0x7A} },
  83. /* SET DISPLAY RELATED REGISTER */
  84. {0xB2, 12, {0x08, 0xC8, 0x06, 0x18,
  85. 0x04, 0x84, 0x00, 0xFF,
  86. 0x06, 0x06, 0x04, 0x20} },
  87. /* SET CYC */
  88. {0xB4, 23, {0x00, 0x00, 0x05, 0x0A,
  89. 0x8F, 0x06, 0x0A, 0x95,
  90. 0x01, 0x07, 0x06, 0x0C,
  91. 0x02, 0x08, 0x08, 0x21,
  92. 0x04, 0x02, 0x08, 0x01,
  93. 0x04, 0x1A, 0x95} },
  94. /* set TE on */
  95. {0x35, 1, {0x00} },
  96. {0xBF, 4, {0x05, 0x60, 0x02, 0x00} },
  97. /* VCOM 64 */
  98. {0xB6, 1, {0x6A} },
  99. /* SET RGB OR BGR */
  100. {0x36, 1, {0x08} },
  101. /* SET RGB OR BGR */
  102. {0xC0, 2, {0x03, 0x94} },
  103. /* SET DSI COMMAND MODE */
  104. {0xC2, 1, {0x08} },
  105. /* SET DSI COMMAND MODE */
  106. {0xC6, 4, {0x35, 0x00, 0x20, 0x04} },
  107. /* SET PANEL */
  108. {0xCC, 1, {0x09} },
  109. {0xD4, 1, {0x00} },
  110. {0xD5, 23, {0x00, 0x01, 0x04, 0x00,
  111. 0x01, 0x67, 0x89, 0xAB,
  112. 0x45, 0xCC, 0xCC, 0xCC,
  113. 0x00, 0x10, 0x54, 0xBA,
  114. 0x98, 0x76, 0xCC, 0xCC,
  115. 0xCC, 0x00, 0x00} },
  116. {0xD8, 23, {0x00, 0x00, 0x05, 0x00,
  117. 0x9A, 0x00, 0x02, 0x95,
  118. 0x01, 0x07, 0x06, 0x00,
  119. 0x08, 0x08, 0x00, 0x1D,
  120. 0x08, 0x08, 0x08, 0x00,
  121. 0x00, 0x00, 0x77} },
  122. {0xE0, 34, {0x00, 0x12, 0x19, 0x33,
  123. 0x36, 0x3F, 0x28, 0x47,
  124. 0x06, 0x0C, 0x0E, 0x12,
  125. 0x14, 0x12, 0x14, 0x12,
  126. 0x1A, 0x00, 0x12, 0x19,
  127. 0x33, 0x36, 0x3F, 0x28,
  128. 0x47, 0x06, 0x0C, 0x0E,
  129. 0x12, 0x14, 0x12, 0x14,
  130. 0x12, 0x1A} },
  131. {0xE1, 34, {0x00, 0x12, 0x19, 0x33,
  132. 0x36, 0x3F, 0x28, 0x47,
  133. 0x06, 0x0C, 0x0E, 0x12,
  134. 0x14, 0x12, 0x14, 0x12,
  135. 0x1A, 0x00, 0x12, 0x19,
  136. 0x33, 0x36, 0x3F, 0x28,
  137. 0x47, 0x06, 0x0C, 0x0E,
  138. 0x12, 0x14, 0x12, 0x14,
  139. 0x12, 0x1A} },
  140. {0xE2, 34, {0x00, 0x12, 0x19, 0x33,
  141. 0x36, 0x3F, 0x28, 0x47,
  142. 0x06, 0x0C, 0x0E, 0x12,
  143. 0x14, 0x12, 0x14, 0x12,
  144. 0x1A, 0x00, 0x12, 0x19,
  145. 0x33, 0x36, 0x3F, 0x28,
  146. 0x47, 0x06, 0x0C, 0x0E,
  147. 0x12, 0x14, 0x12, 0x14,
  148. 0x12, 0x1A} },
  149. /* SET PIXEL FORMAT */
  150. {0x3A, 1, {0x77} },
  151. /* sleep out */
  152. {0x29, 0, {} },
  153. };
  154. #if 0
  155. static struct LCM_setting_table lcm_set_window[] = {
  156. {0x2A, 4, {0x00, 0x00, (FRAME_WIDTH >> 8), (FRAME_WIDTH&0xFF) } },
  157. {0x2B, 4, {0x00, 0x00, (FRAME_HEIGHT >> 8), (FRAME_HEIGHT&0xFF)} },
  158. {REGFLAG_END_OF_TABLE, 0x00, {} }
  159. };
  160. static struct LCM_setting_table lcm_sleep_out_setting[] = {
  161. /* Sleep Out */
  162. {0x11, 0, {} },
  163. {REGFLAG_DELAY, 120, {} },
  164. /* Display ON */
  165. {0x29, 0, {} },
  166. {REGFLAG_END_OF_TABLE, 0x00, {} }
  167. };
  168. #endif
  169. static struct LCM_setting_table lcm_deep_sleep_mode_in_setting[] = {
  170. /* Sleep Mode On */
  171. {0x10, 0, {} },
  172. {REGFLAG_DELAY, 120, {} },
  173. {REGFLAG_END_OF_TABLE, 0x00, {} }
  174. };
  175. static struct LCM_setting_table lcm_backlight_level_setting[] = {
  176. {0x51, 1, {0xFF} },
  177. {REGFLAG_END_OF_TABLE, 0x00, {} }
  178. };
  179. static void push_table(struct LCM_setting_table *table, unsigned int count,
  180. unsigned char force_update)
  181. {
  182. unsigned int i;
  183. for (i = 0; i < count; i++) {
  184. unsigned cmd;
  185. cmd = table[i].cmd;
  186. switch (cmd) {
  187. case REGFLAG_DELAY:
  188. MDELAY(table[i].count);
  189. break;
  190. case REGFLAG_END_OF_TABLE:
  191. break;
  192. default:
  193. dsi_set_cmdq_V2(cmd, table[i].count,
  194. table[i].para_list, force_update);
  195. }
  196. }
  197. }
  198. /**
  199. * LCM Driver Implementations
  200. */
  201. static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
  202. {
  203. memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
  204. }
  205. static void lcm_get_params(LCM_PARAMS *params)
  206. {
  207. memset(params, 0, sizeof(LCM_PARAMS));
  208. params->type = LCM_TYPE_DSI;
  209. params->width = FRAME_WIDTH;
  210. params->height = FRAME_HEIGHT;
  211. /* enable tearing-free */
  212. params->dbi.te_mode = LCM_DBI_TE_MODE_VSYNC_ONLY;
  213. params->dbi.te_edge_polarity = LCM_POLARITY_RISING;
  214. #if (LCM_DSI_CMD_MODE)
  215. params->dsi.mode = CMD_MODE;
  216. params->dsi.switch_mode = SYNC_PULSE_VDO_MODE;
  217. #else
  218. params->dsi.mode = SYNC_PULSE_VDO_MODE;
  219. #endif
  220. /* DSI */
  221. /* Command mode setting */
  222. params->dsi.LANE_NUM = LCM_FOUR_LANE;
  223. /* The following defined the fomat for data coming from LCD engine. */
  224. params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
  225. params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
  226. params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
  227. params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
  228. /* Highly depends on LCD driver capability. */
  229. /* Not support in MT6573 */
  230. params->dsi.packet_size = 256;
  231. params->dsi.PS = LCM_PACKED_PS_24BIT_RGB888;
  232. #ifndef CONFIG_FPGA_EARLY_PORTING
  233. #if (LCM_DSI_CMD_MODE)
  234. params->dsi.PLL_CLOCK = 200; /* this value must be in MTK suggested table */
  235. #else
  236. params->dsi.PLL_CLOCK = 200; /* this value must be in MTK suggested table */
  237. #endif
  238. #else
  239. params->dsi.pll_div1 = 0;
  240. params->dsi.pll_div2 = 0;
  241. params->dsi.fbk_div = 0x1;
  242. #endif
  243. params->dsi.clk_lp_per_line_enable = 0;
  244. params->dsi.esd_check_enable = 1;
  245. params->dsi.customization_esd_check_enable = 0;
  246. params->dsi.lcm_esd_check_table[0].cmd = 0x53;
  247. params->dsi.lcm_esd_check_table[0].count = 1;
  248. params->dsi.lcm_esd_check_table[0].para_list[0] = 0x24;
  249. }
  250. static void lcm_init(void)
  251. {
  252. SET_RESET_PIN(1);
  253. SET_RESET_PIN(0);
  254. MDELAY(10);
  255. SET_RESET_PIN(1);
  256. MDELAY(20);
  257. push_table(lcm_initialization_setting,
  258. sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
  259. }
  260. static void lcm_suspend(void)
  261. {
  262. push_table(lcm_deep_sleep_mode_in_setting,
  263. sizeof(lcm_deep_sleep_mode_in_setting) / sizeof(struct LCM_setting_table), 1);
  264. }
  265. static void lcm_resume(void)
  266. {
  267. int resume_count = 5;
  268. char buffer[4];
  269. int recv_cnt;
  270. do {
  271. MDELAY(10);
  272. lcm_init();
  273. MDELAY(10);
  274. atomic_set(&ESDCheck_byCPU, 1);
  275. recv_cnt = read_reg_v2(0x0A, buffer, 1);
  276. atomic_set(&ESDCheck_byCPU, 0);
  277. if (buffer[0] != 0x0)
  278. return;
  279. pr_debug("DDP/LCM resume fail, resume again\n");
  280. resume_count--;
  281. } while (resume_count >= 0);
  282. /* try over 'resume_count' times, assert fail */
  283. ASSERT(0);
  284. }
  285. static void lcm_update(unsigned int x, unsigned int y,
  286. unsigned int width, unsigned int height)
  287. {
  288. unsigned int x0 = x;
  289. unsigned int y0 = y;
  290. unsigned int x1 = x0 + width - 1;
  291. unsigned int y1 = y0 + height - 1;
  292. unsigned char x0_MSB = ((x0 >> 8) & 0xFF);
  293. unsigned char x0_LSB = (x0 & 0xFF);
  294. unsigned char x1_MSB = ((x1 >> 8) & 0xFF);
  295. unsigned char x1_LSB = (x1 & 0xFF);
  296. unsigned char y0_MSB = ((y0 >> 8) & 0xFF);
  297. unsigned char y0_LSB = (y0 & 0xFF);
  298. unsigned char y1_MSB = ((y1 >> 8) & 0xFF);
  299. unsigned char y1_LSB = (y1 & 0xFF);
  300. unsigned int data_array[16];
  301. data_array[0] = 0x00053902;
  302. data_array[1] = (x1_MSB << 24) | (x0_LSB << 16) | (x0_MSB << 8) | 0x2a;
  303. data_array[2] = (x1_LSB);
  304. data_array[3] = 0x00053902;
  305. data_array[4] = (y1_MSB << 24) | (y0_LSB << 16) | (y0_MSB << 8) | 0x2b;
  306. data_array[5] = (y1_LSB);
  307. data_array[6] = 0x002c3909;
  308. dsi_set_cmdq(data_array, 7, 0);
  309. }
  310. static void lcm_setbacklight(unsigned int level)
  311. {
  312. unsigned int default_level = 145;
  313. unsigned int mapped_level = 0;
  314. /* for LGE backlight IC mapping table */
  315. if (level > 255)
  316. level = 255;
  317. if (level > 0)
  318. mapped_level = default_level + (level) * (255 - default_level) / (255);
  319. else
  320. mapped_level = 0;
  321. /* Refresh value of backlight level */
  322. lcm_backlight_level_setting[0].para_list[0] = mapped_level;
  323. push_table(lcm_backlight_level_setting,
  324. sizeof(lcm_backlight_level_setting) / sizeof(struct LCM_setting_table), 1);
  325. }
  326. #if 0
  327. static void lcm_setpwm(unsigned int divider)
  328. {
  329. /* TBD */
  330. }
  331. static unsigned int lcm_getpwm(unsigned int divider)
  332. {
  333. /* ref freq = 15MHz, B0h setting 0x80, so 80.6% * freq is pwm_clk; */
  334. /* pwm_clk / 255 / 2(lcm_setpwm() 6th params) = pwm_duration = 23706 */
  335. unsigned int pwm_clk = 23706 / (1 << divider);
  336. return pwm_clk;
  337. }
  338. #endif
  339. LCM_DRIVER hx8392a_dsi_cmd_lcm_drv = {
  340. .name = "hx8392a_dsi_cmd",
  341. .set_util_funcs = lcm_set_util_funcs,
  342. .get_params = lcm_get_params,
  343. .init = lcm_init,
  344. .suspend = lcm_suspend,
  345. .resume = lcm_resume,
  346. #if (LCM_DSI_CMD_MODE)
  347. .set_backlight = lcm_setbacklight,
  348. /* .set_pwm = lcm_setpwm, */
  349. /* .get_pwm = lcm_getpwm, */
  350. .update = lcm_update
  351. #endif
  352. };