mt65xx_lcm_list.c 24 KB

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  1. #include "mt65xx_lcm_list.h"
  2. #include <lcm_drv.h>
  3. #ifdef BUILD_LK
  4. #include <platform/disp_drv_platform.h>
  5. #else
  6. #include <linux/delay.h>
  7. /* #include <mach/mt_gpio.h> */
  8. #endif
  9. /* used to identify float ID PIN status */
  10. #define LCD_HW_ID_STATUS_LOW 0
  11. #define LCD_HW_ID_STATUS_HIGH 1
  12. #define LCD_HW_ID_STATUS_FLOAT 0x02
  13. #define LCD_HW_ID_STATUS_ERROR 0x03
  14. #ifdef BUILD_LK
  15. #define LCD_DEBUG(fmt) dprintf(CRITICAL, fmt)
  16. #else
  17. #define LCD_DEBUG(fmt, args...) pr_debug("[KERNEL/LCM]"fmt, ##args)
  18. #endif
  19. LCM_DRIVER *lcm_driver_list[] = {
  20. #if defined(MTK_LCM_DEVICE_TREE_SUPPORT)
  21. &lcm_common_drv,
  22. #else
  23. #if defined(B101UAN07_FHD_DSI_VDO_TPS65132)
  24. &b101uan07_fhd_dsi_vdo_tps65132_lcm_drv,
  25. #endif
  26. #if defined(OTM1284A_HD720_DSI_VDO_TM)
  27. &otm1284a_hd720_dsi_vdo_tm_lcm_drv,
  28. #endif
  29. #if defined(OTM1285A_HD720_DSI_VDO_TM)
  30. &otm1285a_hd720_dsi_vdo_tm_lcm_drv,
  31. #endif
  32. #if defined(EK79007_WSVGALNL_DSI_VDO)
  33. &ek79007_wsvgalnl_dsi_vdo_lcm_drv,
  34. #endif
  35. #if defined(S6E3FA2_FHD1080_DSI_VDO)
  36. &s6e3fa2_fhd1080_dsi_vdo_lcm_drv,
  37. #endif
  38. #if defined(OTM1283A_HD720_DSI_VDO_TM)
  39. &otm1283a_hd720_dsi_vdo_tm_lcm_drv,
  40. #endif
  41. #if defined(IT6151_LP079QX1_EDP_DSI_VIDEO)
  42. &it6151_lp079qx1_edp_dsi_video_lcm_drv,
  43. #endif
  44. #if defined(VVX10F008B00_WUXGA_DSI_VDO)
  45. &vvx10f008b00_wuxga_dsi_vdo_lcm_drv,
  46. #endif
  47. #if defined(KR101IA2S_DSI_VDO)
  48. &kr101ia2s_dsi_vdo_lcm_drv,
  49. #endif
  50. #if defined(KR070IA4T_DSI_VDO)
  51. &kr070ia4t_dsi_vdo_lcm_drv,
  52. #endif
  53. #if defined(HX8394A_HD720_DSI_VDO_TIANMA_V2)
  54. &hx8394a_hd720_dsi_vdo_tianma_v2_lcm_drv,
  55. #endif
  56. #if defined(OTM1283A)
  57. &otm1283a_6589_hd_dsi,
  58. #endif
  59. #if defined(OTM1282A_HD720_DSI_VDO_60HZ)
  60. &otm1282a_hd720_dsi_vdo_60hz_lcm_drv,
  61. #endif
  62. #if defined(OTM8018B_DSI_VDO_TXD_FWVGA)
  63. &otm8018b_dsi_vdo_txd_fwvga_lcm_drv,
  64. #endif
  65. #if defined(TF070MC_RGB_V18_MT6571)
  66. &tf070mc_rgb_v18_mt6571_lcm_drv,
  67. #endif
  68. #if defined(ZS070IH5015B3H6_RGB_MT6571)
  69. &zs070ih5015b3h6_mt6571_lcm_drv,
  70. #endif
  71. #if defined(OTM1282A_HD720_DSI_VDO)
  72. &otm1282a_hd720_dsi_vdo_lcm_drv,
  73. #endif
  74. #if defined(R63311_FHD_DSI_VDO)
  75. &r63311_fhd_dsi_vedio_lcm_drv,
  76. #endif
  77. #if defined(R63315_FHD_DSI_VDO_TRULY)
  78. &r63315_fhd_dsi_vdo_truly_lcm_drv,
  79. #endif
  80. #if defined(NT35517_QHD_DSI_VDO)
  81. &nt35517_dsi_vdo_lcm_drv,
  82. #endif
  83. #if defined(ILI9806E_DSI_VDO_FWVGA)
  84. &ili9806e_dsi_vdo_fwvga_drv,
  85. #endif
  86. #if defined(LP079X01)
  87. &lp079x01_lcm_drv,
  88. #endif
  89. #if defined(HX8369)
  90. &hx8369_lcm_drv,
  91. #endif
  92. #if defined(HX8369_6575)
  93. &hx8369_6575_lcm_drv,
  94. #endif
  95. #if defined(BM8578)
  96. &bm8578_lcm_drv,
  97. #endif
  98. #if defined(NT35582_MCU)
  99. &nt35582_mcu_lcm_drv,
  100. #endif
  101. #if defined(NT35582_MCU_6575)
  102. &nt35582_mcu_6575_lcm_drv,
  103. #endif
  104. #if defined(NT35590_HD720_DSI_CMD_TRULY2)
  105. &nt35590_hd720_dsi_cmd_truly2_lcm_drv,
  106. #endif
  107. #if defined(NT35590_HD720_DSI_VDO_TRULY)
  108. &nt35590_hd720_dsi_vdo_truly_lcm_drv,
  109. #endif
  110. #if defined(SSD2075_HD720_DSI_VDO_TRULY)
  111. &ssd2075_hd720_dsi_vdo_truly_lcm_drv,
  112. #endif
  113. #if defined(NT35590_HD720_DSI_CMD)
  114. &nt35590_hd720_dsi_cmd_drv,
  115. #endif
  116. #if defined(NT35590_HD720_DSI_CMD_AUO)
  117. &nt35590_hd720_dsi_cmd_auo_lcm_drv,
  118. #endif
  119. #if defined(NT35590_HD720_DSI_CMD_AUO_WVGA)
  120. &nt35590_hd720_dsi_cmd_auo_wvga_lcm_drv,
  121. #endif
  122. #if defined(NT35590_HD720_DSI_CMD_AUO_QHD)
  123. &nt35590_hd720_dsi_cmd_auo_qhd_lcm_drv,
  124. #endif
  125. #if defined(NT35590_HD720_DSI_CMD_AUO_FWVGA)
  126. &nt35590_hd720_dsi_cmd_auo_fwvga_lcm_drv,
  127. #endif
  128. #if defined(NT35590_HD720_DSI_CMD_CMI)
  129. &nt35590_hd720_dsi_cmd_cmi_lcm_drv,
  130. #endif
  131. #if defined(NT35582_RGB_6575)
  132. &nt35582_rgb_6575_lcm_drv,
  133. #endif
  134. #if defined(NT51012_HD720_DSI_VDO)
  135. &nt51012_hd720_dsi_vdo_lcm_drv,
  136. #endif
  137. #if defined(HX8369_RGB_6585_FPGA)
  138. &hx8369_rgb_6585_fpga_lcm_drv,
  139. #endif
  140. #if defined(HX8369_RGB_6572_FPGA)
  141. &hx8369_rgb_6572_fpga_lcm_drv,
  142. #endif
  143. #if defined(HX8369_MCU_6572)
  144. &hx8369_mcu_6572_lcm_drv,
  145. #endif
  146. #if defined(HX8369A_WVGA_DSI_CMD)
  147. &hx8369a_wvga_dsi_cmd_drv,
  148. #endif
  149. #if defined(HX8369A_WVGA_DSI_VDO)
  150. &hx8369a_wvga_dsi_vdo_drv,
  151. #endif
  152. #if defined(HX8357B)
  153. &hx8357b_lcm_drv,
  154. #endif
  155. #if defined(HX8357C_HVGA_DSI_CMD)
  156. &hx8357c_hvga_dsi_cmd_drv,
  157. #endif
  158. #if defined(R61408)
  159. &r61408_lcm_drv,
  160. #endif
  161. #if defined(R61408_WVGA_DSI_CMD)
  162. &r61408_wvga_dsi_cmd_drv,
  163. #endif
  164. #if defined(HX8369_DSI_VDO)
  165. &hx8369_dsi_vdo_lcm_drv,
  166. #endif
  167. #if defined(HX8369_DSI)
  168. &hx8369_dsi_lcm_drv,
  169. #endif
  170. #if defined(HX8369_6575_DSI)
  171. &hx8369_dsi_6575_lcm_drv,
  172. #endif
  173. #if defined(HX8369_6575_DSI_NFC_ZTE)
  174. &hx8369_dsi_6575_lcm_drv,
  175. #endif
  176. #if defined(HX8369_6575_DSI_HVGA)
  177. &hx8369_dsi_6575_hvga_lcm_drv,
  178. #endif
  179. #if defined(HX8369_6575_DSI_QVGA)
  180. &hx8369_dsi_6575_qvga_lcm_drv,
  181. #endif
  182. #if defined(HX8369_HVGA)
  183. &hx8369_hvga_lcm_drv,
  184. #endif
  185. #if defined(NT35510)
  186. &nt35510_lcm_drv,
  187. #endif
  188. #if defined(NT35510_RGB_6575)
  189. &nt35510_dpi_lcm_drv,
  190. #endif
  191. #if defined(NT35510_HVGA)
  192. &nt35510_hvga_lcm_drv,
  193. #endif
  194. #if defined(NT35510_QVGA)
  195. &nt35510_qvga_lcm_drv,
  196. #endif
  197. #if defined(NT35510_WVGA_DSI_CMD)
  198. &nt35510_wvga_dsi_cmd_drv,
  199. #endif
  200. #if defined(NT35510_6517)
  201. &nt35510_6517_lcm_drv,
  202. #endif
  203. #if defined(NT35510_DSI_CMD_6572)
  204. &nt35510_dsi_cmd_6572_drv,
  205. #endif
  206. #if defined(NT35510_DSI_CMD_6572_HVGA)
  207. &nt35510_dsi_cmd_6572_hvga_drv,
  208. #endif
  209. #if defined(NT35510_DSI_CMD_6572_FWVGA)
  210. &nt35510_dsi_cmd_6572_fwvga_drv,
  211. #endif
  212. #if defined(NT35510_DSI_CMD_6572_QVGA)
  213. &nt35510_dsi_cmd_6572_qvga_drv,
  214. #endif
  215. #if defined(NT35510_DSI_VDO_6572)
  216. &nt35510_dsi_vdo_6572_drv,
  217. #endif
  218. #if defined(NT35510_DPI_6572)
  219. &nt35510_dpi_6572_lcm_drv,
  220. #endif
  221. #if defined(NT35510_MCU_6572)
  222. &nt35510_mcu_6572_lcm_drv,
  223. #endif
  224. #if defined(ILI9481)
  225. &ili9481_lcm_drv,
  226. #endif
  227. #if defined(NT35582)
  228. &nt35582_lcm_drv,
  229. #endif
  230. #if defined(S6D0170)
  231. &s6d0170_lcm_drv,
  232. #endif
  233. #if defined(SPFD5461A)
  234. &spfd5461a_lcm_drv,
  235. #endif
  236. #if defined(TA7601)
  237. &ta7601_lcm_drv,
  238. #endif
  239. #if defined(TFT1P3037)
  240. &tft1p3037_lcm_drv,
  241. #endif
  242. #if defined(HA5266)
  243. &ha5266_lcm_drv,
  244. #endif
  245. #if defined(HSD070IDW1)
  246. &hsd070idw1_lcm_drv,
  247. #endif
  248. #if defined(HX8363_6575_DSI)
  249. &hx8363_6575_dsi_lcm_drv,
  250. #endif
  251. #if defined(HX8363_6575_DSI_HVGA)
  252. &hx8363_6575_dsi_hvga_lcm_drv,
  253. #endif
  254. #if defined(HX8363B_WVGA_DSI_CMD)
  255. &hx8363b_wvga_dsi_cmd_drv,
  256. #endif
  257. #if defined(LG4571)
  258. &lg4571_lcm_drv,
  259. #endif
  260. #if defined(LG4573B_WVGA_DSI_VDO_LH430MV1)
  261. &lg4573b_wvga_dsi_vdo_lh430mv1_drv,
  262. #endif
  263. #if defined(LVDS_WSVGA)
  264. &lvds_wsvga_lcm_drv,
  265. #endif
  266. #if defined(LVDS_WSVGA_TI)
  267. &lvds_wsvga_ti_lcm_drv,
  268. #endif
  269. #if defined(LVDS_WSVGA_TI_N)
  270. &lvds_wsvga_ti_n_lcm_drv,
  271. #endif
  272. #if defined(NT35565_3D)
  273. &nt35565_3d_lcm_drv,
  274. #endif
  275. #if defined(TM070DDH03)
  276. &tm070ddh03_lcm_drv,
  277. #endif
  278. #if defined(R63303_IDISPLAY)
  279. &r63303_idisplay_lcm_drv,
  280. #endif
  281. #if defined(HX8369B_DSI_VDO)
  282. &hx8369b_dsi_vdo_lcm_drv,
  283. #endif
  284. #if defined(HX8369B_WVGA_DSI_VDO)
  285. &hx8369b_wvga_dsi_vdo_drv,
  286. #endif
  287. #if defined(HX8369B_QHD_DSI_VDO)
  288. &hx8389b_qhd_dsi_vdo_drv,
  289. #endif
  290. #if defined(HX8389B_HD720_DSI_VDO)
  291. &hx8389b_hd720_dsi_vdo_drv,
  292. #endif
  293. #if defined(GN_SSD2825_SMD_S6E8AA)
  294. &gn_ssd2825_smd_s6e8aa,
  295. #endif
  296. #if defined(HX8369_TM_DSI)
  297. &hx8369_dsi_tm_lcm_drv,
  298. #endif
  299. #if defined(HX8369_BLD_DSI)
  300. &hx8369_dsi_bld_lcm_drv,
  301. #endif
  302. #if defined(HJ080IA)
  303. &hj080ia_lcm_drv,
  304. #endif
  305. #if defined(HJ101NA02A)
  306. &hj101na02a_lcm_drv,
  307. #endif
  308. #if defined(HJ101NA02A_8135)
  309. &hj101na02a_8135_lcm_drv,
  310. #endif
  311. #if defined(HSD070PFW3)
  312. &hsd070pfw3_lcm_drv,
  313. #endif
  314. #if defined(HSD070PFW3_8135)
  315. &hsd070pfw3_8135_lcm_drv,
  316. #endif
  317. #if defined(EJ101IA)
  318. &ej101ia_lcm_drv,
  319. #endif
  320. #if defined(SCF0700M48GGU02)
  321. &scf0700m48ggu02_lcm_drv,
  322. #endif
  323. #if defined(OTM1280A_HD720_DSI_CMD)
  324. &otm1280a_hd720_dsi_cmd_drv,
  325. #endif
  326. #if defined(OTM8018B_DSI_VDO)
  327. &otm8018b_dsi_vdo_lcm_drv,
  328. #endif
  329. #if defined(NT35512_DSI_VDO)
  330. &nt35512_dsi_vdo_lcm_drv,
  331. #endif
  332. #if defined(NT35512_WVGA_DSI_VDO_BOE)
  333. &nt35512_wvga_dsi_vdo_boe_drv,
  334. #endif
  335. #if defined(HX8392A_DSI_CMD)
  336. &hx8392a_dsi_cmd_lcm_drv,
  337. #endif
  338. #if defined(HX8392A_DSI_CMD_3LANE)
  339. &hx8392a_dsi_cmd_3lane_lcm_drv,
  340. #endif
  341. #if defined(HX8392A_DSI_CMD_3LANE_QHD)
  342. &hx8392a_dsi_cmd_3lane_qhd_lcm_drv,
  343. #endif
  344. #if defined(HX8392A_DSI_CMD_WVGA)
  345. &hx8392a_dsi_cmd_wvga_lcm_drv,
  346. #endif
  347. #if defined(HX8392A_DSI_CMD_FWVGA)
  348. &hx8392a_dsi_cmd_fwvga_lcm_drv,
  349. #endif
  350. #if defined(HX8392A_DSI_CMD_QHD)
  351. &hx8392a_dsi_cmd_qhd_lcm_drv,
  352. #endif
  353. #if defined(HX8392A_DSI_VDO)
  354. &hx8392a_dsi_vdo_lcm_drv,
  355. #endif
  356. #if defined(HX8392A_DSI_VDO_2LANE)
  357. &hx8392a_dsi_vdo_2lane_lcm_drv,
  358. #endif
  359. #if defined(HX8392A_DSI_VDO_3LANE)
  360. &hx8392a_dsi_vdo_3lane_lcm_drv,
  361. #endif
  362. #if defined(NT35516_QHD_DSI_CMD_IPSBOE)
  363. &nt35516_qhd_dsi_cmd_ipsboe_lcm_drv,
  364. #endif
  365. #if defined(NT35516_QHD_DSI_CMD_IPSBOE_WVGA)
  366. &nt35516_qhd_dsi_cmd_ipsboe_wvga_lcm_drv,
  367. #endif
  368. #if defined(NT35516_QHD_DSI_CMD_IPSBOE_FWVGA)
  369. &nt35516_qhd_dsi_cmd_ipsboe_fwvga_lcm_drv,
  370. #endif
  371. #if defined(NT35516_QHD_DSI_CMD_IPS9K1431)
  372. &nt35516_qhd_dsi_cmd_ips9k1431_drv,
  373. #endif
  374. #if defined(NT35516_QHD_DSI_CMD_TFT9K1342)
  375. &nt35516_qhd_dsi_cmd_tft9k1342_drv,
  376. #endif
  377. #if defined(NT35516_QHD_DSI_VEDIO)
  378. &nt35516_qhd_rav4_lcm_drv,
  379. #endif
  380. #if defined(BP070WS1)
  381. &bp070ws1_lcm_drv,
  382. #endif
  383. #if defined(BP101WX1)
  384. &bp101wx1_lcm_drv,
  385. #endif
  386. #if defined(BP101WX1_N)
  387. &bp101wx1_n_lcm_drv,
  388. #endif
  389. #if defined(CM_N070ICE_DSI_VDO)
  390. &cm_n070ice_dsi_vdo_lcm_drv,
  391. #endif
  392. #if defined(CM_N070ICE_DSI_VDO_MT8135)
  393. &cm_n070ice_dsi_vdo_mt8135_lcm_drv,
  394. #endif
  395. #if defined(CM_OTC3108BH161_DSI_VDO)
  396. &cm_otc3108bhv161_dsi_vdo_lcm_drv,
  397. #endif
  398. #if defined(NT35510_FWVGA)
  399. &nt35510_fwvga_lcm_drv,
  400. #endif
  401. #if defined(R63311_FHD_DSI_VDO_SHARP)
  402. &r63311_fhd_dsi_vdo_sharp_lcm_drv,
  403. #endif
  404. #if defined(R81592_HVGA_DSI_CMD)
  405. &r81592_hvga_dsi_cmd_drv,
  406. #endif
  407. #if defined(RM68190_QHD_DSI_VDO)
  408. &rm68190_dsi_vdo_lcm_drv,
  409. #endif
  410. #if defined(NT35596_FHD_DSI_VDO_TRULY)
  411. &nt35596_fhd_dsi_vdo_truly_lcm_drv,
  412. #endif
  413. #if defined(NT35595_FHD_DSI_VDO_TRULY)
  414. &nt35595_fhd_dsi_vdo_truly_lcm_drv,
  415. #endif
  416. #if defined(R63319_WQHD_DSI_VDO_TRULY)
  417. &r63319_wqhd_dsi_vdo_truly_lcm_drv,
  418. #endif
  419. #if defined(NT35598_WQHD_DSI_VDO_TRULY)
  420. &nt35598_wqhd_dsi_vdo_truly_lcm_drv,
  421. #endif
  422. #if defined(NT35595_FHD_DSI_CMD_TRULY_TPS65132)
  423. &nt35595_fhd_dsi_cmd_truly_tps65132_lcm_drv,
  424. #endif
  425. #if defined(NT35595_FHD_DSI_VDO_TRULY_TPS65132)
  426. &nt35595_fhd_dsi_vdo_truly_tps65132_lcm_drv,
  427. #endif
  428. #if defined(NT35595_FHD_DSI_CMD_TRULY_TPS65132_720P)
  429. &nt35595_fhd_dsi_cmd_truly_tps65132_720p_lcm_drv,
  430. #endif
  431. #if defined(NT35595_FHD_DSI_CMD_TRULY)
  432. &nt35595_fhd_dsi_cmd_truly_lcm_drv,
  433. #endif
  434. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358)
  435. &nt35595_fhd_dsi_cmd_truly_nt50358_lcm_drv,
  436. #endif
  437. #if defined(NT35595_FHD_DSI_VDO_TRULY_NT50358)
  438. &nt35595_fhd_dsi_vdo_truly_nt50358_lcm_drv,
  439. #endif
  440. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_720P)
  441. &nt35595_fhd_dsi_cmd_truly_nt50358_720p_lcm_drv,
  442. #endif
  443. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_QHD)
  444. &nt35595_fhd_dsi_cmd_truly_nt50358_qhd_lcm_drv,
  445. #endif
  446. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_FWVGA)
  447. &nt35595_fhd_dsi_cmd_truly_nt50358_fwvga_lcm_drv,
  448. #endif
  449. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_WVGA)
  450. &nt35595_fhd_dsi_cmd_truly_nt50358_wvga_lcm_drv,
  451. #endif
  452. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_6735)
  453. &nt35595_fhd_dsi_cmd_truly_nt50358_6735_lcm_drv,
  454. #endif
  455. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_6735_720P)
  456. &nt35595_fhd_dsi_cmd_truly_nt50358_6735_720p_lcm_drv,
  457. #endif
  458. #if defined(NT35596_FHD_DSI_VDO_YASSY)
  459. &nt35596_fhd_dsi_vdo_yassy_lcm_drv,
  460. #endif
  461. #if defined(NT35596_HD720_DSI_VDO_TRULY_TPS65132)
  462. &nt35596_hd720_dsi_vdo_truly_tps65132_lcm_drv,
  463. #endif
  464. #if defined(AUO_B079XAT02_DSI_VDO)
  465. &auo_b079xat02_dsi_vdo_lcm_drv,
  466. #endif
  467. #if defined(OTM9608_WVGA_DSI_CMD)
  468. &otm9608_wvga_dsi_cmd_drv,
  469. #endif
  470. #if defined(OTM9608_FWVGA_DSI_CMD)
  471. &otm9608_fwvga_dsi_cmd_drv,
  472. #endif
  473. #if defined(OTM9608_QHD_DSI_CMD)
  474. &otm9608_qhd_dsi_cmd_drv,
  475. #endif
  476. #if defined(OTM9608_QHD_DSI_VDO)
  477. &otm9608_qhd_dsi_vdo_drv,
  478. #endif
  479. #if defined(OTM8009A_FWVGA_DSI_CMD_TIANMA)
  480. &otm8009a_fwvga_dsi_cmd_tianma_lcm_drv,
  481. #endif
  482. #if defined(OTM8009A_FWVGA_DSI_VDO_TIANMA)
  483. &otm8009a_fwvga_dsi_vdo_tianma_lcm_drv,
  484. #endif
  485. #if defined(HX8389B_QHD_DSI_VDO_TIANMA)
  486. &hx8389b_qhd_dsi_vdo_tianma_lcm_drv,
  487. #endif
  488. #if defined(HX8389B_QHD_DSI_VDO_TIANMA055XDHP)
  489. &hx8389b_qhd_dsi_vdo_tianma055xdhp_lcm_drv,
  490. #endif
  491. #if defined(CPT_CLAA101FP01_DSI_VDO)
  492. &cpt_claa101fp01_dsi_vdo_lcm_drv,
  493. #endif
  494. #if defined(CPT_CLAA101FP01_DSI_VDO_8163)
  495. &cpt_claa101fp01_dsi_vdo_8163_lcm_drv,
  496. #endif
  497. #if defined(IT6151_EDP_DSI_VIDEO_SHARP)
  498. &it6151_edp_dsi_video_sharp_lcm_drv,
  499. #endif
  500. #if defined(CPT_CLAP070WP03XG_SN65DSI83)
  501. &cpt_clap070wp03xg_sn65dsi83_lcm_drv,
  502. #endif
  503. #if defined(NT35520_HD720_DSI_CMD_TM)
  504. &nt35520_hd720_tm_lcm_drv,
  505. #endif
  506. #if defined(NT35520_HD720_DSI_CMD_BOE)
  507. &nt35520_hd720_boe_lcm_drv,
  508. #endif
  509. #if defined(NT35521_HD720_DSI_VDO_BOE)
  510. &nt35521_hd720_dsi_vdo_boe_lcm_drv,
  511. #endif
  512. #if defined(NT35521_HD720_DSI_VIDEO_TM)
  513. &nt35521_hd720_tm_lcm_drv,
  514. #endif
  515. #if defined(R69338_HD720_DSI_VDO_JDI_DW8755A)
  516. &r69338_hd720_dsi_vdo_jdi_dw8755a_drv,
  517. #endif
  518. #if defined(H070D_18DM)
  519. &h070d_18dm_lcm_drv,
  520. #endif
  521. #if defined(R69429_WUXGA_DSI_VDO)
  522. &r69429_wuxga_dsi_vdo_lcm_drv,
  523. #endif
  524. #if defined(HX8394D_HD720_DSI_VDO_TIANMA)
  525. &hx8394d_hd720_dsi_vdo_tianma_lcm_drv,
  526. #endif
  527. #if defined(HX8394A_HD720_DSI_VDO_TIANMA)
  528. &hx8394a_hd720_dsi_vdo_tianma_lcm_drv,
  529. #endif
  530. #if defined(R69429_WUXGA_DSI_CMD)
  531. &r69429_wuxga_dsi_cmd_lcm_drv,
  532. #endif
  533. #if defined(RM68210_HD720_DSI_UFOE_CMD)
  534. &rm68210_hd720_dsi_ufoe_cmd_lcm_drv,
  535. #endif
  536. #if defined(CPT_CLAP070WP03XG_LVDS)
  537. &cpt_clap070wp03xg_lvds_lcm_drv,
  538. #endif
  539. #if defined(OTM8018B_DSI_VDO_L72)
  540. &otm8018b_dsi_vdo_l72_lcm_drv,
  541. #endif
  542. #if defined(HX8369_DSI_CMD_6571)
  543. &hx8369_dsi_cmd_6571_lcm_drv,
  544. #endif
  545. #if defined(HX8369_DSI_VDO_6571)
  546. &hx8369_dsi_vdo_6571_lcm_drv,
  547. #endif
  548. #if defined(RX_498HX_615B_82)
  549. &RX_498HX_615B_82_lcm_drv,
  550. #endif
  551. #if defined(HX8369_DBI_6571)
  552. &hx8369_dbi_6571_lcm_drv,
  553. #endif
  554. #if defined(RX_498HX_615B)
  555. &RX_498HX_615B_lcm_drv,
  556. #endif
  557. #if defined(HX8369_DPI_6571)
  558. &hx8369_dpi_6571_lcm_drv,
  559. #endif
  560. #if defined(HX8389B_QHD_DSI_VDO_LGD)
  561. &hx8389b_qhd_dsi_vdo_lgd_lcm_drv,
  562. #endif
  563. #if defined(NT35510_DSI_CMD_6571)
  564. &nt35510_dsi_cmd_6571_lcm_drv,
  565. #endif
  566. #if defined(NT35510_DSI_CMD_6571_HVGA)
  567. &nt35510_dsi_cmd_6571_hvga_lcm_drv,
  568. #endif
  569. #if defined(NT35510_DSI_CMD_6571_QVGA)
  570. &nt35510_dsi_cmd_6571_qvga_lcm_drv,
  571. #endif
  572. #if defined(NT35510_DSI_VDO_6571)
  573. &nt35510_dsi_vdo_6571_lcm_drv,
  574. #endif
  575. #if defined(NT35510_DBI_6571)
  576. &nt35510_dbi_6571_lcm_drv,
  577. #endif
  578. #if defined(NT35510_DPI_6571)
  579. &nt35510_dpi_6571_lcm_drv,
  580. #endif
  581. #if defined(NT35590_DSI_CMD_6571_FWVGA)
  582. &nt35590_dsi_cmd_6571_fwvga_lcm_drv,
  583. #endif
  584. #if defined(NT35590_DSI_CMD_6571_QHD)
  585. &nt35590_dsi_cmd_6571_qhd_lcm_drv,
  586. #endif
  587. #if defined(NT35517_QHD_DSI_VIDEO)
  588. &nt35517_qhd_dsi_vdo_lcm_drv,
  589. #endif
  590. #if defined(IT6151_FHD_EDP_DSI_VIDEO_AUO)
  591. &it6151_fhd_edp_dsi_video_auo_lcm_drv,
  592. #endif
  593. #if defined(A080EAN01_DSI_VDO)
  594. &a080ean01_dsi_vdo_lcm_drv,
  595. #endif
  596. #if defined(IT6121_G156XW01V1_LVDS_VDO)
  597. &it6121_g156xw01v1_lvds_vdo_lcm_drv,
  598. #endif
  599. #if defined(ILI9806C_DSI_VDO_DJN_FWVGA)
  600. &ili9806c_dsi_vdo_djn_fwvga_lcm_drv,
  601. #endif
  602. #if defined(R69338_HD720_DSI_VDO_JDI)
  603. &r69338_hd720_dsi_vdo_jdi_drv,
  604. #endif
  605. #if defined(R69338_HD720_5IN_DSI_VDO_JDI_DW8768)
  606. &r69338_hd720_5in_dsi_vdo_jdi_dw8768_drv,
  607. #endif
  608. #if defined(DB7436_DSI_VDO_FWVGA)
  609. &db7436_dsi_vdo_fwvga_drv,
  610. #endif
  611. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358)
  612. &r63417_fhd_dsi_cmd_truly_nt50358_lcm_drv,
  613. #endif
  614. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358_720P)
  615. &r63417_fhd_dsi_cmd_truly_nt50358_720p_lcm_drv,
  616. #endif
  617. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358_QHD)
  618. &r63417_fhd_dsi_cmd_truly_nt50358_qhd_lcm_drv,
  619. #endif
  620. #if defined(R63417_FHD_DSI_VDO_TRULY_NT50358)
  621. &r63417_fhd_dsi_vdo_truly_nt50358_lcm_drv,
  622. #endif
  623. #if defined(R63419_WQHD_TRULY_PHANTOM_2K_CMD_OK)
  624. &r63419_wqhd_truly_phantom_cmd_lcm_drv,
  625. #endif
  626. #if defined(R63419_WQHD_TRULY_PHANTOM_2K_VDO_OK)
  627. &r63419_wqhd_truly_phantom_vdo_lcm_drv,
  628. #endif
  629. #if defined(R63419_FHD_TRULY_PHANTOM_2K_CMD_OK)
  630. &r63419_fhd_truly_phantom_lcm_drv,
  631. #endif
  632. #if defined(R63423_WQHD_TRULY_PHANTOM_2K_CMD_OK)
  633. &r63423_wqhd_truly_phantom_lcm_drv,
  634. #endif
  635. #if defined(NT35523_WXGA_DSI_VDO_BOE)
  636. &nt35523_wxga_dsi_vdo_boe_lcm_drv,
  637. #endif
  638. #if defined(NT35523_WSVGA_DSI_VDO_BOE)
  639. &nt35523_wsvga_dsi_vdo_boe_lcm_drv,
  640. #endif
  641. #if defined(EK79023_DSI_WSVGA_VDO)
  642. &ek79023_dsi_wsvga_vdo_lcm_drv,
  643. #endif
  644. #if defined(OTM9605A_QHD_DSI_VDO)
  645. &otm9605a_qhd_dsi_vdo_drv,
  646. #endif
  647. #if defined(OTM1906A_FHD_DSI_CMD_AUTO)
  648. &otm1906a_fhd_dsi_cmd_auto_lcm_drv,
  649. #endif
  650. #if defined(NT35532_FHD_DSI_VDO_SHARP)
  651. &nt35532_fhd_dsi_vdo_sharp_lcm_drv,
  652. #endif
  653. #if defined(CLAP070WP03XG_LVDS_8163)
  654. &clap070wp03xg_lvds_8163_lcm_drv,
  655. #endif
  656. #if defined(S6D7AA0_WXGA_DSI_VDO)
  657. &s6d7aa0_wxga_dsi_vdo_lcm_drv,
  658. #endif
  659. #if defined(SY20810800210132_WUXGA_DSI_VDO)
  660. &sy20810800210132_wuxga_dsi_vdo_lcm_drv,
  661. #endif
  662. #if defined(OTM1906B_FHD_DSI_CMD_JDI_TPS65132)
  663. &otm1906b_fhd_dsi_cmd_jdi_tps65132_lcm_drv,
  664. #endif
  665. #if defined(OTM1906B_FHD_DSI_CMD_JDI_TPS65132_MT6797)
  666. &otm1906b_fhd_dsi_cmd_jdi_tps65132_mt6797_lcm_drv,
  667. #endif
  668. #if defined(HX8394C_WXGA_DSI_VDO)
  669. &hx8394c_wxga_dsi_vdo_lcm_drv,
  670. #endif
  671. #if defined(IT6151_LP079QX1_EDP_DSI_VIDEO_8163EVB)
  672. &it6151_lp079qx1_edp_dsi_video_8163evb_lcm_drv,
  673. #endif
  674. #if defined(NT35510_DSI_CMD)
  675. &nt35510_dsi_cmd_lcm_drv,
  676. #endif
  677. #if defined(NT35695_FHD_DSI_CMD_TRULY_NT50358)
  678. &nt35695_fhd_dsi_cmd_truly_nt50358_lcm_drv,
  679. #endif
  680. #if defined(NT35695_FHD_DSI_VDO_TRULY_NT50358)
  681. &nt35695_fhd_dsi_vdo_truly_nt50358_lcm_drv,
  682. #endif
  683. #if defined(NT35695_FHD_DSI_CMD_TRULY_NT50358_720P)
  684. &nt35695_fhd_dsi_cmd_truly_nt50358_720p_lcm_drv,
  685. #endif
  686. #if defined(NT35695_FHD_DSI_CMD_TRULY_NT50358_QHD)
  687. &nt35695_fhd_dsi_cmd_truly_nt50358_qhd_lcm_drv,
  688. #endif
  689. #if defined(RM69032_DSI_CMD)
  690. &rm69032_dsi_cmd_lcm_drv,
  691. #endif
  692. #if defined(ST7789H2_DBI)
  693. &st7789h2_dbi_lcm_drv,
  694. #endif
  695. #if defined(CM_N070ICE_DSI_VDO_MT8173)
  696. &cm_n070ice_dsi_vdo_mt8173_lcm_drv,
  697. #endif
  698. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_EXTERN)
  699. &nt35595_fhd_dsi_cmd_truly_nt50358_extern_lcm_drv,
  700. #endif
  701. #if defined(R69429_WQXGA_DSI_VDO)
  702. &r69429_wqxga_dsi_vdo_lcm_drv,
  703. #endif
  704. #if defined(HX8394C_WXGA_DSI_VDO)
  705. &hx8394c_wxga_dsi_vdo_lcm_drv,
  706. #endif
  707. #if defined(NT35595_TRULY_FHD_DSI_VDO)
  708. &nt35595_truly_fhd_dsi_vdo_lcm_drv,
  709. #endif
  710. #if defined(B080UAN01_2_WUXGA_DSI_VDO)
  711. &b080uan01_2_wuxga_dsi_vdo_lcm_drv,
  712. #endif
  713. #endif
  714. };
  715. #if defined(MTK_LCM_DEVICE_TREE_SUPPORT)
  716. unsigned char lcm_name_list[][128] = {
  717. #if defined(HX8392A_DSI_CMD)
  718. "hx8392a_dsi_cmd",
  719. #endif
  720. #if defined(HX8392A_DSI_VDO)
  721. "hx8392a_vdo_cmd",
  722. #endif
  723. #if defined(HX8392A_DSI_CMD_FWVGA)
  724. "hx8392a_dsi_cmd_fwvga",
  725. #endif
  726. #if defined(OTM9608_QHD_DSI_CMD)
  727. "otm9608a_qhd_dsi_cmd",
  728. #endif
  729. #if defined(OTM9608_QHD_DSI_VDO)
  730. "otm9608a_qhd_dsi_vdo",
  731. #endif
  732. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358)
  733. "r63417_fhd_dsi_cmd_truly_nt50358_drv",
  734. #endif
  735. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358_QHD)
  736. "r63417_fhd_dsi_cmd_truly_nt50358_qhd_drv",
  737. #endif
  738. #if defined(R63417_FHD_DSI_VDO_TRULY_NT50358)
  739. "r63417_fhd_dsi_vdo_truly_nt50358_drv",
  740. #endif
  741. };
  742. #endif
  743. #define LCM_COMPILE_ASSERT(condition) LCM_COMPILE_ASSERT_X(condition, __LINE__)
  744. #define LCM_COMPILE_ASSERT_X(condition, line) LCM_COMPILE_ASSERT_XX(condition, line)
  745. #define LCM_COMPILE_ASSERT_XX(condition, line) char assertion_failed_at_line_##line[(condition) ? 1 : -1]
  746. unsigned int lcm_count = sizeof(lcm_driver_list) / sizeof(LCM_DRIVER *);
  747. LCM_COMPILE_ASSERT(0 != sizeof(lcm_driver_list) / sizeof(LCM_DRIVER *));
  748. #if defined(NT35520_HD720_DSI_CMD_TM) | defined(NT35520_HD720_DSI_CMD_BOE) | \
  749. defined(NT35521_HD720_DSI_VDO_BOE) | defined(NT35521_HD720_DSI_VIDEO_TM)
  750. static unsigned char lcd_id_pins_value = 0xFF;
  751. /**
  752. * Function: which_lcd_module_triple
  753. * Description: read LCD ID PIN status,could identify three status:highlowfloat
  754. * Input: none
  755. * Output: none
  756. * Return: LCD ID1|ID0 value
  757. * Others:
  758. */
  759. unsigned char which_lcd_module_triple(void)
  760. {
  761. unsigned char high_read0 = 0;
  762. unsigned char low_read0 = 0;
  763. unsigned char high_read1 = 0;
  764. unsigned char low_read1 = 0;
  765. unsigned char lcd_id0 = 0;
  766. unsigned char lcd_id1 = 0;
  767. unsigned char lcd_id = 0;
  768. /*Solve Coverity scan warning : check return value*/
  769. unsigned int ret = 0;
  770. /*only recognise once*/
  771. if (0xFF != lcd_id_pins_value)
  772. return lcd_id_pins_value;
  773. /*Solve Coverity scan warning : check return value*/
  774. ret = mt_set_gpio_mode(GPIO_DISP_ID0_PIN, GPIO_MODE_00);
  775. if (0 != ret)
  776. LCD_DEBUG("ID0 mt_set_gpio_mode fail\n");
  777. ret = mt_set_gpio_dir(GPIO_DISP_ID0_PIN, GPIO_DIR_IN);
  778. if (0 != ret)
  779. LCD_DEBUG("ID0 mt_set_gpio_dir fail\n");
  780. ret = mt_set_gpio_pull_enable(GPIO_DISP_ID0_PIN, GPIO_PULL_ENABLE);
  781. if (0 != ret)
  782. LCD_DEBUG("ID0 mt_set_gpio_pull_enable fail\n");
  783. ret = mt_set_gpio_mode(GPIO_DISP_ID1_PIN, GPIO_MODE_00);
  784. if (0 != ret)
  785. LCD_DEBUG("ID1 mt_set_gpio_mode fail\n");
  786. ret = mt_set_gpio_dir(GPIO_DISP_ID1_PIN, GPIO_DIR_IN);
  787. if (0 != ret)
  788. LCD_DEBUG("ID1 mt_set_gpio_dir fail\n");
  789. ret = mt_set_gpio_pull_enable(GPIO_DISP_ID1_PIN, GPIO_PULL_ENABLE);
  790. if (0 != ret)
  791. LCD_DEBUG("ID1 mt_set_gpio_pull_enable fail\n");
  792. /*pull down ID0 ID1 PIN*/
  793. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DOWN);
  794. if (0 != ret)
  795. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
  796. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DOWN);
  797. if (0 != ret)
  798. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
  799. /* delay 100ms , for discharging capacitance*/
  800. mdelay(100);
  801. /* get ID0 ID1 status*/
  802. low_read0 = mt_get_gpio_in(GPIO_DISP_ID0_PIN);
  803. low_read1 = mt_get_gpio_in(GPIO_DISP_ID1_PIN);
  804. /* pull up ID0 ID1 PIN */
  805. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_UP);
  806. if (0 != ret)
  807. LCD_DEBUG("ID0 mt_set_gpio_pull_select->UP fail\n");
  808. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_UP);
  809. if (0 != ret)
  810. LCD_DEBUG("ID1 mt_set_gpio_pull_select->UP fail\n");
  811. /* delay 100ms , for charging capacitance */
  812. mdelay(100);
  813. /* get ID0 ID1 status */
  814. high_read0 = mt_get_gpio_in(GPIO_DISP_ID0_PIN);
  815. high_read1 = mt_get_gpio_in(GPIO_DISP_ID1_PIN);
  816. if (low_read0 != high_read0) {
  817. /*float status , pull down ID0 ,to prevent electric leakage*/
  818. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DOWN);
  819. if (0 != ret)
  820. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
  821. lcd_id0 = LCD_HW_ID_STATUS_FLOAT;
  822. } else if ((LCD_HW_ID_STATUS_LOW == low_read0) && (LCD_HW_ID_STATUS_LOW == high_read0)) {
  823. /*low status , pull down ID0 ,to prevent electric leakage*/
  824. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DOWN);
  825. if (0 != ret)
  826. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
  827. lcd_id0 = LCD_HW_ID_STATUS_LOW;
  828. } else if ((LCD_HW_ID_STATUS_HIGH == low_read0) && (LCD_HW_ID_STATUS_HIGH == high_read0)) {
  829. /*high status , pull up ID0 ,to prevent electric leakage*/
  830. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_UP);
  831. if (0 != ret)
  832. LCD_DEBUG("ID0 mt_set_gpio_pull_select->UP fail\n");
  833. lcd_id0 = LCD_HW_ID_STATUS_HIGH;
  834. } else {
  835. LCD_DEBUG(" Read LCD_id0 error\n");
  836. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DISABLE);
  837. if (0 != ret)
  838. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Disbale fail\n");
  839. lcd_id0 = LCD_HW_ID_STATUS_ERROR;
  840. }
  841. if (low_read1 != high_read1) {
  842. /*float status , pull down ID1 ,to prevent electric leakage*/
  843. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DOWN);
  844. if (0 != ret)
  845. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
  846. lcd_id1 = LCD_HW_ID_STATUS_FLOAT;
  847. } else if ((LCD_HW_ID_STATUS_LOW == low_read1) && (LCD_HW_ID_STATUS_LOW == high_read1)) {
  848. /*low status , pull down ID1 ,to prevent electric leakage*/
  849. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DOWN);
  850. if (0 != ret)
  851. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
  852. lcd_id1 = LCD_HW_ID_STATUS_LOW;
  853. } else if ((LCD_HW_ID_STATUS_HIGH == low_read1) && (LCD_HW_ID_STATUS_HIGH == high_read1)) {
  854. /*high status , pull up ID1 ,to prevent electric leakage*/
  855. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_UP);
  856. if (0 != ret)
  857. LCD_DEBUG("ID1 mt_set_gpio_pull_select->UP fail\n");
  858. lcd_id1 = LCD_HW_ID_STATUS_HIGH;
  859. } else {
  860. LCD_DEBUG(" Read LCD_id1 error\n");
  861. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DISABLE);
  862. if (0 != ret)
  863. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Disable fail\n");
  864. lcd_id1 = LCD_HW_ID_STATUS_ERROR;
  865. }
  866. #ifdef BUILD_LK
  867. dprintf(CRITICAL, "which_lcd_module_triple,lcd_id0:%d\n", lcd_id0);
  868. dprintf(CRITICAL, "which_lcd_module_triple,lcd_id1:%d\n", lcd_id1);
  869. #else
  870. LCD_DEBUG("which_lcd_module_triple,lcd_id0:%d\n", lcd_id0);
  871. LCD_DEBUG("which_lcd_module_triple,lcd_id1:%d\n", lcd_id1);
  872. #endif
  873. lcd_id = lcd_id0 | (lcd_id1 << 2);
  874. #ifdef BUILD_LK
  875. dprintf(CRITICAL, "which_lcd_module_triple,lcd_id:%d\n", lcd_id);
  876. #else
  877. LCD_DEBUG("which_lcd_module_triple,lcd_id:%d\n", lcd_id);
  878. #endif
  879. lcd_id_pins_value = lcd_id;
  880. return lcd_id;
  881. }
  882. #endif