musb_debugfs.c 16 KB

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  1. /*
  2. * MUSB OTG driver debugfs support
  3. *
  4. * Copyright 2010 Nokia Corporation
  5. * Contact: Felipe Balbi <felipe.balbi@nokia.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  22. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  23. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  24. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  25. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  26. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  27. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  28. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  30. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. #include <linux/module.h>
  34. #include <linux/kernel.h>
  35. #include <linux/init.h>
  36. #include <linux/debugfs.h>
  37. #include <linux/seq_file.h>
  38. #include <asm/uaccess.h>
  39. #include "musb_core.h"
  40. #include "musb_debug.h"
  41. #include "mu3d_hal_phy.h"
  42. #include "mu3d_hal_usb_drv.h"
  43. #include "mu3d_hal_hw.h"
  44. #include "mu3d_hal_qmu_drv.h"
  45. struct musb_register_map {
  46. char *name;
  47. unsigned offset;
  48. unsigned size;
  49. };
  50. static const struct musb_register_map musb_regmap[] = {
  51. {"FAddr", 0x00, 8},
  52. {"Power", 0x01, 8},
  53. {"Frame", 0x0c, 16},
  54. {"Index", 0x0e, 8},
  55. {"Testmode", 0x0f, 8},
  56. {"TxMaxPp", 0x10, 16},
  57. {"TxCSRp", 0x12, 16},
  58. {"RxMaxPp", 0x14, 16},
  59. {"RxCSR", 0x16, 16},
  60. {"RxCount", 0x18, 16},
  61. {"ConfigData", 0x1f, 8},
  62. {"DevCtl", 0x60, 8},
  63. {"MISC", 0x61, 8},
  64. {"TxFIFOsz", 0x62, 8},
  65. {"RxFIFOsz", 0x63, 8},
  66. {"TxFIFOadd", 0x64, 16},
  67. {"RxFIFOadd", 0x66, 16},
  68. {"VControl", 0x68, 32},
  69. {"HWVers", 0x6C, 16},
  70. {"EPInfo", 0x78, 8},
  71. {"RAMInfo", 0x79, 8},
  72. {"LinkInfo", 0x7A, 8},
  73. {"VPLen", 0x7B, 8},
  74. {"HS_EOF1", 0x7C, 8},
  75. {"FS_EOF1", 0x7D, 8},
  76. {"LS_EOF1", 0x7E, 8},
  77. {"SOFT_RST", 0x7F, 8},
  78. {"DMA_CNTLch0", 0x204, 16},
  79. {"DMA_ADDRch0", 0x208, 32},
  80. {"DMA_COUNTch0", 0x20C, 32},
  81. {"DMA_CNTLch1", 0x214, 16},
  82. {"DMA_ADDRch1", 0x218, 32},
  83. {"DMA_COUNTch1", 0x21C, 32},
  84. {"DMA_CNTLch2", 0x224, 16},
  85. {"DMA_ADDRch2", 0x228, 32},
  86. {"DMA_COUNTch2", 0x22C, 32},
  87. {"DMA_CNTLch3", 0x234, 16},
  88. {"DMA_ADDRch3", 0x238, 32},
  89. {"DMA_COUNTch3", 0x23C, 32},
  90. {"DMA_CNTLch4", 0x244, 16},
  91. {"DMA_ADDRch4", 0x248, 32},
  92. {"DMA_COUNTch4", 0x24C, 32},
  93. {"DMA_CNTLch5", 0x254, 16},
  94. {"DMA_ADDRch5", 0x258, 32},
  95. {"DMA_COUNTch5", 0x25C, 32},
  96. {"DMA_CNTLch6", 0x264, 16},
  97. {"DMA_ADDRch6", 0x268, 32},
  98. {"DMA_COUNTch6", 0x26C, 32},
  99. {"DMA_CNTLch7", 0x274, 16},
  100. {"DMA_ADDRch7", 0x278, 32},
  101. {"DMA_COUNTch7", 0x27C, 32},
  102. {} /* Terminating Entry */
  103. };
  104. static int musb_regdump_show(struct seq_file *s, void *unused)
  105. {
  106. struct musb *musb = s->private;
  107. unsigned i;
  108. seq_puts(s, "MUSB (M)HDRC Register Dump\n");
  109. for (i = 0; i < ARRAY_SIZE(musb_regmap); i++) {
  110. switch (musb_regmap[i].size) {
  111. case 8:
  112. seq_printf(s, "%-12s: %02x\n", musb_regmap[i].name,
  113. musb_readb(musb->mregs, musb_regmap[i].offset));
  114. break;
  115. case 16:
  116. seq_printf(s, "%-12s: %04x\n", musb_regmap[i].name,
  117. musb_readw(musb->mregs, musb_regmap[i].offset));
  118. break;
  119. case 32:
  120. seq_printf(s, "%-12s: %08x\n", musb_regmap[i].name,
  121. musb_readl(musb->mregs, musb_regmap[i].offset));
  122. break;
  123. }
  124. }
  125. return 0;
  126. }
  127. static int musb_regdump_open(struct inode *inode, struct file *file)
  128. {
  129. return single_open(file, musb_regdump_show, inode->i_private);
  130. }
  131. static const struct file_operations musb_regdump_fops = {
  132. .open = musb_regdump_open,
  133. .read = seq_read,
  134. .llseek = seq_lseek,
  135. .release = single_release,
  136. };
  137. static int musb_test_mode_show(struct seq_file *s, void *unused)
  138. {
  139. struct musb *musb = s->private;
  140. unsigned test;
  141. test = musb_readb(musb->mregs, MUSB_TESTMODE);
  142. if (test & FORCE_HOST)
  143. seq_puts(s, "force host\n");
  144. if (test & FIFO_ACCESS)
  145. seq_puts(s, "fifo access\n");
  146. if (test & FORCE_FS)
  147. seq_puts(s, "force full-speed\n");
  148. if (test & FORCE_HS)
  149. seq_puts(s, "force high-speed\n");
  150. if (test & TEST_PACKET_MODE)
  151. seq_puts(s, "test packet\n");
  152. if (test & TEST_K_MODE)
  153. seq_puts(s, "test K\n");
  154. if (test & TEST_J_MODE)
  155. seq_puts(s, "test J\n");
  156. if (test & TEST_SE0_NAK_MODE)
  157. seq_puts(s, "test SE0 NAK\n");
  158. return 0;
  159. }
  160. static int musb_test_mode_open(struct inode *inode, struct file *file)
  161. {
  162. return single_open(file, musb_test_mode_show, inode->i_private);
  163. }
  164. static ssize_t musb_test_mode_write(struct file *file,
  165. const char __user *ubuf, size_t count, loff_t *ppos)
  166. {
  167. struct seq_file *s = file->private_data;
  168. struct musb *musb = s->private;
  169. u8 test = 0;
  170. char buf[18];
  171. memset(buf, 0x00, sizeof(buf));
  172. if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
  173. return -EFAULT;
  174. if (!strncmp(buf, "force host", 9))
  175. test = FORCE_HOST;
  176. if (!strncmp(buf, "fifo access", 11))
  177. test = FIFO_ACCESS;
  178. if (!strncmp(buf, "force full-speed", 15))
  179. test = FORCE_FS;
  180. if (!strncmp(buf, "force high-speed", 15))
  181. test = FORCE_HS;
  182. if (!strncmp(buf, "test packet", 10)) {
  183. test = TEST_PACKET_MODE;
  184. musb_load_testpacket(musb);
  185. }
  186. if (!strncmp(buf, "test K", 6))
  187. test = TEST_K_MODE;
  188. if (!strncmp(buf, "test J", 6))
  189. test = TEST_J_MODE;
  190. if (!strncmp(buf, "test SE0 NAK", 12))
  191. test = TEST_SE0_NAK_MODE;
  192. musb_writeb(musb->mregs, MUSB_TESTMODE, test);
  193. return count;
  194. }
  195. static const struct file_operations musb_test_mode_fops = {
  196. .open = musb_test_mode_open,
  197. .write = musb_test_mode_write,
  198. .read = seq_read,
  199. .llseek = seq_lseek,
  200. .release = single_release,
  201. };
  202. #ifdef USE_SSUSB_QMU
  203. static int musb_usb_reg_show(struct seq_file *s, void *unused)
  204. {
  205. int i;
  206. for (i = 1; i < 9; ++i) {
  207. unsigned int *addr = 0;
  208. uintptr_t tmp;
  209. seq_printf(s, "EP[%d] CSR0=%08x, CSR1=%08x, CSR2=%08x\n", i,
  210. (unsigned int)USB_ReadCsr32(U3D_TX1CSR0, i),
  211. (unsigned int)USB_ReadCsr32(U3D_TX1CSR1, i),
  212. (unsigned int)USB_ReadCsr32(U3D_TX1CSR2, i));
  213. seq_printf(s, "TxQ CPR=%08x, CSR=%08x\n",
  214. (unsigned int)os_readl(USB_QMU_TQCPR(i)),
  215. (unsigned int)os_readl(USB_QMU_TQCSR(i)));
  216. tmp = (uintptr_t) os_readl(USB_QMU_TQCPR(i)); /* QMU GPD address --> CPU DMA address */
  217. if (tmp != 0) {
  218. /* addr = (unsigned int *)phys_to_virt(tmp); */
  219. addr = (unsigned int *)gpd_phys_to_virt((void *)tmp, USB_TX, i);
  220. /*seq_printf(s, "GPD[%08x] %08x, %08x, %08x, %08x\n",
  221. addr, (*(unsigned int*)addr),
  222. (*(unsigned int*)(addr+1)),
  223. (*(unsigned int*)(addr+2)),
  224. (*(unsigned int*)(addr+3))); */
  225. seq_printf(s, "GPD[%p] HWO=%d, BPD=%d, Next_GPD=%lx, DataBuffer=%lx, BufferLen=%d\n",
  226. addr, (u32) TGPD_GET_FLAG(addr),
  227. (u32) TGPD_GET_FORMAT(addr), (uintptr_t) TGPD_GET_NEXT(addr),
  228. (uintptr_t) TGPD_GET_DATA(addr), (u32) TGPD_GET_BUF_LEN(addr));
  229. }
  230. seq_printf(s, "EP[%d] CSR0=%08x, CSR1=%08x, CSR2=%08x, CSR3=%08x\n", i,
  231. (unsigned int)USB_ReadCsr32(U3D_RX1CSR0, i),
  232. (unsigned int)USB_ReadCsr32(U3D_RX1CSR1, i),
  233. (unsigned int)USB_ReadCsr32(U3D_RX1CSR2, i),
  234. (unsigned int)USB_ReadCsr32(U3D_RX1CSR3, i));
  235. seq_printf(s, "RxQ CPR=%08x, CSR=%08x, LDPR=%08x\n",
  236. (unsigned int)os_readl(USB_QMU_RQCPR(i)),
  237. (unsigned int)os_readl(USB_QMU_RQCSR(i)),
  238. (unsigned int)os_readl(USB_QMU_RQLDPR(i)));
  239. tmp = (uintptr_t) os_readl(USB_QMU_RQCPR(i));
  240. if (tmp != 0) {
  241. /* addr = (unsigned int *)phys_to_virt(tmp); */
  242. addr = (unsigned int *)gpd_phys_to_virt((void *)tmp, USB_RX, i);
  243. /*seq_printf(s, "GPD[%08x] %08x, %08x, %08x, %08x\n",
  244. addr, (*(unsigned int*)addr),
  245. (*(unsigned int*)(addr+1)),
  246. (*(unsigned int*)(addr+2)),
  247. (*(unsigned int*)(addr+3))); */
  248. seq_printf(s, "GPD[%p] HWO=%d, Next_GPD=%lx ,DataBufLen=%d, DataBuf=%lx, RecvLen=%d, Endpoint=%d\n",
  249. addr, (u32) TGPD_GET_FLAG(addr), (uintptr_t) TGPD_GET_NEXT(addr),
  250. (u32) TGPD_GET_DataBUF_LEN(addr),
  251. (uintptr_t) TGPD_GET_DATA(addr), (u32) TGPD_GET_BUF_LEN(addr),
  252. (u32) TGPD_GET_EPaddr(addr));
  253. }
  254. seq_puts(s, "---------------\n\n");
  255. }
  256. return 0;
  257. }
  258. static int musb_usb_reg_open(struct inode *inode, struct file *file)
  259. {
  260. return single_open(file, musb_usb_reg_show, inode->i_private);
  261. }
  262. static ssize_t musb_usb_reg_write(struct file *file,
  263. const char __user *ubuf, size_t count, loff_t *ppos)
  264. {
  265. char buf[18];
  266. char dir;
  267. int ep;
  268. memset(buf, 0x00, sizeof(buf));
  269. if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
  270. return -EFAULT;
  271. if (sscanf(buf, "resume %c %d", &dir, &ep) == 2) {
  272. pr_debug("%s %c %d\n", __func__, dir, ep);
  273. if (dir == 'R' || dir == 'r') {
  274. pr_debug("%s resume EP[%d]-R\n", __func__, ep);
  275. os_writel(USB_QMU_RQCSR(ep), QMU_Q_RESUME);
  276. /* mu3d_hal_resume_qmu(ep, USB_RX); */
  277. } else {
  278. pr_debug("%s resume EP[%d]-T\n", __func__, ep);
  279. os_writel(USB_QMU_TQCSR(ep), QMU_Q_RESUME);
  280. /* mu3d_hal_resume_qmu(ep, USB_TX); */
  281. }
  282. }
  283. return count;
  284. }
  285. static const struct file_operations musb_usb_reg_fops = {
  286. .open = musb_usb_reg_open,
  287. .write = musb_usb_reg_write,
  288. .read = seq_read,
  289. .llseek = seq_lseek,
  290. .release = single_release,
  291. };
  292. #endif
  293. #ifdef CONFIG_MTK_FPGA
  294. static int musb_scan_phase_show(struct seq_file *s, void *unused)
  295. {
  296. seq_puts(s, "#echo scan l=[0|1] d=[0~3] > scan_phase\n");
  297. seq_puts(s, "#echo linkup[0|1] > scan_phase\n");
  298. return 0;
  299. }
  300. static int musb_scan_phase(struct seq_file *s, int latch, int driving)
  301. {
  302. struct musb *musb = s->private;
  303. disable_irq(musb->nIrq);
  304. os_printk(K_INFO, "Init PHY\n");
  305. u3phy_ops->init(u3phy);
  306. os_printk(K_INFO, "Plug in the USB cable 3\n");
  307. mdelay(1000);
  308. os_printk(K_INFO, "Plug in the USB cable 2\n");
  309. mdelay(1000);
  310. os_printk(K_INFO, "Plug in the USB cable 1\n");
  311. mdelay(1000);
  312. os_printk(K_INFO, "PHY SCAN latch=%d, drivind=%d\n", latch, driving);
  313. mu3d_hal_phy_scan(latch, driving);
  314. seq_puts(s, "Finish--\n");
  315. return 0;
  316. }
  317. static int musb_scan_phase_open(struct inode *inode, struct file *file)
  318. {
  319. return single_open(file, musb_scan_phase_show, inode->i_private);
  320. }
  321. static ssize_t musb_scan_phase_write(struct file *file,
  322. const char __user *ubuf, size_t count, loff_t *ppos)
  323. {
  324. struct seq_file *s = file->private_data;
  325. char buf[18];
  326. memset(buf, 0x00, sizeof(buf));
  327. if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
  328. return -EFAULT;
  329. if (!strncmp(buf, "linkup1", 7)) {
  330. int status = RET_SUCCESS;
  331. int cnt = 10;
  332. mu3d_hal_link_up(1);
  333. mdelay(500);
  334. do {
  335. if ((os_readl(U3D_LINK_STATE_MACHINE) & LTSSM) != STATE_U0_STATE) {
  336. status = RET_FAIL;
  337. break;
  338. }
  339. mdelay(50);
  340. } while (cnt--);
  341. if (status != RET_SUCCESS)
  342. pr_debug("&&&&&& LINK UP FAIL !!&&&&&&\n");
  343. else
  344. pr_debug("&&&&&& LINK UP PASS !!&&&&&&\n");
  345. }
  346. if (!strncmp(buf, "linkup0", 7)) {
  347. int status = RET_SUCCESS;
  348. int cnt = 10;
  349. mu3d_hal_link_up(0);
  350. mdelay(500);
  351. do {
  352. if ((os_readl(U3D_LINK_STATE_MACHINE) & LTSSM) != STATE_U0_STATE) {
  353. status = RET_FAIL;
  354. break;
  355. }
  356. mdelay(50);
  357. } while (cnt--);
  358. if (status != RET_SUCCESS)
  359. os_printk(K_INFO, "&&&&&& LINK UP FAIL !!&&&&&&\n");
  360. else
  361. os_printk(K_INFO, "&&&&&& LINK UP PASS !!&&&&&&\n");
  362. }
  363. if (strncmp(buf, "scan", 4) == 0) {
  364. unsigned latch, driving;
  365. if (sscanf(buf, "scan l=%u d=%u", &latch, &driving) == 2) {
  366. os_printk(K_INFO, "%s latch=%d, driving=%d\n", __func__, latch, driving);
  367. musb_scan_phase(s, latch, driving);
  368. } else {
  369. os_printk(K_INFO, "%s Can not match\n", __func__);
  370. }
  371. }
  372. return count;
  373. }
  374. static const struct file_operations musb_scan_phase_fops = {
  375. .open = musb_scan_phase_open,
  376. .write = musb_scan_phase_write,
  377. .read = seq_read,
  378. .llseek = seq_lseek,
  379. .release = single_release,
  380. };
  381. static int musb_phy_reg_show(struct seq_file *s, void *unused)
  382. {
  383. seq_printf(s,
  384. "#echo w/w8/w32 [ADDR] [VAL] > phy_reg (ex: #echo w 0x2000e4 0x1 > phy_reg)\n");
  385. seq_puts(s, "#echo r/r8/r32 [ADDR] > phy_reg (ex: #echo r32 0x2000e4 > phy_reg)\n");
  386. return 0;
  387. }
  388. static int musb_phy_reg_open(struct inode *inode, struct file *file)
  389. {
  390. return single_open(file, musb_phy_reg_show, inode->i_private);
  391. }
  392. static ssize_t musb_phy_rege_write(struct file *file,
  393. const char __user *ubuf, size_t count, loff_t *ppos)
  394. {
  395. /* warning: unused variable 's' [-Wunused-variable] */
  396. /* struct seq_file *s = file->private_data; */
  397. char buf[18];
  398. memset(buf, 0x00, sizeof(buf));
  399. if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
  400. return -EFAULT;
  401. #ifdef CONFIG_U3_PHY_GPIO_SUPPORT
  402. if (!strncmp(buf, "w", 1)) {
  403. unsigned int address = 0;
  404. unsigned int value = 0;
  405. if (sscanf(buf, "w32 0x%x 0x%x", &address, &value) == 2) {
  406. value = value & 0xff;
  407. os_printk(K_INFO, "%s write32 address=0x%x, value=0x%x\n", __func__,
  408. address, value);
  409. U3PhyWriteReg32(address, value);
  410. mdelay(10);
  411. value = U3PhyReadReg32(address);
  412. os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
  413. } else if (sscanf(buf, "w8 0x%x 0x%x", &address, &value) == 2) {
  414. value = value & 0xff;
  415. os_printk(K_INFO, "%s write8 address=0x%x, value=0x%x\n", __func__, address,
  416. value);
  417. U3PhyWriteReg8(address, value);
  418. mdelay(10);
  419. value = U3PhyReadReg8(address);
  420. os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
  421. } else if (sscanf(buf, "w 0x%x 0x%x", &address, &value) == 2) {
  422. value = value & 0xff;
  423. pr_debug("%s write address=0x%x, value=0x%x\n", __func__, address, value);
  424. _U3Write_Reg(address, value);
  425. mdelay(10);
  426. value = _U3Read_Reg(address);
  427. os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
  428. } else {
  429. os_printk(K_INFO, "%s Can not match\n", __func__);
  430. }
  431. }
  432. if (!strncmp(buf, "r", 1)) {
  433. unsigned int address = 0;
  434. unsigned int value = 0;
  435. if (sscanf(buf, "r32 0x%x", &address) == 1) {
  436. os_printk(K_INFO, "%s read32 address=0x%x\n", __func__, address);
  437. value = U3PhyReadReg32(address);
  438. os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
  439. } else if (sscanf(buf, "r8 0x%x", &address) == 1) {
  440. os_printk(K_INFO, "%s read8 address=0x%x\n", __func__, address);
  441. value = U3PhyReadReg8(address);
  442. os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
  443. } else if (sscanf(buf, "r 0x%x", &address) == 1) {
  444. os_printk(K_INFO, "%s read address=0x%x\n", __func__, address);
  445. value = _U3Read_Reg(address);
  446. os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
  447. } else {
  448. os_printk(K_INFO, "%s Can not match\n", __func__);
  449. }
  450. }
  451. #endif
  452. return count;
  453. }
  454. static const struct file_operations musb_phy_reg_fops = {
  455. .open = musb_phy_reg_open,
  456. .write = musb_phy_rege_write,
  457. .read = seq_read,
  458. .llseek = seq_lseek,
  459. .release = single_release,
  460. };
  461. #endif
  462. int musb_init_debugfs(struct musb *musb)
  463. {
  464. struct dentry *root;
  465. struct dentry *file;
  466. int ret;
  467. root = debugfs_create_dir(dev_name(musb->controller), NULL);
  468. if (!root) {
  469. ret = -ENOMEM;
  470. goto err0;
  471. }
  472. file = debugfs_create_file("regdump", S_IRUGO, root, musb, &musb_regdump_fops);
  473. if (!file) {
  474. ret = -ENOMEM;
  475. goto err1;
  476. }
  477. file = debugfs_create_file("testmode", S_IRUGO | S_IWUSR, root, musb, &musb_test_mode_fops);
  478. if (!file) {
  479. ret = -ENOMEM;
  480. goto err1;
  481. }
  482. #ifdef USE_SSUSB_QMU
  483. file = debugfs_create_file("usb_reg", S_IRUGO | S_IWUSR, root, musb, &musb_usb_reg_fops);
  484. if (!file) {
  485. ret = -ENOMEM;
  486. goto err1;
  487. }
  488. #endif
  489. #ifdef CONFIG_MTK_FPGA
  490. file = debugfs_create_file("scan_phase", S_IRUGO | S_IWUSR,
  491. root, musb, &musb_scan_phase_fops);
  492. if (!file) {
  493. ret = -ENOMEM;
  494. goto err1;
  495. }
  496. file = debugfs_create_file("phy_reg", S_IRUGO | S_IWUSR, root, musb, &musb_phy_reg_fops);
  497. if (!file) {
  498. ret = -ENOMEM;
  499. goto err1;
  500. }
  501. #endif
  502. musb->debugfs_root = root;
  503. return 0;
  504. err1:
  505. debugfs_remove_recursive(root);
  506. err0:
  507. return ret;
  508. }
  509. void /* __init_or_exit */ musb_exit_debugfs(struct musb *musb)
  510. {
  511. debugfs_remove_recursive(musb->debugfs_root);
  512. }