smc_id.h 1.1 KB

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  1. #ifndef __TEEI_SMC_ID_H__
  2. #define __TEEI_SMC_ID_H__
  3. /* SMC Identifiers for non-secure world functions */
  4. #define CALL_TRUSTZONE_API 0x1
  5. #if defined(CONFIG_S5PV310_BOARD) || defined(CONFIG_MVV4412_BOARD)
  6. /* Based arch/arm/mach-exynos/include/mach/smc.h */
  7. #define SMC_CMD_INIT (-1)
  8. #define SMC_CMD_INFO (-2)
  9. /* For Power Management */
  10. #define SMC_CMD_SLEEP (-3)
  11. #define SMC_CMD_CPU1BOOT (-4)
  12. #define SMC_CMD_CPU0AFTR (-5)
  13. /* For CP15 Access */
  14. #define SMC_CMD_C15RESUME (-11)
  15. /* For L2 Cache Access */
  16. #define SMC_CMD_L2X0CTRL (-21)
  17. #define SMC_CMD_L2X0SETUP1 (-22)
  18. #define SMC_CMD_L2X0SETUP2 (-23)
  19. #define SMC_CMD_L2X0INVALL (-24)
  20. #define SMC_CMD_L2X0DEBUG (-25)
  21. #define SMC_CMD_L2X0FLUSHALL (-26)
  22. #define SMC_CMD_L2X0CLEANALL (-27)
  23. #define SMC_CMD_L2X0FLUSHRANGE (-28)
  24. /* For Framebuffer */
  25. #define SMC_CMD_INIT_SECURE_WINDOW (-29)
  26. #define SMC_CP15_REG (-102)
  27. #define SMC_CP15_AUX_CTRL 0x1
  28. #define SMC_CP15_L2_PREFETCH 0x2
  29. #define SMC_CACHE_CTRL 0x3
  30. #endif
  31. #ifdef CONFIG_ZYNQ7_BOARD
  32. #define SMC_CMD_CPU1BOOT (-4)
  33. #define SMC_CMD_SECURE_READ (-30)
  34. #define SMC_CMD_SECURE_WRITE (-31)
  35. #endif
  36. #endif /* __TEEI_SMC_ID__ */