uart.c 85 KB

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  1. /* mediatek/kernel/drivers/uart/uart.c
  2. *
  3. * (C) Copyright 2008
  4. * MediaTek <www.mediatek.com>
  5. * MingHsien Hsieh <minghsien.hsieh@mediatek.com>
  6. *
  7. * MTK UART Driver
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. */
  19. /******************************************************************************
  20. * Dependency
  21. ******************************************************************************/
  22. #if defined(CONFIG_MTK_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  23. #define SUPPORT_SYSRQ /*used in serial_core.h */
  24. #endif
  25. /*---------------------------------------------------------------------------*/
  26. #include <generated/autoconf.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/module.h>
  29. #include <linux/ioport.h>
  30. #include <linux/init.h>
  31. #include <linux/console.h>
  32. #include <linux/sysrq.h>
  33. #include <linux/device.h>
  34. #include <linux/tty.h>
  35. #include <linux/tty_flip.h>
  36. #include <linux/serial_core.h>
  37. #include <linux/serial.h>
  38. #include <linux/timer.h>
  39. #include <linux/dma-mapping.h>
  40. #include <linux/scatterlist.h>
  41. #include <linux/platform_device.h>
  42. #include <linux/hrtimer.h>
  43. #include <linux/uaccess.h>
  44. #include <asm/atomic.h>
  45. #include <asm/io.h>
  46. #include <asm/irq.h>
  47. #include <linux/irq.h>
  48. #include <asm/scatterlist.h>
  49. #include <mt-plat/dma.h>
  50. /* #include <mach/mt_clkmgr.h> */
  51. #include <linux/slab.h>
  52. #include <linux/delay.h>
  53. #include <linux/syscore_ops.h>
  54. #include "include/mtk_uart.h"
  55. #include "include/mtk_uart_intf.h"
  56. #include <linux/version.h>
  57. #include <linux/suspend.h>
  58. #ifdef CONFIG_OF
  59. #include <linux/of.h>
  60. #endif
  61. #include "include/mtk_uart_internal.h"
  62. #define TTY_FLIP_ARG(a) ((a)->port)
  63. spinlock_t mtk_console_lock;
  64. spinlock_t mtk_uart_bt_lock;
  65. struct mtk_uart *console_port;
  66. struct mtk_uart *bt_port = NULL;
  67. /*---------------------------------------------------------------------------*/
  68. #define HW_FLOW_CTRL_PORT(uart) (uart->setting->hw_flow)
  69. /*---------------------------------------------------------------------------*/
  70. #if defined(ENABLE_VFIFO)
  71. /*---------------------------------------------------------------------------*/
  72. static DEFINE_SPINLOCK(mtk_uart_vfifo_port_lock);
  73. /*---------------------------------------------------------------------------*/
  74. #ifdef CONFIG_OF
  75. /*---------------------------------------------------------------------------*/
  76. #define VFIFO_INIT_RX(c, i, n) \
  77. {.ch = (c), .size = (n), .trig = VFF_RX_THRE(n), .type = UART_RX_VFIFO, \
  78. .port = NULL, .addr = NULL, \
  79. .entry = ATOMIC_INIT(0), .reg_cb = ATOMIC_INIT(0), \
  80. .iolock = __SPIN_LOCK_UNLOCKED(mtk_uart_vfifo_port[i].lock)}
  81. /*---------------------------------------------------------------------------*/
  82. #define VFIFO_INIT_TX(c, i, n) \
  83. {.ch = (c), .size = (n), .trig = VFF_TX_THRE(n), .type = UART_TX_VFIFO, \
  84. .port = NULL, \
  85. .addr = NULL, .entry = ATOMIC_INIT(0), .reg_cb = ATOMIC_INIT(0), \
  86. .iolock = __SPIN_LOCK_UNLOCKED(mtk_uart_vfifo_port[i].lock)}
  87. /*---------------------------------------------------------------------------*/
  88. static struct mtk_uart_vfifo mtk_uart_vfifo_port[] = {
  89. VFIFO_INIT_TX(P_DMA_UART1_TX, 0, C_UART1_VFF_TX_SIZE),
  90. VFIFO_INIT_RX(P_DMA_UART1_RX, 1, C_UART1_VFF_RX_SIZE),
  91. VFIFO_INIT_TX(P_DMA_UART2_TX, 2, C_UART2_VFF_TX_SIZE),
  92. VFIFO_INIT_RX(P_DMA_UART2_RX, 3, C_UART2_VFF_RX_SIZE),
  93. VFIFO_INIT_TX(P_DMA_UART3_TX, 4, C_UART3_VFF_TX_SIZE),
  94. VFIFO_INIT_RX(P_DMA_UART3_RX, 5, C_UART3_VFF_RX_SIZE),
  95. #if 0 /*MT6589 only 6 DMA channel for UART */
  96. VFIFO_INIT_TX(P_DMA_UART4_TX, 6, C_UART4_VFF_TX_SIZE),
  97. VFIFO_INIT_RX(P_DMA_UART4_RX, 7, C_UART4_VFF_RX_SIZE),
  98. #endif
  99. };
  100. /*---------------------------------------------------------------------------*/
  101. #else
  102. /*---------------------------------------------------------------------------*/
  103. #define VFIFO_INIT_RX(c, i, n, id) \
  104. {.ch = (c), .size = (n), .trig = VFF_RX_THRE(n), .type = UART_RX_VFIFO, \
  105. .base = (void *)VFF_BASE_CH(i), .port = NULL, .addr = NULL, \
  106. .entry = ATOMIC_INIT(0), .reg_cb = ATOMIC_INIT(0), \
  107. .iolock = __SPIN_LOCK_UNLOCKED(mtk_uart_vfifo_port[i].lock), \
  108. .irq_id = id}
  109. /*---------------------------------------------------------------------------*/
  110. #define VFIFO_INIT_TX(c, i, n, id) \
  111. {.ch = (c), .size = (n), .trig = VFF_TX_THRE(n), .type = UART_TX_VFIFO, \
  112. .base = (void *)VFF_BASE_CH(i), .port = NULL, \
  113. .addr = NULL, .entry = ATOMIC_INIT(0), .reg_cb = ATOMIC_INIT(0), \
  114. .iolock = __SPIN_LOCK_UNLOCKED(mtk_uart_vfifo_port[i].lock), \
  115. .irq_id = id}
  116. /*---------------------------------------------------------------------------*/
  117. static struct mtk_uart_vfifo mtk_uart_vfifo_port[] = {
  118. VFIFO_INIT_TX(P_DMA_UART1_TX, 0, C_UART1_VFF_TX_SIZE, UART1_VFF_TX_IRQ_ID),
  119. VFIFO_INIT_RX(P_DMA_UART1_RX, 1, C_UART1_VFF_RX_SIZE, UART1_VFF_RX_IRQ_ID),
  120. VFIFO_INIT_TX(P_DMA_UART2_TX, 2, C_UART2_VFF_TX_SIZE, UART2_VFF_TX_IRQ_ID),
  121. VFIFO_INIT_RX(P_DMA_UART2_RX, 3, C_UART2_VFF_RX_SIZE, UART2_VFF_RX_IRQ_ID),
  122. VFIFO_INIT_TX(P_DMA_UART3_TX, 4, C_UART3_VFF_TX_SIZE, UART3_VFF_TX_IRQ_ID),
  123. VFIFO_INIT_RX(P_DMA_UART3_RX, 5, C_UART3_VFF_RX_SIZE, UART3_VFF_RX_IRQ_ID),
  124. #if 0 /*MT6589 only 6 DMA channel for UART */
  125. VFIFO_INIT_TX(P_DMA_UART4_TX, 6, C_UART4_VFF_TX_SIZE),
  126. VFIFO_INIT_RX(P_DMA_UART4_RX, 7, C_UART4_VFF_RX_SIZE),
  127. #endif
  128. };
  129. /*---------------------------------------------------------------------------*/
  130. #endif /*CONFIG_OF */
  131. /*---------------------------------------------------------------------------*/
  132. #endif /*ENABLE_VFIFO */
  133. /*---------------------------------------------------------------------------*/
  134. /* uart control blocks */
  135. static struct mtk_uart mtk_uarts[UART_NR];
  136. static unsigned int uart_freeze_enable[UART_NR] = { 0 };
  137. struct uart_history_data {
  138. int index;
  139. int offset;
  140. u64 last_update;
  141. unsigned char *buffer;
  142. };
  143. #define UART_HISTORY_DATA_SIZE 4096
  144. static struct uart_history_data tx_history;
  145. static struct uart_history_data rx_history;
  146. /*---------------------------------------------------------------------------*/
  147. static int mtk_uart_init_ports(void);
  148. static void mtk_uart_stop_tx(struct uart_port *port);
  149. /******************************************************************************
  150. * SYSFS support
  151. ******************************************************************************/
  152. #if defined(ENABLE_SYSFS)
  153. /*---------------------------------------------------------------------------*/
  154. const struct sysfs_ops mtk_uart_sysfs_ops = {
  155. .show = mtk_uart_attr_show,
  156. .store = mtk_uart_attr_store,
  157. };
  158. /*---------------------------------------------------------------------------*/
  159. struct mtuart_entry {
  160. struct attribute attr;
  161. ssize_t (*show)(struct kobject *kobj, char *page);
  162. ssize_t (*store)(struct kobject *kobj, const char *page, size_t size);
  163. };
  164. /*---------------------------------------------------------------------------*/
  165. struct mtuart_entry debug_entry = {
  166. {.name = "debug", .mode = S_IRUGO | S_IWUSR},
  167. mtk_uart_debug_show,
  168. mtk_uart_debug_store,
  169. };
  170. /*---------------------------------------------------------------------------*/
  171. struct mtuart_entry sysrq_entry = {
  172. {.name = "sysrq", .mode = S_IRUGO | S_IWUSR},
  173. mtk_uart_sysrq_show,
  174. mtk_uart_sysrq_store,
  175. };
  176. /*---------------------------------------------------------------------------*/
  177. struct mtuart_entry vffsz_entry = {
  178. {.name = "vffsz", .mode = S_IRUGO | S_IWUSR},
  179. mtk_uart_vffsz_show,
  180. mtk_uart_vffsz_store,
  181. };
  182. /*---------------------------------------------------------------------------*/
  183. struct mtuart_entry conse_entry = {
  184. {.name = "conse", .mode = S_IRUGO | S_IWUSR},
  185. mtk_uart_conse_show,
  186. mtk_uart_conse_store,
  187. };
  188. /*---------------------------------------------------------------------------*/
  189. struct mtuart_entry vff_en_entry = {
  190. {.name = "vff_en", .mode = S_IRUGO | S_IWUSR},
  191. mtk_uart_vff_en_show,
  192. mtk_uart_vff_en_store,
  193. };
  194. /*---------------------------------------------------------------------------*/
  195. struct mtuart_entry lsr_status_entry = {
  196. {.name = "lsr_status", .mode = S_IRUGO | S_IWUSR},
  197. mtk_uart_lsr_status_show,
  198. mtk_uart_lsr_status_store,
  199. };
  200. /*---------------------------------------------------------------------------*/
  201. struct mtuart_entry history_entry = {
  202. {.name = "history", .mode = S_IRUGO | S_IWUSR},
  203. mtk_uart_history_show,
  204. mtk_uart_history_store,
  205. };
  206. /*---------------------------------------------------------------------------*/
  207. struct attribute *mtk_uart_attributes[] = {
  208. &conse_entry.attr, /*console setting */
  209. #if defined(ENABLE_DEBUG)
  210. &debug_entry.attr,
  211. &sysrq_entry.attr,
  212. &vffsz_entry.attr,
  213. &vff_en_entry.attr,
  214. &lsr_status_entry.attr,
  215. &history_entry.attr,
  216. #endif
  217. NULL,
  218. };
  219. /*---------------------------------------------------------------------------*/
  220. struct kobj_type mtk_uart_ktype = {
  221. .sysfs_ops = &mtk_uart_sysfs_ops,
  222. .default_attrs = mtk_uart_attributes,
  223. };
  224. /*---------------------------------------------------------------------------*/
  225. struct mtuart_sysobj {
  226. struct kobject kobj;
  227. atomic_t sysrq;
  228. atomic_t vffLen[UART_NR * UART_VFIFO_NUM];
  229. atomic_t console_enable;
  230. } mtk_uart_sysobj = {
  231. .console_enable = ATOMIC_INIT(1),};
  232. /*---------------------------------------------------------------------------*/
  233. int mtk_uart_sysfs(void)
  234. {
  235. struct mtuart_sysobj *obj = &mtk_uart_sysobj;
  236. #if defined(ENABLE_VFIFO)
  237. int idx;
  238. #endif
  239. memset(&obj->kobj, 0x00, sizeof(obj->kobj));
  240. #if defined(CONFIG_MAGIC_SYSRQ)
  241. atomic_set(&obj->sysrq, 1);
  242. #else
  243. atomic_set(&obj->sysrq, 0);
  244. #endif
  245. #if defined(ENABLE_VFIFO)
  246. for (idx = 0; idx < ARRAY_SIZE(obj->vffLen) && idx < ARRAY_SIZE(mtk_uart_vfifo_port); idx++)
  247. atomic_set(&obj->vffLen[idx], mtk_uart_vfifo_port[idx].size);
  248. #endif
  249. atomic_set(&obj->console_enable, 1);
  250. obj->kobj.parent = kernel_kobj;
  251. if (kobject_init_and_add(&obj->kobj, &mtk_uart_ktype, NULL, "mtuart")) {
  252. kobject_put(&obj->kobj);
  253. return -ENOMEM;
  254. }
  255. kobject_uevent(&obj->kobj, KOBJ_ADD);
  256. return 0;
  257. }
  258. /*---------------------------------------------------------------------------*/
  259. ssize_t mtk_uart_attr_show(struct kobject *kobj, struct attribute *attr, char *buffer)
  260. {
  261. struct mtuart_entry *entry = container_of(attr, struct mtuart_entry, attr);
  262. return entry->show(kobj, buffer);
  263. }
  264. /*---------------------------------------------------------------------------*/
  265. ssize_t mtk_uart_attr_store(struct kobject *kobj, struct attribute *attr, const char *buffer, size_t size)
  266. {
  267. struct mtuart_entry *entry = container_of(attr, struct mtuart_entry, attr);
  268. return entry->store(kobj, buffer, size);
  269. }
  270. /*---------------------------------------------------------------------------*/
  271. ssize_t mtk_uart_debug_show(struct kobject *kobj, char *buffer)
  272. {
  273. int remain = PAGE_SIZE;
  274. int len;
  275. char *ptr = buffer;
  276. int idx;
  277. unsigned int evt_mask;
  278. for (idx = 0; idx < UART_NR; idx++) {
  279. evt_mask = (unsigned int)get_uart_evt_mask(idx);
  280. len = scnprintf(ptr, remain, "0x%2x\n", evt_mask);
  281. ptr += len;
  282. remain -= len;
  283. }
  284. return PAGE_SIZE - remain;
  285. }
  286. /*---------------------------------------------------------------------------*/
  287. ssize_t mtk_uart_debug_store(struct kobject *kobj, const char *buffer, size_t size)
  288. {
  289. #if (UART_NR < 5)
  290. int a, b, c, d;
  291. int res = sscanf(buffer, "0x%x 0x%x 0x%x 0x%x", &a, &b, &c, &d);
  292. if (res != 4) {
  293. MSG_ERR("%s: expect 4 numbers\n", __func__);
  294. } else {
  295. set_uart_evt_mask(0, a);
  296. set_uart_evt_mask(1, b);
  297. set_uart_evt_mask(2, c);
  298. set_uart_evt_mask(3, d);
  299. }
  300. #else
  301. int a, b, c, d, e;
  302. int res = sscanf(buffer, "0x%x 0x%x 0x%x 0x%x 0x%x", &a, &b, &c, &d, &e);
  303. if (res != 5) {
  304. MSG_ERR("%s: expect 5 numbers\n", __func__);
  305. } else {
  306. set_uart_evt_mask(0, a);
  307. set_uart_evt_mask(1, b);
  308. set_uart_evt_mask(2, c);
  309. set_uart_evt_mask(3, d);
  310. set_uart_evt_mask(4, e);
  311. }
  312. #endif
  313. return size;
  314. }
  315. /*---------------------------------------------------------------------------*/
  316. ssize_t mtk_uart_sysrq_show(struct kobject *kobj, char *buffer)
  317. {
  318. struct mtuart_sysobj *obj = container_of(kobj, struct mtuart_sysobj, kobj);
  319. return scnprintf(buffer, PAGE_SIZE, "%d\n", atomic_read(&obj->sysrq));
  320. }
  321. /*---------------------------------------------------------------------------*/
  322. ssize_t mtk_uart_sysrq_store(struct kobject *kobj, const char *buffer, size_t size)
  323. {
  324. struct mtuart_sysobj *obj = container_of(kobj, struct mtuart_sysobj, kobj);
  325. int a;
  326. int res = sscanf(buffer, "%d\n", &a);
  327. if (res != 1)
  328. MSG_ERR("%s: expect 1 number\n", __func__);
  329. else
  330. atomic_set(&obj->sysrq, a);
  331. return size;
  332. }
  333. /*---------------------------------------------------------------------------*/
  334. ssize_t mtk_uart_vffsz_show(struct kobject *kobj, char *buffer)
  335. {
  336. ssize_t len = 0;
  337. #if defined(ENABLE_VFIFO)
  338. struct mtuart_sysobj *obj = container_of(kobj, struct mtuart_sysobj, kobj);
  339. int idx;
  340. for (idx = 0; idx < ARRAY_SIZE(obj->vffLen); idx++)
  341. len += scnprintf(buffer + len, PAGE_SIZE - len, "[%02d] %4d\n", idx, atomic_read(&obj->vffLen[idx]));
  342. #endif
  343. return len;
  344. }
  345. /*---------------------------------------------------------------------------*/
  346. ssize_t mtk_uart_vffsz_store(struct kobject *kobj, const char *buffer, size_t size)
  347. {
  348. #if defined(ENABLE_VFIFO)
  349. struct mtuart_sysobj *obj = container_of(kobj, struct mtuart_sysobj, kobj);
  350. int idx, sz;
  351. if (2 != sscanf(buffer, "%d %d", &idx, &sz))
  352. MSG_ERR("%s: expect 2 variables\n", __func__);
  353. else if (idx >= ARRAY_SIZE(obj->vffLen) || (sz % 8 != 0))
  354. MSG_ERR("%s: invalid args %d, %d\n", __func__, idx, sz);
  355. else
  356. atomic_set(&obj->vffLen[idx], sz);
  357. #endif
  358. return size;
  359. }
  360. /*---------------------------------------------------------------------------*/
  361. ssize_t mtk_uart_conse_show(struct kobject *kobj, char *buffer)
  362. {
  363. struct mtuart_sysobj *obj = container_of(kobj, struct mtuart_sysobj, kobj);
  364. return scnprintf(buffer, PAGE_SIZE, "%d\n", atomic_read(&obj->console_enable));
  365. }
  366. /*---------------------------------------------------------------------------*/
  367. ssize_t mtk_uart_conse_store(struct kobject *kobj, const char *buffer, size_t size)
  368. {
  369. struct mtuart_sysobj *obj = container_of(kobj, struct mtuart_sysobj, kobj);
  370. int enable;
  371. if (kstrtoint(buffer, 10, &enable))
  372. MSG_ERR("%s: expect 1 variables\n", __func__);
  373. else
  374. atomic_set(&obj->console_enable, enable);
  375. return size;
  376. }
  377. /*---------------------------------------------------------------------------*/
  378. #endif /*ENABLE_SYSFS */
  379. /*---------------------------------------------------------------------------*/
  380. ssize_t mtk_uart_vff_en_show(struct kobject *kobj, char *buffer)
  381. {
  382. int remain = PAGE_SIZE;
  383. int len;
  384. char *ptr = buffer;
  385. int idx;
  386. struct mtk_uart_setting *uart_setting;
  387. for (idx = 0; idx < UART_NR; idx++) {
  388. uart_setting = get_uart_default_settings(idx);
  389. len = scnprintf(ptr,
  390. remain,
  391. "tx%d_m:%2x rx%d_m:%2x\n",
  392. idx, (unsigned int)uart_setting->tx_mode, idx, (unsigned int)uart_setting->rx_mode);
  393. ptr += len;
  394. remain -= len;
  395. }
  396. return PAGE_SIZE - remain;
  397. }
  398. /*---------------------------------------------------------------------------*/
  399. ssize_t mtk_uart_vff_en_store(struct kobject *kobj, const char *buffer, size_t size)
  400. {
  401. #if (UART_NR < 5)
  402. int u1_tx, u1_rx, u2_tx, u2_rx, u3_tx, u3_rx, u4_tx, u4_rx;
  403. struct mtk_uart_setting *uart_setting;
  404. int res = sscanf(buffer, "%x %x %x %x %x %x %x %x",
  405. &u1_tx, &u1_rx, &u2_tx, &u2_rx, &u3_tx, &u3_rx, &u4_tx, &u4_rx);
  406. if (res != 8) {
  407. MSG_ERR("%s: expect 8 numbers\n", __func__);
  408. } else {
  409. uart_setting = get_uart_default_settings(0);
  410. uart_setting->tx_mode = u1_tx;
  411. uart_setting->rx_mode = u1_rx;
  412. uart_setting = get_uart_default_settings(1);
  413. uart_setting->tx_mode = u2_tx;
  414. uart_setting->rx_mode = u2_rx;
  415. uart_setting = get_uart_default_settings(2);
  416. uart_setting->tx_mode = u3_tx;
  417. uart_setting->rx_mode = u3_rx;
  418. uart_setting = get_uart_default_settings(3);
  419. uart_setting->tx_mode = u4_tx;
  420. uart_setting->rx_mode = u4_rx;
  421. }
  422. return size;
  423. #else
  424. int u1_tx, u1_rx, u2_tx, u2_rx, u3_tx, u3_rx, u4_tx, u4_rx, u5_tx, u5_rx;
  425. struct mtk_uart_setting *uart_setting;
  426. int res = sscanf(buffer, "%x %x %x %x %x %x %x %x %x %x",
  427. &u1_tx, &u1_rx, &u2_tx, &u2_rx, &u3_tx, &u3_rx, &u4_tx, &u4_rx, &u5_tx, &u5_rx);
  428. if (res != 8) {
  429. MSG_ERR("%s: expect 8 numbers\n", __func__);
  430. } else {
  431. uart_setting = get_uart_default_settings(0);
  432. uart_setting->tx_mode = u1_tx;
  433. uart_setting->rx_mode = u1_rx;
  434. uart_setting = get_uart_default_settings(1);
  435. uart_setting->tx_mode = u2_tx;
  436. uart_setting->rx_mode = u2_rx;
  437. uart_setting = get_uart_default_settings(2);
  438. uart_setting->tx_mode = u3_tx;
  439. uart_setting->rx_mode = u3_rx;
  440. uart_setting = get_uart_default_settings(3);
  441. uart_setting->tx_mode = u4_tx;
  442. uart_setting->rx_mode = u4_rx;
  443. uart_setting = get_uart_default_settings(4);
  444. uart_setting->tx_mode = u5_tx;
  445. uart_setting->rx_mode = u5_rx;
  446. }
  447. return size;
  448. #endif
  449. }
  450. /*---------------------------------------------------------------------------*/
  451. ssize_t mtk_uart_lsr_status_show(struct kobject *kobj, char *buffer)
  452. {
  453. int remain = PAGE_SIZE;
  454. int len;
  455. char *ptr = buffer;
  456. int idx;
  457. unsigned long lsr_status;
  458. for (idx = 0; idx < UART_NR; idx++) {
  459. lsr_status = get_uart_lsr_status(idx);
  460. len = scnprintf(ptr, remain, "%04x ", (unsigned int)lsr_status);
  461. ptr += len;
  462. remain -= len;
  463. set_uart_lsr_status(idx, 0);
  464. }
  465. len = scnprintf(ptr, remain, "\n");
  466. ptr += len;
  467. remain -= len;
  468. return PAGE_SIZE - remain;
  469. }
  470. /*---------------------------------------------------------------------------*/
  471. ssize_t mtk_uart_lsr_status_store(struct kobject *kobj, const char *buffer, size_t size)
  472. {
  473. #if (UART_NR < 5)
  474. int u1_lsr, u2_lsr, u3_lsr, u4_lsr;
  475. int res = sscanf(buffer, "%x %x %x %x",
  476. &u1_lsr, &u2_lsr, &u3_lsr, &u4_lsr);
  477. if (res != 4) {
  478. MSG_ERR("%s: expect 4 numbers\n", __func__);
  479. } else {
  480. set_uart_lsr_status(0, u1_lsr);
  481. set_uart_lsr_status(1, u2_lsr);
  482. set_uart_lsr_status(2, u3_lsr);
  483. set_uart_lsr_status(3, u4_lsr);
  484. }
  485. return size;
  486. #else
  487. int u1_lsr, u2_lsr, u3_lsr, u4_lsr, u5_lsr;
  488. int res = sscanf(buffer, "%x %x %x %x %x",
  489. &u1_lsr, &u2_lsr, &u3_lsr, &u4_lsr, &u5_lsr);
  490. if (res != 5) {
  491. MSG_ERR("%s: expect 5 numbers\n", __func__);
  492. } else {
  493. set_uart_lsr_status(0, u1_lsr);
  494. set_uart_lsr_status(1, u2_lsr);
  495. set_uart_lsr_status(2, u3_lsr);
  496. set_uart_lsr_status(3, u4_lsr);
  497. set_uart_lsr_status(4, u4_lsr);
  498. }
  499. return size;
  500. #endif
  501. }
  502. /*---------------------------------------------------------------------------*/
  503. static void uart_mem_dump(int nport, void *start_addr, int len)
  504. {
  505. unsigned int *curr_p = (unsigned int *)start_addr;
  506. unsigned char *curr_ch_p;
  507. int _16_fix_num = len / 16;
  508. int tail_num = len % 16;
  509. char buf[16];
  510. int i, j;
  511. if (NULL == curr_p) {
  512. pr_err("[UART%d-DUMP]NULL point to dump!\n", nport);
  513. return;
  514. }
  515. if (0 == len) {
  516. pr_err("[UART%d-DUMP]Not need to dump\n", nport);
  517. return;
  518. }
  519. pr_debug("[UART%d-DUMP]Base: %p\n", nport, start_addr);
  520. /* Fix section */
  521. for (i = 0; i < _16_fix_num; i++) {
  522. pr_debug("[UART%d-DUMP]%03X: %08X %08X %08X %08X\n",
  523. nport, i * 16, *curr_p, *(curr_p + 1), *(curr_p + 2), *(curr_p + 3));
  524. curr_p += 4;
  525. }
  526. /* Tail section */
  527. if (tail_num > 0) {
  528. curr_ch_p = (unsigned char *)curr_p;
  529. for (j = 0; j < tail_num; j++) {
  530. buf[j] = *curr_ch_p;
  531. curr_ch_p++;
  532. }
  533. for (; j < 16; j++)
  534. buf[j] = 0;
  535. curr_p = (unsigned int *)buf;
  536. pr_debug("[UART%d-DUMP]%03X: %08X %08X %08X %08X\n",
  537. nport, i * 16, *curr_p, *(curr_p + 1), *(curr_p + 2), *(curr_p + 3));
  538. }
  539. }
  540. void mtk_uart_dump_history(void)
  541. {
  542. u64 ts_nsec;
  543. unsigned long rem_nsec;
  544. ts_nsec = tx_history.last_update;
  545. rem_nsec = do_div(ts_nsec, 1000000000);
  546. pr_debug("UART Tx port %d: %d/%d @[%5lu.%06lu]\n",
  547. tx_history.index, tx_history.offset, UART_HISTORY_DATA_SIZE, (unsigned long)ts_nsec, rem_nsec / 1000);
  548. uart_mem_dump(tx_history.index, tx_history.buffer, UART_HISTORY_DATA_SIZE);
  549. ts_nsec = rx_history.last_update;
  550. rem_nsec = do_div(ts_nsec, 1000000000);
  551. pr_debug("UART Rx port %d: %d/%d @[%5lu.%06lu]\n",
  552. rx_history.index, rx_history.offset, UART_HISTORY_DATA_SIZE, (unsigned long)ts_nsec, rem_nsec / 1000);
  553. uart_mem_dump(rx_history.index, rx_history.buffer, UART_HISTORY_DATA_SIZE);
  554. }
  555. void update_history_byte(char is_tx, int nport, unsigned char byte)
  556. {
  557. struct uart_history_data *x_history;
  558. x_history = is_tx ? &tx_history : &rx_history;
  559. if (nport == x_history->index) {
  560. *(x_history->buffer + x_history->offset) = byte;
  561. x_history->offset++;
  562. if (x_history->offset == UART_HISTORY_DATA_SIZE)
  563. x_history->offset = 0;
  564. }
  565. }
  566. void update_history_time(char is_tx, int nport)
  567. {
  568. struct uart_history_data *x_history;
  569. x_history = is_tx ? &tx_history : &rx_history;
  570. if (nport == x_history->index)
  571. x_history->last_update = local_clock();
  572. }
  573. void update_history_bulk(char is_tx, int nport, unsigned char *chars, int count)
  574. {
  575. int room;
  576. struct uart_history_data *x_history;
  577. x_history = is_tx ? &tx_history : &rx_history;
  578. room = UART_HISTORY_DATA_SIZE - x_history->offset;
  579. if (nport == x_history->index) {
  580. if (count <= room) {
  581. memcpy(x_history->buffer + x_history->offset, chars, count);
  582. x_history->offset += count;
  583. if (x_history->offset == UART_HISTORY_DATA_SIZE)
  584. x_history->offset = 0;
  585. } else {
  586. memcpy(x_history->buffer + x_history->offset, chars, room);
  587. memcpy(x_history->buffer, chars, count - room);
  588. x_history->offset = count - room;
  589. if (x_history->offset == UART_HISTORY_DATA_SIZE)
  590. x_history->offset = 0;
  591. }
  592. }
  593. x_history->last_update = local_clock();
  594. }
  595. ssize_t mtk_uart_history_show(struct kobject *kobj, char *buffer)
  596. {
  597. int remain = PAGE_SIZE;
  598. int len;
  599. char *ptr = buffer;
  600. len = scnprintf(ptr, remain, "tx(%d):%d; rx(%d):%d\n",
  601. tx_history.index, tx_history.offset, rx_history.index, rx_history.offset);
  602. ptr += len;
  603. remain -= len;
  604. mtk_uart_dump_history();
  605. return PAGE_SIZE - remain;
  606. }
  607. /*---------------------------------------------------------------------------*/
  608. ssize_t mtk_uart_history_store(struct kobject *kobj, const char *buffer, size_t size)
  609. {
  610. int tx_index, rx_index;
  611. int res = sscanf(buffer, "%d %d", &tx_index, &rx_index);
  612. if (res != 2)
  613. return 0;
  614. tx_history.index = tx_index;
  615. rx_history.index = rx_index;
  616. tx_history.offset = 0;
  617. tx_history.offset = 0;
  618. memset(tx_history.buffer, 0, UART_HISTORY_DATA_SIZE);
  619. memset(rx_history.buffer, 0, UART_HISTORY_DATA_SIZE);
  620. return size;
  621. }
  622. /* ================================ FIQ ========================================== */
  623. #if (defined(CONFIG_FIQ_DEBUGGER_CONSOLE) && defined(CONFIG_FIQ_DEBUGGER))
  624. #define DEFAULT_FIQ_UART_PORT (3)
  625. int fiq_console_port = DEFAULT_FIQ_UART_PORT;
  626. /* struct uart_port *p_mtk_uart_port = &(mtk_uarts[DEFAULT_FIQ_UART_PORT].port); */
  627. /* EXPORT_SYMBOL(p_mtk_uart_port); */
  628. struct mtk_uart *mt_console_uart = &(mtk_uarts[DEFAULT_FIQ_UART_PORT]);
  629. #endif
  630. /* ============================================================================== */
  631. /* --------------------------------------------------------------------------- */
  632. /* UART Log port switch feature */
  633. static int find_string(char str[], const char *fingerprint, int *offset)
  634. {
  635. char *curr = str;
  636. int i = 0;
  637. int str_len;
  638. int fingerprint_len;
  639. if ((NULL == str) || (NULL == fingerprint))
  640. return 0;
  641. str_len = strlen(str);
  642. fingerprint_len = strlen(fingerprint);
  643. if (str_len < fingerprint_len)
  644. return 0;
  645. for (i = 0; i <= (str_len - fingerprint_len); i++) {
  646. if (strncmp(curr, fingerprint, fingerprint_len) == 0) {
  647. if (NULL != offset)
  648. *offset = i;
  649. return 1;
  650. }
  651. curr++;
  652. }
  653. return 0;
  654. }
  655. static int find_fingerprint(char str[], int *offset)
  656. {
  657. /**
  658. * This function limitation:
  659. * If the ttyMT number large than 9, this function will work abnormal.
  660. * For example, ttyMT12 will be recoginzed as ttyMT1
  661. */
  662. static const char * const fingerprint[] = {
  663. "console=/dev/null",
  664. "console=ttyMT0",
  665. "console=ttyMT1",
  666. "console=ttyMT2",
  667. "console=ttyMT3",
  668. #if (UART_NR > 4)
  669. "console=ttyMT4",
  670. #endif
  671. };
  672. int i;
  673. for (i = 0; i < sizeof(fingerprint) / sizeof(char *); i++) {
  674. if (find_string(str, fingerprint[i], offset) != 0)
  675. return i; /* Find it. */
  676. }
  677. return -1; /* Not find */
  678. }
  679. static int modify_fingerprint(char str[], int offset, char new_val)
  680. {
  681. if (NULL == str)
  682. return 0;
  683. str[offset + 14 - 1] = new_val; /* 14 = strlen("console=ttyMTx"), we modify x to 1~3 */
  684. return 1;
  685. }
  686. void adjust_kernel_cmd_line_setting_for_console(char *u_boot_cmd_line, char *kernel_cmd_line)
  687. {
  688. int offset = 0;
  689. int kernel_console_port_setting = -1;
  690. int u_boot_console_port_setting = -1;
  691. /* Check u-boot command line setting */
  692. u_boot_console_port_setting = find_fingerprint(u_boot_cmd_line, 0);
  693. if (-1 == u_boot_console_port_setting) {
  694. /* printf("U-boot does not have console setting, return\n"); */
  695. return;
  696. }
  697. /* U-boot has console setting, check kernel console setting */
  698. kernel_console_port_setting = find_fingerprint(kernel_cmd_line, &offset);
  699. if (-1 == kernel_console_port_setting) {
  700. /* printf("Kernel does not have console setting, return\n"); */
  701. goto _Exit;
  702. }
  703. /**
  704. * Both U-boot and Kernel has console setting.
  705. * 1. If the settings are same, return directly;
  706. * 2. If kernel console setting is null, then use kernel setting
  707. * 3. If u-boot console setting is null, then use kernel setting
  708. * 4. If kernel console setting is not null, then use u-boot setting
  709. */
  710. if (u_boot_console_port_setting == kernel_console_port_setting) {
  711. /* printf("Same console setting, return\n"); */
  712. goto _Exit;
  713. }
  714. if (0 == kernel_console_port_setting) {
  715. /* printf("Kernel console setting is null, use kernel setting, return\n"); */
  716. goto _Exit;
  717. }
  718. if (0 == u_boot_console_port_setting) {
  719. /* printf("U-boot console setting is null, use kernel setting, return\n"); */
  720. goto _Exit;
  721. }
  722. /* Enter here, it means both kernel and u-boot console setting are not null, using u-boot setting */
  723. switch (u_boot_console_port_setting) {
  724. case 1: /* Using ttyMT0 */
  725. modify_fingerprint(kernel_cmd_line, offset, '0');
  726. break;
  727. case 2: /* Using ttyMT1 */
  728. modify_fingerprint(kernel_cmd_line, offset, '1');
  729. break;
  730. case 3: /* Using ttyMT2 */
  731. modify_fingerprint(kernel_cmd_line, offset, '2');
  732. break;
  733. case 4: /* Using ttyMT3 */
  734. modify_fingerprint(kernel_cmd_line, offset, '3');
  735. break;
  736. case 5: /* Using ttyMT4 */
  737. modify_fingerprint(kernel_cmd_line, offset, '4');
  738. break;
  739. default:
  740. /* Do nothing */
  741. break;
  742. }
  743. _Exit:
  744. kernel_console_port_setting = 0;
  745. #if (defined(CONFIG_FIQ_DEBUGGER_CONSOLE) && defined(CONFIG_FIQ_DEBUGGER))
  746. kernel_console_port_setting = find_fingerprint(kernel_cmd_line, &offset);
  747. if (-1 == kernel_console_port_setting) {
  748. /* printf("Kernel does not have console setting, return\n"); */
  749. return;
  750. }
  751. if (kernel_console_port_setting > 0) {
  752. fiq_console_port = (kernel_console_port_setting - 1);
  753. mt_console_uart = &(mtk_uarts[fiq_console_port]);
  754. }
  755. #endif
  756. }
  757. /* ============================================================================== */
  758. /* -------------------------------- PDN --------------------------------------- */
  759. unsigned int mtk_uart_pdn_enable(char *port, int enable)
  760. {
  761. int str_len;
  762. int port_num;
  763. if (port == NULL)
  764. return -1;
  765. str_len = strlen(port);
  766. if (str_len != 6) {
  767. MSG_ERR("Length mismatch! len=%d\n", str_len);
  768. return -1;
  769. }
  770. if (find_string(port, "ttyMT", 0) == 0) {
  771. MSG_ERR("Format mismatch! str=%s\n", port);
  772. return -1;
  773. }
  774. port_num = port[str_len - 1] - '0';
  775. if (port_num >= UART_NR) {
  776. MSG_ERR("wrong port:%d\n", port_num);
  777. return -1;
  778. }
  779. bt_port = &mtk_uarts[port_num];
  780. if (enable)
  781. mtk_uart_enable_dpidle(bt_port);
  782. else
  783. mtk_uart_disable_dpidle(bt_port);
  784. return 0;
  785. }
  786. unsigned int mtk_uart_freeze_enable(char *port, int enable)
  787. {
  788. int str_len;
  789. int port_num;
  790. if (port == NULL)
  791. return -1;
  792. str_len = strlen(port);
  793. if (str_len != 6) {
  794. MSG_ERR("Length mismatch! len=%d\n", str_len);
  795. return -1;
  796. }
  797. if (find_string(port, "ttyMT", 0) == 0) {
  798. MSG_ERR("Format mismatch! str=%s\n", port);
  799. return -1;
  800. }
  801. port_num = port[str_len - 1] - '0';
  802. if (port_num >= UART_NR) {
  803. MSG_ERR("wrong port:%d\n", port_num);
  804. return -1;
  805. }
  806. if (enable)
  807. uart_freeze_enable[port_num] = 1;
  808. else
  809. uart_freeze_enable[port_num] = 0;
  810. return 0;
  811. }
  812. EXPORT_SYMBOL(mtk_uart_freeze_enable);
  813. /*---------------------------------------------------------------------------*/
  814. #ifdef CONFIG_MTK_SERIAL_CONSOLE
  815. /*---------------------------------------------------------------------------*/
  816. static void mtk_uart_console_write(struct console *co, const char *s, unsigned int count)
  817. {
  818. /* Notice:
  819. * (1) The function is called by printk, hence, spin lock can not be used
  820. * (2) don't care vfifo setting
  821. */
  822. #define CONSOLE_RETRY (5000)
  823. int i;
  824. struct mtk_uart *uart;
  825. u32 cnt = 0;
  826. unsigned long flags;
  827. if (co->index >= UART_NR || !(co->flags & CON_ENABLED) || !atomic_read(&mtk_uart_sysobj.console_enable))
  828. return;
  829. uart = &mtk_uarts[co->index];
  830. for (i = 0; i < (int)count; i++) {
  831. cnt = 0;
  832. while (!mtk_uart_write_allow(uart)) {
  833. barrier();
  834. if (cnt++ >= CONSOLE_RETRY) {
  835. uart->timeout_count++;
  836. return;
  837. }
  838. }
  839. spin_lock_irqsave(&mtk_console_lock, flags);
  840. mtk_uart_write_byte(uart, s[i]);
  841. spin_unlock_irqrestore(&mtk_console_lock, flags);
  842. if (s[i] == '\n') {
  843. cnt = 0;
  844. while (!mtk_uart_write_allow(uart)) {
  845. barrier();
  846. if (cnt++ >= CONSOLE_RETRY) {
  847. uart->timeout_count++;
  848. return;
  849. }
  850. }
  851. spin_lock_irqsave(&mtk_console_lock, flags);
  852. mtk_uart_write_byte(uart, '\r');
  853. spin_unlock_irqrestore(&mtk_console_lock, flags);
  854. }
  855. }
  856. }
  857. /*---------------------------------------------------------------------------*/
  858. static int __init mtk_uart_console_setup(struct console *co, char *options)
  859. {
  860. struct mtk_uart *uart;
  861. struct uart_port *port;
  862. int baud = 115200;
  863. int bits = 8;
  864. int parity = 'n';
  865. int flow = 'n';
  866. int ret;
  867. pr_debug("[UART]mtk console setup : co->index %d options:%s\n", co->index, options);
  868. if (co->index >= UART_NR)
  869. co->index = 0;
  870. uart = &mtk_uarts[co->index];
  871. port = (struct uart_port *)uart;
  872. console_port = uart;
  873. mtk_uart_console_setting_switch(uart);
  874. if (options)
  875. uart_parse_options(options, &baud, &parity, &bits, &flow);
  876. ret = uart_set_options(port, co, baud, parity, bits, flow);
  877. pr_debug("[UART]mtk console setup: uart_set_option port(%d) baud(%d) parity(%c) bits(%d) flow(%c) - ret(%d)\n"
  878. , co->index, baud, parity, bits, flow, ret);
  879. pr_debug("[UART]mtk setting: (%d, %d, %d, %lu, %lu)\n",
  880. uart->tx_mode, uart->rx_mode, uart->dma_mode, uart->tx_trig, uart->rx_trig);
  881. /* mtk_uart_power_up(uart); */
  882. return ret;
  883. }
  884. /*---------------------------------------------------------------------------*/
  885. static struct uart_driver mtk_uart_drv;
  886. static struct console mtk_uart_console = {
  887. .name = "ttyMT",
  888. #if !defined(CONFIG_MTK_SERIAL_MODEM_TEST)
  889. /*don't configure UART4 as console */
  890. .write = mtk_uart_console_write,
  891. .setup = mtk_uart_console_setup,
  892. #endif
  893. .device = uart_console_device,
  894. .flags = CON_PRINTBUFFER,
  895. .index = -1,
  896. .data = &mtk_uart_drv,
  897. };
  898. /*---------------------------------------------------------------------------*/
  899. static int __init mtk_uart_console_init(void)
  900. {
  901. int err = mtk_uart_init_ports();
  902. if (!err)
  903. register_console(&mtk_uart_console);
  904. return err;
  905. }
  906. /*---------------------------------------------------------------------------*/
  907. console_initcall(mtk_uart_console_init);
  908. /*---------------------------------------------------------------------------*/
  909. static int __init mtk_late_console_init(void)
  910. {
  911. if (!(mtk_uart_console.flags & CON_ENABLED))
  912. register_console(&mtk_uart_console);
  913. return 0;
  914. }
  915. /*---------------------------------------------------------------------------*/
  916. late_initcall(mtk_late_console_init);
  917. /*---------------------------------------------------------------------------*/
  918. #endif /*CONFIG_MTK_SERIAL_CONSOLE */
  919. /******************************************************************************
  920. * Virtual FIFO implementation
  921. ******************************************************************************/
  922. #if defined(ENABLE_VFIFO)
  923. /*---------------------------------------------------------------------------*/
  924. static int mtk_uart_vfifo_del_dbgbuf(struct mtk_uart_vfifo *vfifo)
  925. {
  926. #if defined(ENABLE_VFIFO_DEBUG)
  927. int idx;
  928. for (idx = 0; idx < ARRAY_SIZE(vfifo->dbg); idx++) {
  929. if (vfifo->dbg[idx].dat != 0)
  930. kfree(vfifo->dbg[idx].dat);
  931. vfifo->dbg[idx].dat = NULL;
  932. vfifo->dbg[idx].idx = 0;
  933. vfifo->dbg[idx].len = 0;
  934. }
  935. #endif
  936. return 0;
  937. }
  938. /*---------------------------------------------------------------------------*/
  939. static int mtk_uart_vfifo_new_dbgbuf(struct mtk_uart_vfifo *vfifo)
  940. {
  941. #if defined(ENABLE_VFIFO_DEBUG)
  942. int idx;
  943. for (idx = 0; idx < ARRAY_SIZE(vfifo->dbg); idx++) {
  944. if (vfifo->dbg[idx].dat != 0)
  945. kfree(vfifo->dbg[idx].dat);
  946. vfifo->dbg[idx].idx = 0;
  947. vfifo->dbg[idx].len = vfifo->size;
  948. vfifo->dbg[idx].dat = kzalloc(vfifo->dbg[idx].len, GFP_ATOMIC);
  949. if (!vfifo->dbg[idx].dat) {
  950. mtk_uart_vfifo_del_dbgbuf(vfifo);
  951. return -ENOMEM;
  952. }
  953. }
  954. #endif
  955. return 0;
  956. }
  957. /*---------------------------------------------------------------------------*/
  958. static int mtk_uart_vfifo_create(struct mtk_uart *uart)
  959. { /*NOTE: please save the phyiscal address in vff->dmahd */
  960. struct mtk_uart_vfifo *vfifo;
  961. int idx, err = 0;
  962. MSG_FUNC_ENTRY();
  963. if (!uart->setting->vff) {
  964. MSG_RAW("[UART%2d] not support VFF, Cancel alloc\n", uart->nport);
  965. return err;
  966. }
  967. for (idx = uart->nport * 2; idx < uart->nport * 2 + 2; idx++) {
  968. vfifo = &mtk_uart_vfifo_port[idx];
  969. if (vfifo->size) {
  970. vfifo->addr = dma_alloc_coherent(uart->port.dev, vfifo->size, &vfifo->dmahd, GFP_DMA);
  971. /* MSG_RAW("Address: virt = 0x%p, phys = 0x%llx\n", vfifo->addr, vfifo->dmahd); */
  972. } else {
  973. vfifo->addr = NULL;
  974. }
  975. if (vfifo->size && !vfifo->addr) {
  976. err = -ENOMEM;
  977. break;
  978. }
  979. err = mtk_uart_vfifo_new_dbgbuf(vfifo);
  980. if (err)
  981. break;
  982. }
  983. return err;
  984. }
  985. /*---------------------------------------------------------------------------*/
  986. static int mtk_uart_vfifo_delete(struct mtk_uart *uart)
  987. {
  988. struct mtk_uart_vfifo *vfifo;
  989. int idx;
  990. MSG_FUNC_ENTRY();
  991. if (!uart->setting->vff) {
  992. MSG_RAW("[UART%2d] not support VFF, Cancel free\n", uart->nport);
  993. return 0;
  994. }
  995. MSG_RAW("[UART%2d] delete", uart->nport);
  996. for (idx = uart->nport * 2; idx < uart->nport * 2 + 2; idx++) {
  997. vfifo = &mtk_uart_vfifo_port[idx];
  998. if (vfifo->addr)
  999. dma_free_coherent(NULL, vfifo->size, vfifo->addr, vfifo->dmahd);
  1000. mtk_uart_vfifo_del_dbgbuf(vfifo);
  1001. MSG_RAW("[%2d] %p (%04d) ;", idx, vfifo->addr, vfifo->size);
  1002. vfifo->addr = NULL;
  1003. }
  1004. MSG_RAW("\n");
  1005. return 0;
  1006. }
  1007. /*---------------------------------------------------------------------------*/
  1008. int mtk_uart_vfifo_prepare(struct mtk_uart *uart)
  1009. {
  1010. struct mtuart_sysobj *obj = &mtk_uart_sysobj;
  1011. struct mtk_uart_vfifo *tport, *rport;
  1012. int tx = uart->nport << 1;
  1013. int rx = tx + 1;
  1014. MSG_FUNC_ENTRY();
  1015. if (uart->nport >= UART_NR) {
  1016. MSG_ERR("wrong port:%d\n", uart->nport);
  1017. return -EINVAL;
  1018. } else if (FALSE == uart->setting->vff) {
  1019. MSG_ERR("Port :%d not support vfifo\n", uart->nport);
  1020. return -EINVAL;
  1021. }
  1022. tport = &mtk_uart_vfifo_port[tx];
  1023. rport = &mtk_uart_vfifo_port[rx];
  1024. if ((atomic_read(&obj->vffLen[tx]) == tport->size) && (atomic_read(&obj->vffLen[rx]) == rport->size))
  1025. return 0;
  1026. MSG_RAW("re-alloc +\n");
  1027. mtk_uart_vfifo_delete(uart);
  1028. tport->size = atomic_read(&obj->vffLen[tx]);
  1029. tport->trig = VFF_TX_THRE(tport->size);
  1030. rport->size = atomic_read(&obj->vffLen[rx]);
  1031. rport->trig = VFF_RX_THRE(rport->size);
  1032. mtk_uart_vfifo_create(uart);
  1033. MSG_RAW("re-alloc -\n");
  1034. return 0;
  1035. }
  1036. /*---------------------------------------------------------------------------*/
  1037. static struct mtk_uart_vfifo *mtk_uart_vfifo_alloc(struct mtk_uart *uart, UART_VFF_TYPE type)
  1038. {
  1039. struct mtk_uart_vfifo *vfifo = NULL;
  1040. unsigned long flags;
  1041. spin_lock_irqsave(&mtk_uart_vfifo_port_lock, flags);
  1042. MSG(INFO, "(%d, %d)", uart->nport, type);
  1043. if ((uart->nport >= (ARRAY_SIZE(mtk_uart_vfifo_port) / 2)) || (type >= UART_VFIFO_NUM))
  1044. vfifo = NULL;
  1045. else
  1046. vfifo = &mtk_uart_vfifo_port[2 * uart->nport + type];
  1047. if (vfifo && vfifo->addr == NULL)
  1048. vfifo = NULL;
  1049. if (vfifo)
  1050. MSG(INFO, "alloc vfifo-%d[%d](%p)\n", uart->nport, vfifo->size, vfifo->addr);
  1051. spin_unlock_irqrestore(&mtk_uart_vfifo_port_lock, flags);
  1052. return vfifo;
  1053. }
  1054. /*---------------------------------------------------------------------------*/
  1055. static void mtk_uart_vfifo_free(struct mtk_uart *uart, struct mtk_uart_vfifo *vfifo)
  1056. {
  1057. unsigned long flags;
  1058. if (vfifo) {
  1059. spin_lock_irqsave(&mtk_uart_vfifo_port_lock, flags);
  1060. vfifo->dma = NULL;
  1061. vfifo->cur = NULL;
  1062. vfifo->dbgidx = 0;
  1063. spin_unlock_irqrestore(&mtk_uart_vfifo_port_lock, flags);
  1064. }
  1065. }
  1066. /*---------------------------------------------------------------------------*/
  1067. static unsigned int mtk_uart_vfifo_write_allow(struct mtk_uart *uart)
  1068. {
  1069. return !mtk_uart_vfifo_is_full(uart->tx_vfifo);
  1070. }
  1071. /*---------------------------------------------------------------------------*/
  1072. static unsigned int mtk_uart_vfifo_read_allow(struct mtk_uart *uart)
  1073. {
  1074. return !mtk_uart_vfifo_is_empty(uart->rx_vfifo);
  1075. }
  1076. /*---------------------------------------------------------------------------*/
  1077. static inline unsigned short mtk_uart_vfifo_get_trig(struct mtk_uart *uart, struct mtk_uart_vfifo *vfifo)
  1078. {
  1079. return vfifo->trig;
  1080. }
  1081. /*---------------------------------------------------------------------------*/
  1082. #define get_mtk_uart(ptr, type, member) (type *)((char *)ptr - offsetof(type, member))
  1083. /*---------------------------------------------------------------------------*/
  1084. static enum hrtimer_restart mtk_uart_tx_vfifo_timeout(struct hrtimer *hrt)
  1085. {
  1086. struct mtk_uart_vfifo *vfifo = container_of(hrt, struct mtk_uart_vfifo, flush);
  1087. struct mtk_uart_dma *dma = (struct mtk_uart_dma *)vfifo->dma;
  1088. struct mtk_uart *uart = dma->uart;
  1089. #if defined(ENABLE_VFIFO_DEBUG)
  1090. ktime_t cur = ktime_get();
  1091. struct timespec a = ktime_to_timespec(cur);
  1092. MSG(MSC, "flush timeout [%ld %ld]\n", a.tv_sec, a.tv_nsec);
  1093. #endif
  1094. mtk_uart_tx_vfifo_flush(uart, 1);
  1095. return HRTIMER_NORESTART;
  1096. }
  1097. /*---------------------------------------------------------------------------*/
  1098. static void mtk_uart_dma_vfifo_callback(void *data)
  1099. {
  1100. struct mtk_uart_dma *dma = (struct mtk_uart_dma *)data;
  1101. struct mtk_uart *uart = dma->uart;
  1102. MSG(DMA, "%s VFIFO CB: %4d/%4d\n", dma->dir == DMA_TO_DEVICE ? "TX" : "RX",
  1103. mtk_uart_vfifo_get_counts(dma->vfifo), dma->vfifo->size);
  1104. if (dma->dir == DMA_FROM_DEVICE) {
  1105. /*the data must be read before return from callback, otherwise, the interrupt
  1106. will be triggered again and again */
  1107. mtk_uart_dma_vfifo_rx_tasklet((unsigned long)uart);
  1108. /* return; [ALPS00031975] */
  1109. }
  1110. tasklet_schedule(&dma->tasklet);
  1111. }
  1112. /*---------------------------------------------------------------------------*/
  1113. /* static __tcmfunc irqreturn_t mtk_vfifo_irq_handler(int irq, void *dev_id) */
  1114. static irqreturn_t mtk_vfifo_irq_handler(int irq, void *dev_id)
  1115. {
  1116. struct mtk_uart_vfifo *vfifo;
  1117. vfifo = (struct mtk_uart_vfifo *)dev_id;
  1118. if (!vfifo) {
  1119. pr_err("mtk_vfifo_irq_handler: vfifo is NULL\n");
  1120. return IRQ_NONE;
  1121. }
  1122. if (!vfifo->dma) {
  1123. pr_err("mtk_vfifo_irq_handler: dma is NULL\n");
  1124. return IRQ_NONE;
  1125. }
  1126. /* Call call back function */
  1127. mtk_uart_dma_vfifo_callback(vfifo->dma);
  1128. /* Clear interrupt flag */
  1129. if (vfifo->type == UART_RX_VFIFO)
  1130. mtk_uart_vfifo_clear_rx_intr(vfifo);
  1131. else
  1132. mtk_uart_vfifo_clear_tx_intr(vfifo);
  1133. return IRQ_HANDLED;
  1134. }
  1135. /*---------------------------------------------------------------------------*/
  1136. static int mtk_uart_dma_alloc(struct mtk_uart *uart, struct mtk_uart_dma *dma, int mode, struct mtk_uart_vfifo *vfifo)
  1137. {
  1138. int ret = 0;
  1139. MSG_FUNC_ENTRY();
  1140. if (mode == UART_NON_DMA)
  1141. return -1;
  1142. switch (mode) {
  1143. case UART_TX_VFIFO_DMA:
  1144. if (!vfifo) {
  1145. MSG(ERR, "fail due to NULL tx_vfifo\n");
  1146. ret = -1;
  1147. break;
  1148. }
  1149. vfifo->dma = dma;
  1150. dma->dir = DMA_TO_DEVICE;
  1151. dma->mode = mode;
  1152. dma->vfifo = vfifo;
  1153. dma->uart = uart;
  1154. init_completion(&dma->done);
  1155. tasklet_init(&dma->tasklet, mtk_uart_dma_vfifo_tx_tasklet, (unsigned long)uart);
  1156. if (!atomic_read(&vfifo->reg_cb)) {
  1157. /* disable interrupts */
  1158. /* FIXME */
  1159. mtk_uart_vfifo_disable_tx_intr(uart);
  1160. ret = request_irq(vfifo->irq_id, (irq_handler_t) mtk_vfifo_irq_handler,
  1161. IRQF_LEVEL_TRIGGER_POLARITY, DRV_NAME, vfifo);
  1162. if (ret)
  1163. return ret;
  1164. atomic_set(&vfifo->reg_cb, 1);
  1165. }
  1166. atomic_set(&dma->free, 1);
  1167. break;
  1168. case UART_RX_VFIFO_DMA:
  1169. if (!vfifo) {
  1170. MSG(ERR, "fail due to NULL rx_vfifo\n");
  1171. ret = -1;
  1172. break;
  1173. }
  1174. vfifo->dma = dma;
  1175. dma->dir = DMA_FROM_DEVICE;
  1176. dma->mode = mode;
  1177. dma->vfifo = vfifo;
  1178. dma->uart = uart;
  1179. init_completion(&dma->done);
  1180. tasklet_init(&dma->tasklet, mtk_uart_dma_vfifo_rx_tasklet, (unsigned long)uart);
  1181. if (!atomic_read(&vfifo->reg_cb)) {
  1182. /* disable interrupts */
  1183. mtk_uart_vfifo_disable_rx_intr(uart);
  1184. ret = request_irq(vfifo->irq_id, (irq_handler_t) mtk_vfifo_irq_handler,
  1185. IRQF_LEVEL_TRIGGER_POLARITY, DRV_NAME, vfifo);
  1186. if (ret)
  1187. return ret;
  1188. atomic_set(&vfifo->reg_cb, 1);
  1189. }
  1190. atomic_set(&dma->free, 1);
  1191. break;
  1192. }
  1193. return ret;
  1194. }
  1195. /*---------------------------------------------------------------------------*/
  1196. void mtk_uart_dma_stop(struct mtk_uart *uart, struct mtk_uart_dma *dma)
  1197. {
  1198. MSG_FUNC_ENTRY();
  1199. if (!dma)
  1200. return;
  1201. mtk_uart_stop_dma(dma);
  1202. atomic_set(&dma->free, 1);
  1203. complete(&dma->done);
  1204. }
  1205. /*---------------------------------------------------------------------------*/
  1206. static void mtk_uart_dma_free(struct mtk_uart *uart, struct mtk_uart_dma *dma)
  1207. {
  1208. unsigned long flags;
  1209. MSG_FUNC_ENTRY();
  1210. if (!dma)
  1211. return;
  1212. if (dma->mode == UART_NON_DMA)
  1213. return;
  1214. if ((dma->mode == UART_RX_VFIFO_DMA || dma->mode == UART_TX_VFIFO_DMA) && (!dma->vfifo))
  1215. return;
  1216. if (dma->vfifo && !mtk_uart_vfifo_is_empty(dma->vfifo)) {
  1217. tasklet_schedule(&dma->tasklet);
  1218. MSG(DMA, "wait for %s vfifo dma completed!!!\n", dma->dir == DMA_TO_DEVICE ? "TX" : "RX");
  1219. wait_for_completion(&dma->done);
  1220. }
  1221. spin_lock_irqsave(&uart->port.lock, flags);
  1222. mtk_uart_stop_dma(dma);
  1223. if (dma->vfifo && timer_pending(&dma->vfifo->timer))
  1224. del_timer_sync(&dma->vfifo->timer);
  1225. if (dma->vfifo && hrtimer_active(&dma->vfifo->flush))
  1226. hrtimer_cancel(&dma->vfifo->flush);
  1227. /* [ALPS00030487] tasklet_kill function may schedule, so release spin lock first,
  1228. * after release, set spin lock again.
  1229. */
  1230. spin_unlock_irqrestore(&uart->port.lock, flags); /* [ALPS00030487] Add this */
  1231. tasklet_kill(&dma->tasklet);
  1232. spin_lock_irqsave(&uart->port.lock, flags); /* [ALPS00030487] Add this */
  1233. mtk_uart_reset_dma(dma);
  1234. mtk_uart_vfifo_disable(uart, dma->vfifo);
  1235. mtk_uart_vfifo_free(uart, dma->vfifo);
  1236. MSG(INFO, "free %s dma completed!!!\n", dma->dir == DMA_TO_DEVICE ? "TX" : "RX");
  1237. memset(dma, 0, sizeof(struct mtk_uart_dma));
  1238. spin_unlock_irqrestore(&uart->port.lock, flags);
  1239. }
  1240. #endif /*defined(ENABLE_VFIFO) */
  1241. /*---------------------------------------------------------------------------*/
  1242. static void mtk_uart_set_baud(struct mtk_uart *uart, int baudrate)
  1243. {
  1244. if (uart->port.flags & ASYNC_SPD_CUST) {
  1245. /**
  1246. * [ALPS00137126] Begin
  1247. * Because the origin design of custom baudrate in linux is for low speed case, we add some
  1248. * modify to support high speed case.
  1249. * NOTE: If the highest bit of "custom_divisor" is ONE, we will use custom_divisor store baudrate
  1250. * directly. That means(we suppose unsigned int is 32 bits):
  1251. * custom_divisor[31] == 1, then custom_divisor[30..0] == custom baud rate
  1252. * custom_divisor[31] == 0, then custom_divisor[30..0] == sysclk/16/baudrate
  1253. */
  1254. if (uart->port.custom_divisor & (1 << 31)) {
  1255. baudrate = uart->port.custom_divisor & (~(1 << 31));
  1256. if (baudrate > (uart->sysclk >> 2)) /* Baud rate should not more than sysclk/4 */
  1257. baudrate = 9600;
  1258. } else {
  1259. /*the baud_base gotten in user space eqauls to sysclk/16.
  1260. hence, we need to restore the difference when calculating custom baudrate */
  1261. if (!uart->custom_baud) {
  1262. baudrate = uart->sysclk / 16;
  1263. baudrate = baudrate / uart->port.custom_divisor;
  1264. } else {
  1265. baudrate = uart->custom_baud;
  1266. }
  1267. /* [ALPS00137126] End */
  1268. }
  1269. MSG(CFG, "CUSTOM, baudrate = %d, divisor = %d\n", baudrate, uart->port.custom_divisor);
  1270. }
  1271. if (uart->auto_baud)
  1272. mtk_uart_set_auto_baud(uart);
  1273. mtk_uart_baud_setting(uart, baudrate);
  1274. uart->baudrate = baudrate;
  1275. }
  1276. /*---------------------------------------------------------------------------*/
  1277. static inline bool mtk_uart_enable_sysrq(struct mtk_uart *uart)
  1278. {
  1279. return uart->setting->sysrq;
  1280. }
  1281. /*---------------------------------------------------------------------------*/
  1282. static void mtk_uart_rx_chars(struct mtk_uart *uart)
  1283. {
  1284. struct uart_port *port = &uart->port;
  1285. struct tty_struct *tty = uart->port.state->port.tty;
  1286. int max_count = UART_FIFO_SIZE;
  1287. unsigned int data_byte, status;
  1288. unsigned int flag;
  1289. unsigned long flags;
  1290. spin_lock_irqsave(&port->lock, flags);
  1291. /* MSG_FUNC_ENTRY(); */
  1292. while (max_count-- > 0) {
  1293. /* check status */
  1294. if (!mtk_uart_data_ready(uart))
  1295. break;
  1296. #if 0
  1297. if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
  1298. if (tty->low_latency) {
  1299. /*
  1300. * If this failed then we will throw away the
  1301. * bytes but must do so to clear interrupts
  1302. */
  1303. tty_flip_buffer_push(tty);
  1304. }
  1305. }
  1306. #endif
  1307. /* read the byte */
  1308. data_byte = uart->read_byte(uart);
  1309. port->icount.rx++;
  1310. flag = TTY_NORMAL;
  1311. update_history_byte(0, uart->nport, data_byte);
  1312. status = mtk_uart_filter_line_status(uart);
  1313. /* error handling routine */
  1314. if (status & UART_LSR_BI) {
  1315. MSG(INFO, "Break interrupt!!\n");
  1316. port->icount.brk++;
  1317. if (uart_handle_break(port))
  1318. continue;
  1319. flag = TTY_BREAK;
  1320. } else if (status & UART_LSR_PE) {
  1321. MSG(INFO, "Parity Error!!\n");
  1322. port->icount.parity++;
  1323. flag = TTY_PARITY;
  1324. } else if (status & UART_LSR_FE) {
  1325. MSG(INFO, "Frame Error!!\n");
  1326. port->icount.frame++;
  1327. flag = TTY_FRAME;
  1328. } else if (status & UART_LSR_OE) {
  1329. MSG(INFO, "Overrun!!\n");
  1330. port->icount.overrun++;
  1331. flag = TTY_OVERRUN;
  1332. }
  1333. #ifdef CONFIG_MAGIC_SYSRQ
  1334. if (mtk_uart_enable_sysrq(uart)) {
  1335. if (uart_handle_sysrq_char(port, data_byte))
  1336. continue;
  1337. /* FIXME. Infinity, 20081002, 'BREAK' char to enable sysrq handler { */
  1338. #if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSLE)
  1339. if (data_byte == 0)
  1340. uart->port.sysrq = 1;
  1341. #endif
  1342. /* FIXME. Infinity, 20081002, 'BREAK' char to enable sysrq handler } */
  1343. }
  1344. #endif
  1345. if (!tty_insert_flip_char(TTY_FLIP_ARG(tty), data_byte, flag))
  1346. MSG(ERR, "tty_insert_flip_char: no space");
  1347. }
  1348. tty_flip_buffer_push(TTY_FLIP_ARG(tty));
  1349. update_history_time(0, uart->nport);
  1350. spin_unlock_irqrestore(&port->lock, flags);
  1351. MSG(FUC, "%s (%2d)\n", __func__, UART_FIFO_SIZE - max_count - 1);
  1352. /*
  1353. #if defined(CONFIG_MTK_HDMI_SUPPORT)
  1354. #ifdef MHL_UART_SHARE_PIN
  1355. if ((UART_FIFO_SIZE - max_count - 1) > 0)
  1356. hdmi_force_on(UART_FIFO_SIZE - max_count - 1);
  1357. #endif
  1358. #endif
  1359. */
  1360. }
  1361. /*---------------------------------------------------------------------------*/
  1362. static void mtk_uart_tx_chars(struct mtk_uart *uart)
  1363. {
  1364. /* Notice:
  1365. * The function is called by uart_start, which is protected by spin lock,
  1366. * Hence, no spin-lock is required in the functions
  1367. */
  1368. struct uart_port *port = &uart->port;
  1369. struct circ_buf *xmit = &port->state->xmit;
  1370. int count;
  1371. /* deal with x_char first */
  1372. if (unlikely(port->x_char)) {
  1373. MSG(INFO, "detect x_char!!\n");
  1374. uart->write_byte(uart, port->x_char);
  1375. port->icount.tx++;
  1376. port->x_char = 0;
  1377. return;
  1378. }
  1379. /* stop tx if circular buffer is empty or this port is stopped */
  1380. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  1381. struct tty_struct *tty = port->state->port.tty;
  1382. if (!uart_circ_empty(xmit))
  1383. MSG(ERR, "\t\tstopped: empty: %d %d %d\n", uart_circ_empty(xmit), tty->stopped,
  1384. tty->hw_stopped);
  1385. mtk_uart_stop_tx(port);
  1386. return;
  1387. }
  1388. count = port->fifosize - 1;
  1389. do {
  1390. if (uart_circ_empty(xmit))
  1391. break;
  1392. if ((count == 1) || (!uart->write_allow(uart))) {
  1393. /* to avoid the interrupt is not enable. */
  1394. mtk_uart_enable_intrs(uart, UART_IER_ETBEI);
  1395. break;
  1396. }
  1397. uart->write_byte(uart, xmit->buf[xmit->tail]);
  1398. update_history_byte(1, uart->nport, xmit->buf[xmit->tail]);
  1399. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  1400. port->icount.tx++;
  1401. } while (--count > 0);
  1402. MSG(INFO, "TX %d chars\n", port->fifosize - 1 - count);
  1403. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  1404. uart_write_wakeup(port);
  1405. if (uart_circ_empty(xmit))
  1406. mtk_uart_stop_tx(port);
  1407. update_history_time(1, uart->nport);
  1408. }
  1409. /*---------------------------------------------------------------------------*/
  1410. static void mtk_uart_rx_handler(struct mtk_uart *uart, int intrs)
  1411. {
  1412. if (uart->rx_mode == UART_NON_DMA) {
  1413. mtk_uart_rx_chars(uart);
  1414. } else if (uart->rx_mode == UART_RX_VFIFO_DMA) {
  1415. #if defined(ENABLE_VFIFO)
  1416. mtk_uart_rx_pre_handler(uart, intrs);
  1417. mtk_uart_dma_vfifo_rx_tasklet((unsigned long)uart);
  1418. #endif
  1419. }
  1420. }
  1421. /*---------------------------------------------------------------------------*/
  1422. void mtk_uart_tx_handler(struct mtk_uart *uart)
  1423. {
  1424. struct uart_port *port = &uart->port;
  1425. unsigned long flags;
  1426. if (uart->tx_mode == UART_NON_DMA) {
  1427. spin_lock_irqsave(&port->lock, flags);
  1428. mtk_uart_tx_chars(uart);
  1429. spin_unlock_irqrestore(&port->lock, flags);
  1430. } else if (uart->tx_mode == UART_TX_VFIFO_DMA) {
  1431. tasklet_schedule(&uart->dma_tx.tasklet);
  1432. }
  1433. }
  1434. /*---------------------------------------------------------------------------*/
  1435. #ifdef ENABLE_DEBUG
  1436. /*---------------------------------------------------------------------------*/
  1437. static const char * const fifo[] = { "No FIFO", "Unstable FIFO",
  1438. "Unknown", "FIFO Enabled"
  1439. };
  1440. static const char * const interrupt[] = { "Modem Status Chg", "Tx Buffer Empty",
  1441. "Rx Data Received", "BI, FE, PE, or OE",
  1442. "0x04", "0x05", "Rx Data Timeout", "0x07",
  1443. "SW Flow Control", "0x09", "0x10", "0x11", "0x12",
  1444. "0x13", "0x14", "0x15", "HW Flow Control"
  1445. };
  1446. /*---------------------------------------------------------------------------*/
  1447. #endif
  1448. /*---------------------------------------------------------------------------*/
  1449. /* static __tcmfunc irqreturn_t mtk_uart_irq(int irq, void *dev_id) */
  1450. static irqreturn_t mtk_uart_irq(int irq, void *dev_id)
  1451. {
  1452. unsigned int intrs, timeout = 0;
  1453. struct mtk_uart *uart = (struct mtk_uart *)dev_id;
  1454. #ifndef CONFIG_FIQ_DEBUGGER
  1455. #ifdef CONFIG_MT_PRINTK_UART_CONSOLE
  1456. unsigned long base;
  1457. base = uart->base;
  1458. if ((uart == console_port) && (UART_READ32(UART_LSR) & 0x01))
  1459. printk_disable_uart = 0;
  1460. #endif
  1461. #endif
  1462. intrs = mtk_uart_get_interrupt(uart);
  1463. #ifdef ENABLE_DEBUG
  1464. {
  1465. UART_IIR_REG *iir = (UART_IIR_REG *) &intrs;
  1466. if (iir->NINT)
  1467. MSG(INT, "No interrupt (%s)\n", fifo[iir->FIFOE]);
  1468. else if (iir->ID < ARRAY_SIZE(interrupt))
  1469. MSG(INT, "%02x %s (%s)\n", iir->ID, interrupt[iir->ID], fifo[iir->FIFOE]);
  1470. else
  1471. MSG(INT, "%2x\n", iir->ID);
  1472. }
  1473. #endif
  1474. intrs &= UART_IIR_INT_MASK;
  1475. if (intrs == UART_IIR_NO_INT_PENDING)
  1476. return IRQ_HANDLED;
  1477. /* pr_debug("[UART%d] intrs:0x%x\n", uart->nport, intrs); */
  1478. if (intrs == UART_IIR_CTI)
  1479. timeout = 1;
  1480. else if (intrs == UART_IIR_THRE)
  1481. mtk_uart_tx_handler(uart);
  1482. else if (intrs == UART_IIR_MS)
  1483. mtk_uart_get_modem_status(uart);
  1484. mtk_uart_intr_last_check(uart, intrs);
  1485. mtk_uart_rx_handler(uart, intrs);
  1486. return IRQ_HANDLED;
  1487. }
  1488. /*---------------------------------------------------------------------------*/
  1489. /* test whether the transmitter fifo and shifter for the port is empty. */
  1490. static unsigned int mtk_uart_tx_empty(struct uart_port *port)
  1491. {
  1492. struct mtk_uart *uart = (struct mtk_uart *)port;
  1493. MSG_FUNC_ENTRY();
  1494. #if defined(ENABLE_VFIFO)
  1495. if (uart->tx_mode == UART_TX_VFIFO_DMA)
  1496. return mtk_uart_vfifo_is_empty(uart->dma_tx.vfifo) ? TIOCSER_TEMT : 0;
  1497. #endif
  1498. return uart->write_allow(uart) ? TIOCSER_TEMT : 0;
  1499. }
  1500. /*---------------------------------------------------------------------------*/
  1501. /* FIXME */
  1502. /* stop transmitting characters
  1503. * Note: this function is call with interrupt disabled
  1504. */
  1505. static void mtk_uart_stop_tx(struct uart_port *port)
  1506. {
  1507. struct mtk_uart *uart = (struct mtk_uart *)port;
  1508. MSG_FUNC_ENTRY();
  1509. #if defined(ENABLE_VFIFO)
  1510. if (uart->tx_mode == UART_TX_VFIFO_DMA) {
  1511. /*1. UART_IER_ETBEI can't be disabled or zero data appears in TX */
  1512. /*2. TX_INT_EN.INTEN will be reset automatically by HW */
  1513. } else
  1514. #endif
  1515. /* disable tx interrupt */
  1516. mtk_uart_disable_intrs(uart, UART_IER_ETBEI);
  1517. uart->tx_stop = 1;
  1518. }
  1519. /*---------------------------------------------------------------------------*/
  1520. /* FIXME */
  1521. /* start transmitting characters.
  1522. * Note: this function is call with interrupt disabled
  1523. */
  1524. static void mtk_uart_start_tx(struct uart_port *port)
  1525. {
  1526. struct mtk_uart *uart = (struct mtk_uart *)port;
  1527. struct circ_buf *xmit = &port->state->xmit;
  1528. unsigned long size;
  1529. size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  1530. if (!size)
  1531. return;
  1532. uart->tx_stop = 0;
  1533. #ifdef ENABLE_RAW_DATA_DUMP
  1534. reset_tx_raw_data(uart);
  1535. #endif
  1536. #if defined(ENABLE_VFIFO)
  1537. if (uart->tx_mode == UART_TX_VFIFO_DMA) {
  1538. if (UART_DEBUG_EVT(DBG_EVT_BUF))
  1539. pr_debug("[UART%d] mtk_uart_start_tx\n", uart->nport);
  1540. if (!uart->write_allow(uart))
  1541. mtk_uart_vfifo_enable_tx_intr(uart);
  1542. else
  1543. mtk_uart_dma_vfifo_tx_tasklet((unsigned long)uart);
  1544. } else {
  1545. #else
  1546. {
  1547. #endif
  1548. if (uart->write_allow(uart))
  1549. mtk_uart_tx_chars(uart);
  1550. }
  1551. }
  1552. /*---------------------------------------------------------------------------*/
  1553. static void mtk_uart_send_xchar(struct uart_port *port, char ch)
  1554. {
  1555. struct mtk_uart *uart = (struct mtk_uart *)port;
  1556. unsigned long flags;
  1557. MSG_FUNC_ENTRY();
  1558. if (uart->tx_stop)
  1559. return;
  1560. spin_lock_irqsave(&port->lock, flags);
  1561. while (!mtk_uart_write_allow(uart))
  1562. ;
  1563. mtk_uart_write_byte(uart, (unsigned char)ch);
  1564. port->icount.tx++;
  1565. spin_unlock_irqrestore(&port->lock, flags);
  1566. }
  1567. /*---------------------------------------------------------------------------*/
  1568. /* enable the modem status interrupts */
  1569. static void mtk_uart_enable_ms(struct uart_port *port)
  1570. {
  1571. struct mtk_uart *uart = (struct mtk_uart *)port;
  1572. MSG_FUNC_ENTRY();
  1573. uart->ms_enable = 1;
  1574. }
  1575. /*---------------------------------------------------------------------------*/
  1576. /* grab any interrupt resources and initialize any low level driver state */
  1577. static int mtk_uart_startup(struct uart_port *port)
  1578. {
  1579. struct mtk_uart *uart = (struct mtk_uart *)port;
  1580. int ret;
  1581. long mask = UART_IER_HW_NORMALINTS;
  1582. MSG_FUNC_ENTRY();
  1583. /*the uart port is power up in power_mgnt */
  1584. /* Reset default flag when the uart starts up, or the previous setting,
  1585. * Such as custom baudrate will be still applied even it is ever closed
  1586. */
  1587. /* uart->port.flags = UPF_BOOT_AUTOCONF; */
  1588. /* uart->port.custom_divisor = 1; */
  1589. /* Check whether is ATE_Factory mode */
  1590. #ifdef ATE_FACTORY_ENABLE
  1591. mtk_uart_is_ate_factory_mode(uart);
  1592. #endif /*ATE_FACTORY_ENABLE */
  1593. uart->fctl_mode = UART_FC_NONE;
  1594. /* disable interrupts */
  1595. mtk_uart_disable_intrs(uart, UART_IER_ALL_INTS);
  1596. /* allocate irq line */
  1597. /* ret = request_irq(port->irq, mtk_uart_irq, 0, DRV_NAME, uart); */
  1598. #ifdef CONFIG_OF
  1599. /* [ALPS00142658] Fix incompatible pointer type waning */
  1600. ret = request_irq(port->irq, (irq_handler_t) mtk_uart_irq, uart->setting->irq_flags, DRV_NAME, uart);
  1601. #else
  1602. /* [ALPS00142658] Fix incompatible pointer type waning */
  1603. ret = request_irq(port->irq, (irq_handler_t) mtk_uart_irq, IRQF_LEVEL_TRIGGER_POLARITY, DRV_NAME, uart);
  1604. #endif
  1605. if (ret)
  1606. return ret;
  1607. #if defined(ENABLE_VFIFO)
  1608. #if defined(ENABLE_VFIFO_DEBUG)
  1609. mtk_uart_vfifo_prepare(uart);
  1610. uart->dma_mode = uart->setting->dma_mode;
  1611. uart->tx_mode = uart->setting->tx_mode;
  1612. uart->rx_mode = uart->setting->rx_mode;
  1613. uart->tx_trig = uart->setting->tx_trig;
  1614. uart->rx_trig = uart->setting->rx_trig;
  1615. #endif
  1616. /* allocate vfifo */
  1617. if (uart->rx_mode == UART_RX_VFIFO_DMA) {
  1618. uart->rx_vfifo = mtk_uart_vfifo_alloc(uart, UART_RX_VFIFO);
  1619. ret = mtk_uart_dma_alloc(uart, &uart->dma_rx, uart->rx_mode, uart->rx_vfifo);
  1620. if (!uart->rx_vfifo || ret) {
  1621. uart->rx_mode = UART_NON_DMA;
  1622. MSG(ERR, "RX DMA alloc fail [%d]\n", ret);
  1623. }
  1624. }
  1625. if (uart->tx_mode == UART_TX_VFIFO_DMA) {
  1626. uart->tx_vfifo = mtk_uart_vfifo_alloc(uart, UART_TX_VFIFO);
  1627. ret = mtk_uart_dma_alloc(uart, &uart->dma_tx, uart->tx_mode, uart->tx_vfifo);
  1628. if (!uart->tx_vfifo || ret) {
  1629. uart->tx_mode = UART_NON_DMA;
  1630. MSG(ERR, "TX DMA alloc fail [%d]\n", ret);
  1631. }
  1632. }
  1633. /* start vfifo dma */
  1634. if (uart->tx_mode == UART_TX_VFIFO_DMA) {
  1635. uart->write_allow = mtk_uart_vfifo_write_allow;
  1636. uart->write_byte = mtk_uart_vfifo_write_byte;
  1637. mtk_uart_vfifo_enable(uart, uart->tx_vfifo);
  1638. mtk_uart_dma_setup(uart, &uart->dma_tx);
  1639. if (mtk_uart_dma_start(uart, &uart->dma_tx))
  1640. MSG(ERR, "mtk_uart_dma_start fails\n");
  1641. hrtimer_init(&uart->tx_vfifo->flush, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  1642. uart->tx_vfifo->flush.function = mtk_uart_tx_vfifo_timeout;
  1643. } else if (uart->tx_mode == UART_NON_DMA) {
  1644. uart->write_allow = mtk_uart_write_allow;
  1645. uart->write_byte = mtk_uart_write_byte;
  1646. }
  1647. if (uart->rx_mode == UART_RX_VFIFO_DMA) {
  1648. uart->read_allow = mtk_uart_vfifo_read_allow;
  1649. uart->read_byte = mtk_uart_vfifo_read_byte;
  1650. mtk_uart_vfifo_enable(uart, uart->rx_vfifo);
  1651. mtk_uart_dma_setup(uart, &uart->dma_rx);
  1652. if (mtk_uart_dma_start(uart, &uart->dma_rx))
  1653. MSG(ERR, "mtk_uart_dma_start fails\n");
  1654. } else if (uart->rx_mode == UART_NON_DMA) {
  1655. uart->read_allow = mtk_uart_read_allow;
  1656. uart->read_byte = mtk_uart_read_byte;
  1657. }
  1658. #endif
  1659. if (uart->tx_mode == UART_TX_VFIFO_DMA || uart->rx_mode == UART_RX_VFIFO_DMA) {
  1660. if (!bt_port || (bt_port && (uart != bt_port)))
  1661. mtk_uart_disable_dpidle(uart);
  1662. } else if (uart->tx_mode == UART_NON_DMA && uart->rx_mode == UART_NON_DMA) {
  1663. mtk_uart_enable_dpidle(uart);
  1664. }
  1665. uart->tx_stop = 0;
  1666. uart->rx_stop = 0;
  1667. /* After applying UART as Level-Triggered IRQ, the function must be called or
  1668. * the interrupt will be incorrect activated.
  1669. */
  1670. mtk_uart_fifo_set_trig(uart, uart->tx_trig, uart->rx_trig);
  1671. mtk_uart_enable_sleep(uart);
  1672. /* enable interrupts */
  1673. mtk_uart_enable_intrs(uart, mask);
  1674. return 0;
  1675. }
  1676. /*---------------------------------------------------------------------------*/
  1677. /* disable the port, disable any break condition that may be in effect, and
  1678. * free any interrupt resources
  1679. */
  1680. static void mtk_uart_shutdown(struct uart_port *port)
  1681. {
  1682. struct mtk_uart *uart = (struct mtk_uart *)port;
  1683. MSG_FUNC_ENTRY();
  1684. /* disable interrupts */
  1685. mtk_uart_disable_intrs(uart, UART_IER_ALL_INTS);
  1686. #if defined(ENABLE_VFIFO)
  1687. /* free dma channels and vfifo */
  1688. mtk_uart_dma_free(uart, &uart->dma_tx);
  1689. mtk_uart_dma_free(uart, &uart->dma_rx);
  1690. #endif
  1691. mdelay(1);
  1692. mtk_uart_fifo_flush(uart);
  1693. /* release irq line */
  1694. free_irq(port->irq, port);
  1695. mtk_uart_enable_dpidle(uart);
  1696. /* the uart port will be powered off in power_mgnt */
  1697. }
  1698. /*---------------------------------------------------------------------------*/
  1699. static void mtk_uart_flush_buffer(struct uart_port *port)
  1700. {
  1701. #if defined(ENABLE_DEBUG)
  1702. struct mtk_uart *uart = (struct mtk_uart *)port;
  1703. MSG_FUNC_ENTRY();
  1704. #endif
  1705. /* mtk_uart_fifo_flush(uart); */
  1706. }
  1707. /*---------------------------------------------------------------------------*/
  1708. /*
  1709. * For stability test
  1710. */
  1711. void mtk_uart_update_sysclk(void)
  1712. {
  1713. int i;
  1714. unsigned long flags;
  1715. struct mtk_uart *uart;
  1716. struct uart_port *port;
  1717. unsigned int baud;
  1718. for (i = 0; i < UART_NR; i++) {
  1719. uart = &mtk_uarts[i];
  1720. port = &uart->port;
  1721. baud = uart->baudrate;
  1722. port->uartclk = UART_SYSCLK; /* mt6575_get_bus_freq()*1000/4; */
  1723. uart->sysclk = UART_SYSCLK; /* mt6575_get_bus_freq()*1000/4; */
  1724. if (baud == 0)
  1725. continue; /* The istance is not initialized yet. */
  1726. spin_lock_irqsave(&port->lock, flags);
  1727. mtk_uart_set_baud(uart, baud);
  1728. spin_unlock_irqrestore(&port->lock, flags);
  1729. }
  1730. }
  1731. EXPORT_SYMBOL(mtk_uart_update_sysclk);
  1732. /*---------------------------------------------------------------------------*/
  1733. /* change the port parameters, including word length, parity, stop bits.
  1734. * update read_status_mask and ignore_status_mask to indicate the types of
  1735. * events we are interrested in receiving
  1736. */
  1737. static void mtk_uart_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old)
  1738. {
  1739. struct mtk_uart *uart = (struct mtk_uart *)port;
  1740. unsigned long flags;
  1741. unsigned int baud;
  1742. int datalen, mode;
  1743. int parity = 0;
  1744. int stopbit = 1;
  1745. MSG_FUNC_ENTRY();
  1746. /* datalen : default 8bits */
  1747. switch (termios->c_cflag & CSIZE) {
  1748. case CS5:
  1749. datalen = 5;
  1750. break;
  1751. case CS6:
  1752. datalen = 6;
  1753. break;
  1754. case CS7:
  1755. datalen = 7;
  1756. break;
  1757. case CS8:
  1758. default:
  1759. datalen = 8;
  1760. break;
  1761. }
  1762. /* stopbit : default 1 */
  1763. if (termios->c_cflag & CSTOPB)
  1764. stopbit = 2;
  1765. /* parity : default none */
  1766. if (termios->c_cflag & PARENB) {
  1767. if (termios->c_cflag & PARODD)
  1768. parity = 1; /* odd */
  1769. else
  1770. parity = 2; /* even */
  1771. }
  1772. spin_lock_irqsave(&port->lock, flags);
  1773. /* read status mask */
  1774. port->read_status_mask = 0;
  1775. if (termios->c_iflag & INPCK) {
  1776. /* frame error, parity error */
  1777. port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  1778. }
  1779. if (termios->c_iflag & (BRKINT | PARMRK)) {
  1780. /* break error */
  1781. port->read_status_mask |= UART_LSR_BI;
  1782. }
  1783. port->ignore_status_mask = 0;
  1784. if (termios->c_iflag & IGNPAR) {
  1785. /* ignore parity and framing errors */
  1786. port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
  1787. }
  1788. if (termios->c_iflag & IGNBRK) {
  1789. /* ignore break errors. */
  1790. port->ignore_status_mask |= UART_LSR_BI;
  1791. if (termios->c_iflag & IGNPAR) {
  1792. /* ignore overrun errors */
  1793. port->ignore_status_mask |= UART_LSR_OE;
  1794. }
  1795. }
  1796. /* ignore all characters if CREAD is not set */
  1797. if ((termios->c_cflag & CREAD) == 0)
  1798. uart->ignore_rx = 1;
  1799. /* update per port timeout */
  1800. baud = uart_get_baud_rate(port, termios, old, 0, uart->sysclk); /*when dividor is 1, baudrate = clock */
  1801. uart_update_timeout(port, termios->c_cflag, baud);
  1802. mtk_uart_config(uart, datalen, stopbit, parity);
  1803. mtk_uart_set_baud(uart, baud);
  1804. /* setup fifo trigger level */
  1805. mtk_uart_fifo_set_trig(uart, uart->tx_trig, uart->rx_trig);
  1806. /* setup hw flow control: only port 0 ~1 support hw rts/cts */
  1807. MSG(CFG, "c_lflag:%X, c_iflag:%X, c_oflag:%X, c_cflag:%X\n", termios->c_lflag, termios->c_iflag,
  1808. termios->c_oflag, termios->c_cflag);
  1809. if (HW_FLOW_CTRL_PORT(uart) && (termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & 0x80000000))) {
  1810. pr_debug("Hardware Flow Control\n");
  1811. mode = UART_FC_HW;
  1812. } else if (termios->c_iflag & 0x80000000) {
  1813. pr_debug("MTK Software Flow Control\n");
  1814. mode = UART_FC_SW;
  1815. } else if (termios->c_iflag & (IXON | IXOFF | IXANY)) {
  1816. pr_debug("Linux default SW Flow Control\n");
  1817. mode = UART_FC_NONE;
  1818. } else {
  1819. pr_debug("No Flow Control\n");
  1820. mode = UART_FC_NONE;
  1821. }
  1822. mtk_uart_set_flow_ctrl(uart, mode);
  1823. /* determine if port should enable modem status interrupt */
  1824. if (UART_ENABLE_MS(port, termios->c_cflag))
  1825. uart->ms_enable = 1;
  1826. else
  1827. uart->ms_enable = 0;
  1828. if (console_port && (uart == console_port) && uart->port.cons)
  1829. uart->port.cons->cflag = termios->c_cflag;
  1830. spin_unlock_irqrestore(&port->lock, flags);
  1831. }
  1832. /*---------------------------------------------------------------------------*/
  1833. /* perform any power management related activities on the port */
  1834. static void mtk_uart_power_mgnt(struct uart_port *port, unsigned int state, unsigned int oldstate)
  1835. {
  1836. struct mtk_uart *uart = (struct mtk_uart *)port;
  1837. MSG(FUC, "%s(%d->%d)\n", __func__, oldstate, state);
  1838. switch (state) {
  1839. case 0:
  1840. mtk_uart_power_up(uart);
  1841. break;
  1842. case 3:
  1843. mtk_uart_power_down(uart);
  1844. break;
  1845. default:
  1846. MSG(ERR, "unknown pm: %d\n", state);
  1847. }
  1848. }
  1849. /*---------------------------------------------------------------------------*/
  1850. /* return a pointer to a string constant describing the port */
  1851. static const char *mtk_uart_type(struct uart_port *port)
  1852. {
  1853. return "MTK UART";
  1854. }
  1855. /*---------------------------------------------------------------------------*/
  1856. /* release any memory and io region resources currently in used by the port */
  1857. static void mtk_uart_release_port(struct uart_port *port)
  1858. {
  1859. }
  1860. /*---------------------------------------------------------------------------*/
  1861. /* request any memory and io region resources required by the port */
  1862. static int mtk_uart_request_port(struct uart_port *port)
  1863. {
  1864. return 0;
  1865. }
  1866. /*---------------------------------------------------------------------------*/
  1867. /* perform any autoconfiguration steps required by the port.
  1868. * it's expected to claim the resources and map the port.
  1869. */
  1870. static void mtk_uart_config_port(struct uart_port *port, int flags)
  1871. {
  1872. struct mtk_uart *uart = (struct mtk_uart *)port;
  1873. if (flags & UART_CONFIG_TYPE) {
  1874. if (mtk_uart_request_port(port))
  1875. MSG(ERR, "mtk_uart_request_port fail\n");
  1876. port->type = PORT_MTK;
  1877. }
  1878. }
  1879. /*---------------------------------------------------------------------------*/
  1880. /* verify if the new serial information contained within 'ser' is suitable */
  1881. static int mtk_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  1882. {
  1883. #if (defined(ENABLE_DEBUG) || defined(SERIAL_STRUCT_EXT)) /*[ALPS00142658] Fix unused variable waring */
  1884. struct mtk_uart *uart = (struct mtk_uart *)port;
  1885. #endif
  1886. int ret = 0;
  1887. MSG(FUC, "%s: %8x, %d, %d\n", __func__, ser->flags, ser->custom_divisor, uart->custom_baud);
  1888. if (ser->type != PORT_UNKNOWN && ser->type != PORT_MTK)
  1889. ret = -EINVAL;
  1890. if (ser->irq != port->irq)
  1891. ret = -EINVAL;
  1892. if (ser->baud_base < 110)
  1893. ret = -EINVAL;
  1894. #if defined(SERIAL_STRUCT_EXT)
  1895. /*EXtension: the custom baudrate is stored in reserved field */
  1896. uart->custom_baud = ser->reserved[0];
  1897. #endif
  1898. return ret;
  1899. }
  1900. /*---------------------------------------------------------------------------*/
  1901. /* perform any port specific IOCTLs */
  1902. static int mtk_uart_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
  1903. {
  1904. #if defined(ENABLE_DEBUG)
  1905. struct mtk_uart *uart = (struct mtk_uart *)port;
  1906. MSG(FUC, "IOCTL: %8X\n", cmd);
  1907. #endif
  1908. return -ENOIOCTLCMD;
  1909. }
  1910. /*---------------------------------------------------------------------------*/
  1911. #ifdef CONFIG_CONSOLE_POLL
  1912. /*---------------------------------------------------------------------------*/
  1913. static int mtk_uart_get_poll_char(struct uart_port *port)
  1914. { /* don't care vfifo setting */
  1915. struct mtk_uart *uart = (struct mtk_uart *)port;
  1916. /* [ALPS00033048] For Linux 2.6.35 kgdb chagne, using while loop may block kgdb,
  1917. * return NO_POLL_CHAR directly if no data to read */
  1918. #if 0
  1919. while (!(uart->read_status(uart) & UART_LSR_DR))
  1920. cpu_relax();
  1921. #else
  1922. if (!mtk_uart_data_ready(uart))
  1923. return NO_POLL_CHAR;
  1924. #endif
  1925. /* End of [ALPS00033048] */
  1926. return mtk_uart_read_byte(uart);
  1927. }
  1928. /*---------------------------------------------------------------------------*/
  1929. static void mtk_uart_put_poll_char(struct uart_port *port, unsigned char c)
  1930. { /* don't care vfifo setting */
  1931. struct mtk_uart *uart = (struct mtk_uart *)port;
  1932. while (!mtk_uart_write_allow(uart))
  1933. barrier();
  1934. mtk_uart_write_byte(uart, c);
  1935. }
  1936. /*---------------------------------------------------------------------------*/
  1937. #endif
  1938. /*---------------------------------------------------------------------------*/
  1939. static struct uart_ops mtk_uart_ops = {
  1940. .tx_empty = mtk_uart_tx_empty,
  1941. .set_mctrl = mtk_uart_set_mctrl,
  1942. .get_mctrl = mtk_uart_get_mctrl,
  1943. .stop_tx = mtk_uart_stop_tx,
  1944. .start_tx = mtk_uart_start_tx,
  1945. .stop_rx = mtk_uart_stop_rx,
  1946. .send_xchar = mtk_uart_send_xchar,
  1947. .enable_ms = mtk_uart_enable_ms,
  1948. .break_ctl = mtk_uart_break_ctl,
  1949. .startup = mtk_uart_startup,
  1950. .shutdown = mtk_uart_shutdown,
  1951. .flush_buffer = mtk_uart_flush_buffer,
  1952. .set_termios = mtk_uart_set_termios,
  1953. .pm = mtk_uart_power_mgnt,
  1954. .type = mtk_uart_type,
  1955. .release_port = mtk_uart_release_port,
  1956. .request_port = mtk_uart_request_port,
  1957. .config_port = mtk_uart_config_port,
  1958. .verify_port = mtk_uart_verify_port,
  1959. .ioctl = mtk_uart_ioctl,
  1960. #ifdef CONFIG_CONSOLE_POLL
  1961. .poll_get_char = mtk_uart_get_poll_char,
  1962. .poll_put_char = mtk_uart_put_poll_char,
  1963. #endif
  1964. };
  1965. /*---------------------------------------------------------------------------*/
  1966. static struct uart_driver mtk_uart_drv = {
  1967. .owner = THIS_MODULE,
  1968. .driver_name = DRV_NAME,
  1969. .dev_name = "ttyMT",
  1970. .major = UART_MAJOR,
  1971. .minor = UART_MINOR,
  1972. .nr = UART_NR,
  1973. #if defined(CONFIG_MTK_SERIAL_CONSOLE) && !defined(CONFIG_MTK_SERIAL_MODEM_TEST)
  1974. .cons = &mtk_uart_console,
  1975. #endif
  1976. };
  1977. /*---------------------------------------------------------------------------*/
  1978. static int mtk_uart_probe(struct platform_device *pdev)
  1979. {
  1980. struct mtk_uart *uart;
  1981. int err;
  1982. #if !defined(CONFIG_MTK_FPGA)
  1983. #if !defined(CONFIG_MTK_CLKMGR)
  1984. static const char * const clk_uart_name[] = {
  1985. "uart0-main",
  1986. "uart1-main",
  1987. "uart2-main",
  1988. "uart3-main",
  1989. "uart4-main",
  1990. };
  1991. struct mtk_uart_setting *uart_setting = NULL;
  1992. #endif
  1993. #if !defined(CONFIG_MTK_LEGACY)
  1994. /* for GPIO pinctrl */
  1995. struct pinctrl *ppinctrl = NULL;
  1996. #endif
  1997. #endif /* !defined(CONFIG_MTK_FPGA) */
  1998. #ifdef CONFIG_OF
  1999. if (pdev->dev.of_node) {
  2000. struct device_node *node = pdev->dev.of_node;
  2001. err = of_property_read_u32(node, "cell-index", &pdev->id);
  2002. if (err)
  2003. pr_err("[DTS] get uart platform_device id fail!!\n");
  2004. }
  2005. if (pdev->id >= UART_NR) {
  2006. pr_err("DTS cell ID %d > UART nuber %d\n", pdev->id, UART_NR);
  2007. return -ENODEV;
  2008. }
  2009. #endif
  2010. uart = &mtk_uarts[pdev->id];
  2011. MSG_FUNC_ENTRY();
  2012. /* For clock setting */
  2013. #if !defined(CONFIG_MTK_CLKMGR) && !defined(CONFIG_MTK_FPGA)
  2014. uart_setting = get_uart_default_settings(pdev->id);
  2015. uart_setting->clk_uart_main = devm_clk_get(&pdev->dev, clk_uart_name[pdev->id]);
  2016. if (IS_ERR(uart_setting->clk_uart_main)) {
  2017. pr_err("[UART%d][CCF]cannot get %s clock. ptr_err:%ld\n", pdev->id, clk_uart_name[pdev->id]
  2018. , PTR_ERR(uart_setting->clk_uart_main));
  2019. return PTR_ERR(uart_setting->clk_uart_main);
  2020. }
  2021. pr_debug("[UART%d][CCF]clk_uart%d_main:%p\n", pdev->id, pdev->id, uart_setting->clk_uart_main);
  2022. if (pdev->id == 0) {
  2023. struct clk *clk_uart0_dma = devm_clk_get(&pdev->dev, "uart-apdma");
  2024. if (IS_ERR(clk_uart0_dma)) {
  2025. pr_err("[UART][CCF]cannot get clk_uart0_dma clock. ptr_err:%ld\n", PTR_ERR(clk_uart0_dma));
  2026. return PTR_ERR(clk_uart0_dma);
  2027. }
  2028. set_uart_dma_clk(pdev->id, clk_uart0_dma);
  2029. pr_debug("[UART][CCF]clk_uart0_dma:%p\n", clk_uart0_dma);
  2030. }
  2031. #else /* !defined(CONFIG_MTK_CLKMGR) && !defined(CONFIG_MTK_FPGA) */
  2032. pr_debug("[UART][CCF]mtk_uart_probe CONFIG_MTK_CLKMGR or CONFIG_MTK_FPGA is defined!\n");
  2033. #endif /*!defined(CONFIG_MTK_CLKMGR) && !defined(CONFIG_MTK_FPGA) */
  2034. /* For GPIO setting */
  2035. #if !defined(CONFIG_MTK_LEGACY) && !defined(CONFIG_MTK_FPGA)
  2036. ppinctrl = devm_pinctrl_get(&pdev->dev);
  2037. if (IS_ERR(ppinctrl)) {
  2038. err = PTR_ERR(ppinctrl);
  2039. pr_err("[UART%d][PinC]cannot find pinctrl. ptr_err:%ld\n", pdev->id, PTR_ERR(ppinctrl));
  2040. return err;
  2041. }
  2042. set_uart_pinctrl(pdev->id, ppinctrl);
  2043. pr_debug("[UART%d][PinC]set idx:%d, ppinctrl:%p\n", pdev->id, pdev->id, ppinctrl);
  2044. #else /* !defined(CONFIG_MTK_LEGACY) && !defined(CONFIG_MTK_FPGA) */
  2045. pr_debug("[UART][PinC]mtk_uart_probe CONFIG_MTK_LEGACY or CONFIG_MTK_FPGA is defined!\n");
  2046. #endif /* !defined(CONFIG_MTK_LEGACY) && !defined(CONFIG_MTK_FPGA) */
  2047. if (mtk_uart_plat_info_query("ADD_DMA_BIT_MASK_32"))
  2048. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  2049. uart->port.dev = &pdev->dev;
  2050. err = uart_add_one_port(&mtk_uart_drv, &uart->port);
  2051. if (!err)
  2052. platform_set_drvdata(pdev, uart);
  2053. #if defined(ENABLE_VFIFO)
  2054. err = mtk_uart_vfifo_create(uart);
  2055. if (err) {
  2056. mtk_uart_vfifo_delete(uart);
  2057. DEV_ERR("create vff buffer fail:%d\n", err);
  2058. }
  2059. #endif
  2060. return err;
  2061. }
  2062. /*---------------------------------------------------------------------------*/
  2063. static int mtk_uart_remove(struct platform_device *pdev)
  2064. {
  2065. struct mtk_uart *uart = platform_get_drvdata(pdev);
  2066. int err;
  2067. platform_set_drvdata(pdev, NULL);
  2068. if (!uart)
  2069. return -EINVAL;
  2070. err = uart_remove_one_port(&mtk_uart_drv, &uart->port);
  2071. #if defined(ENABLE_VFIFO)
  2072. mtk_uart_vfifo_delete(uart);
  2073. #endif
  2074. return err;
  2075. }
  2076. /*---------------------------------------------------------------------------*/
  2077. #ifdef CONFIG_PM
  2078. /*---------------------------------------------------------------------------*/
  2079. static int mtk_uart_syscore_suspend(void)
  2080. {
  2081. int ret = 0;
  2082. unsigned long flags;
  2083. if (bt_port) {
  2084. struct mtk_uart *uart = bt_port;
  2085. spin_lock_irqsave(&mtk_uart_bt_lock, flags);
  2086. ret = uart_suspend_port(&mtk_uart_drv, &uart->port);
  2087. /* To keeping uart idle state */
  2088. /* tx pin: idle->high power down->low */
  2089. mtk_uart_switch_tx_to_gpio(uart);
  2090. spin_unlock_irqrestore(&mtk_uart_bt_lock, flags);
  2091. }
  2092. return ret;
  2093. }
  2094. /*---------------------------------------------------------------------------*/
  2095. static void mtk_uart_syscore_resume(void)
  2096. {
  2097. int ret = 0;
  2098. unsigned long flags;
  2099. if (bt_port) {
  2100. struct mtk_uart *uart = bt_port;
  2101. spin_lock_irqsave(&mtk_uart_bt_lock, flags);
  2102. mtk_uart_switch_to_tx(uart);
  2103. ret = uart_resume_port(&mtk_uart_drv, &uart->port);
  2104. spin_unlock_irqrestore(&mtk_uart_bt_lock, flags);
  2105. disable_irq(uart->port.irq);
  2106. }
  2107. }
  2108. /*---------------------------------------------------------------------------*/
  2109. static int mtk_uart_suspend(struct platform_device *pdev, pm_message_t state)
  2110. {
  2111. int ret = 0;
  2112. struct mtk_uart *uart = platform_get_drvdata(pdev);
  2113. /* For console_suspend_enabled=0 */
  2114. if (console_suspend_enabled == 0 && uart == console_port && uart->poweron_count > 0)
  2115. mtk_uart_save(uart);
  2116. if (uart && (uart->nport < UART_NR) && (uart != bt_port)) {
  2117. ret = uart_suspend_port(&mtk_uart_drv, &uart->port);
  2118. mtk_uart_switch_rx_to_gpio(uart);
  2119. }
  2120. return ret;
  2121. }
  2122. /*---------------------------------------------------------------------------*/
  2123. static int mtk_uart_resume(struct platform_device *pdev)
  2124. {
  2125. int ret = 0;
  2126. struct mtk_uart *uart = platform_get_drvdata(pdev);
  2127. if (uart && (uart->nport < UART_NR) && (uart != bt_port)) {
  2128. mtk_uart_switch_to_rx(uart);
  2129. ret = uart_resume_port(&mtk_uart_drv, &uart->port);
  2130. }
  2131. return ret;
  2132. }
  2133. /*---------------------------------------------------------------------------*/
  2134. static int mtk_uart_pm_suspend(struct device *device)
  2135. {
  2136. struct platform_device *pdev;
  2137. /*pr_debug("calling %s()\n", __func__);*/
  2138. pdev = to_platform_device(device);
  2139. BUG_ON(pdev == NULL);
  2140. return mtk_uart_suspend(pdev, PMSG_SUSPEND);
  2141. }
  2142. static int mtk_uart_pm_resume(struct device *device)
  2143. {
  2144. struct platform_device *pdev;
  2145. /*pr_debug("calling %s()\n", __func__);*/
  2146. pdev = to_platform_device(device);
  2147. BUG_ON(pdev == NULL);
  2148. return mtk_uart_resume(pdev);
  2149. }
  2150. static int mtk_uart_pm_freeze(struct device *device)
  2151. {
  2152. struct platform_device *pdev;
  2153. struct mtk_uart *uart = NULL;
  2154. int ret = 0;
  2155. int port_idx = 0;
  2156. pdev = to_platform_device(device);
  2157. BUG_ON(pdev == NULL);
  2158. uart = platform_get_drvdata(pdev);
  2159. port_idx = uart->nport;
  2160. if (uart_freeze_enable[port_idx]) {
  2161. ret = uart_suspend_port(&mtk_uart_drv, &uart->port);
  2162. pr_warn("[%s] here.\n", __func__);
  2163. /* To keeping uart idle state */
  2164. /* tx pin: idle->high power down->low */
  2165. mtk_uart_switch_tx_to_gpio(uart);
  2166. pr_warn("[%s] done.\n", __func__);
  2167. }
  2168. return 0; /* mtk_uart_suspend(pdev, PMSG_SUSPEND); */
  2169. }
  2170. static int mtk_uart_pm_restore(struct device *device)
  2171. {
  2172. struct platform_device *pdev;
  2173. struct mtk_uart *uart;
  2174. int ret = 0;
  2175. int port_idx = 0;
  2176. pdev = to_platform_device(device);
  2177. BUG_ON(pdev == NULL);
  2178. uart = platform_get_drvdata(pdev);
  2179. port_idx = uart->nport;
  2180. if (uart_freeze_enable[port_idx]) {
  2181. mtk_uart_switch_to_tx(uart);
  2182. ret = uart_resume_port(&mtk_uart_drv, &uart->port);
  2183. pr_warn("[%s] uart (%p) base: 0x%lx, nport %d, dma mode: %d\n", __func__,
  2184. uart, uart->base, uart->nport, uart->dma_mode);
  2185. }
  2186. return mtk_uart_resume(pdev);
  2187. }
  2188. static int mtk_uart_pm_restore_noirq(struct device *device)
  2189. {
  2190. /* FIXME. not get GIC_DIST_BASE from DTS */
  2191. #ifndef CONFIG_OF
  2192. unsigned int gic_pending;
  2193. #endif
  2194. struct mtk_uart *uart;
  2195. /* pr_warn("calling %s()\n", __func__); */
  2196. uart = dev_get_drvdata(device);
  2197. if (!uart || !uart->setting) {
  2198. pr_warn("[%s] uart or uart->setting is null!!\n", __func__);
  2199. return 0;
  2200. }
  2201. mtk_uart_fifo_set_trig(uart, uart->tx_trig, uart->rx_trig);
  2202. #ifdef CONFIG_OF
  2203. irq_set_irq_type(uart->setting->irq_num, uart->setting->irq_flags);
  2204. #else
  2205. if (uart->setting->irq_sen == MT_EDGE_SENSITIVE)
  2206. irq_set_irq_type(uart->setting->irq_num, IRQF_TRIGGER_FALLING);
  2207. else
  2208. irq_set_irq_type(uart->setting->irq_num, IRQF_LEVEL_TRIGGER_POLARITY);
  2209. #endif
  2210. #define GIC_DIST_PENDING_SET 0x200
  2211. if (uart->tx_vfifo && uart->tx_mode == UART_TX_VFIFO_DMA) {
  2212. irq_set_irq_type(uart->tx_vfifo->irq_id, IRQF_LEVEL_TRIGGER_POLARITY);
  2213. /* FIXME. not get GIC_DIST_BASE from DTS */
  2214. #ifndef CONFIG_OF
  2215. gic_pending = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_PENDING_SET + uart->tx_vfifo->irq_id / 32 * 4);
  2216. pr_warn("[%s] tx_vfifo(%p) gic_pending_mask(0x%08x)\n", __func__, uart->tx_vfifo->base, gic_pending);
  2217. #endif
  2218. }
  2219. if (uart->rx_vfifo && uart->rx_mode == UART_RX_VFIFO_DMA) {
  2220. irq_set_irq_type(uart->rx_vfifo->irq_id, IRQF_LEVEL_TRIGGER_POLARITY);
  2221. /* FIXME. not get GIC_DIST_BASE from DTS */
  2222. #ifndef CONFIG_OF
  2223. gic_pending = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_PENDING_SET + uart->rx_vfifo->irq_id / 32 * 4);
  2224. pr_warn("[%s] rx_vfifo(%p) gic_pending_mask(0x%08x)\n", __func__, uart->rx_vfifo->base, gic_pending);
  2225. #endif
  2226. }
  2227. return 0;
  2228. }
  2229. /*---------------------------------------------------------------------------*/
  2230. #else /*CONFIG_PM */
  2231. /*---------------------------------------------------------------------------*/
  2232. #define mtk_uart_pm_suspend NULL
  2233. #define mtk_uart_pm_resume NULL
  2234. #define mtk_uart_pm_freeze NULL
  2235. #define mtk_uart_pm_restore NULL
  2236. #define mtk_uart_pm_restore_noirq NULL
  2237. /*---------------------------------------------------------------------------*/
  2238. #endif /*CONFIG_PM */
  2239. /*---------------------------------------------------------------------------*/
  2240. const struct dev_pm_ops mtk_uart_pm_ops = {
  2241. .suspend = mtk_uart_pm_suspend,
  2242. .resume = mtk_uart_pm_resume,
  2243. .freeze = mtk_uart_pm_freeze,
  2244. .thaw = mtk_uart_pm_restore,
  2245. .poweroff = mtk_uart_pm_suspend,
  2246. .restore = mtk_uart_pm_restore,
  2247. .restore_noirq = mtk_uart_pm_restore_noirq,
  2248. };
  2249. /*---------------------------------------------------------------------------*/
  2250. static int mtk_uart_init_ports(void)
  2251. {
  2252. int i;
  2253. #ifdef CONFIG_OF
  2254. #if defined(ENABLE_VFIFO)
  2255. int idx;
  2256. struct mtk_uart_vfifo *vfifo;
  2257. #endif
  2258. void __iomem *apdma_uart0_base = 0;
  2259. #endif
  2260. struct mtk_uart *uart;
  2261. unsigned long base;
  2262. spin_lock_init(&mtk_console_lock);
  2263. #ifdef CONFIG_OF
  2264. apdma_uart0_base = get_apdma_uart0_base();
  2265. #endif
  2266. for (i = 0; i < UART_NR; i++) {
  2267. #ifdef CONFIG_OF
  2268. set_uart_default_settings(i);
  2269. #endif
  2270. uart = &mtk_uarts[i];
  2271. uart->setting = get_uart_default_settings(i);
  2272. #ifdef CONFIG_OF
  2273. #if defined(ENABLE_VFIFO)
  2274. if (uart->setting->vff) {
  2275. if (i * 2 < sizeof(mtk_uart_vfifo_port) / sizeof(mtk_uart_vfifo_port[0])) {
  2276. for (idx = i * 2; idx < i * 2 + 2; idx++) {
  2277. vfifo = &mtk_uart_vfifo_port[idx];
  2278. vfifo->base = (apdma_uart0_base + 0x0080 * idx);
  2279. vfifo->irq_id = get_uart_vfifo_irq_id(idx);
  2280. }
  2281. }
  2282. }
  2283. #endif
  2284. #endif
  2285. base = uart->setting->uart_base;
  2286. uart->port.iotype = UPIO_MEM;
  2287. #ifdef CONFIG_OF
  2288. uart->port.mapbase = uart->setting->uart_phys_base; /* for ioremap */
  2289. #else
  2290. uart->port.mapbase = IO_VIRT_TO_PHYS(base); /* for ioremap */
  2291. #endif
  2292. uart->port.membase = (unsigned char __iomem *)base;
  2293. uart->port.irq = uart->setting->irq_num;
  2294. uart->port.fifosize = UART_FIFO_SIZE;
  2295. uart->port.ops = &mtk_uart_ops;
  2296. uart->port.flags = UPF_BOOT_AUTOCONF;
  2297. uart->port.line = i;
  2298. uart->port.uartclk = UART_SYSCLK;
  2299. /* pll_for_uart = mt6575_get_bus_freq(); */
  2300. /* uart->port.uartclk = mt6575_get_bus_freq()*1000/4; */
  2301. spin_lock_init(&uart->port.lock);
  2302. uart->base = base;
  2303. uart->auto_baud = CFG_UART_AUTOBAUD;
  2304. uart->nport = i;
  2305. uart->sysclk = UART_SYSCLK; /* FIXME */
  2306. /* uart->sysclk = mt6575_get_bus_freq()*1000/4; */
  2307. uart->dma_mode = uart->setting->dma_mode;
  2308. uart->tx_mode = uart->setting->tx_mode;
  2309. uart->rx_mode = uart->setting->rx_mode;
  2310. uart->tx_trig = uart->setting->tx_trig;
  2311. uart->rx_trig = uart->setting->rx_trig;
  2312. uart->write_allow = mtk_uart_write_allow;
  2313. uart->read_allow = mtk_uart_read_allow;
  2314. uart->write_byte = mtk_uart_write_byte;
  2315. uart->read_byte = mtk_uart_read_byte;
  2316. uart->read_status = mtk_uart_read_status;
  2317. uart->poweron_count = 0;
  2318. uart->timeout_count = 0;
  2319. uart->baudrate = 0;
  2320. uart->custom_baud = 0;
  2321. uart->registers.dll = 1;
  2322. uart->registers.dlh = 0;
  2323. uart->registers.ier = 0;
  2324. uart->registers.lcr = 0;
  2325. uart->registers.mcr = 0;
  2326. uart->registers.fcr = 0;
  2327. uart->registers.lsr = 0x60;
  2328. uart->registers.efr = 0;
  2329. uart->registers.highspeed = 0;
  2330. uart->registers.sample_count = 0;
  2331. uart->registers.sample_point = 0xff;
  2332. uart->registers.fracdiv_l = 0;
  2333. uart->registers.fracdiv_m = 0;
  2334. uart->registers.escape_en = 0;
  2335. uart->registers.guard = 0;
  2336. uart->registers.rx_sel = 0;
  2337. uart->evt_mask = (unsigned int)get_uart_evt_mask(i);
  2338. #if defined(CONFIG_MTK_SERIAL_MODEM_TEST)
  2339. if (get_modem_uart(i)) {
  2340. /* u32 dat = UART_READ32(HW_MISC); // mtk does NOT has this register */
  2341. mtk_uart_power_up(uart); /* power up */
  2342. /* reg_sync_writel(dat | mask[i], HW_MISC); */
  2343. continue;
  2344. }
  2345. #else
  2346. /* mtk_uart_power_up(uart); */
  2347. mtk_uart_disable_intrs(uart, UART_IER_ALL_INTS);
  2348. #ifdef CONFIG_OF
  2349. irq_set_irq_type(uart->setting->irq_num, uart->setting->irq_flags);
  2350. #else
  2351. if (uart->setting->irq_sen == MT_EDGE_SENSITIVE)
  2352. irq_set_irq_type(uart->setting->irq_num, IRQF_EDGE_TRIGGER_POLARITY);
  2353. else
  2354. irq_set_irq_type(uart->setting->irq_num, IRQF_LEVEL_TRIGGER_POLARITY);
  2355. #endif
  2356. mtk_uart_fifo_init(uart);
  2357. mtk_uart_set_mode(uart, uart->dma_mode);
  2358. /* mtk_uart_power_down(uart); */
  2359. #endif
  2360. }
  2361. #if defined(CONFIG_MTK_SERIAL_MODEM_TEST)
  2362. /*NOTICE: for enabling modem test, UART4 needs to be disabled. Howerver, if CONFIG_MTK_SERIAL_CONSOLE
  2363. is defined, resume will fail. Since the root cause is not clear, only disable the console-related
  2364. function. */
  2365. /*printk("HW_MISC: 0x%08X\n", UART_READ32(HW_MISC)); */ /* mtk does NOT has this register */
  2366. #endif
  2367. return 0;
  2368. }
  2369. /*---------------------------------------------------------------------------*/
  2370. #ifdef CONFIG_OF
  2371. static const struct of_device_id apuart_of_ids[] = {
  2372. {.compatible = "mediatek,AP_UART0",},
  2373. {.compatible = "mediatek,AP_UART1",},
  2374. #ifndef CONFIG_MTK_FPGA
  2375. {.compatible = "mediatek,AP_UART2",},
  2376. {.compatible = "mediatek,AP_UART3",},
  2377. #if (UART_NR > 4)
  2378. {.compatible = "mediatek,AP_UART4",},
  2379. #endif
  2380. #endif
  2381. {.compatible = "mediatek,mt6735-uart",},
  2382. {.compatible = "mediatek,mt6755-uart",},
  2383. {.compatible = "mediatek,mt8173-uart",},
  2384. {.compatible = "mediatek,mt6797-uart",},
  2385. {.compatible = "mediatek,mt8163-uart",},
  2386. {}
  2387. };
  2388. #endif
  2389. static struct platform_driver mtk_uart_dev_drv = {
  2390. .probe = mtk_uart_probe,
  2391. .remove = mtk_uart_remove,
  2392. #ifdef CONFIG_PM
  2393. .suspend = mtk_uart_suspend,
  2394. .resume = mtk_uart_resume,
  2395. #endif
  2396. .driver = {
  2397. .name = DRV_NAME,
  2398. .owner = THIS_MODULE,
  2399. #ifdef CONFIG_OF
  2400. .of_match_table = apuart_of_ids,
  2401. #endif
  2402. #ifdef CONFIG_PM
  2403. .pm = &mtk_uart_pm_ops,
  2404. #endif
  2405. }
  2406. };
  2407. #ifdef CONFIG_PM
  2408. static struct syscore_ops mtk_uart_syscore_ops = {
  2409. .suspend = mtk_uart_syscore_suspend,
  2410. .resume = mtk_uart_syscore_resume,
  2411. };
  2412. static int __init mtk_uart_init_ops(void)
  2413. {
  2414. register_syscore_ops(&mtk_uart_syscore_ops);
  2415. return 0;
  2416. }
  2417. #endif
  2418. /*---------------------------------------------------------------------------*/
  2419. static int __init mtk_uart_init(void)
  2420. {
  2421. int ret = 0;
  2422. tx_history.buffer = kzalloc(UART_HISTORY_DATA_SIZE, GFP_KERNEL);
  2423. rx_history.buffer = kzalloc(UART_HISTORY_DATA_SIZE, GFP_KERNEL);
  2424. tx_history.index = -1;
  2425. rx_history.index = -1;
  2426. if (!tx_history.buffer || !rx_history.buffer)
  2427. return -ENOMEM;
  2428. #ifndef CONFIG_MTK_SERIAL_CONSOLE
  2429. mtk_uart_init_ports();
  2430. #endif
  2431. #if defined(ENABLE_SYSFS)
  2432. mtk_uart_sysfs();
  2433. #endif
  2434. ret = uart_register_driver(&mtk_uart_drv);
  2435. if (ret)
  2436. return ret;
  2437. ret = platform_driver_register(&mtk_uart_dev_drv);
  2438. if (ret) {
  2439. uart_unregister_driver(&mtk_uart_drv);
  2440. return ret;
  2441. }
  2442. #ifdef CONFIG_PM
  2443. mtk_uart_init_ops();
  2444. #endif
  2445. #ifdef ENABLE_RAW_DATA_DUMP
  2446. mtk_uart_init_debug_spinlock();
  2447. #endif
  2448. spin_lock_init(&mtk_uart_bt_lock);
  2449. return ret;
  2450. }
  2451. /*---------------------------------------------------------------------------*/
  2452. static void __exit mtk_uart_exit(void)
  2453. {
  2454. platform_driver_unregister(&mtk_uart_dev_drv);
  2455. uart_unregister_driver(&mtk_uart_drv);
  2456. }
  2457. /*---------------------------------------------------------------------------*/
  2458. #ifdef ENABLE_UART_SLEEP
  2459. int request_uart_to_sleep(void)
  2460. {
  2461. u32 val1;
  2462. int i = 0;
  2463. int uart_idx = 0;
  2464. struct mtk_uart *uart;
  2465. unsigned long base;
  2466. for (uart_idx = 0; uart_idx < UART_NR; uart_idx++) {
  2467. /*
  2468. #if defined(CONFIG_MTK_HDMI_SUPPORT)
  2469. #ifdef MHL_UART_SHARE_PIN
  2470. {
  2471. for K2 uart2 and mhl share pin,
  2472. if mhl is in low power mode, uart rx is not working, so bypass it.
  2473. if ((is_hdmi_active() == 0) && (uart_idx == 1))
  2474. continue;
  2475. }
  2476. #endif
  2477. #endif
  2478. */
  2479. uart = &mtk_uarts[uart_idx];
  2480. base = uart->base;
  2481. if (uart->poweron_count > 0) {
  2482. /* request UART to sleep */
  2483. val1 = UART_READ32(UART_SLEEP_REQ);
  2484. reg_sync_writel(val1 | UART_CLK_OFF_REQ, UART_SLEEP_REQ);
  2485. /* wait for UART to ACK */
  2486. while (!(UART_READ32(UART_SLEEP_ACK) & UART_CLK_OFF_ACK)) {
  2487. if (i++ >= WAIT_UART_ACK_TIMES) {
  2488. reg_sync_writel(val1, UART_SLEEP_REQ);
  2489. pr_err_ratelimited("[UART]CANNOT GET UART[%d] SLEEP ACK\n",
  2490. uart_idx);
  2491. /* dump_uart_reg(); */
  2492. return -EBUSY;
  2493. }
  2494. udelay(10);
  2495. }
  2496. } else {
  2497. /* printk("[UART%d] clock is off\n", uart->nport); */
  2498. }
  2499. }
  2500. return 0;
  2501. }
  2502. EXPORT_SYMBOL(request_uart_to_sleep);
  2503. int request_uart_to_wakeup(void)
  2504. {
  2505. /* printk(KERN_ERR "Request UART sleep\n"); */
  2506. u32 val1;
  2507. int i = 0;
  2508. int uart_idx = 0;
  2509. struct mtk_uart *uart;
  2510. unsigned long base;
  2511. for (uart_idx = 0; uart_idx < UART_NR; uart_idx++) {
  2512. uart = &mtk_uarts[uart_idx];
  2513. base = uart->base;
  2514. if (uart->poweron_count > 0) {
  2515. /* wakeup uart */
  2516. val1 = UART_READ32(UART_SLEEP_REQ);
  2517. reg_sync_writel(val1 & (~UART_CLK_OFF_REQ), UART_SLEEP_REQ);
  2518. /* wait for UART to ACK */
  2519. while ((UART_READ32(UART_SLEEP_ACK) & UART_CLK_OFF_ACK)) {
  2520. if (i++ >= WAIT_UART_ACK_TIMES) {
  2521. reg_sync_writel(val1, UART_SLEEP_REQ);
  2522. pr_err("[UART]CANNOT GET UART[%d] WAKE ACK\n", uart_idx);
  2523. /* dump_uart_reg(); */
  2524. return -EBUSY;
  2525. }
  2526. udelay(10);
  2527. }
  2528. } else {
  2529. /* printk("[UART%d] clock is off\n", uart->nport); */
  2530. }
  2531. }
  2532. return 0;
  2533. }
  2534. EXPORT_SYMBOL(request_uart_to_wakeup);
  2535. #endif
  2536. /*---------------------------------------------------------------------------*/
  2537. module_init(mtk_uart_init);
  2538. module_exit(mtk_uart_exit);
  2539. /*---------------------------------------------------------------------------*/
  2540. MODULE_AUTHOR("MTK");
  2541. MODULE_DESCRIPTION("MTK Serial Port Driver");
  2542. MODULE_LICENSE("GPL");