usb20_host.c 18 KB

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  1. /*
  2. * MUSB OTG controller driver for Blackfin Processors
  3. *
  4. * Copyright 2006-2008 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #ifdef CONFIG_USB_MTK_OTG
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/init.h>
  15. #include <linux/list.h>
  16. #include <linux/gpio.h>
  17. #include <linux/io.h>
  18. #ifndef CONFIG_OF
  19. #include <mach/irqs.h>
  20. #endif
  21. #if defined(CONFIG_MTK_LEGACY)
  22. #include <mt-plat/mt_gpio.h>
  23. #include <cust_gpio_usage.h>
  24. #endif
  25. #include "musb_core.h"
  26. #include <linux/platform_device.h>
  27. #include "musbhsdma.h"
  28. #include <linux/switch.h>
  29. #include "usb20.h"
  30. #ifdef CONFIG_OF
  31. #include <linux/of_irq.h>
  32. #include <linux/of_address.h>
  33. #endif
  34. #include <mt-plat/mt_boot_common.h>
  35. #ifdef CONFIG_OF
  36. struct device_node *usb_node;
  37. static unsigned int iddig_pin;
  38. static unsigned int iddig_pin_mode;
  39. static unsigned int iddig_if_config = 1;
  40. static unsigned int drvvbus_pin;
  41. static unsigned int drvvbus_pin_mode;
  42. static unsigned int drvvbus_if_config = 1;
  43. #endif
  44. #if !defined(CONFIG_MTK_LEGACY)
  45. struct pinctrl *pinctrl;
  46. struct pinctrl_state *pinctrl_iddig;
  47. struct pinctrl_state *pinctrl_drvvbus;
  48. struct pinctrl_state *pinctrl_drvvbus_low;
  49. struct pinctrl_state *pinctrl_drvvbus_high;
  50. #endif
  51. static int usb_iddig_number;
  52. static struct musb_fifo_cfg fifo_cfg_host[] = {
  53. { .hw_ep_num = 1, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  54. { .hw_ep_num = 1, .style = MUSB_FIFO_RX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  55. { .hw_ep_num = 2, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  56. { .hw_ep_num = 2, .style = MUSB_FIFO_RX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  57. { .hw_ep_num = 3, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  58. { .hw_ep_num = 3, .style = MUSB_FIFO_RX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  59. { .hw_ep_num = 4, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  60. { .hw_ep_num = 4, .style = MUSB_FIFO_RX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  61. { .hw_ep_num = 5, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  62. { .hw_ep_num = 5, .style = MUSB_FIFO_RX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  63. { .hw_ep_num = 6, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  64. { .hw_ep_num = 6, .style = MUSB_FIFO_RX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  65. { .hw_ep_num = 7, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  66. { .hw_ep_num = 7, .style = MUSB_FIFO_RX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  67. { .hw_ep_num = 8, .style = MUSB_FIFO_TX, .maxpacket = 512, .mode = MUSB_BUF_SINGLE},
  68. { .hw_ep_num = 8, .style = MUSB_FIFO_RX, .maxpacket = 64, .mode = MUSB_BUF_SINGLE},
  69. };
  70. u32 delay_time = 15;
  71. module_param(delay_time, int, 0644);
  72. u32 delay_time1 = 55;
  73. module_param(delay_time1, int, 0644);
  74. u32 iddig_cnt = 0;
  75. module_param(iddig_cnt, int, 0644);
  76. void mt_usb_set_vbus(struct musb *musb, int is_on)
  77. {
  78. DBG(0, "mt65xx_usb20_vbus++,is_on=%d\r\n", is_on);
  79. #ifndef FPGA_PLATFORM
  80. if (is_on) {
  81. /* power on VBUS, implement later... */
  82. #ifdef CONFIG_MTK_FAN5405_SUPPORT
  83. fan5405_set_opa_mode(1);
  84. fan5405_set_otg_pl(1);
  85. fan5405_set_otg_en(1);
  86. #elif defined(CONFIG_MTK_BQ24261_SUPPORT)
  87. bq24261_set_en_boost(1);
  88. #elif defined(CONFIG_MTK_BQ24296_SUPPORT)
  89. bq24296_set_otg_config(0x1); /* OTG */
  90. bq24296_set_boostv(0x7); /* boost voltage 4.998V */
  91. bq24296_set_boost_lim(0x1); /* 1.5A on VBUS */
  92. bq24296_set_en_hiz(0x0);
  93. #elif defined(CONFIG_MTK_BQ24196_SUPPORT)
  94. bq24196_set_otg_config(0x01); /* OTG */
  95. bq24196_set_boost_lim(0x01); /* 1.3A on VBUS */
  96. #elif defined(CONFIG_MTK_NCP1854_SUPPORT)
  97. ncp1854_set_otg_en(0);
  98. ncp1854_set_chg_en(0);
  99. ncp1854_set_otg_en(1);
  100. #else
  101. #ifdef CONFIG_OF
  102. #if defined(CONFIG_MTK_LEGACY)
  103. mt_set_gpio_mode(drvvbus_pin, drvvbus_pin_mode);
  104. mt_set_gpio_out(drvvbus_pin, GPIO_OUT_ONE);
  105. #else
  106. pr_debug("****%s:%d Drive VBUS HIGH KS!!!!!\n", __func__, __LINE__);
  107. pinctrl_select_state(pinctrl, pinctrl_drvvbus_high);
  108. #endif
  109. #else
  110. mt_set_gpio_mode(GPIO_OTG_DRVVBUS_PIN, GPIO_OTG_DRVVBUS_PIN_M_GPIO);
  111. mt_set_gpio_out(GPIO_OTG_DRVVBUS_PIN, GPIO_OUT_ONE);
  112. #endif
  113. #endif
  114. } else {
  115. /* power off VBUS, implement later... */
  116. #ifdef CONFIG_MTK_FAN5405_SUPPORT
  117. fan5405_reg_config_interface(0x01, 0x30);
  118. fan5405_reg_config_interface(0x02, 0x8e);
  119. #elif defined(CONFIG_MTK_BQ24261_SUPPORT)
  120. bq24261_set_en_boost(0);
  121. #elif defined(CONFIG_MTK_BQ24296_SUPPORT)
  122. bq24296_set_otg_config(0);
  123. #elif defined(CONFIG_MTK_BQ24196_SUPPORT)
  124. bq24196_set_otg_config(0x0); /* OTG disabled */
  125. #elif defined(CONFIG_MTK_NCP1854_SUPPORT)
  126. ncp1854_set_otg_en(0x0);
  127. #else
  128. #ifdef CONFIG_OF
  129. #if defined(CONFIG_MTK_LEGACY)
  130. mt_set_gpio_mode(drvvbus_pin, drvvbus_pin_mode);
  131. mt_set_gpio_out(drvvbus_pin, GPIO_OUT_ZERO);
  132. #else
  133. pr_debug("****%s:%d Drive VBUS LOW KS!!!!!\n", __func__, __LINE__);
  134. pinctrl_select_state(pinctrl, pinctrl_drvvbus_low);
  135. #endif
  136. #else
  137. mt_set_gpio_mode(GPIO_OTG_DRVVBUS_PIN, GPIO_OTG_DRVVBUS_PIN_M_GPIO);
  138. mt_set_gpio_out(GPIO_OTG_DRVVBUS_PIN, GPIO_OUT_ZERO);
  139. #endif
  140. #endif
  141. }
  142. #endif
  143. }
  144. int mt_usb_get_vbus_status(struct musb *musb)
  145. {
  146. #if 1
  147. return true;
  148. #else
  149. int ret = 0;
  150. if ((musb_readb(musb->mregs, MUSB_DEVCTL) & MUSB_DEVCTL_VBUS) != MUSB_DEVCTL_VBUS)
  151. ret = 1;
  152. else
  153. DBG(0, "VBUS error, devctl=%x, power=%d\n", musb_readb(musb->mregs, MUSB_DEVCTL), musb->power);
  154. pr_debug("vbus ready = %d\n", ret);
  155. return ret;
  156. #endif
  157. }
  158. void mt_usb_init_drvvbus(void)
  159. {
  160. #if !(defined(SWITCH_CHARGER) || defined(FPGA_PLATFORM))
  161. #ifdef CONFIG_OF
  162. #if defined(CONFIG_MTK_LEGACY)
  163. mt_set_gpio_mode(drvvbus_pin, drvvbus_pin_mode); /* should set GPIO2 as gpio mode. */
  164. mt_set_gpio_dir(drvvbus_pin, GPIO_DIR_OUT);
  165. mt_get_gpio_pull_enable(drvvbus_pin);
  166. mt_set_gpio_pull_select(drvvbus_pin, GPIO_PULL_UP);
  167. #else
  168. int ret = 0;
  169. pr_debug("****%s:%d before Init Drive VBUS KS!!!!!\n", __func__, __LINE__);
  170. pinctrl_drvvbus = pinctrl_lookup_state(pinctrl, "drvvbus_init");
  171. if (IS_ERR(pinctrl_drvvbus)) {
  172. ret = PTR_ERR(pinctrl_drvvbus);
  173. dev_err(mtk_musb->controller, "Cannot find usb pinctrl drvvbus\n");
  174. }
  175. pinctrl_drvvbus_low = pinctrl_lookup_state(pinctrl, "drvvbus_low");
  176. if (IS_ERR(pinctrl_drvvbus_low)) {
  177. ret = PTR_ERR(pinctrl_drvvbus_low);
  178. dev_err(mtk_musb->controller, "Cannot find usb pinctrl drvvbus_low\n");
  179. }
  180. pinctrl_drvvbus_high = pinctrl_lookup_state(pinctrl, "drvvbus_high");
  181. if (IS_ERR(pinctrl_drvvbus_high)) {
  182. ret = PTR_ERR(pinctrl_drvvbus_high);
  183. dev_err(mtk_musb->controller, "Cannot find usb pinctrl drvvbus_high\n");
  184. }
  185. pinctrl_select_state(pinctrl, pinctrl_drvvbus);
  186. pr_debug("****%s:%d end Init Drive VBUS KS!!!!!\n", __func__, __LINE__);
  187. #endif
  188. #else
  189. mt_set_gpio_mode(GPIO_OTG_DRVVBUS_PIN, GPIO_OTG_DRVVBUS_PIN_M_GPIO); /* should set GPIO2 as gpio mode. */
  190. mt_set_gpio_dir(GPIO_OTG_DRVVBUS_PIN, GPIO_DIR_OUT);
  191. mt_get_gpio_pull_enable(GPIO_OTG_DRVVBUS_PIN);
  192. mt_set_gpio_pull_select(GPIO_OTG_DRVVBUS_PIN, GPIO_PULL_UP);
  193. #endif
  194. #endif
  195. }
  196. #if defined(CONFIG_USBIF_COMPLIANCE)
  197. u32 sw_deboun_time = 1;
  198. #else
  199. u32 sw_deboun_time = 400;
  200. #endif
  201. module_param(sw_deboun_time, int, 0644);
  202. struct switch_dev otg_state;
  203. static bool musb_is_host(void)
  204. {
  205. u8 devctl = 0;
  206. int iddig_state = 1;
  207. bool usb_is_host = 0;
  208. DBG(0, "will mask PMIC charger detection\n");
  209. #ifndef FPGA_PLATFORM
  210. pmic_chrdet_int_en(0);
  211. #endif
  212. musb_platform_enable(mtk_musb);
  213. #ifdef ID_PIN_USE_EX_EINT
  214. #ifndef CONFIG_MTK_FPGA
  215. #ifdef CONFIG_OF
  216. #if defined(CONFIG_MTK_LEGACY)
  217. iddig_state = mt_get_gpio_in(iddig_pin);
  218. #else
  219. iddig_state = __gpio_get_value(iddig_pin);
  220. #endif
  221. #else
  222. iddig_state = mt_get_gpio_in(GPIO_OTG_IDDIG_EINT_PIN);
  223. #endif
  224. DBG(0, "iddig_state = %d\n", iddig_state);
  225. #endif
  226. #else
  227. iddig_state = 0;
  228. devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL);
  229. DBG(0, "devctl = %x before end session\n", devctl);
  230. devctl &= ~MUSB_DEVCTL_SESSION; /* this will cause A-device change back to B-device after A-cable plug out */
  231. musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl);
  232. msleep(delay_time);
  233. devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL);
  234. DBG(0, "devctl = %x before set session\n", devctl);
  235. devctl |= MUSB_DEVCTL_SESSION;
  236. musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl);
  237. msleep(delay_time1);
  238. devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL);
  239. DBG(0, "devclt = %x\n", devctl);
  240. #endif
  241. if (devctl & MUSB_DEVCTL_BDEVICE || iddig_state) {
  242. DBG(0, "will unmask PMIC charger detection\n");
  243. #ifndef FPGA_PLATFORM
  244. pmic_chrdet_int_en(1);
  245. #endif
  246. usb_is_host = false;
  247. } else {
  248. usb_is_host = true;
  249. }
  250. DBG(0, "usb_is_host = %d\n", usb_is_host);
  251. return usb_is_host;
  252. }
  253. void musb_session_restart(struct musb *musb)
  254. {
  255. void __iomem *mbase = musb->mregs;
  256. musb_writeb(mbase, MUSB_DEVCTL, (musb_readb(mbase, MUSB_DEVCTL) & (~MUSB_DEVCTL_SESSION)));
  257. DBG(0, "[MUSB] stopped session for VBUSERROR interrupt\n");
  258. USBPHY_SET8(0x6d, 0x3c);
  259. USBPHY_SET8(0x6c, 0x10);
  260. USBPHY_CLR8(0x6c, 0x2c);
  261. DBG(0, "[MUSB] force PHY to idle, 0x6d=%x, 0x6c=%x\n", USBPHY_READ8(0x6d), USBPHY_READ8(0x6c));
  262. mdelay(5);
  263. USBPHY_CLR8(0x6d, 0x3c);
  264. USBPHY_CLR8(0x6c, 0x3c);
  265. DBG(0, "[MUSB] let PHY resample VBUS, 0x6d=%x, 0x6c=%x\n", USBPHY_READ8(0x6d), USBPHY_READ8(0x6c));
  266. musb_writeb(mbase, MUSB_DEVCTL, (musb_readb(mbase, MUSB_DEVCTL) | MUSB_DEVCTL_SESSION));
  267. DBG(0, "[MUSB] restart session\n");
  268. }
  269. void switch_int_to_device(struct musb *musb)
  270. {
  271. #ifdef ID_PIN_USE_EX_EINT
  272. irq_set_irq_type(usb_iddig_number, IRQF_TRIGGER_HIGH);
  273. enable_irq(usb_iddig_number);
  274. #else
  275. musb_writel(musb->mregs, USB_L1INTP, 0);
  276. musb_writel(musb->mregs, USB_L1INTM, IDDIG_INT_STATUS|musb_readl(musb->mregs, USB_L1INTM));
  277. #endif
  278. DBG(0, "switch_int_to_device is done\n");
  279. }
  280. void switch_int_to_host(struct musb *musb)
  281. {
  282. #ifdef ID_PIN_USE_EX_EINT
  283. irq_set_irq_type(usb_iddig_number, IRQF_TRIGGER_LOW);
  284. enable_irq(usb_iddig_number);
  285. #else
  286. musb_writel(musb->mregs, USB_L1INTP, IDDIG_INT_STATUS);
  287. musb_writel(musb->mregs, USB_L1INTM, IDDIG_INT_STATUS|musb_readl(musb->mregs, USB_L1INTM));
  288. #endif
  289. DBG(0, "switch_int_to_host is done\n");
  290. }
  291. void switch_int_to_host_and_mask(struct musb *musb)
  292. {
  293. #ifdef ID_PIN_USE_EX_EINT
  294. disable_irq(usb_iddig_number);
  295. irq_set_irq_type(usb_iddig_number, IRQF_TRIGGER_LOW);
  296. #else
  297. musb_writel(musb->mregs, USB_L1INTM, (~IDDIG_INT_STATUS)&musb_readl(musb->mregs, USB_L1INTM));
  298. mb();
  299. musb_writel(musb->mregs, USB_L1INTP, IDDIG_INT_STATUS);
  300. #endif
  301. DBG(0, "swtich_int_to_host_and_mask is done\n");
  302. }
  303. static void musb_id_pin_work(struct work_struct *data)
  304. {
  305. u8 devctl = 0;
  306. unsigned long flags;
  307. spin_lock_irqsave(&mtk_musb->lock, flags);
  308. musb_generic_disable(mtk_musb);
  309. spin_unlock_irqrestore(&mtk_musb->lock, flags);
  310. down(&mtk_musb->musb_lock);
  311. DBG(0, "work start, is_host=%d, boot mode(%d)\n", mtk_musb->is_host, get_boot_mode());
  312. #ifdef CONFIG_MTK_KERNEL_POWER_OFF_CHARGING
  313. if (get_boot_mode() == KERNEL_POWER_OFF_CHARGING_BOOT || get_boot_mode() == LOW_POWER_OFF_CHARGING_BOOT) {
  314. DBG(0, "do nothing due to in power off charging\n");
  315. goto out;
  316. }
  317. #endif
  318. if (mtk_musb->in_ipo_off) {
  319. DBG(0, "do nothing due to in_ipo_off\n");
  320. goto out;
  321. }
  322. mtk_musb->is_host = musb_is_host();
  323. DBG(0, "musb is as %s\n", mtk_musb->is_host?"host":"device");
  324. switch_set_state((struct switch_dev *)&otg_state, mtk_musb->is_host);
  325. if (mtk_musb->is_host) {
  326. /* setup fifo for host mode */
  327. ep_config_from_table_for_host(mtk_musb);
  328. wake_lock(&mtk_musb->usb_lock);
  329. musb_platform_set_vbus(mtk_musb, 1);
  330. /* for no VBUS sensing IP*/
  331. #if 1
  332. /* wait VBUS ready */
  333. msleep(100);
  334. /* clear session*/
  335. devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL);
  336. musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, (devctl&(~MUSB_DEVCTL_SESSION)));
  337. /* USB MAC OFF*/
  338. /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=X, IDPULLUP=1 */
  339. USBPHY_SET8(0x6c, 0x11);
  340. USBPHY_CLR8(0x6c, 0x2e);
  341. USBPHY_SET8(0x6d, 0x3f);
  342. DBG(0, "force PHY to idle, 0x6d=%x, 0x6c=%x\n", USBPHY_READ8(0x6d), USBPHY_READ8(0x6c));
  343. /* wait */
  344. mdelay(5);
  345. /* restart session */
  346. devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL);
  347. musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, (devctl | MUSB_DEVCTL_SESSION));
  348. /* USB MAC ONand Host Mode*/
  349. /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */
  350. USBPHY_CLR8(0x6c, 0x10);
  351. USBPHY_SET8(0x6c, 0x2d);
  352. USBPHY_SET8(0x6d, 0x3f);
  353. DBG(0, "force PHY to host mode, 0x6d=%x, 0x6c=%x\n", USBPHY_READ8(0x6d), USBPHY_READ8(0x6c));
  354. #endif
  355. musb_start(mtk_musb);
  356. MUSB_HST_MODE(mtk_musb);
  357. switch_int_to_device(mtk_musb);
  358. } else {
  359. musb_epx_transfer_allowed = 0;
  360. DBG(0, "devctl is %x\n", musb_readb(mtk_musb->mregs, MUSB_DEVCTL));
  361. musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0);
  362. if (wake_lock_active(&mtk_musb->usb_lock))
  363. wake_unlock(&mtk_musb->usb_lock);
  364. musb_platform_set_vbus(mtk_musb, 0);
  365. /* for no VBUS sensing IP */
  366. #if 1
  367. /* USB MAC OFF*/
  368. /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=X, IDPULLUP=1 */
  369. USBPHY_SET8(0x6c, 0x11);
  370. USBPHY_CLR8(0x6c, 0x2e);
  371. USBPHY_SET8(0x6d, 0x3f);
  372. DBG(0, "force PHY to idle, 0x6d=%x, 0x6c=%x\n", USBPHY_READ8(0x6d), USBPHY_READ8(0x6c));
  373. #endif
  374. musb_stop(mtk_musb);
  375. mtk_musb->xceiv->state = OTG_STATE_B_IDLE;
  376. MUSB_DEV_MODE(mtk_musb);
  377. switch_int_to_host(mtk_musb);
  378. }
  379. out:
  380. DBG(0, "work end, is_host=%d\n", mtk_musb->is_host);
  381. up(&mtk_musb->musb_lock);
  382. }
  383. static irqreturn_t mt_usb_ext_iddig_int(int irq, void *dev_id)
  384. {
  385. iddig_cnt++;
  386. if (!mtk_musb->is_ready) {
  387. /* dealy 5 sec if usb function is not ready */
  388. schedule_delayed_work(&mtk_musb->id_pin_work, 5000*HZ/1000);
  389. } else {
  390. schedule_delayed_work(&mtk_musb->id_pin_work, sw_deboun_time*HZ/1000);
  391. }
  392. DBG(0, "id pin interrupt assert\n");
  393. disable_irq_nosync(usb_iddig_number);
  394. return IRQ_HANDLED;
  395. }
  396. void mt_usb_iddig_int(struct musb *musb)
  397. {
  398. u32 usb_l1_ploy = musb_readl(musb->mregs, USB_L1INTP);
  399. DBG(0, "id pin interrupt assert,polarity=0x%x\n", usb_l1_ploy);
  400. if (usb_l1_ploy & IDDIG_INT_STATUS)
  401. usb_l1_ploy &= (~IDDIG_INT_STATUS);
  402. else
  403. usb_l1_ploy |= IDDIG_INT_STATUS;
  404. musb_writel(musb->mregs, USB_L1INTP, usb_l1_ploy);
  405. musb_writel(musb->mregs, USB_L1INTM, (~IDDIG_INT_STATUS)&musb_readl(musb->mregs, USB_L1INTM));
  406. if (!mtk_musb->is_ready) {
  407. /* dealy 5 sec if usb function is not ready */
  408. schedule_delayed_work(&mtk_musb->id_pin_work, 5000*HZ/1000);
  409. } else {
  410. schedule_delayed_work(&mtk_musb->id_pin_work, sw_deboun_time*HZ/1000);
  411. }
  412. DBG(0, "id pin interrupt assert\n");
  413. }
  414. static void otg_int_init(void)
  415. {
  416. #ifdef ID_PIN_USE_EX_EINT
  417. int ret = 0;
  418. #ifndef CONFIG_MTK_FPGA
  419. #ifdef CONFIG_OF
  420. #if defined(CONFIG_MTK_LEGACY)
  421. mt_set_gpio_mode(iddig_pin, iddig_pin_mode);
  422. mt_set_gpio_dir(iddig_pin, GPIO_DIR_IN);
  423. mt_set_gpio_pull_enable(iddig_pin, GPIO_PULL_ENABLE);
  424. mt_set_gpio_pull_select(iddig_pin, GPIO_PULL_UP);
  425. #else
  426. pr_debug("****%s:%d before Init IDDIG KS!!!!!\n", __func__, __LINE__);
  427. pinctrl_iddig = pinctrl_lookup_state(pinctrl, "iddig_irq_init");
  428. if (IS_ERR(pinctrl_iddig)) {
  429. ret = PTR_ERR(pinctrl_iddig);
  430. dev_err(mtk_musb->controller, "Cannot find usb pinctrl iddig_irq_init\n");
  431. }
  432. pinctrl_select_state(pinctrl, pinctrl_iddig);
  433. pr_debug("****%s:%d end Init IDDIG KS!!!!!\n", __func__, __LINE__);
  434. #endif
  435. #else
  436. mt_set_gpio_mode(GPIO_OTG_IDDIG_EINT_PIN, GPIO_OTG_IDDIG_EINT_PIN_M_IDDIG);
  437. mt_set_gpio_dir(GPIO_OTG_IDDIG_EINT_PIN, GPIO_DIR_IN);
  438. mt_set_gpio_pull_enable(GPIO_OTG_IDDIG_EINT_PIN, GPIO_PULL_ENABLE);
  439. mt_set_gpio_pull_select(GPIO_OTG_IDDIG_EINT_PIN, GPIO_PULL_UP);
  440. #endif
  441. #endif
  442. #if defined(CONFIG_MTK_LEGACY)
  443. mt_gpio_set_debounce(IDDIG_EINT_PIN, 64000);
  444. usb_iddig_number = mt_gpio_to_irq(IDDIG_EINT_PIN);
  445. pr_debug("USB IDDIG IRQ LINE %d, %d!!\n", IDDIG_EINT_PIN, mt_gpio_to_irq(IDDIG_EINT_PIN));
  446. ret = request_irq(usb_iddig_number, mt_usb_ext_iddig_int, IRQF_TRIGGER_LOW, "USB_IDDIG", NULL);
  447. #else
  448. /*gpio_request(iddig_pin, "USB_IDDIG");*/
  449. gpio_set_debounce(iddig_pin, 64000);
  450. usb_iddig_number = mt_gpio_to_irq(iddig_pin);
  451. ret = request_irq(usb_iddig_number, mt_usb_ext_iddig_int, IRQF_TRIGGER_LOW, "USB_IDDIG", NULL);
  452. #endif
  453. if (ret > 0)
  454. pr_err("USB IDDIG IRQ LINE not available!!\n");
  455. else
  456. pr_debug("USB IDDIG IRQ LINE available!!\n");
  457. #else
  458. u32 phy_id_pull = 0;
  459. phy_id_pull = __raw_readl(U2PHYDTM1);
  460. phy_id_pull |= ID_PULL_UP;
  461. __raw_writel(phy_id_pull, U2PHYDTM1);
  462. musb_writel(mtk_musb->mregs, USB_L1INTM, IDDIG_INT_STATUS|musb_readl(mtk_musb->mregs, USB_L1INTM));
  463. #endif
  464. }
  465. void mt_usb_otg_init(struct musb *musb)
  466. {
  467. #ifdef CONFIG_OF
  468. usb_node = of_find_compatible_node(NULL, NULL, "mediatek,mt6735-usb20");
  469. if (usb_node == NULL) {
  470. pr_err("USB OTG - get USB0 node failed\n");
  471. } else {
  472. if (of_property_read_u32_index(usb_node, "iddig_gpio", 0, &iddig_pin)) {
  473. iddig_if_config = 0;
  474. pr_err("get dtsi iddig_pin fail\n");
  475. }
  476. if (of_property_read_u32_index(usb_node, "iddig_gpio", 1, &iddig_pin_mode))
  477. pr_err("get dtsi iddig_pin_mode fail\n");
  478. if (of_property_read_u32_index(usb_node, "drvvbus_gpio", 0, &drvvbus_pin)) {
  479. drvvbus_if_config = 0;
  480. pr_err("get dtsi drvvbus_pin fail\n");
  481. }
  482. if (of_property_read_u32_index(usb_node, "drvvbus_gpio", 1, &drvvbus_pin_mode))
  483. pr_err("get dtsi drvvbus_pin_mode fail\n");
  484. #if defined(CONFIG_MTK_LEGACY)
  485. iddig_pin |= 0x80000000;
  486. drvvbus_pin |= 0x80000000;
  487. #endif
  488. }
  489. #if !defined(CONFIG_MTK_LEGACY)
  490. pinctrl = devm_pinctrl_get(mtk_musb->controller);
  491. if (IS_ERR(pinctrl)) {
  492. dev_err(mtk_musb->controller, "Cannot find usb pinctrl!\n");
  493. }
  494. #endif
  495. #endif
  496. /*init drrvbus*/
  497. mt_usb_init_drvvbus();
  498. /* init idpin interrupt */
  499. INIT_DELAYED_WORK(&musb->id_pin_work, musb_id_pin_work);
  500. otg_int_init();
  501. /* EP table */
  502. musb->fifo_cfg_host = fifo_cfg_host;
  503. musb->fifo_cfg_host_size = ARRAY_SIZE(fifo_cfg_host);
  504. otg_state.name = "otg_state";
  505. otg_state.index = 0;
  506. otg_state.state = 0;
  507. if (switch_dev_register(&otg_state))
  508. pr_err("switch_dev_register fail\n");
  509. else
  510. pr_debug("switch_dev register success\n");
  511. }
  512. #else
  513. #include "musb_core.h"
  514. /* for not define CONFIG_USB_MTK_OTG */
  515. void mt_usb_otg_init(struct musb *musb) {}
  516. void mt_usb_init_drvvbus(void){}
  517. void mt_usb_set_vbus(struct musb *musb, int is_on) {}
  518. int mt_usb_get_vbus_status(struct musb *musb) {return 1; }
  519. void mt_usb_iddig_int(struct musb *musb) {}
  520. void switch_int_to_device(struct musb *musb) {}
  521. void switch_int_to_host(struct musb *musb) {}
  522. void switch_int_to_host_and_mask(struct musb *musb) {}
  523. void musb_session_restart(struct musb *musb) {}
  524. #endif