msdc_hw_ett.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133
  1. /* weiping fix */
  2. #if 0
  3. #include <mach/mt_chip.h>
  4. #endif
  5. #include "mt_sd.h"
  6. #include "msdc_hw_ett.h"
  7. #ifdef CONFIG_ARCH_MT6735M
  8. #ifdef MSDC_SUPPORT_SANDISK_COMBO_ETT
  9. struct msdc_ett_settings msdc0_ett_hs200_settings_for_sandisk[] = {
  10. { 0xb0, (0x7 << 7), 0 }, /* PATCH_BIT0[MSDC_PB0_INT_DAT_LATCH_CK_SEL] */
  11. { 0xb0, (0x1f << 10), 0 }, /* PATCH_BIT0[MSDC_PB0_CKGEN_MSDC_DLY_SEL] */
  12. /* command & resp ett settings */
  13. { 0xb4, (0x7 << 3), 1 }, /* PATCH_BIT1[MSDC_PB1_CMD_RSP_TA_CNTR] */
  14. { 0x4, (0x1 << 1), 1 }, /* MSDC_IOCON[MSDC_IOCON_RSPL] */
  15. { 0xf0, (0x1f << 16), 0 }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRDLY] */
  16. { 0xf0, (0x1f << 22), 6 }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRRDLY] */
  17. /* write ett settings */
  18. { 0xb4, (0x7 << 0), 1 }, /* PATCH_BIT1[MSDC_PB1_WRDAT_CRCS_TA_CNTR] */
  19. { 0xf0, (0x1f << 0), 15 }, /* PAD_TUNE[MSDC_PAD_TUNE_DATWRDLY] */
  20. { 0x4, (0x1 << 10), 1 }, /* MSDC_IOCON[MSDC_IOCON_W_D0SPL] */
  21. { 0xf8, (0x1f << 24), 5 }, /* DAT_RD_DLY0[MSDC_DAT_RDDLY0_D0] */
  22. /* read ett settings */
  23. { 0xf0, (0x1f << 8), 18}, /* PAD_TUNE[MSDC_PAD_TUNE_DATRRDLY] */
  24. { 0x4, (0x1 << 2), 3 }, /* MSDC_IOCON[MSDC_IOCON_R_D_SMPL] */
  25. };
  26. struct msdc_ett_settings msdc0_ett_hs400_settings_for_sandisk[] = {
  27. { 0xb0, (0x7 << 7), 0 }, /* PATCH_BIT0[MSDC_PB0_INT_DAT_LATCH_CK_SEL] */
  28. { 0xb0, (0x1f << 10), 0 }, /* PATCH_BIT0[MSDC_PB0_CKGEN_MSDC_DLY_SEL] */
  29. { 0x188, (0x1f << 2), 2 /*0x0*/ }, /* EMMC50_PAD_DS_TUNE[MSDC_EMMC50_PAD_DS_TUNE_DLY1] */
  30. { 0x188, (0x1f << 12), 18 /*0x13*/}, /* EMMC50_PAD_DS_TUNE[MSDC_EMMC50_PAD_DS_TUNE_DLY3] */
  31. { 0xb4, (0x7 << 3), 1 }, /* PATCH_BIT1[MSDC_PB1_CMD_RSP_TA_CNTR] */
  32. { 0x4, (0x1 << 1), 1 }, /* MSDC_IOCON[MSDC_IOCON_RSPL] */
  33. { 0xf0, (0x1f << 16), 0 }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRDLY] */
  34. { 0xf0, (0x1f << 22), 11 /*0x0*/ }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRRDLY] */
  35. };
  36. #endif /* mt6735m MSDC_SUPPORT_SANDISK_COMBO_ETT */
  37. #ifdef MSDC_SUPPORT_SAMSUNG_COMBO_ETT
  38. struct msdc_ett_settings msdc0_ett_hs200_settings_for_samsung[] = {
  39. { 0xb0, (0x7 << 7), 0 }, /* PATCH_BIT0[MSDC_PB0_INT_DAT_LATCH_CK_SEL] */
  40. { 0xb0, (0x1f << 10), 0 }, /* PATCH_BIT0[MSDC_PB0_CKGEN_MSDC_DLY_SEL] */
  41. /* command & resp ett settings */
  42. { 0xb4, (0x7 << 3), 1 }, /* PATCH_BIT1[MSDC_PB1_CMD_RSP_TA_CNTR] */
  43. { 0x4, (0x1 << 1), 1 }, /* MSDC_IOCON[MSDC_IOCON_RSPL] */
  44. { 0xf0, (0x1f << 16), 0 }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRDLY] */
  45. { 0xf0, (0x1f << 22), 6 }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRRDLY] */
  46. /* write ett settings */
  47. { 0xb4, (0x7 << 0), 1 }, /* PATCH_BIT1[MSDC_PB1_WRDAT_CRCS_TA_CNTR] */
  48. { 0xf0, (0x1f << 0), 15 }, /* PAD_TUNE[MSDC_PAD_TUNE_DATWRDLY] */
  49. { 0x4, (0x1 << 10), 1 }, /* MSDC_IOCON[MSDC_IOCON_W_D0SPL] */
  50. { 0xf8, (0x1f << 24), 5 }, /* DAT_RD_DLY0[MSDC_DAT_RDDLY0_D0] */
  51. /* read ett settings */
  52. { 0xf0, (0x1f << 8), 18}, /* PAD_TUNE[MSDC_PAD_TUNE_DATRRDLY] */
  53. { 0x4, (0x1 << 2), 4 }, /* MSDC_IOCON[MSDC_IOCON_R_D_SMPL] */
  54. };
  55. struct msdc_ett_settings msdc0_ett_hs400_settings_for_samsung[] = {
  56. { 0xb0, (0x7 << 7), 0 }, /* PATCH_BIT0[MSDC_PB0_INT_DAT_LATCH_CK_SEL] */
  57. { 0xb0, (0x1f << 10), 0 }, /* PATCH_BIT0[MSDC_PB0_CKGEN_MSDC_DLY_SEL] */
  58. { 0x188, (0x1f << 2), 2 /*0x0*/ }, /* EMMC50_PAD_DS_TUNE[MSDC_EMMC50_PAD_DS_TUNE_DLY1] */
  59. { 0x188, (0x1f << 12), 18 /*0x13*/}, /* EMMC50_PAD_DS_TUNE[MSDC_EMMC50_PAD_DS_TUNE_DLY3] */
  60. { 0xb4, (0x7 << 3), 1 }, /* PATCH_BIT1[MSDC_PB1_CMD_RSP_TA_CNTR] */
  61. { 0x4, (0x1 << 1), 1 }, /* MSDC_IOCON[MSDC_IOCON_RSPL] */
  62. { 0xf0, (0x1f << 16), 0 }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRDLY] */
  63. { 0xf0, (0x1f << 22), 11 /*0x0*/ }, /* PAD_TUNE[MSDC_PAD_TUNE_CMDRRDLY] */
  64. };
  65. #endif /* mt6735m MSDC_SUPPORT_SAMSUNG_COMBO_ETT */
  66. #endif
  67. int msdc_setting_parameter(struct msdc_hw *hw, unsigned int *para)
  68. {
  69. struct tag_msdc_hw_para *msdc_para_hw_datap = (struct tag_msdc_hw_para *)para;
  70. if (NULL == hw)
  71. return -1;
  72. if ((msdc_para_hw_datap != NULL) &&
  73. ((msdc_para_hw_datap->host_function == MSDC_SD) || (msdc_para_hw_datap->host_function == MSDC_EMMC)) &&
  74. (msdc_para_hw_datap->version == 0x5A01) && (msdc_para_hw_datap->end_flag == 0x5a5a5a5a)) {
  75. hw->clk_src = msdc_para_hw_datap->clk_src;
  76. hw->cmd_edge = msdc_para_hw_datap->cmd_edge;
  77. hw->rdata_edge = msdc_para_hw_datap->rdata_edge;
  78. hw->wdata_edge = msdc_para_hw_datap->wdata_edge;
  79. hw->clk_drv = msdc_para_hw_datap->clk_drv;
  80. hw->cmd_drv = msdc_para_hw_datap->cmd_drv;
  81. hw->dat_drv = msdc_para_hw_datap->dat_drv;
  82. hw->rst_drv = msdc_para_hw_datap->rst_drv;
  83. hw->ds_drv = msdc_para_hw_datap->ds_drv;
  84. hw->clk_drv_sd_18 = msdc_para_hw_datap->clk_drv_sd_18;
  85. hw->cmd_drv_sd_18 = msdc_para_hw_datap->cmd_drv_sd_18;
  86. hw->dat_drv_sd_18 = msdc_para_hw_datap->dat_drv_sd_18;
  87. hw->clk_drv_sd_18_sdr50 = msdc_para_hw_datap->clk_drv_sd_18_sdr50;
  88. hw->cmd_drv_sd_18_sdr50 = msdc_para_hw_datap->cmd_drv_sd_18_sdr50;
  89. hw->dat_drv_sd_18_sdr50 = msdc_para_hw_datap->dat_drv_sd_18_sdr50;
  90. hw->clk_drv_sd_18_ddr50 = msdc_para_hw_datap->clk_drv_sd_18_ddr50;
  91. hw->cmd_drv_sd_18_ddr50 = msdc_para_hw_datap->cmd_drv_sd_18_ddr50;
  92. hw->dat_drv_sd_18_ddr50 = msdc_para_hw_datap->dat_drv_sd_18_ddr50;
  93. hw->flags = msdc_para_hw_datap->flags;
  94. hw->data_pins = msdc_para_hw_datap->data_pins;
  95. hw->data_offset = msdc_para_hw_datap->data_offset;
  96. hw->ddlsel = msdc_para_hw_datap->ddlsel;
  97. hw->rdsplsel = msdc_para_hw_datap->rdsplsel;
  98. hw->wdsplsel = msdc_para_hw_datap->wdsplsel;
  99. hw->dat0rddly = msdc_para_hw_datap->dat0rddly;
  100. hw->dat1rddly = msdc_para_hw_datap->dat1rddly;
  101. hw->dat2rddly = msdc_para_hw_datap->dat2rddly;
  102. hw->dat3rddly = msdc_para_hw_datap->dat3rddly;
  103. hw->dat4rddly = msdc_para_hw_datap->dat4rddly;
  104. hw->dat5rddly = msdc_para_hw_datap->dat5rddly;
  105. hw->dat6rddly = msdc_para_hw_datap->dat6rddly;
  106. hw->dat7rddly = msdc_para_hw_datap->dat7rddly;
  107. hw->datwrddly = msdc_para_hw_datap->datwrddly;
  108. hw->cmdrrddly = msdc_para_hw_datap->cmdrrddly;
  109. hw->cmdrddly = msdc_para_hw_datap->cmdrddly;
  110. hw->host_function = msdc_para_hw_datap->host_function;
  111. hw->boot = msdc_para_hw_datap->boot;
  112. hw->cd_level = msdc_para_hw_datap->cd_level;
  113. return 0;
  114. }
  115. return -1;
  116. }