en_netdev.c 70 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <net/busy_poll.h>
  41. #include <net/vxlan.h>
  42. #include <linux/mlx4/driver.h>
  43. #include <linux/mlx4/device.h>
  44. #include <linux/mlx4/cmd.h>
  45. #include <linux/mlx4/cq.h>
  46. #include "mlx4_en.h"
  47. #include "en_port.h"
  48. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  49. {
  50. struct mlx4_en_priv *priv = netdev_priv(dev);
  51. int i;
  52. unsigned int offset = 0;
  53. if (up && up != MLX4_EN_NUM_UP)
  54. return -EINVAL;
  55. netdev_set_num_tc(dev, up);
  56. /* Partition Tx queues evenly amongst UP's */
  57. for (i = 0; i < up; i++) {
  58. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  59. offset += priv->num_tx_rings_p_up;
  60. }
  61. return 0;
  62. }
  63. #ifdef CONFIG_NET_RX_BUSY_POLL
  64. /* must be called with local_bh_disable()d */
  65. static int mlx4_en_low_latency_recv(struct napi_struct *napi)
  66. {
  67. struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
  68. struct net_device *dev = cq->dev;
  69. struct mlx4_en_priv *priv = netdev_priv(dev);
  70. struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
  71. int done;
  72. if (!priv->port_up)
  73. return LL_FLUSH_FAILED;
  74. if (!mlx4_en_cq_lock_poll(cq))
  75. return LL_FLUSH_BUSY;
  76. done = mlx4_en_process_rx_cq(dev, cq, 4);
  77. if (likely(done))
  78. rx_ring->cleaned += done;
  79. else
  80. rx_ring->misses++;
  81. mlx4_en_cq_unlock_poll(cq);
  82. return done;
  83. }
  84. #endif /* CONFIG_NET_RX_BUSY_POLL */
  85. #ifdef CONFIG_RFS_ACCEL
  86. struct mlx4_en_filter {
  87. struct list_head next;
  88. struct work_struct work;
  89. u8 ip_proto;
  90. __be32 src_ip;
  91. __be32 dst_ip;
  92. __be16 src_port;
  93. __be16 dst_port;
  94. int rxq_index;
  95. struct mlx4_en_priv *priv;
  96. u32 flow_id; /* RFS infrastructure id */
  97. int id; /* mlx4_en driver id */
  98. u64 reg_id; /* Flow steering API id */
  99. u8 activated; /* Used to prevent expiry before filter
  100. * is attached
  101. */
  102. struct hlist_node filter_chain;
  103. };
  104. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  105. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  106. {
  107. switch (ip_proto) {
  108. case IPPROTO_UDP:
  109. return MLX4_NET_TRANS_RULE_ID_UDP;
  110. case IPPROTO_TCP:
  111. return MLX4_NET_TRANS_RULE_ID_TCP;
  112. default:
  113. return MLX4_NET_TRANS_RULE_NUM;
  114. }
  115. };
  116. static void mlx4_en_filter_work(struct work_struct *work)
  117. {
  118. struct mlx4_en_filter *filter = container_of(work,
  119. struct mlx4_en_filter,
  120. work);
  121. struct mlx4_en_priv *priv = filter->priv;
  122. struct mlx4_spec_list spec_tcp_udp = {
  123. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  124. {
  125. .tcp_udp = {
  126. .dst_port = filter->dst_port,
  127. .dst_port_msk = (__force __be16)-1,
  128. .src_port = filter->src_port,
  129. .src_port_msk = (__force __be16)-1,
  130. },
  131. },
  132. };
  133. struct mlx4_spec_list spec_ip = {
  134. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  135. {
  136. .ipv4 = {
  137. .dst_ip = filter->dst_ip,
  138. .dst_ip_msk = (__force __be32)-1,
  139. .src_ip = filter->src_ip,
  140. .src_ip_msk = (__force __be32)-1,
  141. },
  142. },
  143. };
  144. struct mlx4_spec_list spec_eth = {
  145. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  146. };
  147. struct mlx4_net_trans_rule rule = {
  148. .list = LIST_HEAD_INIT(rule.list),
  149. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  150. .exclusive = 1,
  151. .allow_loopback = 1,
  152. .promisc_mode = MLX4_FS_REGULAR,
  153. .port = priv->port,
  154. .priority = MLX4_DOMAIN_RFS,
  155. };
  156. int rc;
  157. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  158. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  159. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  160. filter->ip_proto);
  161. goto ignore;
  162. }
  163. list_add_tail(&spec_eth.list, &rule.list);
  164. list_add_tail(&spec_ip.list, &rule.list);
  165. list_add_tail(&spec_tcp_udp.list, &rule.list);
  166. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  167. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  168. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  169. filter->activated = 0;
  170. if (filter->reg_id) {
  171. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  172. if (rc && rc != -ENOENT)
  173. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  174. }
  175. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  176. if (rc)
  177. en_err(priv, "Error attaching flow. err = %d\n", rc);
  178. ignore:
  179. mlx4_en_filter_rfs_expire(priv);
  180. filter->activated = 1;
  181. }
  182. static inline struct hlist_head *
  183. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  184. __be16 src_port, __be16 dst_port)
  185. {
  186. unsigned long l;
  187. int bucket_idx;
  188. l = (__force unsigned long)src_port |
  189. ((__force unsigned long)dst_port << 2);
  190. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  191. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  192. return &priv->filter_hash[bucket_idx];
  193. }
  194. static struct mlx4_en_filter *
  195. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  196. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  197. __be16 dst_port, u32 flow_id)
  198. {
  199. struct mlx4_en_filter *filter = NULL;
  200. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  201. if (!filter)
  202. return NULL;
  203. filter->priv = priv;
  204. filter->rxq_index = rxq_index;
  205. INIT_WORK(&filter->work, mlx4_en_filter_work);
  206. filter->src_ip = src_ip;
  207. filter->dst_ip = dst_ip;
  208. filter->ip_proto = ip_proto;
  209. filter->src_port = src_port;
  210. filter->dst_port = dst_port;
  211. filter->flow_id = flow_id;
  212. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  213. list_add_tail(&filter->next, &priv->filters);
  214. hlist_add_head(&filter->filter_chain,
  215. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  216. dst_port));
  217. return filter;
  218. }
  219. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  220. {
  221. struct mlx4_en_priv *priv = filter->priv;
  222. int rc;
  223. list_del(&filter->next);
  224. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  225. if (rc && rc != -ENOENT)
  226. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  227. kfree(filter);
  228. }
  229. static inline struct mlx4_en_filter *
  230. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  231. u8 ip_proto, __be16 src_port, __be16 dst_port)
  232. {
  233. struct mlx4_en_filter *filter;
  234. struct mlx4_en_filter *ret = NULL;
  235. hlist_for_each_entry(filter,
  236. filter_hash_bucket(priv, src_ip, dst_ip,
  237. src_port, dst_port),
  238. filter_chain) {
  239. if (filter->src_ip == src_ip &&
  240. filter->dst_ip == dst_ip &&
  241. filter->ip_proto == ip_proto &&
  242. filter->src_port == src_port &&
  243. filter->dst_port == dst_port) {
  244. ret = filter;
  245. break;
  246. }
  247. }
  248. return ret;
  249. }
  250. static int
  251. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  252. u16 rxq_index, u32 flow_id)
  253. {
  254. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  255. struct mlx4_en_filter *filter;
  256. const struct iphdr *ip;
  257. const __be16 *ports;
  258. u8 ip_proto;
  259. __be32 src_ip;
  260. __be32 dst_ip;
  261. __be16 src_port;
  262. __be16 dst_port;
  263. int nhoff = skb_network_offset(skb);
  264. int ret = 0;
  265. if (skb->protocol != htons(ETH_P_IP))
  266. return -EPROTONOSUPPORT;
  267. ip = (const struct iphdr *)(skb->data + nhoff);
  268. if (ip_is_fragment(ip))
  269. return -EPROTONOSUPPORT;
  270. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  271. return -EPROTONOSUPPORT;
  272. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  273. ip_proto = ip->protocol;
  274. src_ip = ip->saddr;
  275. dst_ip = ip->daddr;
  276. src_port = ports[0];
  277. dst_port = ports[1];
  278. spin_lock_bh(&priv->filters_lock);
  279. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  280. src_port, dst_port);
  281. if (filter) {
  282. if (filter->rxq_index == rxq_index)
  283. goto out;
  284. filter->rxq_index = rxq_index;
  285. } else {
  286. filter = mlx4_en_filter_alloc(priv, rxq_index,
  287. src_ip, dst_ip, ip_proto,
  288. src_port, dst_port, flow_id);
  289. if (!filter) {
  290. ret = -ENOMEM;
  291. goto err;
  292. }
  293. }
  294. queue_work(priv->mdev->workqueue, &filter->work);
  295. out:
  296. ret = filter->id;
  297. err:
  298. spin_unlock_bh(&priv->filters_lock);
  299. return ret;
  300. }
  301. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  302. {
  303. struct mlx4_en_filter *filter, *tmp;
  304. LIST_HEAD(del_list);
  305. spin_lock_bh(&priv->filters_lock);
  306. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  307. list_move(&filter->next, &del_list);
  308. hlist_del(&filter->filter_chain);
  309. }
  310. spin_unlock_bh(&priv->filters_lock);
  311. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  312. cancel_work_sync(&filter->work);
  313. mlx4_en_filter_free(filter);
  314. }
  315. }
  316. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  317. {
  318. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  319. LIST_HEAD(del_list);
  320. int i = 0;
  321. spin_lock_bh(&priv->filters_lock);
  322. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  323. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  324. break;
  325. if (filter->activated &&
  326. !work_pending(&filter->work) &&
  327. rps_may_expire_flow(priv->dev,
  328. filter->rxq_index, filter->flow_id,
  329. filter->id)) {
  330. list_move(&filter->next, &del_list);
  331. hlist_del(&filter->filter_chain);
  332. } else
  333. last_filter = filter;
  334. i++;
  335. }
  336. if (last_filter && (&last_filter->next != priv->filters.next))
  337. list_move(&priv->filters, &last_filter->next);
  338. spin_unlock_bh(&priv->filters_lock);
  339. list_for_each_entry_safe(filter, tmp, &del_list, next)
  340. mlx4_en_filter_free(filter);
  341. }
  342. #endif
  343. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  344. __be16 proto, u16 vid)
  345. {
  346. struct mlx4_en_priv *priv = netdev_priv(dev);
  347. struct mlx4_en_dev *mdev = priv->mdev;
  348. int err;
  349. int idx;
  350. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  351. set_bit(vid, priv->active_vlans);
  352. /* Add VID to port VLAN filter */
  353. mutex_lock(&mdev->state_lock);
  354. if (mdev->device_up && priv->port_up) {
  355. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  356. if (err)
  357. en_err(priv, "Failed configuring VLAN filter\n");
  358. }
  359. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  360. en_dbg(HW, priv, "failed adding vlan %d\n", vid);
  361. mutex_unlock(&mdev->state_lock);
  362. return 0;
  363. }
  364. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  365. __be16 proto, u16 vid)
  366. {
  367. struct mlx4_en_priv *priv = netdev_priv(dev);
  368. struct mlx4_en_dev *mdev = priv->mdev;
  369. int err;
  370. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  371. clear_bit(vid, priv->active_vlans);
  372. /* Remove VID from port VLAN filter */
  373. mutex_lock(&mdev->state_lock);
  374. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  375. if (mdev->device_up && priv->port_up) {
  376. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  377. if (err)
  378. en_err(priv, "Failed configuring VLAN filter\n");
  379. }
  380. mutex_unlock(&mdev->state_lock);
  381. return 0;
  382. }
  383. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  384. {
  385. int i;
  386. for (i = ETH_ALEN - 1; i >= 0; --i) {
  387. dst_mac[i] = src_mac & 0xff;
  388. src_mac >>= 8;
  389. }
  390. memset(&dst_mac[ETH_ALEN], 0, 2);
  391. }
  392. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  393. int qpn, u64 *reg_id)
  394. {
  395. int err;
  396. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  397. return 0; /* do nothing */
  398. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  399. MLX4_DOMAIN_NIC, reg_id);
  400. if (err) {
  401. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  402. return err;
  403. }
  404. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  405. return 0;
  406. }
  407. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  408. unsigned char *mac, int *qpn, u64 *reg_id)
  409. {
  410. struct mlx4_en_dev *mdev = priv->mdev;
  411. struct mlx4_dev *dev = mdev->dev;
  412. int err;
  413. switch (dev->caps.steering_mode) {
  414. case MLX4_STEERING_MODE_B0: {
  415. struct mlx4_qp qp;
  416. u8 gid[16] = {0};
  417. qp.qpn = *qpn;
  418. memcpy(&gid[10], mac, ETH_ALEN);
  419. gid[5] = priv->port;
  420. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  421. break;
  422. }
  423. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  424. struct mlx4_spec_list spec_eth = { {NULL} };
  425. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  426. struct mlx4_net_trans_rule rule = {
  427. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  428. .exclusive = 0,
  429. .allow_loopback = 1,
  430. .promisc_mode = MLX4_FS_REGULAR,
  431. .priority = MLX4_DOMAIN_NIC,
  432. };
  433. rule.port = priv->port;
  434. rule.qpn = *qpn;
  435. INIT_LIST_HEAD(&rule.list);
  436. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  437. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  438. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  439. list_add_tail(&spec_eth.list, &rule.list);
  440. err = mlx4_flow_attach(dev, &rule, reg_id);
  441. break;
  442. }
  443. default:
  444. return -EINVAL;
  445. }
  446. if (err)
  447. en_warn(priv, "Failed Attaching Unicast\n");
  448. return err;
  449. }
  450. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  451. unsigned char *mac, int qpn, u64 reg_id)
  452. {
  453. struct mlx4_en_dev *mdev = priv->mdev;
  454. struct mlx4_dev *dev = mdev->dev;
  455. switch (dev->caps.steering_mode) {
  456. case MLX4_STEERING_MODE_B0: {
  457. struct mlx4_qp qp;
  458. u8 gid[16] = {0};
  459. qp.qpn = qpn;
  460. memcpy(&gid[10], mac, ETH_ALEN);
  461. gid[5] = priv->port;
  462. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  463. break;
  464. }
  465. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  466. mlx4_flow_detach(dev, reg_id);
  467. break;
  468. }
  469. default:
  470. en_err(priv, "Invalid steering mode.\n");
  471. }
  472. }
  473. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  474. {
  475. struct mlx4_en_dev *mdev = priv->mdev;
  476. struct mlx4_dev *dev = mdev->dev;
  477. struct mlx4_mac_entry *entry;
  478. int index = 0;
  479. int err = 0;
  480. u64 reg_id;
  481. int *qpn = &priv->base_qpn;
  482. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  483. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  484. priv->dev->dev_addr);
  485. index = mlx4_register_mac(dev, priv->port, mac);
  486. if (index < 0) {
  487. err = index;
  488. en_err(priv, "Failed adding MAC: %pM\n",
  489. priv->dev->dev_addr);
  490. return err;
  491. }
  492. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  493. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  494. *qpn = base_qpn + index;
  495. return 0;
  496. }
  497. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  498. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  499. if (err) {
  500. en_err(priv, "Failed to reserve qp for mac registration\n");
  501. goto qp_err;
  502. }
  503. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  504. if (err)
  505. goto steer_err;
  506. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  507. &priv->tunnel_reg_id);
  508. if (err)
  509. goto tunnel_err;
  510. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  511. if (!entry) {
  512. err = -ENOMEM;
  513. goto alloc_err;
  514. }
  515. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  516. memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
  517. entry->reg_id = reg_id;
  518. hlist_add_head_rcu(&entry->hlist,
  519. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  520. return 0;
  521. alloc_err:
  522. if (priv->tunnel_reg_id)
  523. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  524. tunnel_err:
  525. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  526. steer_err:
  527. mlx4_qp_release_range(dev, *qpn, 1);
  528. qp_err:
  529. mlx4_unregister_mac(dev, priv->port, mac);
  530. return err;
  531. }
  532. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  533. {
  534. struct mlx4_en_dev *mdev = priv->mdev;
  535. struct mlx4_dev *dev = mdev->dev;
  536. int qpn = priv->base_qpn;
  537. u64 mac;
  538. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  539. mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  540. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  541. priv->dev->dev_addr);
  542. mlx4_unregister_mac(dev, priv->port, mac);
  543. } else {
  544. struct mlx4_mac_entry *entry;
  545. struct hlist_node *tmp;
  546. struct hlist_head *bucket;
  547. unsigned int i;
  548. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  549. bucket = &priv->mac_hash[i];
  550. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  551. mac = mlx4_mac_to_u64(entry->mac);
  552. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  553. entry->mac);
  554. mlx4_en_uc_steer_release(priv, entry->mac,
  555. qpn, entry->reg_id);
  556. mlx4_unregister_mac(dev, priv->port, mac);
  557. hlist_del_rcu(&entry->hlist);
  558. kfree_rcu(entry, rcu);
  559. }
  560. }
  561. if (priv->tunnel_reg_id) {
  562. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  563. priv->tunnel_reg_id = 0;
  564. }
  565. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  566. priv->port, qpn);
  567. mlx4_qp_release_range(dev, qpn, 1);
  568. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  569. }
  570. }
  571. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  572. unsigned char *new_mac, unsigned char *prev_mac)
  573. {
  574. struct mlx4_en_dev *mdev = priv->mdev;
  575. struct mlx4_dev *dev = mdev->dev;
  576. int err = 0;
  577. u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
  578. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  579. struct hlist_head *bucket;
  580. unsigned int mac_hash;
  581. struct mlx4_mac_entry *entry;
  582. struct hlist_node *tmp;
  583. u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
  584. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  585. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  586. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  587. mlx4_en_uc_steer_release(priv, entry->mac,
  588. qpn, entry->reg_id);
  589. mlx4_unregister_mac(dev, priv->port,
  590. prev_mac_u64);
  591. hlist_del_rcu(&entry->hlist);
  592. synchronize_rcu();
  593. memcpy(entry->mac, new_mac, ETH_ALEN);
  594. entry->reg_id = 0;
  595. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  596. hlist_add_head_rcu(&entry->hlist,
  597. &priv->mac_hash[mac_hash]);
  598. mlx4_register_mac(dev, priv->port, new_mac_u64);
  599. err = mlx4_en_uc_steer_add(priv, new_mac,
  600. &qpn,
  601. &entry->reg_id);
  602. if (err)
  603. return err;
  604. if (priv->tunnel_reg_id) {
  605. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  606. priv->tunnel_reg_id = 0;
  607. }
  608. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  609. &priv->tunnel_reg_id);
  610. return err;
  611. }
  612. }
  613. return -EINVAL;
  614. }
  615. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  616. }
  617. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
  618. unsigned char new_mac[ETH_ALEN + 2])
  619. {
  620. int err = 0;
  621. if (priv->port_up) {
  622. /* Remove old MAC and insert the new one */
  623. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  624. new_mac, priv->current_mac);
  625. if (err)
  626. en_err(priv, "Failed changing HW MAC address\n");
  627. } else
  628. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  629. if (!err)
  630. memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
  631. return err;
  632. }
  633. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  634. {
  635. struct mlx4_en_priv *priv = netdev_priv(dev);
  636. struct mlx4_en_dev *mdev = priv->mdev;
  637. struct sockaddr *saddr = addr;
  638. unsigned char new_mac[ETH_ALEN + 2];
  639. int err;
  640. if (!is_valid_ether_addr(saddr->sa_data))
  641. return -EADDRNOTAVAIL;
  642. mutex_lock(&mdev->state_lock);
  643. memcpy(new_mac, saddr->sa_data, ETH_ALEN);
  644. err = mlx4_en_do_set_mac(priv, new_mac);
  645. if (!err)
  646. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  647. mutex_unlock(&mdev->state_lock);
  648. return err;
  649. }
  650. static void mlx4_en_clear_list(struct net_device *dev)
  651. {
  652. struct mlx4_en_priv *priv = netdev_priv(dev);
  653. struct mlx4_en_mc_list *tmp, *mc_to_del;
  654. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  655. list_del(&mc_to_del->list);
  656. kfree(mc_to_del);
  657. }
  658. }
  659. static void mlx4_en_cache_mclist(struct net_device *dev)
  660. {
  661. struct mlx4_en_priv *priv = netdev_priv(dev);
  662. struct netdev_hw_addr *ha;
  663. struct mlx4_en_mc_list *tmp;
  664. mlx4_en_clear_list(dev);
  665. netdev_for_each_mc_addr(ha, dev) {
  666. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  667. if (!tmp) {
  668. mlx4_en_clear_list(dev);
  669. return;
  670. }
  671. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  672. list_add_tail(&tmp->list, &priv->mc_list);
  673. }
  674. }
  675. static void update_mclist_flags(struct mlx4_en_priv *priv,
  676. struct list_head *dst,
  677. struct list_head *src)
  678. {
  679. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  680. bool found;
  681. /* Find all the entries that should be removed from dst,
  682. * These are the entries that are not found in src
  683. */
  684. list_for_each_entry(dst_tmp, dst, list) {
  685. found = false;
  686. list_for_each_entry(src_tmp, src, list) {
  687. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  688. found = true;
  689. break;
  690. }
  691. }
  692. if (!found)
  693. dst_tmp->action = MCLIST_REM;
  694. }
  695. /* Add entries that exist in src but not in dst
  696. * mark them as need to add
  697. */
  698. list_for_each_entry(src_tmp, src, list) {
  699. found = false;
  700. list_for_each_entry(dst_tmp, dst, list) {
  701. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  702. dst_tmp->action = MCLIST_NONE;
  703. found = true;
  704. break;
  705. }
  706. }
  707. if (!found) {
  708. new_mc = kmemdup(src_tmp,
  709. sizeof(struct mlx4_en_mc_list),
  710. GFP_KERNEL);
  711. if (!new_mc)
  712. return;
  713. new_mc->action = MCLIST_ADD;
  714. list_add_tail(&new_mc->list, dst);
  715. }
  716. }
  717. }
  718. static void mlx4_en_set_rx_mode(struct net_device *dev)
  719. {
  720. struct mlx4_en_priv *priv = netdev_priv(dev);
  721. if (!priv->port_up)
  722. return;
  723. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  724. }
  725. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  726. struct mlx4_en_dev *mdev)
  727. {
  728. int err = 0;
  729. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  730. if (netif_msg_rx_status(priv))
  731. en_warn(priv, "Entering promiscuous mode\n");
  732. priv->flags |= MLX4_EN_FLAG_PROMISC;
  733. /* Enable promiscouos mode */
  734. switch (mdev->dev->caps.steering_mode) {
  735. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  736. err = mlx4_flow_steer_promisc_add(mdev->dev,
  737. priv->port,
  738. priv->base_qpn,
  739. MLX4_FS_ALL_DEFAULT);
  740. if (err)
  741. en_err(priv, "Failed enabling promiscuous mode\n");
  742. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  743. break;
  744. case MLX4_STEERING_MODE_B0:
  745. err = mlx4_unicast_promisc_add(mdev->dev,
  746. priv->base_qpn,
  747. priv->port);
  748. if (err)
  749. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  750. /* Add the default qp number as multicast
  751. * promisc
  752. */
  753. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  754. err = mlx4_multicast_promisc_add(mdev->dev,
  755. priv->base_qpn,
  756. priv->port);
  757. if (err)
  758. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  759. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  760. }
  761. break;
  762. case MLX4_STEERING_MODE_A0:
  763. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  764. priv->port,
  765. priv->base_qpn,
  766. 1);
  767. if (err)
  768. en_err(priv, "Failed enabling promiscuous mode\n");
  769. break;
  770. }
  771. /* Disable port multicast filter (unconditionally) */
  772. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  773. 0, MLX4_MCAST_DISABLE);
  774. if (err)
  775. en_err(priv, "Failed disabling multicast filter\n");
  776. }
  777. }
  778. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  779. struct mlx4_en_dev *mdev)
  780. {
  781. int err = 0;
  782. if (netif_msg_rx_status(priv))
  783. en_warn(priv, "Leaving promiscuous mode\n");
  784. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  785. /* Disable promiscouos mode */
  786. switch (mdev->dev->caps.steering_mode) {
  787. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  788. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  789. priv->port,
  790. MLX4_FS_ALL_DEFAULT);
  791. if (err)
  792. en_err(priv, "Failed disabling promiscuous mode\n");
  793. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  794. break;
  795. case MLX4_STEERING_MODE_B0:
  796. err = mlx4_unicast_promisc_remove(mdev->dev,
  797. priv->base_qpn,
  798. priv->port);
  799. if (err)
  800. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  801. /* Disable Multicast promisc */
  802. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  803. err = mlx4_multicast_promisc_remove(mdev->dev,
  804. priv->base_qpn,
  805. priv->port);
  806. if (err)
  807. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  808. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  809. }
  810. break;
  811. case MLX4_STEERING_MODE_A0:
  812. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  813. priv->port,
  814. priv->base_qpn, 0);
  815. if (err)
  816. en_err(priv, "Failed disabling promiscuous mode\n");
  817. break;
  818. }
  819. }
  820. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  821. struct net_device *dev,
  822. struct mlx4_en_dev *mdev)
  823. {
  824. struct mlx4_en_mc_list *mclist, *tmp;
  825. u64 mcast_addr = 0;
  826. u8 mc_list[16] = {0};
  827. int err = 0;
  828. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  829. if (dev->flags & IFF_ALLMULTI) {
  830. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  831. 0, MLX4_MCAST_DISABLE);
  832. if (err)
  833. en_err(priv, "Failed disabling multicast filter\n");
  834. /* Add the default qp number as multicast promisc */
  835. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  836. switch (mdev->dev->caps.steering_mode) {
  837. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  838. err = mlx4_flow_steer_promisc_add(mdev->dev,
  839. priv->port,
  840. priv->base_qpn,
  841. MLX4_FS_MC_DEFAULT);
  842. break;
  843. case MLX4_STEERING_MODE_B0:
  844. err = mlx4_multicast_promisc_add(mdev->dev,
  845. priv->base_qpn,
  846. priv->port);
  847. break;
  848. case MLX4_STEERING_MODE_A0:
  849. break;
  850. }
  851. if (err)
  852. en_err(priv, "Failed entering multicast promisc mode\n");
  853. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  854. }
  855. } else {
  856. /* Disable Multicast promisc */
  857. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  858. switch (mdev->dev->caps.steering_mode) {
  859. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  860. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  861. priv->port,
  862. MLX4_FS_MC_DEFAULT);
  863. break;
  864. case MLX4_STEERING_MODE_B0:
  865. err = mlx4_multicast_promisc_remove(mdev->dev,
  866. priv->base_qpn,
  867. priv->port);
  868. break;
  869. case MLX4_STEERING_MODE_A0:
  870. break;
  871. }
  872. if (err)
  873. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  874. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  875. }
  876. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  877. 0, MLX4_MCAST_DISABLE);
  878. if (err)
  879. en_err(priv, "Failed disabling multicast filter\n");
  880. /* Flush mcast filter and init it with broadcast address */
  881. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  882. 1, MLX4_MCAST_CONFIG);
  883. /* Update multicast list - we cache all addresses so they won't
  884. * change while HW is updated holding the command semaphor */
  885. netif_addr_lock_bh(dev);
  886. mlx4_en_cache_mclist(dev);
  887. netif_addr_unlock_bh(dev);
  888. list_for_each_entry(mclist, &priv->mc_list, list) {
  889. mcast_addr = mlx4_mac_to_u64(mclist->addr);
  890. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  891. mcast_addr, 0, MLX4_MCAST_CONFIG);
  892. }
  893. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  894. 0, MLX4_MCAST_ENABLE);
  895. if (err)
  896. en_err(priv, "Failed enabling multicast filter\n");
  897. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  898. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  899. if (mclist->action == MCLIST_REM) {
  900. /* detach this address and delete from list */
  901. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  902. mc_list[5] = priv->port;
  903. err = mlx4_multicast_detach(mdev->dev,
  904. &priv->rss_map.indir_qp,
  905. mc_list,
  906. MLX4_PROT_ETH,
  907. mclist->reg_id);
  908. if (err)
  909. en_err(priv, "Fail to detach multicast address\n");
  910. if (mclist->tunnel_reg_id) {
  911. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  912. if (err)
  913. en_err(priv, "Failed to detach multicast address\n");
  914. }
  915. /* remove from list */
  916. list_del(&mclist->list);
  917. kfree(mclist);
  918. } else if (mclist->action == MCLIST_ADD) {
  919. /* attach the address */
  920. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  921. /* needed for B0 steering support */
  922. mc_list[5] = priv->port;
  923. err = mlx4_multicast_attach(mdev->dev,
  924. &priv->rss_map.indir_qp,
  925. mc_list,
  926. priv->port, 0,
  927. MLX4_PROT_ETH,
  928. &mclist->reg_id);
  929. if (err)
  930. en_err(priv, "Fail to attach multicast address\n");
  931. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  932. &mclist->tunnel_reg_id);
  933. if (err)
  934. en_err(priv, "Failed to attach multicast address\n");
  935. }
  936. }
  937. }
  938. }
  939. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  940. struct net_device *dev,
  941. struct mlx4_en_dev *mdev)
  942. {
  943. struct netdev_hw_addr *ha;
  944. struct mlx4_mac_entry *entry;
  945. struct hlist_node *tmp;
  946. bool found;
  947. u64 mac;
  948. int err = 0;
  949. struct hlist_head *bucket;
  950. unsigned int i;
  951. int removed = 0;
  952. u32 prev_flags;
  953. /* Note that we do not need to protect our mac_hash traversal with rcu,
  954. * since all modification code is protected by mdev->state_lock
  955. */
  956. /* find what to remove */
  957. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  958. bucket = &priv->mac_hash[i];
  959. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  960. found = false;
  961. netdev_for_each_uc_addr(ha, dev) {
  962. if (ether_addr_equal_64bits(entry->mac,
  963. ha->addr)) {
  964. found = true;
  965. break;
  966. }
  967. }
  968. /* MAC address of the port is not in uc list */
  969. if (ether_addr_equal_64bits(entry->mac,
  970. priv->current_mac))
  971. found = true;
  972. if (!found) {
  973. mac = mlx4_mac_to_u64(entry->mac);
  974. mlx4_en_uc_steer_release(priv, entry->mac,
  975. priv->base_qpn,
  976. entry->reg_id);
  977. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  978. hlist_del_rcu(&entry->hlist);
  979. kfree_rcu(entry, rcu);
  980. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  981. entry->mac, priv->port);
  982. ++removed;
  983. }
  984. }
  985. }
  986. /* if we didn't remove anything, there is no use in trying to add
  987. * again once we are in a forced promisc mode state
  988. */
  989. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  990. return;
  991. prev_flags = priv->flags;
  992. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  993. /* find what to add */
  994. netdev_for_each_uc_addr(ha, dev) {
  995. found = false;
  996. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  997. hlist_for_each_entry(entry, bucket, hlist) {
  998. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  999. found = true;
  1000. break;
  1001. }
  1002. }
  1003. if (!found) {
  1004. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1005. if (!entry) {
  1006. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  1007. ha->addr, priv->port);
  1008. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1009. break;
  1010. }
  1011. mac = mlx4_mac_to_u64(ha->addr);
  1012. memcpy(entry->mac, ha->addr, ETH_ALEN);
  1013. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  1014. if (err < 0) {
  1015. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  1016. ha->addr, priv->port, err);
  1017. kfree(entry);
  1018. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1019. break;
  1020. }
  1021. err = mlx4_en_uc_steer_add(priv, ha->addr,
  1022. &priv->base_qpn,
  1023. &entry->reg_id);
  1024. if (err) {
  1025. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  1026. ha->addr, priv->port, err);
  1027. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  1028. kfree(entry);
  1029. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1030. break;
  1031. } else {
  1032. unsigned int mac_hash;
  1033. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  1034. ha->addr, priv->port);
  1035. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  1036. bucket = &priv->mac_hash[mac_hash];
  1037. hlist_add_head_rcu(&entry->hlist, bucket);
  1038. }
  1039. }
  1040. }
  1041. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1042. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1043. priv->port);
  1044. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1045. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1046. priv->port);
  1047. }
  1048. }
  1049. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1050. {
  1051. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1052. rx_mode_task);
  1053. struct mlx4_en_dev *mdev = priv->mdev;
  1054. struct net_device *dev = priv->dev;
  1055. mutex_lock(&mdev->state_lock);
  1056. if (!mdev->device_up) {
  1057. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1058. goto out;
  1059. }
  1060. if (!priv->port_up) {
  1061. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1062. goto out;
  1063. }
  1064. if (!netif_carrier_ok(dev)) {
  1065. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1066. if (priv->port_state.link_state) {
  1067. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1068. netif_carrier_on(dev);
  1069. en_dbg(LINK, priv, "Link Up\n");
  1070. }
  1071. }
  1072. }
  1073. if (dev->priv_flags & IFF_UNICAST_FLT)
  1074. mlx4_en_do_uc_filter(priv, dev, mdev);
  1075. /* Promsicuous mode: disable all filters */
  1076. if ((dev->flags & IFF_PROMISC) ||
  1077. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1078. mlx4_en_set_promisc_mode(priv, mdev);
  1079. goto out;
  1080. }
  1081. /* Not in promiscuous mode */
  1082. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1083. mlx4_en_clear_promisc_mode(priv, mdev);
  1084. mlx4_en_do_multicast(priv, dev, mdev);
  1085. out:
  1086. mutex_unlock(&mdev->state_lock);
  1087. }
  1088. #ifdef CONFIG_NET_POLL_CONTROLLER
  1089. static void mlx4_en_netpoll(struct net_device *dev)
  1090. {
  1091. struct mlx4_en_priv *priv = netdev_priv(dev);
  1092. struct mlx4_en_cq *cq;
  1093. int i;
  1094. for (i = 0; i < priv->rx_ring_num; i++) {
  1095. cq = priv->rx_cq[i];
  1096. napi_schedule(&cq->napi);
  1097. }
  1098. }
  1099. #endif
  1100. static void mlx4_en_tx_timeout(struct net_device *dev)
  1101. {
  1102. struct mlx4_en_priv *priv = netdev_priv(dev);
  1103. struct mlx4_en_dev *mdev = priv->mdev;
  1104. int i;
  1105. if (netif_msg_timer(priv))
  1106. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1107. for (i = 0; i < priv->tx_ring_num; i++) {
  1108. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1109. continue;
  1110. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1111. i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
  1112. priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
  1113. }
  1114. priv->port_stats.tx_timeout++;
  1115. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1116. queue_work(mdev->workqueue, &priv->watchdog_task);
  1117. }
  1118. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1119. {
  1120. struct mlx4_en_priv *priv = netdev_priv(dev);
  1121. spin_lock_bh(&priv->stats_lock);
  1122. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1123. spin_unlock_bh(&priv->stats_lock);
  1124. return &priv->ret_stats;
  1125. }
  1126. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1127. {
  1128. struct mlx4_en_cq *cq;
  1129. int i;
  1130. /* If we haven't received a specific coalescing setting
  1131. * (module param), we set the moderation parameters as follows:
  1132. * - moder_cnt is set to the number of mtu sized packets to
  1133. * satisfy our coalescing target.
  1134. * - moder_time is set to a fixed value.
  1135. */
  1136. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1137. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1138. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1139. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1140. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1141. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1142. /* Setup cq moderation params */
  1143. for (i = 0; i < priv->rx_ring_num; i++) {
  1144. cq = priv->rx_cq[i];
  1145. cq->moder_cnt = priv->rx_frames;
  1146. cq->moder_time = priv->rx_usecs;
  1147. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1148. priv->last_moder_packets[i] = 0;
  1149. priv->last_moder_bytes[i] = 0;
  1150. }
  1151. for (i = 0; i < priv->tx_ring_num; i++) {
  1152. cq = priv->tx_cq[i];
  1153. cq->moder_cnt = priv->tx_frames;
  1154. cq->moder_time = priv->tx_usecs;
  1155. }
  1156. /* Reset auto-moderation params */
  1157. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1158. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1159. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1160. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1161. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1162. priv->adaptive_rx_coal = 1;
  1163. priv->last_moder_jiffies = 0;
  1164. priv->last_moder_tx_packets = 0;
  1165. }
  1166. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1167. {
  1168. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1169. struct mlx4_en_cq *cq;
  1170. unsigned long packets;
  1171. unsigned long rate;
  1172. unsigned long avg_pkt_size;
  1173. unsigned long rx_packets;
  1174. unsigned long rx_bytes;
  1175. unsigned long rx_pkt_diff;
  1176. int moder_time;
  1177. int ring, err;
  1178. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1179. return;
  1180. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1181. spin_lock_bh(&priv->stats_lock);
  1182. rx_packets = priv->rx_ring[ring]->packets;
  1183. rx_bytes = priv->rx_ring[ring]->bytes;
  1184. spin_unlock_bh(&priv->stats_lock);
  1185. rx_pkt_diff = ((unsigned long) (rx_packets -
  1186. priv->last_moder_packets[ring]));
  1187. packets = rx_pkt_diff;
  1188. rate = packets * HZ / period;
  1189. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1190. priv->last_moder_bytes[ring])) / packets : 0;
  1191. /* Apply auto-moderation only when packet rate
  1192. * exceeds a rate that it matters */
  1193. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1194. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1195. if (rate < priv->pkt_rate_low)
  1196. moder_time = priv->rx_usecs_low;
  1197. else if (rate > priv->pkt_rate_high)
  1198. moder_time = priv->rx_usecs_high;
  1199. else
  1200. moder_time = (rate - priv->pkt_rate_low) *
  1201. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1202. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1203. priv->rx_usecs_low;
  1204. } else {
  1205. moder_time = priv->rx_usecs_low;
  1206. }
  1207. if (moder_time != priv->last_moder_time[ring]) {
  1208. priv->last_moder_time[ring] = moder_time;
  1209. cq = priv->rx_cq[ring];
  1210. cq->moder_time = moder_time;
  1211. cq->moder_cnt = priv->rx_frames;
  1212. err = mlx4_en_set_cq_moder(priv, cq);
  1213. if (err)
  1214. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1215. ring);
  1216. }
  1217. priv->last_moder_packets[ring] = rx_packets;
  1218. priv->last_moder_bytes[ring] = rx_bytes;
  1219. }
  1220. priv->last_moder_jiffies = jiffies;
  1221. }
  1222. static void mlx4_en_do_get_stats(struct work_struct *work)
  1223. {
  1224. struct delayed_work *delay = to_delayed_work(work);
  1225. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1226. stats_task);
  1227. struct mlx4_en_dev *mdev = priv->mdev;
  1228. int err;
  1229. mutex_lock(&mdev->state_lock);
  1230. if (mdev->device_up) {
  1231. if (priv->port_up) {
  1232. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1233. if (err)
  1234. en_dbg(HW, priv, "Could not update stats\n");
  1235. mlx4_en_auto_moderation(priv);
  1236. }
  1237. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1238. }
  1239. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1240. mlx4_en_do_set_mac(priv, priv->current_mac);
  1241. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1242. }
  1243. mutex_unlock(&mdev->state_lock);
  1244. }
  1245. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1246. * periodically
  1247. */
  1248. static void mlx4_en_service_task(struct work_struct *work)
  1249. {
  1250. struct delayed_work *delay = to_delayed_work(work);
  1251. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1252. service_task);
  1253. struct mlx4_en_dev *mdev = priv->mdev;
  1254. mutex_lock(&mdev->state_lock);
  1255. if (mdev->device_up) {
  1256. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1257. mlx4_en_ptp_overflow_check(mdev);
  1258. mlx4_en_recover_from_oom(priv);
  1259. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1260. SERVICE_TASK_DELAY);
  1261. }
  1262. mutex_unlock(&mdev->state_lock);
  1263. }
  1264. static void mlx4_en_linkstate(struct work_struct *work)
  1265. {
  1266. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1267. linkstate_task);
  1268. struct mlx4_en_dev *mdev = priv->mdev;
  1269. int linkstate = priv->link_state;
  1270. mutex_lock(&mdev->state_lock);
  1271. /* If observable port state changed set carrier state and
  1272. * report to system log */
  1273. if (priv->last_link_state != linkstate) {
  1274. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1275. en_info(priv, "Link Down\n");
  1276. netif_carrier_off(priv->dev);
  1277. } else {
  1278. en_info(priv, "Link Up\n");
  1279. netif_carrier_on(priv->dev);
  1280. }
  1281. }
  1282. priv->last_link_state = linkstate;
  1283. mutex_unlock(&mdev->state_lock);
  1284. }
  1285. static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1286. {
  1287. struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
  1288. int numa_node = priv->mdev->dev->numa_node;
  1289. int ret = 0;
  1290. if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
  1291. return -ENOMEM;
  1292. ret = cpumask_set_cpu_local_first(ring_idx, numa_node,
  1293. ring->affinity_mask);
  1294. if (ret)
  1295. free_cpumask_var(ring->affinity_mask);
  1296. return ret;
  1297. }
  1298. static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1299. {
  1300. free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
  1301. }
  1302. int mlx4_en_start_port(struct net_device *dev)
  1303. {
  1304. struct mlx4_en_priv *priv = netdev_priv(dev);
  1305. struct mlx4_en_dev *mdev = priv->mdev;
  1306. struct mlx4_en_cq *cq;
  1307. struct mlx4_en_tx_ring *tx_ring;
  1308. int rx_index = 0;
  1309. int tx_index = 0;
  1310. int err = 0;
  1311. int i;
  1312. int j;
  1313. u8 mc_list[16] = {0};
  1314. if (priv->port_up) {
  1315. en_dbg(DRV, priv, "start port called while port already up\n");
  1316. return 0;
  1317. }
  1318. INIT_LIST_HEAD(&priv->mc_list);
  1319. INIT_LIST_HEAD(&priv->curr_list);
  1320. INIT_LIST_HEAD(&priv->ethtool_list);
  1321. memset(&priv->ethtool_rules[0], 0,
  1322. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1323. /* Calculate Rx buf size */
  1324. dev->mtu = min(dev->mtu, priv->max_mtu);
  1325. mlx4_en_calc_rx_buf(dev);
  1326. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1327. /* Configure rx cq's and rings */
  1328. err = mlx4_en_activate_rx_rings(priv);
  1329. if (err) {
  1330. en_err(priv, "Failed to activate RX rings\n");
  1331. return err;
  1332. }
  1333. for (i = 0; i < priv->rx_ring_num; i++) {
  1334. cq = priv->rx_cq[i];
  1335. mlx4_en_cq_init_lock(cq);
  1336. err = mlx4_en_init_affinity_hint(priv, i);
  1337. if (err) {
  1338. en_err(priv, "Failed preparing IRQ affinity hint\n");
  1339. goto cq_err;
  1340. }
  1341. err = mlx4_en_activate_cq(priv, cq, i);
  1342. if (err) {
  1343. en_err(priv, "Failed activating Rx CQ\n");
  1344. mlx4_en_free_affinity_hint(priv, i);
  1345. goto cq_err;
  1346. }
  1347. for (j = 0; j < cq->size; j++) {
  1348. struct mlx4_cqe *cqe = NULL;
  1349. cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
  1350. priv->cqe_factor;
  1351. cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1352. }
  1353. err = mlx4_en_set_cq_moder(priv, cq);
  1354. if (err) {
  1355. en_err(priv, "Failed setting cq moderation parameters\n");
  1356. mlx4_en_deactivate_cq(priv, cq);
  1357. mlx4_en_free_affinity_hint(priv, i);
  1358. goto cq_err;
  1359. }
  1360. mlx4_en_arm_cq(priv, cq);
  1361. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1362. ++rx_index;
  1363. }
  1364. /* Set qp number */
  1365. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1366. err = mlx4_en_get_qp(priv);
  1367. if (err) {
  1368. en_err(priv, "Failed getting eth qp\n");
  1369. goto cq_err;
  1370. }
  1371. mdev->mac_removed[priv->port] = 0;
  1372. err = mlx4_en_config_rss_steer(priv);
  1373. if (err) {
  1374. en_err(priv, "Failed configuring rss steering\n");
  1375. goto mac_err;
  1376. }
  1377. err = mlx4_en_create_drop_qp(priv);
  1378. if (err)
  1379. goto rss_err;
  1380. /* Configure tx cq's and rings */
  1381. for (i = 0; i < priv->tx_ring_num; i++) {
  1382. /* Configure cq */
  1383. cq = priv->tx_cq[i];
  1384. err = mlx4_en_activate_cq(priv, cq, i);
  1385. if (err) {
  1386. en_err(priv, "Failed allocating Tx CQ\n");
  1387. goto tx_err;
  1388. }
  1389. err = mlx4_en_set_cq_moder(priv, cq);
  1390. if (err) {
  1391. en_err(priv, "Failed setting cq moderation parameters\n");
  1392. mlx4_en_deactivate_cq(priv, cq);
  1393. goto tx_err;
  1394. }
  1395. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1396. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1397. /* Configure ring */
  1398. tx_ring = priv->tx_ring[i];
  1399. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1400. i / priv->num_tx_rings_p_up);
  1401. if (err) {
  1402. en_err(priv, "Failed allocating Tx ring\n");
  1403. mlx4_en_deactivate_cq(priv, cq);
  1404. goto tx_err;
  1405. }
  1406. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1407. /* Arm CQ for TX completions */
  1408. mlx4_en_arm_cq(priv, cq);
  1409. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1410. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1411. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1412. ++tx_index;
  1413. }
  1414. /* Configure port */
  1415. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1416. priv->rx_skb_size + ETH_FCS_LEN,
  1417. priv->prof->tx_pause,
  1418. priv->prof->tx_ppp,
  1419. priv->prof->rx_pause,
  1420. priv->prof->rx_ppp);
  1421. if (err) {
  1422. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1423. priv->port, err);
  1424. goto tx_err;
  1425. }
  1426. /* Set default qp number */
  1427. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1428. if (err) {
  1429. en_err(priv, "Failed setting default qp numbers\n");
  1430. goto tx_err;
  1431. }
  1432. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1433. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  1434. if (err) {
  1435. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1436. err);
  1437. goto tx_err;
  1438. }
  1439. }
  1440. /* Init port */
  1441. en_dbg(HW, priv, "Initializing port\n");
  1442. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1443. if (err) {
  1444. en_err(priv, "Failed Initializing port\n");
  1445. goto tx_err;
  1446. }
  1447. /* Attach rx QP to bradcast address */
  1448. memset(&mc_list[10], 0xff, ETH_ALEN);
  1449. mc_list[5] = priv->port; /* needed for B0 steering support */
  1450. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1451. priv->port, 0, MLX4_PROT_ETH,
  1452. &priv->broadcast_id))
  1453. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1454. /* Must redo promiscuous mode setup. */
  1455. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1456. /* Schedule multicast task to populate multicast list */
  1457. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1458. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1459. #ifdef CONFIG_MLX4_EN_VXLAN
  1460. if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1461. vxlan_get_rx_port(dev);
  1462. #endif
  1463. priv->port_up = true;
  1464. netif_tx_start_all_queues(dev);
  1465. netif_device_attach(dev);
  1466. return 0;
  1467. tx_err:
  1468. while (tx_index--) {
  1469. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
  1470. mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
  1471. }
  1472. mlx4_en_destroy_drop_qp(priv);
  1473. rss_err:
  1474. mlx4_en_release_rss_steer(priv);
  1475. mac_err:
  1476. mlx4_en_put_qp(priv);
  1477. cq_err:
  1478. while (rx_index--) {
  1479. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1480. mlx4_en_free_affinity_hint(priv, i);
  1481. }
  1482. for (i = 0; i < priv->rx_ring_num; i++)
  1483. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1484. return err; /* need to close devices */
  1485. }
  1486. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1487. {
  1488. struct mlx4_en_priv *priv = netdev_priv(dev);
  1489. struct mlx4_en_dev *mdev = priv->mdev;
  1490. struct mlx4_en_mc_list *mclist, *tmp;
  1491. struct ethtool_flow_id *flow, *tmp_flow;
  1492. int i;
  1493. u8 mc_list[16] = {0};
  1494. if (!priv->port_up) {
  1495. en_dbg(DRV, priv, "stop port called while port already down\n");
  1496. return;
  1497. }
  1498. /* close port*/
  1499. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1500. /* Synchronize with tx routine */
  1501. netif_tx_lock_bh(dev);
  1502. if (detach)
  1503. netif_device_detach(dev);
  1504. netif_tx_stop_all_queues(dev);
  1505. netif_tx_unlock_bh(dev);
  1506. netif_tx_disable(dev);
  1507. /* Set port as not active */
  1508. priv->port_up = false;
  1509. /* Promsicuous mode */
  1510. if (mdev->dev->caps.steering_mode ==
  1511. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1512. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1513. MLX4_EN_FLAG_MC_PROMISC);
  1514. mlx4_flow_steer_promisc_remove(mdev->dev,
  1515. priv->port,
  1516. MLX4_FS_ALL_DEFAULT);
  1517. mlx4_flow_steer_promisc_remove(mdev->dev,
  1518. priv->port,
  1519. MLX4_FS_MC_DEFAULT);
  1520. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1521. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1522. /* Disable promiscouos mode */
  1523. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1524. priv->port);
  1525. /* Disable Multicast promisc */
  1526. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1527. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1528. priv->port);
  1529. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1530. }
  1531. }
  1532. /* Detach All multicasts */
  1533. memset(&mc_list[10], 0xff, ETH_ALEN);
  1534. mc_list[5] = priv->port; /* needed for B0 steering support */
  1535. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1536. MLX4_PROT_ETH, priv->broadcast_id);
  1537. list_for_each_entry(mclist, &priv->curr_list, list) {
  1538. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1539. mc_list[5] = priv->port;
  1540. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1541. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1542. if (mclist->tunnel_reg_id)
  1543. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1544. }
  1545. mlx4_en_clear_list(dev);
  1546. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1547. list_del(&mclist->list);
  1548. kfree(mclist);
  1549. }
  1550. /* Flush multicast filter */
  1551. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1552. /* Remove flow steering rules for the port*/
  1553. if (mdev->dev->caps.steering_mode ==
  1554. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1555. ASSERT_RTNL();
  1556. list_for_each_entry_safe(flow, tmp_flow,
  1557. &priv->ethtool_list, list) {
  1558. mlx4_flow_detach(mdev->dev, flow->id);
  1559. list_del(&flow->list);
  1560. }
  1561. }
  1562. mlx4_en_destroy_drop_qp(priv);
  1563. /* Free TX Rings */
  1564. for (i = 0; i < priv->tx_ring_num; i++) {
  1565. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
  1566. mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
  1567. }
  1568. msleep(10);
  1569. for (i = 0; i < priv->tx_ring_num; i++)
  1570. mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
  1571. /* Free RSS qps */
  1572. mlx4_en_release_rss_steer(priv);
  1573. /* Unregister Mac address for the port */
  1574. mlx4_en_put_qp(priv);
  1575. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1576. mdev->mac_removed[priv->port] = 1;
  1577. /* Free RX Rings */
  1578. for (i = 0; i < priv->rx_ring_num; i++) {
  1579. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1580. local_bh_disable();
  1581. while (!mlx4_en_cq_lock_napi(cq)) {
  1582. pr_info("CQ %d locked\n", i);
  1583. mdelay(1);
  1584. }
  1585. local_bh_enable();
  1586. while (test_bit(NAPI_STATE_SCHED, &cq->napi.state))
  1587. msleep(1);
  1588. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1589. mlx4_en_deactivate_cq(priv, cq);
  1590. mlx4_en_free_affinity_hint(priv, i);
  1591. }
  1592. }
  1593. static void mlx4_en_restart(struct work_struct *work)
  1594. {
  1595. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1596. watchdog_task);
  1597. struct mlx4_en_dev *mdev = priv->mdev;
  1598. struct net_device *dev = priv->dev;
  1599. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1600. mutex_lock(&mdev->state_lock);
  1601. if (priv->port_up) {
  1602. mlx4_en_stop_port(dev, 1);
  1603. if (mlx4_en_start_port(dev))
  1604. en_err(priv, "Failed restarting port %d\n", priv->port);
  1605. }
  1606. mutex_unlock(&mdev->state_lock);
  1607. }
  1608. static void mlx4_en_clear_stats(struct net_device *dev)
  1609. {
  1610. struct mlx4_en_priv *priv = netdev_priv(dev);
  1611. struct mlx4_en_dev *mdev = priv->mdev;
  1612. int i;
  1613. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1614. en_dbg(HW, priv, "Failed dumping statistics\n");
  1615. memset(&priv->stats, 0, sizeof(priv->stats));
  1616. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1617. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1618. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1619. for (i = 0; i < priv->tx_ring_num; i++) {
  1620. priv->tx_ring[i]->bytes = 0;
  1621. priv->tx_ring[i]->packets = 0;
  1622. priv->tx_ring[i]->tx_csum = 0;
  1623. }
  1624. for (i = 0; i < priv->rx_ring_num; i++) {
  1625. priv->rx_ring[i]->bytes = 0;
  1626. priv->rx_ring[i]->packets = 0;
  1627. priv->rx_ring[i]->csum_ok = 0;
  1628. priv->rx_ring[i]->csum_none = 0;
  1629. }
  1630. }
  1631. static int mlx4_en_open(struct net_device *dev)
  1632. {
  1633. struct mlx4_en_priv *priv = netdev_priv(dev);
  1634. struct mlx4_en_dev *mdev = priv->mdev;
  1635. int err = 0;
  1636. mutex_lock(&mdev->state_lock);
  1637. if (!mdev->device_up) {
  1638. en_err(priv, "Cannot open - device down/disabled\n");
  1639. err = -EBUSY;
  1640. goto out;
  1641. }
  1642. /* Reset HW statistics and SW counters */
  1643. mlx4_en_clear_stats(dev);
  1644. err = mlx4_en_start_port(dev);
  1645. if (err)
  1646. en_err(priv, "Failed starting port:%d\n", priv->port);
  1647. out:
  1648. mutex_unlock(&mdev->state_lock);
  1649. return err;
  1650. }
  1651. static int mlx4_en_close(struct net_device *dev)
  1652. {
  1653. struct mlx4_en_priv *priv = netdev_priv(dev);
  1654. struct mlx4_en_dev *mdev = priv->mdev;
  1655. en_dbg(IFDOWN, priv, "Close port called\n");
  1656. mutex_lock(&mdev->state_lock);
  1657. mlx4_en_stop_port(dev, 0);
  1658. netif_carrier_off(dev);
  1659. mutex_unlock(&mdev->state_lock);
  1660. return 0;
  1661. }
  1662. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1663. {
  1664. int i;
  1665. #ifdef CONFIG_RFS_ACCEL
  1666. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1667. priv->dev->rx_cpu_rmap = NULL;
  1668. #endif
  1669. for (i = 0; i < priv->tx_ring_num; i++) {
  1670. if (priv->tx_ring && priv->tx_ring[i])
  1671. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1672. if (priv->tx_cq && priv->tx_cq[i])
  1673. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1674. }
  1675. for (i = 0; i < priv->rx_ring_num; i++) {
  1676. if (priv->rx_ring[i])
  1677. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1678. priv->prof->rx_ring_size, priv->stride);
  1679. if (priv->rx_cq[i])
  1680. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1681. }
  1682. if (priv->base_tx_qpn) {
  1683. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1684. priv->base_tx_qpn = 0;
  1685. }
  1686. }
  1687. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1688. {
  1689. struct mlx4_en_port_profile *prof = priv->prof;
  1690. int i;
  1691. int err;
  1692. int node;
  1693. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1694. if (err) {
  1695. en_err(priv, "failed reserving range for TX rings\n");
  1696. return err;
  1697. }
  1698. /* Create tx Rings */
  1699. for (i = 0; i < priv->tx_ring_num; i++) {
  1700. node = cpu_to_node(i % num_online_cpus());
  1701. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1702. prof->tx_ring_size, i, TX, node))
  1703. goto err;
  1704. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
  1705. priv->base_tx_qpn + i,
  1706. prof->tx_ring_size, TXBB_SIZE,
  1707. node, i))
  1708. goto err;
  1709. }
  1710. /* Create rx Rings */
  1711. for (i = 0; i < priv->rx_ring_num; i++) {
  1712. node = cpu_to_node(i % num_online_cpus());
  1713. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1714. prof->rx_ring_size, i, RX, node))
  1715. goto err;
  1716. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1717. prof->rx_ring_size, priv->stride,
  1718. node))
  1719. goto err;
  1720. }
  1721. #ifdef CONFIG_RFS_ACCEL
  1722. if (priv->mdev->dev->caps.comp_pool) {
  1723. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1724. if (!priv->dev->rx_cpu_rmap)
  1725. goto err;
  1726. }
  1727. #endif
  1728. return 0;
  1729. err:
  1730. en_err(priv, "Failed to allocate NIC resources\n");
  1731. for (i = 0; i < priv->rx_ring_num; i++) {
  1732. if (priv->rx_ring[i])
  1733. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1734. prof->rx_ring_size,
  1735. priv->stride);
  1736. if (priv->rx_cq[i])
  1737. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1738. }
  1739. for (i = 0; i < priv->tx_ring_num; i++) {
  1740. if (priv->tx_ring[i])
  1741. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1742. if (priv->tx_cq[i])
  1743. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1744. }
  1745. return -ENOMEM;
  1746. }
  1747. void mlx4_en_destroy_netdev(struct net_device *dev)
  1748. {
  1749. struct mlx4_en_priv *priv = netdev_priv(dev);
  1750. struct mlx4_en_dev *mdev = priv->mdev;
  1751. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1752. /* Unregister device - this will close the port if it was up */
  1753. if (priv->registered)
  1754. unregister_netdev(dev);
  1755. if (priv->allocated)
  1756. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1757. cancel_delayed_work(&priv->stats_task);
  1758. cancel_delayed_work(&priv->service_task);
  1759. /* flush any pending task for this netdev */
  1760. flush_workqueue(mdev->workqueue);
  1761. /* Detach the netdev so tasks would not attempt to access it */
  1762. mutex_lock(&mdev->state_lock);
  1763. mdev->pndev[priv->port] = NULL;
  1764. mutex_unlock(&mdev->state_lock);
  1765. mlx4_en_free_resources(priv);
  1766. kfree(priv->tx_ring);
  1767. kfree(priv->tx_cq);
  1768. free_netdev(dev);
  1769. }
  1770. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1771. {
  1772. struct mlx4_en_priv *priv = netdev_priv(dev);
  1773. struct mlx4_en_dev *mdev = priv->mdev;
  1774. int err = 0;
  1775. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1776. dev->mtu, new_mtu);
  1777. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1778. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1779. return -EPERM;
  1780. }
  1781. dev->mtu = new_mtu;
  1782. if (netif_running(dev)) {
  1783. mutex_lock(&mdev->state_lock);
  1784. if (!mdev->device_up) {
  1785. /* NIC is probably restarting - let watchdog task reset
  1786. * the port */
  1787. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1788. } else {
  1789. mlx4_en_stop_port(dev, 1);
  1790. err = mlx4_en_start_port(dev);
  1791. if (err) {
  1792. en_err(priv, "Failed restarting port:%d\n",
  1793. priv->port);
  1794. queue_work(mdev->workqueue, &priv->watchdog_task);
  1795. }
  1796. }
  1797. mutex_unlock(&mdev->state_lock);
  1798. }
  1799. return 0;
  1800. }
  1801. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  1802. {
  1803. struct mlx4_en_priv *priv = netdev_priv(dev);
  1804. struct mlx4_en_dev *mdev = priv->mdev;
  1805. struct hwtstamp_config config;
  1806. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1807. return -EFAULT;
  1808. /* reserved for future extensions */
  1809. if (config.flags)
  1810. return -EINVAL;
  1811. /* device doesn't support time stamping */
  1812. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1813. return -EINVAL;
  1814. /* TX HW timestamp */
  1815. switch (config.tx_type) {
  1816. case HWTSTAMP_TX_OFF:
  1817. case HWTSTAMP_TX_ON:
  1818. break;
  1819. default:
  1820. return -ERANGE;
  1821. }
  1822. /* RX HW timestamp */
  1823. switch (config.rx_filter) {
  1824. case HWTSTAMP_FILTER_NONE:
  1825. break;
  1826. case HWTSTAMP_FILTER_ALL:
  1827. case HWTSTAMP_FILTER_SOME:
  1828. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1829. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1830. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1831. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1832. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1833. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1834. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1835. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1836. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1837. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1838. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1839. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1840. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1841. break;
  1842. default:
  1843. return -ERANGE;
  1844. }
  1845. if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
  1846. config.tx_type = HWTSTAMP_TX_OFF;
  1847. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1848. }
  1849. return copy_to_user(ifr->ifr_data, &config,
  1850. sizeof(config)) ? -EFAULT : 0;
  1851. }
  1852. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  1853. {
  1854. struct mlx4_en_priv *priv = netdev_priv(dev);
  1855. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  1856. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  1857. }
  1858. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1859. {
  1860. switch (cmd) {
  1861. case SIOCSHWTSTAMP:
  1862. return mlx4_en_hwtstamp_set(dev, ifr);
  1863. case SIOCGHWTSTAMP:
  1864. return mlx4_en_hwtstamp_get(dev, ifr);
  1865. default:
  1866. return -EOPNOTSUPP;
  1867. }
  1868. }
  1869. static int mlx4_en_set_features(struct net_device *netdev,
  1870. netdev_features_t features)
  1871. {
  1872. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1873. if (features & NETIF_F_LOOPBACK)
  1874. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1875. else
  1876. priv->ctrl_flags &=
  1877. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1878. mlx4_en_update_loopback_state(netdev, features);
  1879. return 0;
  1880. }
  1881. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1882. {
  1883. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1884. struct mlx4_en_dev *mdev = en_priv->mdev;
  1885. u64 mac_u64 = mlx4_mac_to_u64(mac);
  1886. if (!is_valid_ether_addr(mac))
  1887. return -EINVAL;
  1888. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1889. }
  1890. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1891. {
  1892. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1893. struct mlx4_en_dev *mdev = en_priv->mdev;
  1894. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1895. }
  1896. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1897. {
  1898. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1899. struct mlx4_en_dev *mdev = en_priv->mdev;
  1900. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1901. }
  1902. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1903. {
  1904. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1905. struct mlx4_en_dev *mdev = en_priv->mdev;
  1906. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1907. }
  1908. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  1909. {
  1910. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1911. struct mlx4_en_dev *mdev = en_priv->mdev;
  1912. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  1913. }
  1914. #define PORT_ID_BYTE_LEN 8
  1915. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  1916. struct netdev_phys_port_id *ppid)
  1917. {
  1918. struct mlx4_en_priv *priv = netdev_priv(dev);
  1919. struct mlx4_dev *mdev = priv->mdev->dev;
  1920. int i;
  1921. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  1922. if (!phys_port_id)
  1923. return -EOPNOTSUPP;
  1924. ppid->id_len = sizeof(phys_port_id);
  1925. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  1926. ppid->id[i] = phys_port_id & 0xff;
  1927. phys_port_id >>= 8;
  1928. }
  1929. return 0;
  1930. }
  1931. #ifdef CONFIG_MLX4_EN_VXLAN
  1932. static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
  1933. {
  1934. int ret;
  1935. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1936. vxlan_add_task);
  1937. ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
  1938. if (ret)
  1939. goto out;
  1940. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  1941. VXLAN_STEER_BY_OUTER_MAC, 1);
  1942. out:
  1943. if (ret) {
  1944. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  1945. return;
  1946. }
  1947. /* set offloads */
  1948. priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  1949. NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL;
  1950. priv->dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
  1951. priv->dev->features |= NETIF_F_GSO_UDP_TUNNEL;
  1952. }
  1953. static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
  1954. {
  1955. int ret;
  1956. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1957. vxlan_del_task);
  1958. /* unset offloads */
  1959. priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  1960. NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL);
  1961. priv->dev->hw_features &= ~NETIF_F_GSO_UDP_TUNNEL;
  1962. priv->dev->features &= ~NETIF_F_GSO_UDP_TUNNEL;
  1963. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  1964. VXLAN_STEER_BY_OUTER_MAC, 0);
  1965. if (ret)
  1966. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  1967. priv->vxlan_port = 0;
  1968. }
  1969. static void mlx4_en_add_vxlan_port(struct net_device *dev,
  1970. sa_family_t sa_family, __be16 port)
  1971. {
  1972. struct mlx4_en_priv *priv = netdev_priv(dev);
  1973. __be16 current_port;
  1974. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1975. return;
  1976. if (sa_family == AF_INET6)
  1977. return;
  1978. current_port = priv->vxlan_port;
  1979. if (current_port && current_port != port) {
  1980. en_warn(priv, "vxlan port %d configured, can't add port %d\n",
  1981. ntohs(current_port), ntohs(port));
  1982. return;
  1983. }
  1984. priv->vxlan_port = port;
  1985. queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
  1986. }
  1987. static void mlx4_en_del_vxlan_port(struct net_device *dev,
  1988. sa_family_t sa_family, __be16 port)
  1989. {
  1990. struct mlx4_en_priv *priv = netdev_priv(dev);
  1991. __be16 current_port;
  1992. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1993. return;
  1994. if (sa_family == AF_INET6)
  1995. return;
  1996. current_port = priv->vxlan_port;
  1997. if (current_port != port) {
  1998. en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
  1999. return;
  2000. }
  2001. queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
  2002. }
  2003. static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
  2004. struct net_device *dev,
  2005. netdev_features_t features)
  2006. {
  2007. return vxlan_features_check(skb, features);
  2008. }
  2009. #endif
  2010. static const struct net_device_ops mlx4_netdev_ops = {
  2011. .ndo_open = mlx4_en_open,
  2012. .ndo_stop = mlx4_en_close,
  2013. .ndo_start_xmit = mlx4_en_xmit,
  2014. .ndo_select_queue = mlx4_en_select_queue,
  2015. .ndo_get_stats = mlx4_en_get_stats,
  2016. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2017. .ndo_set_mac_address = mlx4_en_set_mac,
  2018. .ndo_validate_addr = eth_validate_addr,
  2019. .ndo_change_mtu = mlx4_en_change_mtu,
  2020. .ndo_do_ioctl = mlx4_en_ioctl,
  2021. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2022. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2023. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2024. #ifdef CONFIG_NET_POLL_CONTROLLER
  2025. .ndo_poll_controller = mlx4_en_netpoll,
  2026. #endif
  2027. .ndo_set_features = mlx4_en_set_features,
  2028. .ndo_setup_tc = mlx4_en_setup_tc,
  2029. #ifdef CONFIG_RFS_ACCEL
  2030. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2031. #endif
  2032. #ifdef CONFIG_NET_RX_BUSY_POLL
  2033. .ndo_busy_poll = mlx4_en_low_latency_recv,
  2034. #endif
  2035. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2036. #ifdef CONFIG_MLX4_EN_VXLAN
  2037. .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
  2038. .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
  2039. .ndo_features_check = mlx4_en_features_check,
  2040. #endif
  2041. };
  2042. static const struct net_device_ops mlx4_netdev_ops_master = {
  2043. .ndo_open = mlx4_en_open,
  2044. .ndo_stop = mlx4_en_close,
  2045. .ndo_start_xmit = mlx4_en_xmit,
  2046. .ndo_select_queue = mlx4_en_select_queue,
  2047. .ndo_get_stats = mlx4_en_get_stats,
  2048. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2049. .ndo_set_mac_address = mlx4_en_set_mac,
  2050. .ndo_validate_addr = eth_validate_addr,
  2051. .ndo_change_mtu = mlx4_en_change_mtu,
  2052. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2053. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2054. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2055. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  2056. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  2057. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  2058. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  2059. .ndo_get_vf_config = mlx4_en_get_vf_config,
  2060. #ifdef CONFIG_NET_POLL_CONTROLLER
  2061. .ndo_poll_controller = mlx4_en_netpoll,
  2062. #endif
  2063. .ndo_set_features = mlx4_en_set_features,
  2064. .ndo_setup_tc = mlx4_en_setup_tc,
  2065. #ifdef CONFIG_RFS_ACCEL
  2066. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2067. #endif
  2068. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2069. #ifdef CONFIG_MLX4_EN_VXLAN
  2070. .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
  2071. .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
  2072. .ndo_features_check = mlx4_en_features_check,
  2073. #endif
  2074. };
  2075. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  2076. struct mlx4_en_port_profile *prof)
  2077. {
  2078. struct net_device *dev;
  2079. struct mlx4_en_priv *priv;
  2080. int i;
  2081. int err;
  2082. u64 mac_u64;
  2083. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  2084. MAX_TX_RINGS, MAX_RX_RINGS);
  2085. if (dev == NULL)
  2086. return -ENOMEM;
  2087. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  2088. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2089. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  2090. dev->dev_port = port - 1;
  2091. /*
  2092. * Initialize driver private data
  2093. */
  2094. priv = netdev_priv(dev);
  2095. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2096. priv->dev = dev;
  2097. priv->mdev = mdev;
  2098. priv->ddev = &mdev->pdev->dev;
  2099. priv->prof = prof;
  2100. priv->port = port;
  2101. priv->port_up = false;
  2102. priv->flags = prof->flags;
  2103. priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
  2104. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2105. MLX4_WQE_CTRL_SOLICITED);
  2106. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  2107. priv->tx_ring_num = prof->tx_ring_num;
  2108. priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
  2109. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
  2110. GFP_KERNEL);
  2111. if (!priv->tx_ring) {
  2112. err = -ENOMEM;
  2113. goto out;
  2114. }
  2115. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
  2116. GFP_KERNEL);
  2117. if (!priv->tx_cq) {
  2118. err = -ENOMEM;
  2119. goto out;
  2120. }
  2121. priv->rx_ring_num = prof->rx_ring_num;
  2122. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2123. priv->cqe_size = mdev->dev->caps.cqe_size;
  2124. priv->mac_index = -1;
  2125. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2126. spin_lock_init(&priv->stats_lock);
  2127. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2128. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2129. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2130. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2131. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2132. #ifdef CONFIG_MLX4_EN_VXLAN
  2133. INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
  2134. INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
  2135. #endif
  2136. #ifdef CONFIG_MLX4_EN_DCB
  2137. if (!mlx4_is_slave(priv->mdev->dev)) {
  2138. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
  2139. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2140. } else {
  2141. en_info(priv, "enabling only PFC DCB ops\n");
  2142. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2143. }
  2144. }
  2145. #endif
  2146. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2147. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2148. /* Query for default mac and max mtu */
  2149. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2150. /* Set default MAC */
  2151. dev->addr_len = ETH_ALEN;
  2152. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2153. if (!is_valid_ether_addr(dev->dev_addr)) {
  2154. if (mlx4_is_slave(priv->mdev->dev)) {
  2155. eth_hw_addr_random(dev);
  2156. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2157. mac_u64 = mlx4_mac_to_u64(dev->dev_addr);
  2158. mdev->dev->caps.def_mac[priv->port] = mac_u64;
  2159. } else {
  2160. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2161. priv->port, dev->dev_addr);
  2162. err = -EINVAL;
  2163. goto out;
  2164. }
  2165. }
  2166. memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
  2167. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2168. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2169. err = mlx4_en_alloc_resources(priv);
  2170. if (err)
  2171. goto out;
  2172. #ifdef CONFIG_RFS_ACCEL
  2173. INIT_LIST_HEAD(&priv->filters);
  2174. spin_lock_init(&priv->filters_lock);
  2175. #endif
  2176. /* Initialize time stamping config */
  2177. priv->hwtstamp_config.flags = 0;
  2178. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2179. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2180. /* Allocate page for receive rings */
  2181. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2182. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  2183. if (err) {
  2184. en_err(priv, "Failed to allocate page for rx qps\n");
  2185. goto out;
  2186. }
  2187. priv->allocated = 1;
  2188. /*
  2189. * Initialize netdev entry points
  2190. */
  2191. if (mlx4_is_master(priv->mdev->dev))
  2192. dev->netdev_ops = &mlx4_netdev_ops_master;
  2193. else
  2194. dev->netdev_ops = &mlx4_netdev_ops;
  2195. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2196. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  2197. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2198. dev->ethtool_ops = &mlx4_en_ethtool_ops;
  2199. /*
  2200. * Set driver features
  2201. */
  2202. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2203. if (mdev->LSO_support)
  2204. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2205. dev->vlan_features = dev->hw_features;
  2206. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2207. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2208. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2209. NETIF_F_HW_VLAN_CTAG_FILTER;
  2210. dev->hw_features |= NETIF_F_LOOPBACK;
  2211. if (mdev->dev->caps.steering_mode ==
  2212. MLX4_STEERING_MODE_DEVICE_MANAGED)
  2213. dev->hw_features |= NETIF_F_NTUPLE;
  2214. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2215. dev->priv_flags |= IFF_UNICAST_FLT;
  2216. mdev->pndev[port] = dev;
  2217. netif_carrier_off(dev);
  2218. mlx4_en_set_default_moderation(priv);
  2219. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  2220. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2221. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2222. /* Configure port */
  2223. mlx4_en_calc_rx_buf(dev);
  2224. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2225. priv->rx_skb_size + ETH_FCS_LEN,
  2226. prof->tx_pause, prof->tx_ppp,
  2227. prof->rx_pause, prof->rx_ppp);
  2228. if (err) {
  2229. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  2230. priv->port, err);
  2231. goto out;
  2232. }
  2233. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2234. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  2235. if (err) {
  2236. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  2237. err);
  2238. goto out;
  2239. }
  2240. }
  2241. /* Init port */
  2242. en_warn(priv, "Initializing port\n");
  2243. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2244. if (err) {
  2245. en_err(priv, "Failed Initializing port\n");
  2246. goto out;
  2247. }
  2248. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2249. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2250. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2251. SERVICE_TASK_DELAY);
  2252. err = register_netdev(dev);
  2253. if (err) {
  2254. en_err(priv, "Netdev registration failed for port %d\n", port);
  2255. goto out;
  2256. }
  2257. priv->registered = 1;
  2258. return 0;
  2259. out:
  2260. mlx4_en_destroy_netdev(dev);
  2261. return err;
  2262. }