srq.c 5.9 KB

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  1. /*
  2. * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/mlx5/driver.h>
  35. #include <linux/mlx5/cmd.h>
  36. #include <linux/mlx5/srq.h>
  37. #include <rdma/ib_verbs.h>
  38. #include "mlx5_core.h"
  39. void mlx5_srq_event(struct mlx5_core_dev *dev, u32 srqn, int event_type)
  40. {
  41. struct mlx5_srq_table *table = &dev->priv.srq_table;
  42. struct mlx5_core_srq *srq;
  43. spin_lock(&table->lock);
  44. srq = radix_tree_lookup(&table->tree, srqn);
  45. if (srq)
  46. atomic_inc(&srq->refcount);
  47. spin_unlock(&table->lock);
  48. if (!srq) {
  49. mlx5_core_warn(dev, "Async event for bogus SRQ 0x%08x\n", srqn);
  50. return;
  51. }
  52. srq->event(srq, event_type);
  53. if (atomic_dec_and_test(&srq->refcount))
  54. complete(&srq->free);
  55. }
  56. struct mlx5_core_srq *mlx5_core_get_srq(struct mlx5_core_dev *dev, u32 srqn)
  57. {
  58. struct mlx5_srq_table *table = &dev->priv.srq_table;
  59. struct mlx5_core_srq *srq;
  60. spin_lock(&table->lock);
  61. srq = radix_tree_lookup(&table->tree, srqn);
  62. if (srq)
  63. atomic_inc(&srq->refcount);
  64. spin_unlock(&table->lock);
  65. return srq;
  66. }
  67. EXPORT_SYMBOL(mlx5_core_get_srq);
  68. int mlx5_core_create_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
  69. struct mlx5_create_srq_mbox_in *in, int inlen)
  70. {
  71. struct mlx5_create_srq_mbox_out out;
  72. struct mlx5_srq_table *table = &dev->priv.srq_table;
  73. struct mlx5_destroy_srq_mbox_in din;
  74. struct mlx5_destroy_srq_mbox_out dout;
  75. int err;
  76. memset(&out, 0, sizeof(out));
  77. in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_SRQ);
  78. err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out));
  79. if (err)
  80. return err;
  81. if (out.hdr.status)
  82. return mlx5_cmd_status_to_err(&out.hdr);
  83. srq->srqn = be32_to_cpu(out.srqn) & 0xffffff;
  84. atomic_set(&srq->refcount, 1);
  85. init_completion(&srq->free);
  86. spin_lock_irq(&table->lock);
  87. err = radix_tree_insert(&table->tree, srq->srqn, srq);
  88. spin_unlock_irq(&table->lock);
  89. if (err) {
  90. mlx5_core_warn(dev, "err %d, srqn 0x%x\n", err, srq->srqn);
  91. goto err_cmd;
  92. }
  93. return 0;
  94. err_cmd:
  95. memset(&din, 0, sizeof(din));
  96. memset(&dout, 0, sizeof(dout));
  97. din.srqn = cpu_to_be32(srq->srqn);
  98. din.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_SRQ);
  99. mlx5_cmd_exec(dev, &din, sizeof(din), &dout, sizeof(dout));
  100. return err;
  101. }
  102. EXPORT_SYMBOL(mlx5_core_create_srq);
  103. int mlx5_core_destroy_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq)
  104. {
  105. struct mlx5_destroy_srq_mbox_in in;
  106. struct mlx5_destroy_srq_mbox_out out;
  107. struct mlx5_srq_table *table = &dev->priv.srq_table;
  108. struct mlx5_core_srq *tmp;
  109. int err;
  110. spin_lock_irq(&table->lock);
  111. tmp = radix_tree_delete(&table->tree, srq->srqn);
  112. spin_unlock_irq(&table->lock);
  113. if (!tmp) {
  114. mlx5_core_warn(dev, "srq 0x%x not found in tree\n", srq->srqn);
  115. return -EINVAL;
  116. }
  117. if (tmp != srq) {
  118. mlx5_core_warn(dev, "corruption on srqn 0x%x\n", srq->srqn);
  119. return -EINVAL;
  120. }
  121. memset(&in, 0, sizeof(in));
  122. memset(&out, 0, sizeof(out));
  123. in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_SRQ);
  124. in.srqn = cpu_to_be32(srq->srqn);
  125. err = mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
  126. if (err)
  127. return err;
  128. if (out.hdr.status)
  129. return mlx5_cmd_status_to_err(&out.hdr);
  130. if (atomic_dec_and_test(&srq->refcount))
  131. complete(&srq->free);
  132. wait_for_completion(&srq->free);
  133. return 0;
  134. }
  135. EXPORT_SYMBOL(mlx5_core_destroy_srq);
  136. int mlx5_core_query_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
  137. struct mlx5_query_srq_mbox_out *out)
  138. {
  139. struct mlx5_query_srq_mbox_in in;
  140. int err;
  141. memset(&in, 0, sizeof(in));
  142. memset(out, 0, sizeof(*out));
  143. in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_SRQ);
  144. in.srqn = cpu_to_be32(srq->srqn);
  145. err = mlx5_cmd_exec(dev, &in, sizeof(in), out, sizeof(*out));
  146. if (err)
  147. return err;
  148. if (out->hdr.status)
  149. return mlx5_cmd_status_to_err(&out->hdr);
  150. return err;
  151. }
  152. EXPORT_SYMBOL(mlx5_core_query_srq);
  153. int mlx5_core_arm_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
  154. u16 lwm, int is_srq)
  155. {
  156. struct mlx5_arm_srq_mbox_in in;
  157. struct mlx5_arm_srq_mbox_out out;
  158. int err;
  159. memset(&in, 0, sizeof(in));
  160. memset(&out, 0, sizeof(out));
  161. in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_ARM_RQ);
  162. in.hdr.opmod = cpu_to_be16(!!is_srq);
  163. in.srqn = cpu_to_be32(srq->srqn);
  164. in.lwm = cpu_to_be16(lwm);
  165. err = mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
  166. if (err)
  167. return err;
  168. if (out.hdr.status)
  169. return mlx5_cmd_status_to_err(&out.hdr);
  170. return err;
  171. }
  172. EXPORT_SYMBOL(mlx5_core_arm_srq);
  173. void mlx5_init_srq_table(struct mlx5_core_dev *dev)
  174. {
  175. struct mlx5_srq_table *table = &dev->priv.srq_table;
  176. spin_lock_init(&table->lock);
  177. INIT_RADIX_TREE(&table->tree, GFP_ATOMIC);
  178. }
  179. void mlx5_cleanup_srq_table(struct mlx5_core_dev *dev)
  180. {
  181. /* nothing */
  182. }