mt6323-regulator.c 10 KB

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  1. /*
  2. * Copyright (c) 2014 MediaTek Inc.
  3. * Author: Flora Fu <flora.fu@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/regmap.h>
  18. #include <linux/mfd/mt6323/core.h>
  19. #include <linux/mfd/mt6323/registers.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/regulator/mt6323-regulator.h>
  23. #include <linux/regulator/of_regulator.h>
  24. /*
  25. * MT6323 regulators' information
  26. *
  27. * @desc: standard fields of regulator description.
  28. * @qi: Mask for query enable signal status of regulators
  29. * @vselon_reg: Register sections for hardware control mode of bucks
  30. * @vselctrl_reg: Register for controlling the buck control mode.
  31. * @vselctrl_mask: Mask for query buck's voltage control mode.
  32. */
  33. struct mt6323_regulator_info {
  34. struct regulator_desc desc;
  35. u32 qi;
  36. u32 vselon_reg;
  37. u32 vselctrl_reg;
  38. u32 vselctrl_mask;
  39. };
  40. #define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
  41. vosel, vosel_mask, voselon, vosel_ctrl) \
  42. [MT6323_ID_##vreg] = { \
  43. .desc = { \
  44. .name = #vreg, \
  45. .of_match = of_match_ptr(match), \
  46. .ops = &mt6323_volt_range_ops, \
  47. .type = REGULATOR_VOLTAGE, \
  48. .id = MT6323_ID_##vreg, \
  49. .owner = THIS_MODULE, \
  50. .n_voltages = (max - min)/step + 1, \
  51. .linear_ranges = volt_ranges, \
  52. .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
  53. .vsel_reg = vosel, \
  54. .vsel_mask = vosel_mask, \
  55. .enable_reg = enreg, \
  56. .enable_mask = BIT(0), \
  57. }, \
  58. .qi = BIT(13), \
  59. .vselon_reg = voselon, \
  60. .vselctrl_reg = vosel_ctrl, \
  61. .vselctrl_mask = BIT(1), \
  62. }
  63. #define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
  64. vosel_mask) \
  65. [MT6323_ID_##vreg] = { \
  66. .desc = { \
  67. .name = #vreg, \
  68. .of_match = of_match_ptr(match), \
  69. .ops = &mt6323_volt_table_ops, \
  70. .type = REGULATOR_VOLTAGE, \
  71. .id = MT6323_ID_##vreg, \
  72. .owner = THIS_MODULE, \
  73. .n_voltages = ARRAY_SIZE(ldo_volt_table), \
  74. .volt_table = ldo_volt_table, \
  75. .vsel_reg = vosel, \
  76. .vsel_mask = vosel_mask, \
  77. .enable_reg = enreg, \
  78. .enable_mask = BIT(enbit), \
  79. }, \
  80. .qi = BIT(15), \
  81. }
  82. #define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt) \
  83. [MT6323_ID_##vreg] = { \
  84. .desc = { \
  85. .name = #vreg, \
  86. .of_match = of_match_ptr(match), \
  87. .ops = &mt6323_volt_fixed_ops, \
  88. .type = REGULATOR_VOLTAGE, \
  89. .id = MT6323_ID_##vreg, \
  90. .owner = THIS_MODULE, \
  91. .n_voltages = 1, \
  92. .enable_reg = enreg, \
  93. .enable_mask = BIT(enbit), \
  94. .min_uV = volt, \
  95. }, \
  96. .qi = BIT(15), \
  97. }
  98. static const struct regulator_linear_range buck_volt_range1[] = {
  99. REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
  100. };
  101. static const struct regulator_linear_range buck_volt_range2[] = {
  102. REGULATOR_LINEAR_RANGE(1400000, 0, 0x7f, 12500),
  103. };
  104. static const struct regulator_linear_range buck_volt_range3[] = {
  105. REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
  106. };
  107. static const u32 ldo_volt_table1[] = {
  108. 3300000, 3400000, 3500000, 3600000,
  109. };
  110. static const u32 ldo_volt_table2[] = {
  111. 1500000, 1800000, 2500000, 2800000,
  112. };
  113. static const u32 ldo_volt_table3[] = {
  114. 1800000, 3300000,
  115. };
  116. static const u32 ldo_volt_table4[] = {
  117. 3000000, 3300000,
  118. };
  119. static const u32 ldo_volt_table5[] = {
  120. 1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000,
  121. };
  122. static const u32 ldo_volt_table6[] = {
  123. 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
  124. };
  125. static const u32 ldo_volt_table7[] = {
  126. 1200000, 1300000, 1500000, 1800000,
  127. };
  128. static const u32 ldo_volt_table8[] = {
  129. 1800000, 3000000,
  130. };
  131. static const u32 ldo_volt_table9[] = {
  132. 1200000, 1350000, 1500000, 1800000,
  133. };
  134. static const u32 ldo_volt_table10[] = {
  135. 1200000, 1300000, 1500000, 1800000,
  136. };
  137. static int mt6323_get_status(struct regulator_dev *rdev)
  138. {
  139. int ret;
  140. u32 regval;
  141. struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
  142. ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval);
  143. if (ret != 0) {
  144. dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
  145. return ret;
  146. }
  147. return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
  148. }
  149. static struct regulator_ops mt6323_volt_range_ops = {
  150. .list_voltage = regulator_list_voltage_linear_range,
  151. .map_voltage = regulator_map_voltage_linear_range,
  152. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  153. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  154. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  155. .enable = regulator_enable_regmap,
  156. .disable = regulator_disable_regmap,
  157. .is_enabled = regulator_is_enabled_regmap,
  158. .get_status = mt6323_get_status,
  159. };
  160. static struct regulator_ops mt6323_volt_table_ops = {
  161. .list_voltage = regulator_list_voltage_table,
  162. .map_voltage = regulator_map_voltage_iterate,
  163. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  164. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  165. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  166. .enable = regulator_enable_regmap,
  167. .disable = regulator_disable_regmap,
  168. .is_enabled = regulator_is_enabled_regmap,
  169. .get_status = mt6323_get_status,
  170. };
  171. static struct regulator_ops mt6323_volt_fixed_ops = {
  172. .list_voltage = regulator_list_voltage_linear,
  173. .enable = regulator_enable_regmap,
  174. .disable = regulator_disable_regmap,
  175. .is_enabled = regulator_is_enabled_regmap,
  176. .get_status = mt6323_get_status,
  177. };
  178. /* The array is indexed by id(MT6323_ID_XXX) */
  179. static struct mt6323_regulator_info mt6323_regulators[] = {
  180. MT6323_BUCK("buck_vproc", VPROC, 700000, 1493750, 6250,
  181. buck_volt_range1, MT6323_VPROC_CON7, MT6323_VPROC_CON9, 0x7f,
  182. MT6323_VPROC_CON10, MT6323_VPROC_CON5),
  183. MT6323_BUCK("buck_vsys", VSYS, 1400000, 2987500, 12500,
  184. buck_volt_range2, MT6323_VSYS_CON7, MT6323_VSYS_CON9, 0x7f,
  185. MT6323_VSYS_CON10, MT6323_VSYS_CON5),
  186. MT6323_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
  187. buck_volt_range3, MT6323_VPA_CON7, MT6323_VPA_CON9,
  188. 0x3f, MT6323_VPA_CON10, MT6323_VPA_CON5),
  189. MT6323_REG_FIXED("ldo_vtcxo", VTCXO, MT6323_ANALDO_CON1, 10, 2800000),
  190. MT6323_REG_FIXED("ldo_vcn28", VCN28, MT6323_ANALDO_CON19, 12, 2800000),
  191. MT6323_LDO("ldo_vcn33_bt", VCN33_BT, ldo_volt_table1,
  192. MT6323_ANALDO_CON16, 7, MT6323_ANALDO_CON16, 0xC),
  193. MT6323_LDO("ldo_vcn33_wifi", VCN33_WIFI, ldo_volt_table1,
  194. MT6323_ANALDO_CON17, 12, MT6323_ANALDO_CON16, 0xC),
  195. MT6323_REG_FIXED("ldo_va", VA, MT6323_ANALDO_CON2, 14, 2800000),
  196. MT6323_LDO("ldo_vcama", VCAMA, ldo_volt_table2,
  197. MT6323_ANALDO_CON4, 15, MT6323_ANALDO_CON10, 0x60),
  198. MT6323_REG_FIXED("ldo_vio28", VIO28, MT6323_DIGLDO_CON0, 14, 2800000),
  199. MT6323_REG_FIXED("ldo_vusb", VUSB, MT6323_DIGLDO_CON2, 14, 3300000),
  200. MT6323_LDO("ldo_vmc", VMC, ldo_volt_table3,
  201. MT6323_DIGLDO_CON3, 12, MT6323_DIGLDO_CON24, 0x10),
  202. MT6323_LDO("ldo_vmch", VMCH, ldo_volt_table4,
  203. MT6323_DIGLDO_CON5, 14, MT6323_DIGLDO_CON26, 0x80),
  204. MT6323_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table4,
  205. MT6323_DIGLDO_CON6, 14, MT6323_DIGLDO_CON27, 0x80),
  206. MT6323_LDO("ldo_vgp1", VGP1, ldo_volt_table5,
  207. MT6323_DIGLDO_CON7, 15, MT6323_DIGLDO_CON28, 0xE0),
  208. MT6323_LDO("ldo_vgp2", VGP2, ldo_volt_table6,
  209. MT6323_DIGLDO_CON8, 15, MT6323_DIGLDO_CON29, 0xE0),
  210. MT6323_LDO("ldo_vgp3", VGP3, ldo_volt_table7,
  211. MT6323_DIGLDO_CON9, 15, MT6323_DIGLDO_CON30, 0x60),
  212. MT6323_REG_FIXED("ldo_vcn18", VCN18, MT6323_DIGLDO_CON11, 14, 1800000),
  213. MT6323_LDO("ldo_vsim1", VSIM1, ldo_volt_table8,
  214. MT6323_DIGLDO_CON13, 15, MT6323_DIGLDO_CON34, 0x20),
  215. MT6323_LDO("ldo_vsim2", VSIM2, ldo_volt_table8,
  216. MT6323_DIGLDO_CON14, 15, MT6323_DIGLDO_CON35, 0x20),
  217. MT6323_REG_FIXED("ldo_vrtc", VRTC, MT6323_DIGLDO_CON15, 8, 2800000),
  218. MT6323_LDO("ldo_vcamaf", VCAMAF, ldo_volt_table5,
  219. MT6323_DIGLDO_CON31, 15, MT6323_DIGLDO_CON32, 0xE0),
  220. MT6323_LDO("ldo_vibr", VIBR, ldo_volt_table5,
  221. MT6323_DIGLDO_CON39, 15, MT6323_DIGLDO_CON40, 0xE0),
  222. MT6323_REG_FIXED("ldo_vrf18", VRF18, MT6323_DIGLDO_CON45, 15, 1825000),
  223. MT6323_LDO("ldo_vm", VM, ldo_volt_table9,
  224. MT6323_DIGLDO_CON47, 14, MT6323_DIGLDO_CON48, 0x30),
  225. MT6323_REG_FIXED("ldo_vio18", VIO18, MT6323_DIGLDO_CON49, 14, 1800000),
  226. MT6323_LDO("ldo_vcamd", VCAMD, ldo_volt_table10,
  227. MT6323_DIGLDO_CON51, 14, MT6323_DIGLDO_CON52, 0x60),
  228. MT6323_REG_FIXED("ldo_vcamio", VCAMIO, MT6323_DIGLDO_CON53, 14, 1800000),
  229. };
  230. static int mt6323_set_buck_vosel_reg(struct platform_device *pdev)
  231. {
  232. struct mt6323_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
  233. int i;
  234. u32 regval;
  235. for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
  236. if (mt6323_regulators[i].vselctrl_reg) {
  237. if (regmap_read(mt6323->regmap,
  238. mt6323_regulators[i].vselctrl_reg,
  239. &regval) < 0) {
  240. dev_err(&pdev->dev,
  241. "Failed to read buck ctrl\n");
  242. return -EIO;
  243. }
  244. if (regval & mt6323_regulators[i].vselctrl_mask) {
  245. mt6323_regulators[i].desc.vsel_reg =
  246. mt6323_regulators[i].vselon_reg;
  247. }
  248. }
  249. }
  250. return 0;
  251. }
  252. static int mt6323_regulator_probe(struct platform_device *pdev)
  253. {
  254. struct mt6323_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
  255. struct regulator_config config = {};
  256. struct regulator_dev *rdev;
  257. int i;
  258. u32 reg_value;
  259. /* Query buck controller to select activated voltage register part */
  260. if (mt6323_set_buck_vosel_reg(pdev))
  261. return -EIO;
  262. /* Read PMIC chip revision to update constraints and voltage table */
  263. if (regmap_read(mt6323->regmap, MT6323_CID, &reg_value) < 0) {
  264. dev_err(&pdev->dev, "Failed to read Chip ID\n");
  265. return -EIO;
  266. }
  267. dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
  268. for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
  269. config.dev = &pdev->dev;
  270. config.driver_data = &mt6323_regulators[i];
  271. config.regmap = mt6323->regmap;
  272. rdev = devm_regulator_register(&pdev->dev,
  273. &mt6323_regulators[i].desc, &config);
  274. if (IS_ERR(rdev)) {
  275. dev_err(&pdev->dev, "failed to register %s\n",
  276. mt6323_regulators[i].desc.name);
  277. return PTR_ERR(rdev);
  278. }
  279. }
  280. return 0;
  281. }
  282. static struct platform_driver mt6323_regulator_driver = {
  283. .driver = {
  284. .name = "mt6323-regulator",
  285. },
  286. .probe = mt6323_regulator_probe,
  287. };
  288. module_platform_driver(mt6323_regulator_driver);
  289. MODULE_AUTHOR("Flora Fu <flora.fu@mediatek.com>");
  290. MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC");
  291. MODULE_LICENSE("GPL");
  292. MODULE_ALIAS("platform:mt6323-regulator");