megaraid_sas_fp.c 40 KB

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  1. /*
  2. * Linux MegaRAID driver for SAS based RAID controllers
  3. *
  4. * Copyright (c) 2009-2012 LSI Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. * FILE: megaraid_sas_fp.c
  21. *
  22. * Authors: LSI Corporation
  23. * Sumant Patro
  24. * Varad Talamacki
  25. * Manoj Jose
  26. *
  27. * Send feedback to: <megaraidlinux@lsi.com>
  28. *
  29. * Mail to: LSI Corporation, 1621 Barber Lane, Milpitas, CA 95035
  30. * ATTN: Linuxraid
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/pci.h>
  35. #include <linux/list.h>
  36. #include <linux/moduleparam.h>
  37. #include <linux/module.h>
  38. #include <linux/spinlock.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/delay.h>
  41. #include <linux/uio.h>
  42. #include <linux/uaccess.h>
  43. #include <linux/fs.h>
  44. #include <linux/compat.h>
  45. #include <linux/blkdev.h>
  46. #include <linux/poll.h>
  47. #include <scsi/scsi.h>
  48. #include <scsi/scsi_cmnd.h>
  49. #include <scsi/scsi_device.h>
  50. #include <scsi/scsi_host.h>
  51. #include "megaraid_sas_fusion.h"
  52. #include "megaraid_sas.h"
  53. #include <asm/div64.h>
  54. #define LB_PENDING_CMDS_DEFAULT 4
  55. static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  56. module_param(lb_pending_cmds, int, S_IRUGO);
  57. MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
  58. "threshold. Valid Values are 1-128. Default: 4");
  59. #define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
  60. #define MR_LD_STATE_OPTIMAL 3
  61. #define FALSE 0
  62. #define TRUE 1
  63. #define SPAN_DEBUG 0
  64. #define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
  65. #define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
  66. #define SPAN_INVALID 0xff
  67. /* Prototypes */
  68. static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  69. PLD_SPAN_INFO ldSpanInfo);
  70. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  71. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  72. struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
  73. static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
  74. u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
  75. u32 mega_mod64(u64 dividend, u32 divisor)
  76. {
  77. u64 d;
  78. u32 remainder;
  79. if (!divisor)
  80. printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
  81. d = dividend;
  82. remainder = do_div(d, divisor);
  83. return remainder;
  84. }
  85. /**
  86. * @param dividend : Dividend
  87. * @param divisor : Divisor
  88. *
  89. * @return quotient
  90. **/
  91. u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
  92. {
  93. u32 remainder;
  94. u64 d;
  95. if (!divisor)
  96. printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
  97. d = dividend;
  98. remainder = do_div(d, divisor);
  99. return d;
  100. }
  101. struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  102. {
  103. return &map->raidMap.ldSpanMap[ld].ldRaid;
  104. }
  105. static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
  106. struct MR_DRV_RAID_MAP_ALL
  107. *map)
  108. {
  109. return &map->raidMap.ldSpanMap[ld].spanBlock[0];
  110. }
  111. static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
  112. {
  113. return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
  114. }
  115. u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
  116. {
  117. return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
  118. }
  119. u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
  120. {
  121. return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
  122. }
  123. u16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
  124. {
  125. return map->raidMap.devHndlInfo[pd].curDevHdl;
  126. }
  127. u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  128. {
  129. return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
  130. }
  131. u8 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
  132. {
  133. return map->raidMap.ldTgtIdToLd[ldTgtId];
  134. }
  135. static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
  136. struct MR_DRV_RAID_MAP_ALL *map)
  137. {
  138. return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
  139. }
  140. /*
  141. * This function will Populate Driver Map using firmware raid map
  142. */
  143. void MR_PopulateDrvRaidMap(struct megasas_instance *instance)
  144. {
  145. struct fusion_context *fusion = instance->ctrl_context;
  146. struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
  147. struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
  148. int i;
  149. u16 ld_count;
  150. struct MR_DRV_RAID_MAP_ALL *drv_map =
  151. fusion->ld_drv_map[(instance->map_id & 1)];
  152. struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
  153. if (instance->supportmax256vd) {
  154. memcpy(fusion->ld_drv_map[instance->map_id & 1],
  155. fusion->ld_map[instance->map_id & 1],
  156. fusion->current_map_sz);
  157. /* New Raid map will not set totalSize, so keep expected value
  158. * for legacy code in ValidateMapInfo
  159. */
  160. pDrvRaidMap->totalSize =
  161. cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
  162. } else {
  163. fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
  164. fusion->ld_map[(instance->map_id & 1)];
  165. pFwRaidMap = &fw_map_old->raidMap;
  166. ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
  167. #if VD_EXT_DEBUG
  168. for (i = 0; i < ld_count; i++) {
  169. dev_dbg(&instance->pdev->dev, "(%d) :Index 0x%x "
  170. "Target Id 0x%x Seq Num 0x%x Size 0/%llx\n",
  171. instance->unique_id, i,
  172. fw_map_old->raidMap.ldSpanMap[i].ldRaid.targetId,
  173. fw_map_old->raidMap.ldSpanMap[i].ldRaid.seqNum,
  174. fw_map_old->raidMap.ldSpanMap[i].ldRaid.size);
  175. }
  176. #endif
  177. memset(drv_map, 0, fusion->drv_map_sz);
  178. pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
  179. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  180. pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
  181. for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
  182. pDrvRaidMap->ldTgtIdToLd[i] =
  183. (u8)pFwRaidMap->ldTgtIdToLd[i];
  184. for (i = (MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS);
  185. i < MAX_LOGICAL_DRIVES_EXT; i++)
  186. pDrvRaidMap->ldTgtIdToLd[i] = 0xff;
  187. for (i = 0; i < ld_count; i++) {
  188. pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
  189. #if VD_EXT_DEBUG
  190. dev_dbg(&instance->pdev->dev,
  191. "pFwRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x "
  192. "pFwRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x "
  193. "size 0x%x\n", i, i,
  194. pFwRaidMap->ldSpanMap[i].ldRaid.targetId,
  195. pFwRaidMap->ldSpanMap[i].ldRaid.seqNum,
  196. (u32)pFwRaidMap->ldSpanMap[i].ldRaid.rowSize);
  197. dev_dbg(&instance->pdev->dev,
  198. "pDrvRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x "
  199. "pDrvRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x "
  200. "size 0x%x\n", i, i,
  201. pDrvRaidMap->ldSpanMap[i].ldRaid.targetId,
  202. pDrvRaidMap->ldSpanMap[i].ldRaid.seqNum,
  203. (u32)pDrvRaidMap->ldSpanMap[i].ldRaid.rowSize);
  204. dev_dbg(&instance->pdev->dev, "Driver raid map all %p "
  205. "raid map %p LD RAID MAP %p/%p\n", drv_map,
  206. pDrvRaidMap, &pFwRaidMap->ldSpanMap[i].ldRaid,
  207. &pDrvRaidMap->ldSpanMap[i].ldRaid);
  208. #endif
  209. }
  210. memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
  211. sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
  212. memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
  213. sizeof(struct MR_DEV_HANDLE_INFO) *
  214. MAX_RAIDMAP_PHYSICAL_DEVICES);
  215. }
  216. }
  217. /*
  218. * This function will validate Map info data provided by FW
  219. */
  220. u8 MR_ValidateMapInfo(struct megasas_instance *instance)
  221. {
  222. struct fusion_context *fusion;
  223. struct MR_DRV_RAID_MAP_ALL *drv_map;
  224. struct MR_DRV_RAID_MAP *pDrvRaidMap;
  225. struct LD_LOAD_BALANCE_INFO *lbInfo;
  226. PLD_SPAN_INFO ldSpanInfo;
  227. struct MR_LD_RAID *raid;
  228. u16 ldCount, num_lds;
  229. u16 ld;
  230. u32 expected_size;
  231. MR_PopulateDrvRaidMap(instance);
  232. fusion = instance->ctrl_context;
  233. drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
  234. pDrvRaidMap = &drv_map->raidMap;
  235. lbInfo = fusion->load_balance_info;
  236. ldSpanInfo = fusion->log_to_span;
  237. if (instance->supportmax256vd)
  238. expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
  239. else
  240. expected_size =
  241. (sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
  242. (sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
  243. if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
  244. dev_err(&instance->pdev->dev, "map info structure size 0x%x is not matching with ld count\n",
  245. (unsigned int) expected_size);
  246. dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
  247. (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
  248. le32_to_cpu(pDrvRaidMap->totalSize));
  249. return 0;
  250. }
  251. if (instance->UnevenSpanSupport)
  252. mr_update_span_set(drv_map, ldSpanInfo);
  253. mr_update_load_balance_params(drv_map, lbInfo);
  254. num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
  255. /*Convert Raid capability values to CPU arch */
  256. for (ldCount = 0; ldCount < num_lds; ldCount++) {
  257. ld = MR_TargetIdToLdGet(ldCount, drv_map);
  258. raid = MR_LdRaidGet(ld, drv_map);
  259. le32_to_cpus((u32 *)&raid->capability);
  260. }
  261. return 1;
  262. }
  263. u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
  264. struct MR_DRV_RAID_MAP_ALL *map)
  265. {
  266. struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
  267. struct MR_QUAD_ELEMENT *quad;
  268. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  269. u32 span, j;
  270. for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
  271. for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
  272. quad = &pSpanBlock->block_span_info.quad[j];
  273. if (le32_to_cpu(quad->diff) == 0)
  274. return SPAN_INVALID;
  275. if (le64_to_cpu(quad->logStart) <= row && row <=
  276. le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
  277. le32_to_cpu(quad->diff))) == 0) {
  278. if (span_blk != NULL) {
  279. u64 blk, debugBlk;
  280. blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
  281. debugBlk = blk;
  282. blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
  283. *span_blk = blk;
  284. }
  285. return span;
  286. }
  287. }
  288. }
  289. return SPAN_INVALID;
  290. }
  291. /*
  292. ******************************************************************************
  293. *
  294. * Function to print info about span set created in driver from FW raid map
  295. *
  296. * Inputs :
  297. * map - LD map
  298. * ldSpanInfo - ldSpanInfo per HBA instance
  299. */
  300. #if SPAN_DEBUG
  301. static int getSpanInfo(struct MR_DRV_RAID_MAP_ALL *map,
  302. PLD_SPAN_INFO ldSpanInfo)
  303. {
  304. u8 span;
  305. u32 element;
  306. struct MR_LD_RAID *raid;
  307. LD_SPAN_SET *span_set;
  308. struct MR_QUAD_ELEMENT *quad;
  309. int ldCount;
  310. u16 ld;
  311. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  312. ld = MR_TargetIdToLdGet(ldCount, map);
  313. if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
  314. continue;
  315. raid = MR_LdRaidGet(ld, map);
  316. dev_dbg(&instance->pdev->dev, "LD %x: span_depth=%x\n",
  317. ld, raid->spanDepth);
  318. for (span = 0; span < raid->spanDepth; span++)
  319. dev_dbg(&instance->pdev->dev, "Span=%x,"
  320. " number of quads=%x\n", span,
  321. le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  322. block_span_info.noElements));
  323. for (element = 0; element < MAX_QUAD_DEPTH; element++) {
  324. span_set = &(ldSpanInfo[ld].span_set[element]);
  325. if (span_set->span_row_data_width == 0)
  326. break;
  327. dev_dbg(&instance->pdev->dev, "Span Set %x:"
  328. "width=%x, diff=%x\n", element,
  329. (unsigned int)span_set->span_row_data_width,
  330. (unsigned int)span_set->diff);
  331. dev_dbg(&instance->pdev->dev, "logical LBA"
  332. "start=0x%08lx, end=0x%08lx\n",
  333. (long unsigned int)span_set->log_start_lba,
  334. (long unsigned int)span_set->log_end_lba);
  335. dev_dbg(&instance->pdev->dev, "span row start=0x%08lx,"
  336. " end=0x%08lx\n",
  337. (long unsigned int)span_set->span_row_start,
  338. (long unsigned int)span_set->span_row_end);
  339. dev_dbg(&instance->pdev->dev, "data row start=0x%08lx,"
  340. " end=0x%08lx\n",
  341. (long unsigned int)span_set->data_row_start,
  342. (long unsigned int)span_set->data_row_end);
  343. dev_dbg(&instance->pdev->dev, "data strip start=0x%08lx,"
  344. " end=0x%08lx\n",
  345. (long unsigned int)span_set->data_strip_start,
  346. (long unsigned int)span_set->data_strip_end);
  347. for (span = 0; span < raid->spanDepth; span++) {
  348. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  349. block_span_info.noElements) >=
  350. element + 1) {
  351. quad = &map->raidMap.ldSpanMap[ld].
  352. spanBlock[span].block_span_info.
  353. quad[element];
  354. dev_dbg(&instance->pdev->dev, "Span=%x,"
  355. "Quad=%x, diff=%x\n", span,
  356. element, le32_to_cpu(quad->diff));
  357. dev_dbg(&instance->pdev->dev,
  358. "offset_in_span=0x%08lx\n",
  359. (long unsigned int)le64_to_cpu(quad->offsetInSpan));
  360. dev_dbg(&instance->pdev->dev,
  361. "logical start=0x%08lx, end=0x%08lx\n",
  362. (long unsigned int)le64_to_cpu(quad->logStart),
  363. (long unsigned int)le64_to_cpu(quad->logEnd));
  364. }
  365. }
  366. }
  367. }
  368. return 0;
  369. }
  370. #endif
  371. /*
  372. ******************************************************************************
  373. *
  374. * This routine calculates the Span block for given row using spanset.
  375. *
  376. * Inputs :
  377. * instance - HBA instance
  378. * ld - Logical drive number
  379. * row - Row number
  380. * map - LD map
  381. *
  382. * Outputs :
  383. *
  384. * span - Span number
  385. * block - Absolute Block number in the physical disk
  386. * div_error - Devide error code.
  387. */
  388. u32 mr_spanset_get_span_block(struct megasas_instance *instance,
  389. u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
  390. {
  391. struct fusion_context *fusion = instance->ctrl_context;
  392. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  393. LD_SPAN_SET *span_set;
  394. struct MR_QUAD_ELEMENT *quad;
  395. u32 span, info;
  396. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  397. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  398. span_set = &(ldSpanInfo[ld].span_set[info]);
  399. if (span_set->span_row_data_width == 0)
  400. break;
  401. if (row > span_set->data_row_end)
  402. continue;
  403. for (span = 0; span < raid->spanDepth; span++)
  404. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  405. block_span_info.noElements) >= info+1) {
  406. quad = &map->raidMap.ldSpanMap[ld].
  407. spanBlock[span].
  408. block_span_info.quad[info];
  409. if (le32_to_cpu(quad->diff) == 0)
  410. return SPAN_INVALID;
  411. if (le64_to_cpu(quad->logStart) <= row &&
  412. row <= le64_to_cpu(quad->logEnd) &&
  413. (mega_mod64(row - le64_to_cpu(quad->logStart),
  414. le32_to_cpu(quad->diff))) == 0) {
  415. if (span_blk != NULL) {
  416. u64 blk;
  417. blk = mega_div64_32
  418. ((row - le64_to_cpu(quad->logStart)),
  419. le32_to_cpu(quad->diff));
  420. blk = (blk + le64_to_cpu(quad->offsetInSpan))
  421. << raid->stripeShift;
  422. *span_blk = blk;
  423. }
  424. return span;
  425. }
  426. }
  427. }
  428. return SPAN_INVALID;
  429. }
  430. /*
  431. ******************************************************************************
  432. *
  433. * This routine calculates the row for given strip using spanset.
  434. *
  435. * Inputs :
  436. * instance - HBA instance
  437. * ld - Logical drive number
  438. * Strip - Strip
  439. * map - LD map
  440. *
  441. * Outputs :
  442. *
  443. * row - row associated with strip
  444. */
  445. static u64 get_row_from_strip(struct megasas_instance *instance,
  446. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  447. {
  448. struct fusion_context *fusion = instance->ctrl_context;
  449. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  450. LD_SPAN_SET *span_set;
  451. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  452. u32 info, strip_offset, span, span_offset;
  453. u64 span_set_Strip, span_set_Row, retval;
  454. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  455. span_set = &(ldSpanInfo[ld].span_set[info]);
  456. if (span_set->span_row_data_width == 0)
  457. break;
  458. if (strip > span_set->data_strip_end)
  459. continue;
  460. span_set_Strip = strip - span_set->data_strip_start;
  461. strip_offset = mega_mod64(span_set_Strip,
  462. span_set->span_row_data_width);
  463. span_set_Row = mega_div64_32(span_set_Strip,
  464. span_set->span_row_data_width) * span_set->diff;
  465. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  466. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  467. block_span_info.noElements) >= info+1) {
  468. if (strip_offset >=
  469. span_set->strip_offset[span])
  470. span_offset++;
  471. else
  472. break;
  473. }
  474. #if SPAN_DEBUG
  475. dev_info(&instance->pdev->dev, "Strip 0x%llx,"
  476. "span_set_Strip 0x%llx, span_set_Row 0x%llx"
  477. "data width 0x%llx span offset 0x%x\n", strip,
  478. (unsigned long long)span_set_Strip,
  479. (unsigned long long)span_set_Row,
  480. (unsigned long long)span_set->span_row_data_width,
  481. span_offset);
  482. dev_info(&instance->pdev->dev, "For strip 0x%llx"
  483. "row is 0x%llx\n", strip,
  484. (unsigned long long) span_set->data_row_start +
  485. (unsigned long long) span_set_Row + (span_offset - 1));
  486. #endif
  487. retval = (span_set->data_row_start + span_set_Row +
  488. (span_offset - 1));
  489. return retval;
  490. }
  491. return -1LLU;
  492. }
  493. /*
  494. ******************************************************************************
  495. *
  496. * This routine calculates the Start Strip for given row using spanset.
  497. *
  498. * Inputs :
  499. * instance - HBA instance
  500. * ld - Logical drive number
  501. * row - Row number
  502. * map - LD map
  503. *
  504. * Outputs :
  505. *
  506. * Strip - Start strip associated with row
  507. */
  508. static u64 get_strip_from_row(struct megasas_instance *instance,
  509. u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
  510. {
  511. struct fusion_context *fusion = instance->ctrl_context;
  512. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  513. LD_SPAN_SET *span_set;
  514. struct MR_QUAD_ELEMENT *quad;
  515. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  516. u32 span, info;
  517. u64 strip;
  518. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  519. span_set = &(ldSpanInfo[ld].span_set[info]);
  520. if (span_set->span_row_data_width == 0)
  521. break;
  522. if (row > span_set->data_row_end)
  523. continue;
  524. for (span = 0; span < raid->spanDepth; span++)
  525. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  526. block_span_info.noElements) >= info+1) {
  527. quad = &map->raidMap.ldSpanMap[ld].
  528. spanBlock[span].block_span_info.quad[info];
  529. if (le64_to_cpu(quad->logStart) <= row &&
  530. row <= le64_to_cpu(quad->logEnd) &&
  531. mega_mod64((row - le64_to_cpu(quad->logStart)),
  532. le32_to_cpu(quad->diff)) == 0) {
  533. strip = mega_div64_32
  534. (((row - span_set->data_row_start)
  535. - le64_to_cpu(quad->logStart)),
  536. le32_to_cpu(quad->diff));
  537. strip *= span_set->span_row_data_width;
  538. strip += span_set->data_strip_start;
  539. strip += span_set->strip_offset[span];
  540. return strip;
  541. }
  542. }
  543. }
  544. dev_err(&instance->pdev->dev, "get_strip_from_row"
  545. "returns invalid strip for ld=%x, row=%lx\n",
  546. ld, (long unsigned int)row);
  547. return -1;
  548. }
  549. /*
  550. ******************************************************************************
  551. *
  552. * This routine calculates the Physical Arm for given strip using spanset.
  553. *
  554. * Inputs :
  555. * instance - HBA instance
  556. * ld - Logical drive number
  557. * strip - Strip
  558. * map - LD map
  559. *
  560. * Outputs :
  561. *
  562. * Phys Arm - Phys Arm associated with strip
  563. */
  564. static u32 get_arm_from_strip(struct megasas_instance *instance,
  565. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  566. {
  567. struct fusion_context *fusion = instance->ctrl_context;
  568. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  569. LD_SPAN_SET *span_set;
  570. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  571. u32 info, strip_offset, span, span_offset, retval;
  572. for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
  573. span_set = &(ldSpanInfo[ld].span_set[info]);
  574. if (span_set->span_row_data_width == 0)
  575. break;
  576. if (strip > span_set->data_strip_end)
  577. continue;
  578. strip_offset = (uint)mega_mod64
  579. ((strip - span_set->data_strip_start),
  580. span_set->span_row_data_width);
  581. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  582. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  583. block_span_info.noElements) >= info+1) {
  584. if (strip_offset >=
  585. span_set->strip_offset[span])
  586. span_offset =
  587. span_set->strip_offset[span];
  588. else
  589. break;
  590. }
  591. #if SPAN_DEBUG
  592. dev_info(&instance->pdev->dev, "get_arm_from_strip:"
  593. "for ld=0x%x strip=0x%lx arm is 0x%x\n", ld,
  594. (long unsigned int)strip, (strip_offset - span_offset));
  595. #endif
  596. retval = (strip_offset - span_offset);
  597. return retval;
  598. }
  599. dev_err(&instance->pdev->dev, "get_arm_from_strip"
  600. "returns invalid arm for ld=%x strip=%lx\n",
  601. ld, (long unsigned int)strip);
  602. return -1;
  603. }
  604. /* This Function will return Phys arm */
  605. u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
  606. struct MR_DRV_RAID_MAP_ALL *map)
  607. {
  608. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  609. /* Need to check correct default value */
  610. u32 arm = 0;
  611. switch (raid->level) {
  612. case 0:
  613. case 5:
  614. case 6:
  615. arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
  616. break;
  617. case 1:
  618. /* start with logical arm */
  619. arm = get_arm_from_strip(instance, ld, stripe, map);
  620. if (arm != -1U)
  621. arm *= 2;
  622. break;
  623. }
  624. return arm;
  625. }
  626. /*
  627. ******************************************************************************
  628. *
  629. * This routine calculates the arm, span and block for the specified stripe and
  630. * reference in stripe using spanset
  631. *
  632. * Inputs :
  633. *
  634. * ld - Logical drive number
  635. * stripRow - Stripe number
  636. * stripRef - Reference in stripe
  637. *
  638. * Outputs :
  639. *
  640. * span - Span number
  641. * block - Absolute Block number in the physical disk
  642. */
  643. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  644. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  645. struct RAID_CONTEXT *pRAID_Context,
  646. struct MR_DRV_RAID_MAP_ALL *map)
  647. {
  648. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  649. u32 pd, arRef;
  650. u8 physArm, span;
  651. u64 row;
  652. u8 retval = TRUE;
  653. u8 do_invader = 0;
  654. u64 *pdBlock = &io_info->pdBlock;
  655. u16 *pDevHandle = &io_info->devHandle;
  656. u32 logArm, rowMod, armQ, arm;
  657. if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER ||
  658. instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
  659. do_invader = 1;
  660. /*Get row and span from io_info for Uneven Span IO.*/
  661. row = io_info->start_row;
  662. span = io_info->start_span;
  663. if (raid->level == 6) {
  664. logArm = get_arm_from_strip(instance, ld, stripRow, map);
  665. if (logArm == -1U)
  666. return FALSE;
  667. rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
  668. armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
  669. arm = armQ + 1 + logArm;
  670. if (arm >= SPAN_ROW_SIZE(map, ld, span))
  671. arm -= SPAN_ROW_SIZE(map, ld, span);
  672. physArm = (u8)arm;
  673. } else
  674. /* Calculate the arm */
  675. physArm = get_arm(instance, ld, span, stripRow, map);
  676. if (physArm == 0xFF)
  677. return FALSE;
  678. arRef = MR_LdSpanArrayGet(ld, span, map);
  679. pd = MR_ArPdGet(arRef, physArm, map);
  680. if (pd != MR_PD_INVALID)
  681. *pDevHandle = MR_PdDevHandleGet(pd, map);
  682. else {
  683. *pDevHandle = MR_PD_INVALID;
  684. if ((raid->level >= 5) &&
  685. (!do_invader || (do_invader &&
  686. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  687. pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
  688. else if (raid->level == 1) {
  689. pd = MR_ArPdGet(arRef, physArm + 1, map);
  690. if (pd != MR_PD_INVALID)
  691. *pDevHandle = MR_PdDevHandleGet(pd, map);
  692. }
  693. }
  694. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  695. pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
  696. physArm;
  697. io_info->span_arm = pRAID_Context->spanArm;
  698. return retval;
  699. }
  700. /*
  701. ******************************************************************************
  702. *
  703. * This routine calculates the arm, span and block for the specified stripe and
  704. * reference in stripe.
  705. *
  706. * Inputs :
  707. *
  708. * ld - Logical drive number
  709. * stripRow - Stripe number
  710. * stripRef - Reference in stripe
  711. *
  712. * Outputs :
  713. *
  714. * span - Span number
  715. * block - Absolute Block number in the physical disk
  716. */
  717. u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
  718. u16 stripRef, struct IO_REQUEST_INFO *io_info,
  719. struct RAID_CONTEXT *pRAID_Context,
  720. struct MR_DRV_RAID_MAP_ALL *map)
  721. {
  722. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  723. u32 pd, arRef;
  724. u8 physArm, span;
  725. u64 row;
  726. u8 retval = TRUE;
  727. u8 do_invader = 0;
  728. u64 *pdBlock = &io_info->pdBlock;
  729. u16 *pDevHandle = &io_info->devHandle;
  730. if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER ||
  731. instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
  732. do_invader = 1;
  733. row = mega_div64_32(stripRow, raid->rowDataSize);
  734. if (raid->level == 6) {
  735. /* logical arm within row */
  736. u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
  737. u32 rowMod, armQ, arm;
  738. if (raid->rowSize == 0)
  739. return FALSE;
  740. /* get logical row mod */
  741. rowMod = mega_mod64(row, raid->rowSize);
  742. armQ = raid->rowSize-1-rowMod; /* index of Q drive */
  743. arm = armQ+1+logArm; /* data always logically follows Q */
  744. if (arm >= raid->rowSize) /* handle wrap condition */
  745. arm -= raid->rowSize;
  746. physArm = (u8)arm;
  747. } else {
  748. if (raid->modFactor == 0)
  749. return FALSE;
  750. physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
  751. raid->modFactor),
  752. map);
  753. }
  754. if (raid->spanDepth == 1) {
  755. span = 0;
  756. *pdBlock = row << raid->stripeShift;
  757. } else {
  758. span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
  759. if (span == SPAN_INVALID)
  760. return FALSE;
  761. }
  762. /* Get the array on which this span is present */
  763. arRef = MR_LdSpanArrayGet(ld, span, map);
  764. pd = MR_ArPdGet(arRef, physArm, map); /* Get the pd */
  765. if (pd != MR_PD_INVALID)
  766. /* Get dev handle from Pd. */
  767. *pDevHandle = MR_PdDevHandleGet(pd, map);
  768. else {
  769. *pDevHandle = MR_PD_INVALID; /* set dev handle as invalid. */
  770. if ((raid->level >= 5) &&
  771. (!do_invader || (do_invader &&
  772. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  773. pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
  774. else if (raid->level == 1) {
  775. /* Get alternate Pd. */
  776. pd = MR_ArPdGet(arRef, physArm + 1, map);
  777. if (pd != MR_PD_INVALID)
  778. /* Get dev handle from Pd */
  779. *pDevHandle = MR_PdDevHandleGet(pd, map);
  780. }
  781. }
  782. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  783. pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
  784. physArm;
  785. io_info->span_arm = pRAID_Context->spanArm;
  786. return retval;
  787. }
  788. /*
  789. ******************************************************************************
  790. *
  791. * MR_BuildRaidContext function
  792. *
  793. * This function will initiate command processing. The start/end row and strip
  794. * information is calculated then the lock is acquired.
  795. * This function will return 0 if region lock was acquired OR return num strips
  796. */
  797. u8
  798. MR_BuildRaidContext(struct megasas_instance *instance,
  799. struct IO_REQUEST_INFO *io_info,
  800. struct RAID_CONTEXT *pRAID_Context,
  801. struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
  802. {
  803. struct MR_LD_RAID *raid;
  804. u32 ld, stripSize, stripe_mask;
  805. u64 endLba, endStrip, endRow, start_row, start_strip;
  806. u64 regStart;
  807. u32 regSize;
  808. u8 num_strips, numRows;
  809. u16 ref_in_start_stripe, ref_in_end_stripe;
  810. u64 ldStartBlock;
  811. u32 numBlocks, ldTgtId;
  812. u8 isRead;
  813. u8 retval = 0;
  814. u8 startlba_span = SPAN_INVALID;
  815. u64 *pdBlock = &io_info->pdBlock;
  816. ldStartBlock = io_info->ldStartBlock;
  817. numBlocks = io_info->numBlocks;
  818. ldTgtId = io_info->ldTgtId;
  819. isRead = io_info->isRead;
  820. io_info->IoforUnevenSpan = 0;
  821. io_info->start_span = SPAN_INVALID;
  822. ld = MR_TargetIdToLdGet(ldTgtId, map);
  823. raid = MR_LdRaidGet(ld, map);
  824. /*
  825. * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero
  826. * return FALSE
  827. */
  828. if (raid->rowDataSize == 0) {
  829. if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
  830. return FALSE;
  831. else if (instance->UnevenSpanSupport) {
  832. io_info->IoforUnevenSpan = 1;
  833. } else {
  834. dev_info(&instance->pdev->dev,
  835. "raid->rowDataSize is 0, but has SPAN[0]"
  836. "rowDataSize = 0x%0x,"
  837. "but there is _NO_ UnevenSpanSupport\n",
  838. MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
  839. return FALSE;
  840. }
  841. }
  842. stripSize = 1 << raid->stripeShift;
  843. stripe_mask = stripSize-1;
  844. /*
  845. * calculate starting row and stripe, and number of strips and rows
  846. */
  847. start_strip = ldStartBlock >> raid->stripeShift;
  848. ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
  849. endLba = ldStartBlock + numBlocks - 1;
  850. ref_in_end_stripe = (u16)(endLba & stripe_mask);
  851. endStrip = endLba >> raid->stripeShift;
  852. num_strips = (u8)(endStrip - start_strip + 1); /* End strip */
  853. if (io_info->IoforUnevenSpan) {
  854. start_row = get_row_from_strip(instance, ld, start_strip, map);
  855. endRow = get_row_from_strip(instance, ld, endStrip, map);
  856. if (start_row == -1ULL || endRow == -1ULL) {
  857. dev_info(&instance->pdev->dev, "return from %s %d."
  858. "Send IO w/o region lock.\n",
  859. __func__, __LINE__);
  860. return FALSE;
  861. }
  862. if (raid->spanDepth == 1) {
  863. startlba_span = 0;
  864. *pdBlock = start_row << raid->stripeShift;
  865. } else
  866. startlba_span = (u8)mr_spanset_get_span_block(instance,
  867. ld, start_row, pdBlock, map);
  868. if (startlba_span == SPAN_INVALID) {
  869. dev_info(&instance->pdev->dev, "return from %s %d"
  870. "for row 0x%llx,start strip %llx"
  871. "endSrip %llx\n", __func__, __LINE__,
  872. (unsigned long long)start_row,
  873. (unsigned long long)start_strip,
  874. (unsigned long long)endStrip);
  875. return FALSE;
  876. }
  877. io_info->start_span = startlba_span;
  878. io_info->start_row = start_row;
  879. #if SPAN_DEBUG
  880. dev_dbg(&instance->pdev->dev, "Check Span number from %s %d"
  881. "for row 0x%llx, start strip 0x%llx end strip 0x%llx"
  882. " span 0x%x\n", __func__, __LINE__,
  883. (unsigned long long)start_row,
  884. (unsigned long long)start_strip,
  885. (unsigned long long)endStrip, startlba_span);
  886. dev_dbg(&instance->pdev->dev, "start_row 0x%llx endRow 0x%llx"
  887. "Start span 0x%x\n", (unsigned long long)start_row,
  888. (unsigned long long)endRow, startlba_span);
  889. #endif
  890. } else {
  891. start_row = mega_div64_32(start_strip, raid->rowDataSize);
  892. endRow = mega_div64_32(endStrip, raid->rowDataSize);
  893. }
  894. numRows = (u8)(endRow - start_row + 1);
  895. /*
  896. * calculate region info.
  897. */
  898. /* assume region is at the start of the first row */
  899. regStart = start_row << raid->stripeShift;
  900. /* assume this IO needs the full row - we'll adjust if not true */
  901. regSize = stripSize;
  902. /* Check if we can send this I/O via FastPath */
  903. if (raid->capability.fpCapable) {
  904. if (isRead)
  905. io_info->fpOkForIo = (raid->capability.fpReadCapable &&
  906. ((num_strips == 1) ||
  907. raid->capability.
  908. fpReadAcrossStripe));
  909. else
  910. io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
  911. ((num_strips == 1) ||
  912. raid->capability.
  913. fpWriteAcrossStripe));
  914. } else
  915. io_info->fpOkForIo = FALSE;
  916. if (numRows == 1) {
  917. /* single-strip IOs can always lock only the data needed */
  918. if (num_strips == 1) {
  919. regStart += ref_in_start_stripe;
  920. regSize = numBlocks;
  921. }
  922. /* multi-strip IOs always need to full stripe locked */
  923. } else if (io_info->IoforUnevenSpan == 0) {
  924. /*
  925. * For Even span region lock optimization.
  926. * If the start strip is the last in the start row
  927. */
  928. if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
  929. regStart += ref_in_start_stripe;
  930. /* initialize count to sectors from startref to end
  931. of strip */
  932. regSize = stripSize - ref_in_start_stripe;
  933. }
  934. /* add complete rows in the middle of the transfer */
  935. if (numRows > 2)
  936. regSize += (numRows-2) << raid->stripeShift;
  937. /* if IO ends within first strip of last row*/
  938. if (endStrip == endRow*raid->rowDataSize)
  939. regSize += ref_in_end_stripe+1;
  940. else
  941. regSize += stripSize;
  942. } else {
  943. /*
  944. * For Uneven span region lock optimization.
  945. * If the start strip is the last in the start row
  946. */
  947. if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
  948. SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
  949. regStart += ref_in_start_stripe;
  950. /* initialize count to sectors from
  951. * startRef to end of strip
  952. */
  953. regSize = stripSize - ref_in_start_stripe;
  954. }
  955. /* Add complete rows in the middle of the transfer*/
  956. if (numRows > 2)
  957. /* Add complete rows in the middle of the transfer*/
  958. regSize += (numRows-2) << raid->stripeShift;
  959. /* if IO ends within first strip of last row */
  960. if (endStrip == get_strip_from_row(instance, ld, endRow, map))
  961. regSize += ref_in_end_stripe + 1;
  962. else
  963. regSize += stripSize;
  964. }
  965. pRAID_Context->timeoutValue =
  966. cpu_to_le16(raid->fpIoTimeoutForLd ?
  967. raid->fpIoTimeoutForLd :
  968. map->raidMap.fpPdIoTimeoutSec);
  969. if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
  970. (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
  971. pRAID_Context->regLockFlags = (isRead) ?
  972. raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
  973. else
  974. pRAID_Context->regLockFlags = (isRead) ?
  975. REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
  976. pRAID_Context->VirtualDiskTgtId = raid->targetId;
  977. pRAID_Context->regLockRowLBA = cpu_to_le64(regStart);
  978. pRAID_Context->regLockLength = cpu_to_le32(regSize);
  979. pRAID_Context->configSeqNum = raid->seqNum;
  980. /* save pointer to raid->LUN array */
  981. *raidLUN = raid->LUN;
  982. /*Get Phy Params only if FP capable, or else leave it to MR firmware
  983. to do the calculation.*/
  984. if (io_info->fpOkForIo) {
  985. retval = io_info->IoforUnevenSpan ?
  986. mr_spanset_get_phy_params(instance, ld,
  987. start_strip, ref_in_start_stripe,
  988. io_info, pRAID_Context, map) :
  989. MR_GetPhyParams(instance, ld, start_strip,
  990. ref_in_start_stripe, io_info,
  991. pRAID_Context, map);
  992. /* If IO on an invalid Pd, then FP is not possible.*/
  993. if (io_info->devHandle == MR_PD_INVALID)
  994. io_info->fpOkForIo = FALSE;
  995. return retval;
  996. } else if (isRead) {
  997. uint stripIdx;
  998. for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
  999. retval = io_info->IoforUnevenSpan ?
  1000. mr_spanset_get_phy_params(instance, ld,
  1001. start_strip + stripIdx,
  1002. ref_in_start_stripe, io_info,
  1003. pRAID_Context, map) :
  1004. MR_GetPhyParams(instance, ld,
  1005. start_strip + stripIdx, ref_in_start_stripe,
  1006. io_info, pRAID_Context, map);
  1007. if (!retval)
  1008. return TRUE;
  1009. }
  1010. }
  1011. #if SPAN_DEBUG
  1012. /* Just for testing what arm we get for strip.*/
  1013. if (io_info->IoforUnevenSpan)
  1014. get_arm_from_strip(instance, ld, start_strip, map);
  1015. #endif
  1016. return TRUE;
  1017. }
  1018. /*
  1019. ******************************************************************************
  1020. *
  1021. * This routine pepare spanset info from Valid Raid map and store it into
  1022. * local copy of ldSpanInfo per instance data structure.
  1023. *
  1024. * Inputs :
  1025. * map - LD map
  1026. * ldSpanInfo - ldSpanInfo per HBA instance
  1027. *
  1028. */
  1029. void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  1030. PLD_SPAN_INFO ldSpanInfo)
  1031. {
  1032. u8 span, count;
  1033. u32 element, span_row_width;
  1034. u64 span_row;
  1035. struct MR_LD_RAID *raid;
  1036. LD_SPAN_SET *span_set, *span_set_prev;
  1037. struct MR_QUAD_ELEMENT *quad;
  1038. int ldCount;
  1039. u16 ld;
  1040. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1041. ld = MR_TargetIdToLdGet(ldCount, map);
  1042. if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
  1043. continue;
  1044. raid = MR_LdRaidGet(ld, map);
  1045. for (element = 0; element < MAX_QUAD_DEPTH; element++) {
  1046. for (span = 0; span < raid->spanDepth; span++) {
  1047. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  1048. block_span_info.noElements) <
  1049. element + 1)
  1050. continue;
  1051. span_set = &(ldSpanInfo[ld].span_set[element]);
  1052. quad = &map->raidMap.ldSpanMap[ld].
  1053. spanBlock[span].block_span_info.
  1054. quad[element];
  1055. span_set->diff = le32_to_cpu(quad->diff);
  1056. for (count = 0, span_row_width = 0;
  1057. count < raid->spanDepth; count++) {
  1058. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
  1059. spanBlock[count].
  1060. block_span_info.
  1061. noElements) >= element + 1) {
  1062. span_set->strip_offset[count] =
  1063. span_row_width;
  1064. span_row_width +=
  1065. MR_LdSpanPtrGet
  1066. (ld, count, map)->spanRowDataSize;
  1067. printk(KERN_INFO "megasas:"
  1068. "span %x rowDataSize %x\n",
  1069. count, MR_LdSpanPtrGet
  1070. (ld, count, map)->spanRowDataSize);
  1071. }
  1072. }
  1073. span_set->span_row_data_width = span_row_width;
  1074. span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
  1075. le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
  1076. le32_to_cpu(quad->diff));
  1077. if (element == 0) {
  1078. span_set->log_start_lba = 0;
  1079. span_set->log_end_lba =
  1080. ((span_row << raid->stripeShift)
  1081. * span_row_width) - 1;
  1082. span_set->span_row_start = 0;
  1083. span_set->span_row_end = span_row - 1;
  1084. span_set->data_strip_start = 0;
  1085. span_set->data_strip_end =
  1086. (span_row * span_row_width) - 1;
  1087. span_set->data_row_start = 0;
  1088. span_set->data_row_end =
  1089. (span_row * le32_to_cpu(quad->diff)) - 1;
  1090. } else {
  1091. span_set_prev = &(ldSpanInfo[ld].
  1092. span_set[element - 1]);
  1093. span_set->log_start_lba =
  1094. span_set_prev->log_end_lba + 1;
  1095. span_set->log_end_lba =
  1096. span_set->log_start_lba +
  1097. ((span_row << raid->stripeShift)
  1098. * span_row_width) - 1;
  1099. span_set->span_row_start =
  1100. span_set_prev->span_row_end + 1;
  1101. span_set->span_row_end =
  1102. span_set->span_row_start + span_row - 1;
  1103. span_set->data_strip_start =
  1104. span_set_prev->data_strip_end + 1;
  1105. span_set->data_strip_end =
  1106. span_set->data_strip_start +
  1107. (span_row * span_row_width) - 1;
  1108. span_set->data_row_start =
  1109. span_set_prev->data_row_end + 1;
  1110. span_set->data_row_end =
  1111. span_set->data_row_start +
  1112. (span_row * le32_to_cpu(quad->diff)) - 1;
  1113. }
  1114. break;
  1115. }
  1116. if (span == raid->spanDepth)
  1117. break;
  1118. }
  1119. }
  1120. #if SPAN_DEBUG
  1121. getSpanInfo(map, ldSpanInfo);
  1122. #endif
  1123. }
  1124. void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
  1125. struct LD_LOAD_BALANCE_INFO *lbInfo)
  1126. {
  1127. int ldCount;
  1128. u16 ld;
  1129. struct MR_LD_RAID *raid;
  1130. if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
  1131. lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  1132. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1133. ld = MR_TargetIdToLdGet(ldCount, drv_map);
  1134. if (ld >= MAX_LOGICAL_DRIVES_EXT) {
  1135. lbInfo[ldCount].loadBalanceFlag = 0;
  1136. continue;
  1137. }
  1138. raid = MR_LdRaidGet(ld, drv_map);
  1139. if ((raid->level != 1) ||
  1140. (raid->ldState != MR_LD_STATE_OPTIMAL)) {
  1141. lbInfo[ldCount].loadBalanceFlag = 0;
  1142. continue;
  1143. }
  1144. lbInfo[ldCount].loadBalanceFlag = 1;
  1145. }
  1146. }
  1147. u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
  1148. struct LD_LOAD_BALANCE_INFO *lbInfo, struct IO_REQUEST_INFO *io_info)
  1149. {
  1150. struct fusion_context *fusion;
  1151. struct MR_LD_RAID *raid;
  1152. struct MR_DRV_RAID_MAP_ALL *drv_map;
  1153. u16 pend0, pend1, ld;
  1154. u64 diff0, diff1;
  1155. u8 bestArm, pd0, pd1, span, arm;
  1156. u32 arRef, span_row_size;
  1157. u64 block = io_info->ldStartBlock;
  1158. u32 count = io_info->numBlocks;
  1159. span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
  1160. >> RAID_CTX_SPANARM_SPAN_SHIFT);
  1161. arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
  1162. fusion = instance->ctrl_context;
  1163. drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
  1164. ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
  1165. raid = MR_LdRaidGet(ld, drv_map);
  1166. span_row_size = instance->UnevenSpanSupport ?
  1167. SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
  1168. arRef = MR_LdSpanArrayGet(ld, span, drv_map);
  1169. pd0 = MR_ArPdGet(arRef, arm, drv_map);
  1170. pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
  1171. (arm + 1 - span_row_size) : arm + 1, drv_map);
  1172. /* get the pending cmds for the data and mirror arms */
  1173. pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
  1174. pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
  1175. /* Determine the disk whose head is nearer to the req. block */
  1176. diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
  1177. diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
  1178. bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
  1179. if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
  1180. (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
  1181. bestArm ^= 1;
  1182. /* Update the last accessed block on the correct pd */
  1183. io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
  1184. lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
  1185. io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
  1186. #if SPAN_DEBUG
  1187. if (arm != bestArm)
  1188. dev_dbg(&instance->pdev->dev, "LSI Debug R1 Load balance "
  1189. "occur - span 0x%x arm 0x%x bestArm 0x%x "
  1190. "io_info->span_arm 0x%x\n",
  1191. span, arm, bestArm, io_info->span_arm);
  1192. #endif
  1193. return io_info->pd_after_lb;
  1194. }
  1195. u16 get_updated_dev_handle(struct megasas_instance *instance,
  1196. struct LD_LOAD_BALANCE_INFO *lbInfo, struct IO_REQUEST_INFO *io_info)
  1197. {
  1198. u8 arm_pd;
  1199. u16 devHandle;
  1200. struct fusion_context *fusion;
  1201. struct MR_DRV_RAID_MAP_ALL *drv_map;
  1202. fusion = instance->ctrl_context;
  1203. drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
  1204. /* get best new arm (PD ID) */
  1205. arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info);
  1206. devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
  1207. atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
  1208. return devHandle;
  1209. }