qla_iocb.c 78 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2014 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. static void qla25xx_set_que(srb_t *, struct rsp_que **);
  13. /**
  14. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  15. * @cmd: SCSI command
  16. *
  17. * Returns the proper CF_* direction based on CDB.
  18. */
  19. static inline uint16_t
  20. qla2x00_get_cmd_direction(srb_t *sp)
  21. {
  22. uint16_t cflags;
  23. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  24. struct scsi_qla_host *vha = sp->fcport->vha;
  25. cflags = 0;
  26. /* Set transfer direction */
  27. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  28. cflags = CF_WRITE;
  29. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  30. vha->qla_stats.output_requests++;
  31. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  32. cflags = CF_READ;
  33. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  34. vha->qla_stats.input_requests++;
  35. }
  36. return (cflags);
  37. }
  38. /**
  39. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  40. * Continuation Type 0 IOCBs to allocate.
  41. *
  42. * @dsds: number of data segment decriptors needed
  43. *
  44. * Returns the number of IOCB entries needed to store @dsds.
  45. */
  46. uint16_t
  47. qla2x00_calc_iocbs_32(uint16_t dsds)
  48. {
  49. uint16_t iocbs;
  50. iocbs = 1;
  51. if (dsds > 3) {
  52. iocbs += (dsds - 3) / 7;
  53. if ((dsds - 3) % 7)
  54. iocbs++;
  55. }
  56. return (iocbs);
  57. }
  58. /**
  59. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  60. * Continuation Type 1 IOCBs to allocate.
  61. *
  62. * @dsds: number of data segment decriptors needed
  63. *
  64. * Returns the number of IOCB entries needed to store @dsds.
  65. */
  66. uint16_t
  67. qla2x00_calc_iocbs_64(uint16_t dsds)
  68. {
  69. uint16_t iocbs;
  70. iocbs = 1;
  71. if (dsds > 2) {
  72. iocbs += (dsds - 2) / 5;
  73. if ((dsds - 2) % 5)
  74. iocbs++;
  75. }
  76. return (iocbs);
  77. }
  78. /**
  79. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  80. * @ha: HA context
  81. *
  82. * Returns a pointer to the Continuation Type 0 IOCB packet.
  83. */
  84. static inline cont_entry_t *
  85. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  86. {
  87. cont_entry_t *cont_pkt;
  88. struct req_que *req = vha->req;
  89. /* Adjust ring index. */
  90. req->ring_index++;
  91. if (req->ring_index == req->length) {
  92. req->ring_index = 0;
  93. req->ring_ptr = req->ring;
  94. } else {
  95. req->ring_ptr++;
  96. }
  97. cont_pkt = (cont_entry_t *)req->ring_ptr;
  98. /* Load packet defaults. */
  99. *((uint32_t *)(&cont_pkt->entry_type)) =
  100. __constant_cpu_to_le32(CONTINUE_TYPE);
  101. return (cont_pkt);
  102. }
  103. /**
  104. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  105. * @ha: HA context
  106. *
  107. * Returns a pointer to the continuation type 1 IOCB packet.
  108. */
  109. static inline cont_a64_entry_t *
  110. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  111. {
  112. cont_a64_entry_t *cont_pkt;
  113. /* Adjust ring index. */
  114. req->ring_index++;
  115. if (req->ring_index == req->length) {
  116. req->ring_index = 0;
  117. req->ring_ptr = req->ring;
  118. } else {
  119. req->ring_ptr++;
  120. }
  121. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  122. /* Load packet defaults. */
  123. *((uint32_t *)(&cont_pkt->entry_type)) = IS_QLAFX00(vha->hw) ?
  124. __constant_cpu_to_le32(CONTINUE_A64_TYPE_FX00) :
  125. __constant_cpu_to_le32(CONTINUE_A64_TYPE);
  126. return (cont_pkt);
  127. }
  128. static inline int
  129. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  130. {
  131. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  132. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  133. /* We always use DIFF Bundling for best performance */
  134. *fw_prot_opts = 0;
  135. /* Translate SCSI opcode to a protection opcode */
  136. switch (scsi_get_prot_op(cmd)) {
  137. case SCSI_PROT_READ_STRIP:
  138. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  139. break;
  140. case SCSI_PROT_WRITE_INSERT:
  141. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  142. break;
  143. case SCSI_PROT_READ_INSERT:
  144. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  145. break;
  146. case SCSI_PROT_WRITE_STRIP:
  147. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  148. break;
  149. case SCSI_PROT_READ_PASS:
  150. case SCSI_PROT_WRITE_PASS:
  151. if (guard & SHOST_DIX_GUARD_IP)
  152. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  153. else
  154. *fw_prot_opts |= PO_MODE_DIF_PASS;
  155. break;
  156. default: /* Normal Request */
  157. *fw_prot_opts |= PO_MODE_DIF_PASS;
  158. break;
  159. }
  160. return scsi_prot_sg_count(cmd);
  161. }
  162. /*
  163. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  164. * capable IOCB types.
  165. *
  166. * @sp: SRB command to process
  167. * @cmd_pkt: Command type 2 IOCB
  168. * @tot_dsds: Total number of segments to transfer
  169. */
  170. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  171. uint16_t tot_dsds)
  172. {
  173. uint16_t avail_dsds;
  174. uint32_t *cur_dsd;
  175. scsi_qla_host_t *vha;
  176. struct scsi_cmnd *cmd;
  177. struct scatterlist *sg;
  178. int i;
  179. cmd = GET_CMD_SP(sp);
  180. /* Update entry type to indicate Command Type 2 IOCB */
  181. *((uint32_t *)(&cmd_pkt->entry_type)) =
  182. __constant_cpu_to_le32(COMMAND_TYPE);
  183. /* No data transfer */
  184. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  185. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  186. return;
  187. }
  188. vha = sp->fcport->vha;
  189. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  190. /* Three DSDs are available in the Command Type 2 IOCB */
  191. avail_dsds = 3;
  192. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  193. /* Load data segments */
  194. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  195. cont_entry_t *cont_pkt;
  196. /* Allocate additional continuation packets? */
  197. if (avail_dsds == 0) {
  198. /*
  199. * Seven DSDs are available in the Continuation
  200. * Type 0 IOCB.
  201. */
  202. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  203. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  204. avail_dsds = 7;
  205. }
  206. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  207. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  208. avail_dsds--;
  209. }
  210. }
  211. /**
  212. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  213. * capable IOCB types.
  214. *
  215. * @sp: SRB command to process
  216. * @cmd_pkt: Command type 3 IOCB
  217. * @tot_dsds: Total number of segments to transfer
  218. */
  219. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  220. uint16_t tot_dsds)
  221. {
  222. uint16_t avail_dsds;
  223. uint32_t *cur_dsd;
  224. scsi_qla_host_t *vha;
  225. struct scsi_cmnd *cmd;
  226. struct scatterlist *sg;
  227. int i;
  228. cmd = GET_CMD_SP(sp);
  229. /* Update entry type to indicate Command Type 3 IOCB */
  230. *((uint32_t *)(&cmd_pkt->entry_type)) =
  231. __constant_cpu_to_le32(COMMAND_A64_TYPE);
  232. /* No data transfer */
  233. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  234. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  235. return;
  236. }
  237. vha = sp->fcport->vha;
  238. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  239. /* Two DSDs are available in the Command Type 3 IOCB */
  240. avail_dsds = 2;
  241. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  242. /* Load data segments */
  243. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  244. dma_addr_t sle_dma;
  245. cont_a64_entry_t *cont_pkt;
  246. /* Allocate additional continuation packets? */
  247. if (avail_dsds == 0) {
  248. /*
  249. * Five DSDs are available in the Continuation
  250. * Type 1 IOCB.
  251. */
  252. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  253. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  254. avail_dsds = 5;
  255. }
  256. sle_dma = sg_dma_address(sg);
  257. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  258. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  259. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  260. avail_dsds--;
  261. }
  262. }
  263. /**
  264. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  265. * @sp: command to send to the ISP
  266. *
  267. * Returns non-zero if a failure occurred, else zero.
  268. */
  269. int
  270. qla2x00_start_scsi(srb_t *sp)
  271. {
  272. int ret, nseg;
  273. unsigned long flags;
  274. scsi_qla_host_t *vha;
  275. struct scsi_cmnd *cmd;
  276. uint32_t *clr_ptr;
  277. uint32_t index;
  278. uint32_t handle;
  279. cmd_entry_t *cmd_pkt;
  280. uint16_t cnt;
  281. uint16_t req_cnt;
  282. uint16_t tot_dsds;
  283. struct device_reg_2xxx __iomem *reg;
  284. struct qla_hw_data *ha;
  285. struct req_que *req;
  286. struct rsp_que *rsp;
  287. char tag[2];
  288. /* Setup device pointers. */
  289. ret = 0;
  290. vha = sp->fcport->vha;
  291. ha = vha->hw;
  292. reg = &ha->iobase->isp;
  293. cmd = GET_CMD_SP(sp);
  294. req = ha->req_q_map[0];
  295. rsp = ha->rsp_q_map[0];
  296. /* So we know we haven't pci_map'ed anything yet */
  297. tot_dsds = 0;
  298. /* Send marker if required */
  299. if (vha->marker_needed != 0) {
  300. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  301. QLA_SUCCESS) {
  302. return (QLA_FUNCTION_FAILED);
  303. }
  304. vha->marker_needed = 0;
  305. }
  306. /* Acquire ring specific lock */
  307. spin_lock_irqsave(&ha->hardware_lock, flags);
  308. /* Check for room in outstanding command list. */
  309. handle = req->current_outstanding_cmd;
  310. for (index = 1; index < req->num_outstanding_cmds; index++) {
  311. handle++;
  312. if (handle == req->num_outstanding_cmds)
  313. handle = 1;
  314. if (!req->outstanding_cmds[handle])
  315. break;
  316. }
  317. if (index == req->num_outstanding_cmds)
  318. goto queuing_error;
  319. /* Map the sg table so we have an accurate count of sg entries needed */
  320. if (scsi_sg_count(cmd)) {
  321. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  322. scsi_sg_count(cmd), cmd->sc_data_direction);
  323. if (unlikely(!nseg))
  324. goto queuing_error;
  325. } else
  326. nseg = 0;
  327. tot_dsds = nseg;
  328. /* Calculate the number of request entries needed. */
  329. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  330. if (req->cnt < (req_cnt + 2)) {
  331. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  332. if (req->ring_index < cnt)
  333. req->cnt = cnt - req->ring_index;
  334. else
  335. req->cnt = req->length -
  336. (req->ring_index - cnt);
  337. /* If still no head room then bail out */
  338. if (req->cnt < (req_cnt + 2))
  339. goto queuing_error;
  340. }
  341. /* Build command packet */
  342. req->current_outstanding_cmd = handle;
  343. req->outstanding_cmds[handle] = sp;
  344. sp->handle = handle;
  345. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  346. req->cnt -= req_cnt;
  347. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  348. cmd_pkt->handle = handle;
  349. /* Zero out remaining portion of packet. */
  350. clr_ptr = (uint32_t *)cmd_pkt + 2;
  351. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  352. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  353. /* Set target ID and LUN number*/
  354. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  355. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  356. /* Update tagged queuing modifier */
  357. if (scsi_populate_tag_msg(cmd, tag)) {
  358. switch (tag[0]) {
  359. case HEAD_OF_QUEUE_TAG:
  360. cmd_pkt->control_flags =
  361. __constant_cpu_to_le16(CF_HEAD_TAG);
  362. break;
  363. case ORDERED_QUEUE_TAG:
  364. cmd_pkt->control_flags =
  365. __constant_cpu_to_le16(CF_ORDERED_TAG);
  366. break;
  367. default:
  368. cmd_pkt->control_flags =
  369. __constant_cpu_to_le16(CF_SIMPLE_TAG);
  370. break;
  371. }
  372. } else {
  373. cmd_pkt->control_flags = __constant_cpu_to_le16(CF_SIMPLE_TAG);
  374. }
  375. /* Load SCSI command packet. */
  376. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  377. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  378. /* Build IOCB segments */
  379. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  380. /* Set total data segment count. */
  381. cmd_pkt->entry_count = (uint8_t)req_cnt;
  382. wmb();
  383. /* Adjust ring index. */
  384. req->ring_index++;
  385. if (req->ring_index == req->length) {
  386. req->ring_index = 0;
  387. req->ring_ptr = req->ring;
  388. } else
  389. req->ring_ptr++;
  390. sp->flags |= SRB_DMA_VALID;
  391. /* Set chip new ring index. */
  392. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  393. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  394. /* Manage unprocessed RIO/ZIO commands in response queue. */
  395. if (vha->flags.process_response_queue &&
  396. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  397. qla2x00_process_response_queue(rsp);
  398. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  399. return (QLA_SUCCESS);
  400. queuing_error:
  401. if (tot_dsds)
  402. scsi_dma_unmap(cmd);
  403. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  404. return (QLA_FUNCTION_FAILED);
  405. }
  406. /**
  407. * qla2x00_start_iocbs() - Execute the IOCB command
  408. */
  409. void
  410. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  411. {
  412. struct qla_hw_data *ha = vha->hw;
  413. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  414. if (IS_P3P_TYPE(ha)) {
  415. qla82xx_start_iocbs(vha);
  416. } else {
  417. /* Adjust ring index. */
  418. req->ring_index++;
  419. if (req->ring_index == req->length) {
  420. req->ring_index = 0;
  421. req->ring_ptr = req->ring;
  422. } else
  423. req->ring_ptr++;
  424. /* Set chip new ring index. */
  425. if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
  426. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  427. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  428. } else if (IS_QLAFX00(ha)) {
  429. WRT_REG_DWORD(&reg->ispfx00.req_q_in, req->ring_index);
  430. RD_REG_DWORD_RELAXED(&reg->ispfx00.req_q_in);
  431. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  432. } else if (IS_FWI2_CAPABLE(ha)) {
  433. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  434. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  435. } else {
  436. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  437. req->ring_index);
  438. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  439. }
  440. }
  441. }
  442. /**
  443. * qla2x00_marker() - Send a marker IOCB to the firmware.
  444. * @ha: HA context
  445. * @loop_id: loop ID
  446. * @lun: LUN
  447. * @type: marker modifier
  448. *
  449. * Can be called from both normal and interrupt context.
  450. *
  451. * Returns non-zero if a failure occurred, else zero.
  452. */
  453. static int
  454. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  455. struct rsp_que *rsp, uint16_t loop_id,
  456. uint64_t lun, uint8_t type)
  457. {
  458. mrk_entry_t *mrk;
  459. struct mrk_entry_24xx *mrk24 = NULL;
  460. struct qla_hw_data *ha = vha->hw;
  461. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  462. req = ha->req_q_map[0];
  463. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  464. if (mrk == NULL) {
  465. ql_log(ql_log_warn, base_vha, 0x3026,
  466. "Failed to allocate Marker IOCB.\n");
  467. return (QLA_FUNCTION_FAILED);
  468. }
  469. mrk->entry_type = MARKER_TYPE;
  470. mrk->modifier = type;
  471. if (type != MK_SYNC_ALL) {
  472. if (IS_FWI2_CAPABLE(ha)) {
  473. mrk24 = (struct mrk_entry_24xx *) mrk;
  474. mrk24->nport_handle = cpu_to_le16(loop_id);
  475. int_to_scsilun(lun, (struct scsi_lun *)&mrk24->lun);
  476. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  477. mrk24->vp_index = vha->vp_idx;
  478. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  479. } else {
  480. SET_TARGET_ID(ha, mrk->target, loop_id);
  481. mrk->lun = cpu_to_le16((uint16_t)lun);
  482. }
  483. }
  484. wmb();
  485. qla2x00_start_iocbs(vha, req);
  486. return (QLA_SUCCESS);
  487. }
  488. int
  489. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  490. struct rsp_que *rsp, uint16_t loop_id, uint64_t lun,
  491. uint8_t type)
  492. {
  493. int ret;
  494. unsigned long flags = 0;
  495. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  496. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  497. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  498. return (ret);
  499. }
  500. /*
  501. * qla2x00_issue_marker
  502. *
  503. * Issue marker
  504. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  505. * Might release it, then reaquire.
  506. */
  507. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  508. {
  509. if (ha_locked) {
  510. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  511. MK_SYNC_ALL) != QLA_SUCCESS)
  512. return QLA_FUNCTION_FAILED;
  513. } else {
  514. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  515. MK_SYNC_ALL) != QLA_SUCCESS)
  516. return QLA_FUNCTION_FAILED;
  517. }
  518. vha->marker_needed = 0;
  519. return QLA_SUCCESS;
  520. }
  521. static inline int
  522. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  523. uint16_t tot_dsds)
  524. {
  525. uint32_t *cur_dsd = NULL;
  526. scsi_qla_host_t *vha;
  527. struct qla_hw_data *ha;
  528. struct scsi_cmnd *cmd;
  529. struct scatterlist *cur_seg;
  530. uint32_t *dsd_seg;
  531. void *next_dsd;
  532. uint8_t avail_dsds;
  533. uint8_t first_iocb = 1;
  534. uint32_t dsd_list_len;
  535. struct dsd_dma *dsd_ptr;
  536. struct ct6_dsd *ctx;
  537. cmd = GET_CMD_SP(sp);
  538. /* Update entry type to indicate Command Type 3 IOCB */
  539. *((uint32_t *)(&cmd_pkt->entry_type)) =
  540. __constant_cpu_to_le32(COMMAND_TYPE_6);
  541. /* No data transfer */
  542. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  543. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  544. return 0;
  545. }
  546. vha = sp->fcport->vha;
  547. ha = vha->hw;
  548. /* Set transfer direction */
  549. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  550. cmd_pkt->control_flags =
  551. __constant_cpu_to_le16(CF_WRITE_DATA);
  552. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  553. vha->qla_stats.output_requests++;
  554. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  555. cmd_pkt->control_flags =
  556. __constant_cpu_to_le16(CF_READ_DATA);
  557. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  558. vha->qla_stats.input_requests++;
  559. }
  560. cur_seg = scsi_sglist(cmd);
  561. ctx = GET_CMD_CTX_SP(sp);
  562. while (tot_dsds) {
  563. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  564. QLA_DSDS_PER_IOCB : tot_dsds;
  565. tot_dsds -= avail_dsds;
  566. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  567. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  568. struct dsd_dma, list);
  569. next_dsd = dsd_ptr->dsd_addr;
  570. list_del(&dsd_ptr->list);
  571. ha->gbl_dsd_avail--;
  572. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  573. ctx->dsd_use_cnt++;
  574. ha->gbl_dsd_inuse++;
  575. if (first_iocb) {
  576. first_iocb = 0;
  577. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  578. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  579. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  580. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  581. } else {
  582. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  583. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  584. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  585. }
  586. cur_dsd = (uint32_t *)next_dsd;
  587. while (avail_dsds) {
  588. dma_addr_t sle_dma;
  589. sle_dma = sg_dma_address(cur_seg);
  590. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  591. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  592. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  593. cur_seg = sg_next(cur_seg);
  594. avail_dsds--;
  595. }
  596. }
  597. /* Null termination */
  598. *cur_dsd++ = 0;
  599. *cur_dsd++ = 0;
  600. *cur_dsd++ = 0;
  601. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  602. return 0;
  603. }
  604. /*
  605. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  606. * for Command Type 6.
  607. *
  608. * @dsds: number of data segment decriptors needed
  609. *
  610. * Returns the number of dsd list needed to store @dsds.
  611. */
  612. inline uint16_t
  613. qla24xx_calc_dsd_lists(uint16_t dsds)
  614. {
  615. uint16_t dsd_lists = 0;
  616. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  617. if (dsds % QLA_DSDS_PER_IOCB)
  618. dsd_lists++;
  619. return dsd_lists;
  620. }
  621. /**
  622. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  623. * IOCB types.
  624. *
  625. * @sp: SRB command to process
  626. * @cmd_pkt: Command type 3 IOCB
  627. * @tot_dsds: Total number of segments to transfer
  628. */
  629. inline void
  630. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  631. uint16_t tot_dsds)
  632. {
  633. uint16_t avail_dsds;
  634. uint32_t *cur_dsd;
  635. scsi_qla_host_t *vha;
  636. struct scsi_cmnd *cmd;
  637. struct scatterlist *sg;
  638. int i;
  639. struct req_que *req;
  640. cmd = GET_CMD_SP(sp);
  641. /* Update entry type to indicate Command Type 3 IOCB */
  642. *((uint32_t *)(&cmd_pkt->entry_type)) =
  643. __constant_cpu_to_le32(COMMAND_TYPE_7);
  644. /* No data transfer */
  645. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  646. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  647. return;
  648. }
  649. vha = sp->fcport->vha;
  650. req = vha->req;
  651. /* Set transfer direction */
  652. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  653. cmd_pkt->task_mgmt_flags =
  654. __constant_cpu_to_le16(TMF_WRITE_DATA);
  655. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  656. vha->qla_stats.output_requests++;
  657. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  658. cmd_pkt->task_mgmt_flags =
  659. __constant_cpu_to_le16(TMF_READ_DATA);
  660. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  661. vha->qla_stats.input_requests++;
  662. }
  663. /* One DSD is available in the Command Type 3 IOCB */
  664. avail_dsds = 1;
  665. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  666. /* Load data segments */
  667. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  668. dma_addr_t sle_dma;
  669. cont_a64_entry_t *cont_pkt;
  670. /* Allocate additional continuation packets? */
  671. if (avail_dsds == 0) {
  672. /*
  673. * Five DSDs are available in the Continuation
  674. * Type 1 IOCB.
  675. */
  676. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  677. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  678. avail_dsds = 5;
  679. }
  680. sle_dma = sg_dma_address(sg);
  681. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  682. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  683. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  684. avail_dsds--;
  685. }
  686. }
  687. struct fw_dif_context {
  688. uint32_t ref_tag;
  689. uint16_t app_tag;
  690. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  691. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  692. };
  693. /*
  694. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  695. *
  696. */
  697. static inline void
  698. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  699. unsigned int protcnt)
  700. {
  701. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  702. switch (scsi_get_prot_type(cmd)) {
  703. case SCSI_PROT_DIF_TYPE0:
  704. /*
  705. * No check for ql2xenablehba_err_chk, as it would be an
  706. * I/O error if hba tag generation is not done.
  707. */
  708. pkt->ref_tag = cpu_to_le32((uint32_t)
  709. (0xffffffff & scsi_get_lba(cmd)));
  710. if (!qla2x00_hba_err_chk_enabled(sp))
  711. break;
  712. pkt->ref_tag_mask[0] = 0xff;
  713. pkt->ref_tag_mask[1] = 0xff;
  714. pkt->ref_tag_mask[2] = 0xff;
  715. pkt->ref_tag_mask[3] = 0xff;
  716. break;
  717. /*
  718. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  719. * match LBA in CDB + N
  720. */
  721. case SCSI_PROT_DIF_TYPE2:
  722. pkt->app_tag = __constant_cpu_to_le16(0);
  723. pkt->app_tag_mask[0] = 0x0;
  724. pkt->app_tag_mask[1] = 0x0;
  725. pkt->ref_tag = cpu_to_le32((uint32_t)
  726. (0xffffffff & scsi_get_lba(cmd)));
  727. if (!qla2x00_hba_err_chk_enabled(sp))
  728. break;
  729. /* enable ALL bytes of the ref tag */
  730. pkt->ref_tag_mask[0] = 0xff;
  731. pkt->ref_tag_mask[1] = 0xff;
  732. pkt->ref_tag_mask[2] = 0xff;
  733. pkt->ref_tag_mask[3] = 0xff;
  734. break;
  735. /* For Type 3 protection: 16 bit GUARD only */
  736. case SCSI_PROT_DIF_TYPE3:
  737. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  738. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  739. 0x00;
  740. break;
  741. /*
  742. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  743. * 16 bit app tag.
  744. */
  745. case SCSI_PROT_DIF_TYPE1:
  746. pkt->ref_tag = cpu_to_le32((uint32_t)
  747. (0xffffffff & scsi_get_lba(cmd)));
  748. pkt->app_tag = __constant_cpu_to_le16(0);
  749. pkt->app_tag_mask[0] = 0x0;
  750. pkt->app_tag_mask[1] = 0x0;
  751. if (!qla2x00_hba_err_chk_enabled(sp))
  752. break;
  753. /* enable ALL bytes of the ref tag */
  754. pkt->ref_tag_mask[0] = 0xff;
  755. pkt->ref_tag_mask[1] = 0xff;
  756. pkt->ref_tag_mask[2] = 0xff;
  757. pkt->ref_tag_mask[3] = 0xff;
  758. break;
  759. }
  760. }
  761. struct qla2_sgx {
  762. dma_addr_t dma_addr; /* OUT */
  763. uint32_t dma_len; /* OUT */
  764. uint32_t tot_bytes; /* IN */
  765. struct scatterlist *cur_sg; /* IN */
  766. /* for book keeping, bzero on initial invocation */
  767. uint32_t bytes_consumed;
  768. uint32_t num_bytes;
  769. uint32_t tot_partial;
  770. /* for debugging */
  771. uint32_t num_sg;
  772. srb_t *sp;
  773. };
  774. static int
  775. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  776. uint32_t *partial)
  777. {
  778. struct scatterlist *sg;
  779. uint32_t cumulative_partial, sg_len;
  780. dma_addr_t sg_dma_addr;
  781. if (sgx->num_bytes == sgx->tot_bytes)
  782. return 0;
  783. sg = sgx->cur_sg;
  784. cumulative_partial = sgx->tot_partial;
  785. sg_dma_addr = sg_dma_address(sg);
  786. sg_len = sg_dma_len(sg);
  787. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  788. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  789. sgx->dma_len = (blk_sz - cumulative_partial);
  790. sgx->tot_partial = 0;
  791. sgx->num_bytes += blk_sz;
  792. *partial = 0;
  793. } else {
  794. sgx->dma_len = sg_len - sgx->bytes_consumed;
  795. sgx->tot_partial += sgx->dma_len;
  796. *partial = 1;
  797. }
  798. sgx->bytes_consumed += sgx->dma_len;
  799. if (sg_len == sgx->bytes_consumed) {
  800. sg = sg_next(sg);
  801. sgx->num_sg++;
  802. sgx->cur_sg = sg;
  803. sgx->bytes_consumed = 0;
  804. }
  805. return 1;
  806. }
  807. int
  808. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  809. uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  810. {
  811. void *next_dsd;
  812. uint8_t avail_dsds = 0;
  813. uint32_t dsd_list_len;
  814. struct dsd_dma *dsd_ptr;
  815. struct scatterlist *sg_prot;
  816. uint32_t *cur_dsd = dsd;
  817. uint16_t used_dsds = tot_dsds;
  818. uint32_t prot_int; /* protection interval */
  819. uint32_t partial;
  820. struct qla2_sgx sgx;
  821. dma_addr_t sle_dma;
  822. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  823. struct scsi_cmnd *cmd;
  824. struct scsi_qla_host *vha;
  825. memset(&sgx, 0, sizeof(struct qla2_sgx));
  826. if (sp) {
  827. vha = sp->fcport->vha;
  828. cmd = GET_CMD_SP(sp);
  829. prot_int = cmd->device->sector_size;
  830. sgx.tot_bytes = scsi_bufflen(cmd);
  831. sgx.cur_sg = scsi_sglist(cmd);
  832. sgx.sp = sp;
  833. sg_prot = scsi_prot_sglist(cmd);
  834. } else if (tc) {
  835. vha = tc->vha;
  836. prot_int = tc->blk_sz;
  837. sgx.tot_bytes = tc->bufflen;
  838. sgx.cur_sg = tc->sg;
  839. sg_prot = tc->prot_sg;
  840. } else {
  841. BUG();
  842. return 1;
  843. }
  844. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  845. sle_dma = sgx.dma_addr;
  846. sle_dma_len = sgx.dma_len;
  847. alloc_and_fill:
  848. /* Allocate additional continuation packets? */
  849. if (avail_dsds == 0) {
  850. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  851. QLA_DSDS_PER_IOCB : used_dsds;
  852. dsd_list_len = (avail_dsds + 1) * 12;
  853. used_dsds -= avail_dsds;
  854. /* allocate tracking DS */
  855. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  856. if (!dsd_ptr)
  857. return 1;
  858. /* allocate new list */
  859. dsd_ptr->dsd_addr = next_dsd =
  860. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  861. &dsd_ptr->dsd_list_dma);
  862. if (!next_dsd) {
  863. /*
  864. * Need to cleanup only this dsd_ptr, rest
  865. * will be done by sp_free_dma()
  866. */
  867. kfree(dsd_ptr);
  868. return 1;
  869. }
  870. if (sp) {
  871. list_add_tail(&dsd_ptr->list,
  872. &((struct crc_context *)
  873. sp->u.scmd.ctx)->dsd_list);
  874. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  875. } else {
  876. list_add_tail(&dsd_ptr->list,
  877. &(tc->ctx->dsd_list));
  878. tc->ctx_dsd_alloced = 1;
  879. }
  880. /* add new list to cmd iocb or last list */
  881. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  882. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  883. *cur_dsd++ = dsd_list_len;
  884. cur_dsd = (uint32_t *)next_dsd;
  885. }
  886. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  887. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  888. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  889. avail_dsds--;
  890. if (partial == 0) {
  891. /* Got a full protection interval */
  892. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  893. sle_dma_len = 8;
  894. tot_prot_dma_len += sle_dma_len;
  895. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  896. tot_prot_dma_len = 0;
  897. sg_prot = sg_next(sg_prot);
  898. }
  899. partial = 1; /* So as to not re-enter this block */
  900. goto alloc_and_fill;
  901. }
  902. }
  903. /* Null termination */
  904. *cur_dsd++ = 0;
  905. *cur_dsd++ = 0;
  906. *cur_dsd++ = 0;
  907. return 0;
  908. }
  909. int
  910. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  911. uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  912. {
  913. void *next_dsd;
  914. uint8_t avail_dsds = 0;
  915. uint32_t dsd_list_len;
  916. struct dsd_dma *dsd_ptr;
  917. struct scatterlist *sg, *sgl;
  918. uint32_t *cur_dsd = dsd;
  919. int i;
  920. uint16_t used_dsds = tot_dsds;
  921. struct scsi_cmnd *cmd;
  922. struct scsi_qla_host *vha;
  923. if (sp) {
  924. cmd = GET_CMD_SP(sp);
  925. sgl = scsi_sglist(cmd);
  926. vha = sp->fcport->vha;
  927. } else if (tc) {
  928. sgl = tc->sg;
  929. vha = tc->vha;
  930. } else {
  931. BUG();
  932. return 1;
  933. }
  934. for_each_sg(sgl, sg, tot_dsds, i) {
  935. dma_addr_t sle_dma;
  936. /* Allocate additional continuation packets? */
  937. if (avail_dsds == 0) {
  938. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  939. QLA_DSDS_PER_IOCB : used_dsds;
  940. dsd_list_len = (avail_dsds + 1) * 12;
  941. used_dsds -= avail_dsds;
  942. /* allocate tracking DS */
  943. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  944. if (!dsd_ptr)
  945. return 1;
  946. /* allocate new list */
  947. dsd_ptr->dsd_addr = next_dsd =
  948. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  949. &dsd_ptr->dsd_list_dma);
  950. if (!next_dsd) {
  951. /*
  952. * Need to cleanup only this dsd_ptr, rest
  953. * will be done by sp_free_dma()
  954. */
  955. kfree(dsd_ptr);
  956. return 1;
  957. }
  958. if (sp) {
  959. list_add_tail(&dsd_ptr->list,
  960. &((struct crc_context *)
  961. sp->u.scmd.ctx)->dsd_list);
  962. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  963. } else {
  964. list_add_tail(&dsd_ptr->list,
  965. &(tc->ctx->dsd_list));
  966. tc->ctx_dsd_alloced = 1;
  967. }
  968. /* add new list to cmd iocb or last list */
  969. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  970. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  971. *cur_dsd++ = dsd_list_len;
  972. cur_dsd = (uint32_t *)next_dsd;
  973. }
  974. sle_dma = sg_dma_address(sg);
  975. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  976. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  977. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  978. avail_dsds--;
  979. }
  980. /* Null termination */
  981. *cur_dsd++ = 0;
  982. *cur_dsd++ = 0;
  983. *cur_dsd++ = 0;
  984. return 0;
  985. }
  986. int
  987. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  988. uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  989. {
  990. void *next_dsd;
  991. uint8_t avail_dsds = 0;
  992. uint32_t dsd_list_len;
  993. struct dsd_dma *dsd_ptr;
  994. struct scatterlist *sg, *sgl;
  995. int i;
  996. struct scsi_cmnd *cmd;
  997. uint32_t *cur_dsd = dsd;
  998. uint16_t used_dsds = tot_dsds;
  999. struct scsi_qla_host *vha;
  1000. if (sp) {
  1001. cmd = GET_CMD_SP(sp);
  1002. sgl = scsi_prot_sglist(cmd);
  1003. vha = sp->fcport->vha;
  1004. } else if (tc) {
  1005. vha = tc->vha;
  1006. sgl = tc->prot_sg;
  1007. } else {
  1008. BUG();
  1009. return 1;
  1010. }
  1011. ql_dbg(ql_dbg_tgt, vha, 0xe021,
  1012. "%s: enter\n", __func__);
  1013. for_each_sg(sgl, sg, tot_dsds, i) {
  1014. dma_addr_t sle_dma;
  1015. /* Allocate additional continuation packets? */
  1016. if (avail_dsds == 0) {
  1017. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  1018. QLA_DSDS_PER_IOCB : used_dsds;
  1019. dsd_list_len = (avail_dsds + 1) * 12;
  1020. used_dsds -= avail_dsds;
  1021. /* allocate tracking DS */
  1022. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1023. if (!dsd_ptr)
  1024. return 1;
  1025. /* allocate new list */
  1026. dsd_ptr->dsd_addr = next_dsd =
  1027. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  1028. &dsd_ptr->dsd_list_dma);
  1029. if (!next_dsd) {
  1030. /*
  1031. * Need to cleanup only this dsd_ptr, rest
  1032. * will be done by sp_free_dma()
  1033. */
  1034. kfree(dsd_ptr);
  1035. return 1;
  1036. }
  1037. if (sp) {
  1038. list_add_tail(&dsd_ptr->list,
  1039. &((struct crc_context *)
  1040. sp->u.scmd.ctx)->dsd_list);
  1041. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  1042. } else {
  1043. list_add_tail(&dsd_ptr->list,
  1044. &(tc->ctx->dsd_list));
  1045. tc->ctx_dsd_alloced = 1;
  1046. }
  1047. /* add new list to cmd iocb or last list */
  1048. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  1049. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  1050. *cur_dsd++ = dsd_list_len;
  1051. cur_dsd = (uint32_t *)next_dsd;
  1052. }
  1053. sle_dma = sg_dma_address(sg);
  1054. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1055. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1056. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1057. avail_dsds--;
  1058. }
  1059. /* Null termination */
  1060. *cur_dsd++ = 0;
  1061. *cur_dsd++ = 0;
  1062. *cur_dsd++ = 0;
  1063. return 0;
  1064. }
  1065. /**
  1066. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1067. * Type 6 IOCB types.
  1068. *
  1069. * @sp: SRB command to process
  1070. * @cmd_pkt: Command type 3 IOCB
  1071. * @tot_dsds: Total number of segments to transfer
  1072. */
  1073. static inline int
  1074. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1075. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1076. {
  1077. uint32_t *cur_dsd, *fcp_dl;
  1078. scsi_qla_host_t *vha;
  1079. struct scsi_cmnd *cmd;
  1080. int sgc;
  1081. uint32_t total_bytes = 0;
  1082. uint32_t data_bytes;
  1083. uint32_t dif_bytes;
  1084. uint8_t bundling = 1;
  1085. uint16_t blk_size;
  1086. uint8_t *clr_ptr;
  1087. struct crc_context *crc_ctx_pkt = NULL;
  1088. struct qla_hw_data *ha;
  1089. uint8_t additional_fcpcdb_len;
  1090. uint16_t fcp_cmnd_len;
  1091. struct fcp_cmnd *fcp_cmnd;
  1092. dma_addr_t crc_ctx_dma;
  1093. char tag[2];
  1094. cmd = GET_CMD_SP(sp);
  1095. sgc = 0;
  1096. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1097. *((uint32_t *)(&cmd_pkt->entry_type)) =
  1098. __constant_cpu_to_le32(COMMAND_TYPE_CRC_2);
  1099. vha = sp->fcport->vha;
  1100. ha = vha->hw;
  1101. /* No data transfer */
  1102. data_bytes = scsi_bufflen(cmd);
  1103. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1104. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1105. return QLA_SUCCESS;
  1106. }
  1107. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1108. /* Set transfer direction */
  1109. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1110. cmd_pkt->control_flags =
  1111. __constant_cpu_to_le16(CF_WRITE_DATA);
  1112. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1113. cmd_pkt->control_flags =
  1114. __constant_cpu_to_le16(CF_READ_DATA);
  1115. }
  1116. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1117. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1118. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1119. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1120. bundling = 0;
  1121. /* Allocate CRC context from global pool */
  1122. crc_ctx_pkt = sp->u.scmd.ctx =
  1123. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1124. if (!crc_ctx_pkt)
  1125. goto crc_queuing_error;
  1126. /* Zero out CTX area. */
  1127. clr_ptr = (uint8_t *)crc_ctx_pkt;
  1128. memset(clr_ptr, 0, sizeof(*crc_ctx_pkt));
  1129. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1130. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1131. /* Set handle */
  1132. crc_ctx_pkt->handle = cmd_pkt->handle;
  1133. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1134. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1135. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1136. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1137. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1138. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1139. /* Determine SCSI command length -- align to 4 byte boundary */
  1140. if (cmd->cmd_len > 16) {
  1141. additional_fcpcdb_len = cmd->cmd_len - 16;
  1142. if ((cmd->cmd_len % 4) != 0) {
  1143. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1144. goto crc_queuing_error;
  1145. }
  1146. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1147. } else {
  1148. additional_fcpcdb_len = 0;
  1149. fcp_cmnd_len = 12 + 16 + 4;
  1150. }
  1151. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1152. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1153. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1154. fcp_cmnd->additional_cdb_len |= 1;
  1155. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1156. fcp_cmnd->additional_cdb_len |= 2;
  1157. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1158. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1159. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1160. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1161. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1162. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1163. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1164. fcp_cmnd->task_management = 0;
  1165. /*
  1166. * Update tagged queuing modifier if using command tag queuing
  1167. */
  1168. if (scsi_populate_tag_msg(cmd, tag)) {
  1169. switch (tag[0]) {
  1170. case HEAD_OF_QUEUE_TAG:
  1171. fcp_cmnd->task_attribute = TSK_HEAD_OF_QUEUE;
  1172. break;
  1173. case ORDERED_QUEUE_TAG:
  1174. fcp_cmnd->task_attribute = TSK_ORDERED;
  1175. break;
  1176. default:
  1177. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1178. break;
  1179. }
  1180. } else {
  1181. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1182. }
  1183. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1184. /* Compute dif len and adjust data len to incude protection */
  1185. dif_bytes = 0;
  1186. blk_size = cmd->device->sector_size;
  1187. dif_bytes = (data_bytes / blk_size) * 8;
  1188. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1189. case SCSI_PROT_READ_INSERT:
  1190. case SCSI_PROT_WRITE_STRIP:
  1191. total_bytes = data_bytes;
  1192. data_bytes += dif_bytes;
  1193. break;
  1194. case SCSI_PROT_READ_STRIP:
  1195. case SCSI_PROT_WRITE_INSERT:
  1196. case SCSI_PROT_READ_PASS:
  1197. case SCSI_PROT_WRITE_PASS:
  1198. total_bytes = data_bytes + dif_bytes;
  1199. break;
  1200. default:
  1201. BUG();
  1202. }
  1203. if (!qla2x00_hba_err_chk_enabled(sp))
  1204. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1205. /* HBA error checking enabled */
  1206. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1207. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1208. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1209. SCSI_PROT_DIF_TYPE2))
  1210. fw_prot_opts |= BIT_10;
  1211. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1212. SCSI_PROT_DIF_TYPE3)
  1213. fw_prot_opts |= BIT_11;
  1214. }
  1215. if (!bundling) {
  1216. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1217. } else {
  1218. /*
  1219. * Configure Bundling if we need to fetch interlaving
  1220. * protection PCI accesses
  1221. */
  1222. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1223. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1224. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1225. tot_prot_dsds);
  1226. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1227. }
  1228. /* Finish the common fields of CRC pkt */
  1229. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1230. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1231. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1232. crc_ctx_pkt->guard_seed = __constant_cpu_to_le16(0);
  1233. /* Fibre channel byte count */
  1234. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1235. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1236. additional_fcpcdb_len);
  1237. *fcp_dl = htonl(total_bytes);
  1238. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1239. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1240. return QLA_SUCCESS;
  1241. }
  1242. /* Walks data segments */
  1243. cmd_pkt->control_flags |=
  1244. __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1245. if (!bundling && tot_prot_dsds) {
  1246. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1247. cur_dsd, tot_dsds, NULL))
  1248. goto crc_queuing_error;
  1249. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1250. (tot_dsds - tot_prot_dsds), NULL))
  1251. goto crc_queuing_error;
  1252. if (bundling && tot_prot_dsds) {
  1253. /* Walks dif segments */
  1254. cmd_pkt->control_flags |=
  1255. __constant_cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1256. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1257. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1258. tot_prot_dsds, NULL))
  1259. goto crc_queuing_error;
  1260. }
  1261. return QLA_SUCCESS;
  1262. crc_queuing_error:
  1263. /* Cleanup will be performed by the caller */
  1264. return QLA_FUNCTION_FAILED;
  1265. }
  1266. /**
  1267. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1268. * @sp: command to send to the ISP
  1269. *
  1270. * Returns non-zero if a failure occurred, else zero.
  1271. */
  1272. int
  1273. qla24xx_start_scsi(srb_t *sp)
  1274. {
  1275. int ret, nseg;
  1276. unsigned long flags;
  1277. uint32_t *clr_ptr;
  1278. uint32_t index;
  1279. uint32_t handle;
  1280. struct cmd_type_7 *cmd_pkt;
  1281. uint16_t cnt;
  1282. uint16_t req_cnt;
  1283. uint16_t tot_dsds;
  1284. struct req_que *req = NULL;
  1285. struct rsp_que *rsp = NULL;
  1286. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1287. struct scsi_qla_host *vha = sp->fcport->vha;
  1288. struct qla_hw_data *ha = vha->hw;
  1289. char tag[2];
  1290. /* Setup device pointers. */
  1291. ret = 0;
  1292. qla25xx_set_que(sp, &rsp);
  1293. req = vha->req;
  1294. /* So we know we haven't pci_map'ed anything yet */
  1295. tot_dsds = 0;
  1296. /* Send marker if required */
  1297. if (vha->marker_needed != 0) {
  1298. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1299. QLA_SUCCESS)
  1300. return QLA_FUNCTION_FAILED;
  1301. vha->marker_needed = 0;
  1302. }
  1303. /* Acquire ring specific lock */
  1304. spin_lock_irqsave(&ha->hardware_lock, flags);
  1305. /* Check for room in outstanding command list. */
  1306. handle = req->current_outstanding_cmd;
  1307. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1308. handle++;
  1309. if (handle == req->num_outstanding_cmds)
  1310. handle = 1;
  1311. if (!req->outstanding_cmds[handle])
  1312. break;
  1313. }
  1314. if (index == req->num_outstanding_cmds)
  1315. goto queuing_error;
  1316. /* Map the sg table so we have an accurate count of sg entries needed */
  1317. if (scsi_sg_count(cmd)) {
  1318. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1319. scsi_sg_count(cmd), cmd->sc_data_direction);
  1320. if (unlikely(!nseg))
  1321. goto queuing_error;
  1322. } else
  1323. nseg = 0;
  1324. tot_dsds = nseg;
  1325. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1326. if (req->cnt < (req_cnt + 2)) {
  1327. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1328. RD_REG_DWORD_RELAXED(req->req_q_out);
  1329. if (req->ring_index < cnt)
  1330. req->cnt = cnt - req->ring_index;
  1331. else
  1332. req->cnt = req->length -
  1333. (req->ring_index - cnt);
  1334. if (req->cnt < (req_cnt + 2))
  1335. goto queuing_error;
  1336. }
  1337. /* Build command packet. */
  1338. req->current_outstanding_cmd = handle;
  1339. req->outstanding_cmds[handle] = sp;
  1340. sp->handle = handle;
  1341. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1342. req->cnt -= req_cnt;
  1343. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1344. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1345. /* Zero out remaining portion of packet. */
  1346. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1347. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1348. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1349. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1350. /* Set NPORT-ID and LUN number*/
  1351. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1352. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1353. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1354. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1355. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1356. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1357. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1358. /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1359. if (scsi_populate_tag_msg(cmd, tag)) {
  1360. switch (tag[0]) {
  1361. case HEAD_OF_QUEUE_TAG:
  1362. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  1363. break;
  1364. case ORDERED_QUEUE_TAG:
  1365. cmd_pkt->task = TSK_ORDERED;
  1366. break;
  1367. default:
  1368. cmd_pkt->task = TSK_SIMPLE;
  1369. break;
  1370. }
  1371. } else {
  1372. cmd_pkt->task = TSK_SIMPLE;
  1373. }
  1374. /* Load SCSI command packet. */
  1375. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1376. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1377. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1378. /* Build IOCB segments */
  1379. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  1380. /* Set total data segment count. */
  1381. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1382. /* Specify response queue number where completion should happen */
  1383. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1384. wmb();
  1385. /* Adjust ring index. */
  1386. req->ring_index++;
  1387. if (req->ring_index == req->length) {
  1388. req->ring_index = 0;
  1389. req->ring_ptr = req->ring;
  1390. } else
  1391. req->ring_ptr++;
  1392. sp->flags |= SRB_DMA_VALID;
  1393. /* Set chip new ring index. */
  1394. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1395. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1396. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1397. if (vha->flags.process_response_queue &&
  1398. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1399. qla24xx_process_response_queue(vha, rsp);
  1400. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1401. return QLA_SUCCESS;
  1402. queuing_error:
  1403. if (tot_dsds)
  1404. scsi_dma_unmap(cmd);
  1405. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1406. return QLA_FUNCTION_FAILED;
  1407. }
  1408. /**
  1409. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1410. * @sp: command to send to the ISP
  1411. *
  1412. * Returns non-zero if a failure occurred, else zero.
  1413. */
  1414. int
  1415. qla24xx_dif_start_scsi(srb_t *sp)
  1416. {
  1417. int nseg;
  1418. unsigned long flags;
  1419. uint32_t *clr_ptr;
  1420. uint32_t index;
  1421. uint32_t handle;
  1422. uint16_t cnt;
  1423. uint16_t req_cnt = 0;
  1424. uint16_t tot_dsds;
  1425. uint16_t tot_prot_dsds;
  1426. uint16_t fw_prot_opts = 0;
  1427. struct req_que *req = NULL;
  1428. struct rsp_que *rsp = NULL;
  1429. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1430. struct scsi_qla_host *vha = sp->fcport->vha;
  1431. struct qla_hw_data *ha = vha->hw;
  1432. struct cmd_type_crc_2 *cmd_pkt;
  1433. uint32_t status = 0;
  1434. #define QDSS_GOT_Q_SPACE BIT_0
  1435. /* Only process protection or >16 cdb in this routine */
  1436. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1437. if (cmd->cmd_len <= 16)
  1438. return qla24xx_start_scsi(sp);
  1439. }
  1440. /* Setup device pointers. */
  1441. qla25xx_set_que(sp, &rsp);
  1442. req = vha->req;
  1443. /* So we know we haven't pci_map'ed anything yet */
  1444. tot_dsds = 0;
  1445. /* Send marker if required */
  1446. if (vha->marker_needed != 0) {
  1447. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1448. QLA_SUCCESS)
  1449. return QLA_FUNCTION_FAILED;
  1450. vha->marker_needed = 0;
  1451. }
  1452. /* Acquire ring specific lock */
  1453. spin_lock_irqsave(&ha->hardware_lock, flags);
  1454. /* Check for room in outstanding command list. */
  1455. handle = req->current_outstanding_cmd;
  1456. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1457. handle++;
  1458. if (handle == req->num_outstanding_cmds)
  1459. handle = 1;
  1460. if (!req->outstanding_cmds[handle])
  1461. break;
  1462. }
  1463. if (index == req->num_outstanding_cmds)
  1464. goto queuing_error;
  1465. /* Compute number of required data segments */
  1466. /* Map the sg table so we have an accurate count of sg entries needed */
  1467. if (scsi_sg_count(cmd)) {
  1468. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1469. scsi_sg_count(cmd), cmd->sc_data_direction);
  1470. if (unlikely(!nseg))
  1471. goto queuing_error;
  1472. else
  1473. sp->flags |= SRB_DMA_VALID;
  1474. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1475. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1476. struct qla2_sgx sgx;
  1477. uint32_t partial;
  1478. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1479. sgx.tot_bytes = scsi_bufflen(cmd);
  1480. sgx.cur_sg = scsi_sglist(cmd);
  1481. sgx.sp = sp;
  1482. nseg = 0;
  1483. while (qla24xx_get_one_block_sg(
  1484. cmd->device->sector_size, &sgx, &partial))
  1485. nseg++;
  1486. }
  1487. } else
  1488. nseg = 0;
  1489. /* number of required data segments */
  1490. tot_dsds = nseg;
  1491. /* Compute number of required protection segments */
  1492. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1493. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1494. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1495. if (unlikely(!nseg))
  1496. goto queuing_error;
  1497. else
  1498. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1499. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1500. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1501. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1502. }
  1503. } else {
  1504. nseg = 0;
  1505. }
  1506. req_cnt = 1;
  1507. /* Total Data and protection sg segment(s) */
  1508. tot_prot_dsds = nseg;
  1509. tot_dsds += nseg;
  1510. if (req->cnt < (req_cnt + 2)) {
  1511. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1512. RD_REG_DWORD_RELAXED(req->req_q_out);
  1513. if (req->ring_index < cnt)
  1514. req->cnt = cnt - req->ring_index;
  1515. else
  1516. req->cnt = req->length -
  1517. (req->ring_index - cnt);
  1518. if (req->cnt < (req_cnt + 2))
  1519. goto queuing_error;
  1520. }
  1521. status |= QDSS_GOT_Q_SPACE;
  1522. /* Build header part of command packet (excluding the OPCODE). */
  1523. req->current_outstanding_cmd = handle;
  1524. req->outstanding_cmds[handle] = sp;
  1525. sp->handle = handle;
  1526. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1527. req->cnt -= req_cnt;
  1528. /* Fill-in common area */
  1529. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1530. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1531. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1532. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1533. /* Set NPORT-ID and LUN number*/
  1534. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1535. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1536. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1537. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1538. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1539. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1540. /* Total Data and protection segment(s) */
  1541. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1542. /* Build IOCB segments and adjust for data protection segments */
  1543. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1544. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1545. QLA_SUCCESS)
  1546. goto queuing_error;
  1547. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1548. /* Specify response queue number where completion should happen */
  1549. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1550. cmd_pkt->timeout = __constant_cpu_to_le16(0);
  1551. wmb();
  1552. /* Adjust ring index. */
  1553. req->ring_index++;
  1554. if (req->ring_index == req->length) {
  1555. req->ring_index = 0;
  1556. req->ring_ptr = req->ring;
  1557. } else
  1558. req->ring_ptr++;
  1559. /* Set chip new ring index. */
  1560. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1561. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1562. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1563. if (vha->flags.process_response_queue &&
  1564. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1565. qla24xx_process_response_queue(vha, rsp);
  1566. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1567. return QLA_SUCCESS;
  1568. queuing_error:
  1569. if (status & QDSS_GOT_Q_SPACE) {
  1570. req->outstanding_cmds[handle] = NULL;
  1571. req->cnt += req_cnt;
  1572. }
  1573. /* Cleanup will be performed by the caller (queuecommand) */
  1574. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1575. return QLA_FUNCTION_FAILED;
  1576. }
  1577. static void qla25xx_set_que(srb_t *sp, struct rsp_que **rsp)
  1578. {
  1579. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1580. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1581. int affinity = cmd->request->cpu;
  1582. if (ha->flags.cpu_affinity_enabled && affinity >= 0 &&
  1583. affinity < ha->max_rsp_queues - 1)
  1584. *rsp = ha->rsp_q_map[affinity + 1];
  1585. else
  1586. *rsp = ha->rsp_q_map[0];
  1587. }
  1588. /* Generic Control-SRB manipulation functions. */
  1589. /* hardware_lock assumed to be held. */
  1590. void *
  1591. qla2x00_alloc_iocbs_ready(scsi_qla_host_t *vha, srb_t *sp)
  1592. {
  1593. if (qla2x00_reset_active(vha))
  1594. return NULL;
  1595. return qla2x00_alloc_iocbs(vha, sp);
  1596. }
  1597. void *
  1598. qla2x00_alloc_iocbs(scsi_qla_host_t *vha, srb_t *sp)
  1599. {
  1600. struct qla_hw_data *ha = vha->hw;
  1601. struct req_que *req = ha->req_q_map[0];
  1602. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  1603. uint32_t index, handle;
  1604. request_t *pkt;
  1605. uint16_t cnt, req_cnt;
  1606. pkt = NULL;
  1607. req_cnt = 1;
  1608. handle = 0;
  1609. if (!sp)
  1610. goto skip_cmd_array;
  1611. /* Check for room in outstanding command list. */
  1612. handle = req->current_outstanding_cmd;
  1613. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1614. handle++;
  1615. if (handle == req->num_outstanding_cmds)
  1616. handle = 1;
  1617. if (!req->outstanding_cmds[handle])
  1618. break;
  1619. }
  1620. if (index == req->num_outstanding_cmds) {
  1621. ql_log(ql_log_warn, vha, 0x700b,
  1622. "No room on outstanding cmd array.\n");
  1623. goto queuing_error;
  1624. }
  1625. /* Prep command array. */
  1626. req->current_outstanding_cmd = handle;
  1627. req->outstanding_cmds[handle] = sp;
  1628. sp->handle = handle;
  1629. /* Adjust entry-counts as needed. */
  1630. if (sp->type != SRB_SCSI_CMD)
  1631. req_cnt = sp->iocbs;
  1632. skip_cmd_array:
  1633. /* Check for room on request queue. */
  1634. if (req->cnt < req_cnt + 2) {
  1635. if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha))
  1636. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1637. else if (IS_P3P_TYPE(ha))
  1638. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1639. else if (IS_FWI2_CAPABLE(ha))
  1640. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1641. else if (IS_QLAFX00(ha))
  1642. cnt = RD_REG_DWORD(&reg->ispfx00.req_q_out);
  1643. else
  1644. cnt = qla2x00_debounce_register(
  1645. ISP_REQ_Q_OUT(ha, &reg->isp));
  1646. if (req->ring_index < cnt)
  1647. req->cnt = cnt - req->ring_index;
  1648. else
  1649. req->cnt = req->length -
  1650. (req->ring_index - cnt);
  1651. }
  1652. if (req->cnt < req_cnt + 2)
  1653. goto queuing_error;
  1654. /* Prep packet */
  1655. req->cnt -= req_cnt;
  1656. pkt = req->ring_ptr;
  1657. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1658. if (IS_QLAFX00(ha)) {
  1659. WRT_REG_BYTE((void __iomem *)&pkt->entry_count, req_cnt);
  1660. WRT_REG_WORD((void __iomem *)&pkt->handle, handle);
  1661. } else {
  1662. pkt->entry_count = req_cnt;
  1663. pkt->handle = handle;
  1664. }
  1665. queuing_error:
  1666. return pkt;
  1667. }
  1668. static void
  1669. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1670. {
  1671. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1672. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1673. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1674. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1675. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1676. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1677. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1678. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1679. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1680. logio->port_id[1] = sp->fcport->d_id.b.area;
  1681. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1682. logio->vp_index = sp->fcport->vha->vp_idx;
  1683. }
  1684. static void
  1685. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1686. {
  1687. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1688. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1689. uint16_t opts;
  1690. mbx->entry_type = MBX_IOCB_TYPE;
  1691. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1692. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1693. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1694. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1695. if (HAS_EXTENDED_IDS(ha)) {
  1696. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1697. mbx->mb10 = cpu_to_le16(opts);
  1698. } else {
  1699. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1700. }
  1701. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1702. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1703. sp->fcport->d_id.b.al_pa);
  1704. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1705. }
  1706. static void
  1707. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1708. {
  1709. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1710. logio->control_flags =
  1711. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1712. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1713. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1714. logio->port_id[1] = sp->fcport->d_id.b.area;
  1715. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1716. logio->vp_index = sp->fcport->vha->vp_idx;
  1717. }
  1718. static void
  1719. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1720. {
  1721. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1722. mbx->entry_type = MBX_IOCB_TYPE;
  1723. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1724. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1725. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1726. cpu_to_le16(sp->fcport->loop_id):
  1727. cpu_to_le16(sp->fcport->loop_id << 8);
  1728. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1729. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1730. sp->fcport->d_id.b.al_pa);
  1731. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1732. /* Implicit: mbx->mbx10 = 0. */
  1733. }
  1734. static void
  1735. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1736. {
  1737. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1738. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1739. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1740. logio->vp_index = sp->fcport->vha->vp_idx;
  1741. }
  1742. static void
  1743. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1744. {
  1745. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1746. mbx->entry_type = MBX_IOCB_TYPE;
  1747. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1748. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1749. if (HAS_EXTENDED_IDS(ha)) {
  1750. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1751. mbx->mb10 = cpu_to_le16(BIT_0);
  1752. } else {
  1753. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1754. }
  1755. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1756. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1757. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1758. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1759. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1760. }
  1761. static void
  1762. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1763. {
  1764. uint32_t flags;
  1765. uint64_t lun;
  1766. struct fc_port *fcport = sp->fcport;
  1767. scsi_qla_host_t *vha = fcport->vha;
  1768. struct qla_hw_data *ha = vha->hw;
  1769. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1770. struct req_que *req = vha->req;
  1771. flags = iocb->u.tmf.flags;
  1772. lun = iocb->u.tmf.lun;
  1773. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1774. tsk->entry_count = 1;
  1775. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  1776. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  1777. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  1778. tsk->control_flags = cpu_to_le32(flags);
  1779. tsk->port_id[0] = fcport->d_id.b.al_pa;
  1780. tsk->port_id[1] = fcport->d_id.b.area;
  1781. tsk->port_id[2] = fcport->d_id.b.domain;
  1782. tsk->vp_index = fcport->vha->vp_idx;
  1783. if (flags == TCF_LUN_RESET) {
  1784. int_to_scsilun(lun, &tsk->lun);
  1785. host_to_fcp_swap((uint8_t *)&tsk->lun,
  1786. sizeof(tsk->lun));
  1787. }
  1788. }
  1789. static void
  1790. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  1791. {
  1792. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1793. els_iocb->entry_type = ELS_IOCB_TYPE;
  1794. els_iocb->entry_count = 1;
  1795. els_iocb->sys_define = 0;
  1796. els_iocb->entry_status = 0;
  1797. els_iocb->handle = sp->handle;
  1798. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1799. els_iocb->tx_dsd_count = __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1800. els_iocb->vp_index = sp->fcport->vha->vp_idx;
  1801. els_iocb->sof_type = EST_SOFI3;
  1802. els_iocb->rx_dsd_count = __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1803. els_iocb->opcode =
  1804. sp->type == SRB_ELS_CMD_RPT ?
  1805. bsg_job->request->rqst_data.r_els.els_code :
  1806. bsg_job->request->rqst_data.h_els.command_code;
  1807. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  1808. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  1809. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  1810. els_iocb->control_flags = 0;
  1811. els_iocb->rx_byte_count =
  1812. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1813. els_iocb->tx_byte_count =
  1814. cpu_to_le32(bsg_job->request_payload.payload_len);
  1815. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1816. (bsg_job->request_payload.sg_list)));
  1817. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1818. (bsg_job->request_payload.sg_list)));
  1819. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  1820. (bsg_job->request_payload.sg_list));
  1821. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1822. (bsg_job->reply_payload.sg_list)));
  1823. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1824. (bsg_job->reply_payload.sg_list)));
  1825. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  1826. (bsg_job->reply_payload.sg_list));
  1827. sp->fcport->vha->qla_stats.control_requests++;
  1828. }
  1829. static void
  1830. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  1831. {
  1832. uint16_t avail_dsds;
  1833. uint32_t *cur_dsd;
  1834. struct scatterlist *sg;
  1835. int index;
  1836. uint16_t tot_dsds;
  1837. scsi_qla_host_t *vha = sp->fcport->vha;
  1838. struct qla_hw_data *ha = vha->hw;
  1839. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1840. int loop_iterartion = 0;
  1841. int cont_iocb_prsnt = 0;
  1842. int entry_count = 1;
  1843. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  1844. ct_iocb->entry_type = CT_IOCB_TYPE;
  1845. ct_iocb->entry_status = 0;
  1846. ct_iocb->handle1 = sp->handle;
  1847. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  1848. ct_iocb->status = __constant_cpu_to_le16(0);
  1849. ct_iocb->control_flags = __constant_cpu_to_le16(0);
  1850. ct_iocb->timeout = 0;
  1851. ct_iocb->cmd_dsd_count =
  1852. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1853. ct_iocb->total_dsd_count =
  1854. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  1855. ct_iocb->req_bytecount =
  1856. cpu_to_le32(bsg_job->request_payload.payload_len);
  1857. ct_iocb->rsp_bytecount =
  1858. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1859. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  1860. (bsg_job->request_payload.sg_list)));
  1861. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  1862. (bsg_job->request_payload.sg_list)));
  1863. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  1864. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  1865. (bsg_job->reply_payload.sg_list)));
  1866. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  1867. (bsg_job->reply_payload.sg_list)));
  1868. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  1869. avail_dsds = 1;
  1870. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  1871. index = 0;
  1872. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1873. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1874. dma_addr_t sle_dma;
  1875. cont_a64_entry_t *cont_pkt;
  1876. /* Allocate additional continuation packets? */
  1877. if (avail_dsds == 0) {
  1878. /*
  1879. * Five DSDs are available in the Cont.
  1880. * Type 1 IOCB.
  1881. */
  1882. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1883. vha->hw->req_q_map[0]);
  1884. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1885. avail_dsds = 5;
  1886. cont_iocb_prsnt = 1;
  1887. entry_count++;
  1888. }
  1889. sle_dma = sg_dma_address(sg);
  1890. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1891. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1892. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1893. loop_iterartion++;
  1894. avail_dsds--;
  1895. }
  1896. ct_iocb->entry_count = entry_count;
  1897. sp->fcport->vha->qla_stats.control_requests++;
  1898. }
  1899. static void
  1900. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  1901. {
  1902. uint16_t avail_dsds;
  1903. uint32_t *cur_dsd;
  1904. struct scatterlist *sg;
  1905. int index;
  1906. uint16_t tot_dsds;
  1907. scsi_qla_host_t *vha = sp->fcport->vha;
  1908. struct qla_hw_data *ha = vha->hw;
  1909. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1910. int loop_iterartion = 0;
  1911. int cont_iocb_prsnt = 0;
  1912. int entry_count = 1;
  1913. ct_iocb->entry_type = CT_IOCB_TYPE;
  1914. ct_iocb->entry_status = 0;
  1915. ct_iocb->sys_define = 0;
  1916. ct_iocb->handle = sp->handle;
  1917. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1918. ct_iocb->vp_index = sp->fcport->vha->vp_idx;
  1919. ct_iocb->comp_status = __constant_cpu_to_le16(0);
  1920. ct_iocb->cmd_dsd_count =
  1921. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1922. ct_iocb->timeout = 0;
  1923. ct_iocb->rsp_dsd_count =
  1924. __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1925. ct_iocb->rsp_byte_count =
  1926. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1927. ct_iocb->cmd_byte_count =
  1928. cpu_to_le32(bsg_job->request_payload.payload_len);
  1929. ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
  1930. (bsg_job->request_payload.sg_list)));
  1931. ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
  1932. (bsg_job->request_payload.sg_list)));
  1933. ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
  1934. (bsg_job->request_payload.sg_list));
  1935. avail_dsds = 1;
  1936. cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
  1937. index = 0;
  1938. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1939. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1940. dma_addr_t sle_dma;
  1941. cont_a64_entry_t *cont_pkt;
  1942. /* Allocate additional continuation packets? */
  1943. if (avail_dsds == 0) {
  1944. /*
  1945. * Five DSDs are available in the Cont.
  1946. * Type 1 IOCB.
  1947. */
  1948. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1949. ha->req_q_map[0]);
  1950. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1951. avail_dsds = 5;
  1952. cont_iocb_prsnt = 1;
  1953. entry_count++;
  1954. }
  1955. sle_dma = sg_dma_address(sg);
  1956. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1957. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1958. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1959. loop_iterartion++;
  1960. avail_dsds--;
  1961. }
  1962. ct_iocb->entry_count = entry_count;
  1963. }
  1964. /*
  1965. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  1966. * @sp: command to send to the ISP
  1967. *
  1968. * Returns non-zero if a failure occurred, else zero.
  1969. */
  1970. int
  1971. qla82xx_start_scsi(srb_t *sp)
  1972. {
  1973. int ret, nseg;
  1974. unsigned long flags;
  1975. struct scsi_cmnd *cmd;
  1976. uint32_t *clr_ptr;
  1977. uint32_t index;
  1978. uint32_t handle;
  1979. uint16_t cnt;
  1980. uint16_t req_cnt;
  1981. uint16_t tot_dsds;
  1982. struct device_reg_82xx __iomem *reg;
  1983. uint32_t dbval;
  1984. uint32_t *fcp_dl;
  1985. uint8_t additional_cdb_len;
  1986. struct ct6_dsd *ctx;
  1987. struct scsi_qla_host *vha = sp->fcport->vha;
  1988. struct qla_hw_data *ha = vha->hw;
  1989. struct req_que *req = NULL;
  1990. struct rsp_que *rsp = NULL;
  1991. char tag[2];
  1992. /* Setup device pointers. */
  1993. ret = 0;
  1994. reg = &ha->iobase->isp82;
  1995. cmd = GET_CMD_SP(sp);
  1996. req = vha->req;
  1997. rsp = ha->rsp_q_map[0];
  1998. /* So we know we haven't pci_map'ed anything yet */
  1999. tot_dsds = 0;
  2000. dbval = 0x04 | (ha->portnum << 5);
  2001. /* Send marker if required */
  2002. if (vha->marker_needed != 0) {
  2003. if (qla2x00_marker(vha, req,
  2004. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  2005. ql_log(ql_log_warn, vha, 0x300c,
  2006. "qla2x00_marker failed for cmd=%p.\n", cmd);
  2007. return QLA_FUNCTION_FAILED;
  2008. }
  2009. vha->marker_needed = 0;
  2010. }
  2011. /* Acquire ring specific lock */
  2012. spin_lock_irqsave(&ha->hardware_lock, flags);
  2013. /* Check for room in outstanding command list. */
  2014. handle = req->current_outstanding_cmd;
  2015. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2016. handle++;
  2017. if (handle == req->num_outstanding_cmds)
  2018. handle = 1;
  2019. if (!req->outstanding_cmds[handle])
  2020. break;
  2021. }
  2022. if (index == req->num_outstanding_cmds)
  2023. goto queuing_error;
  2024. /* Map the sg table so we have an accurate count of sg entries needed */
  2025. if (scsi_sg_count(cmd)) {
  2026. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  2027. scsi_sg_count(cmd), cmd->sc_data_direction);
  2028. if (unlikely(!nseg))
  2029. goto queuing_error;
  2030. } else
  2031. nseg = 0;
  2032. tot_dsds = nseg;
  2033. if (tot_dsds > ql2xshiftctondsd) {
  2034. struct cmd_type_6 *cmd_pkt;
  2035. uint16_t more_dsd_lists = 0;
  2036. struct dsd_dma *dsd_ptr;
  2037. uint16_t i;
  2038. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  2039. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  2040. ql_dbg(ql_dbg_io, vha, 0x300d,
  2041. "Num of DSD list %d is than %d for cmd=%p.\n",
  2042. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  2043. cmd);
  2044. goto queuing_error;
  2045. }
  2046. if (more_dsd_lists <= ha->gbl_dsd_avail)
  2047. goto sufficient_dsds;
  2048. else
  2049. more_dsd_lists -= ha->gbl_dsd_avail;
  2050. for (i = 0; i < more_dsd_lists; i++) {
  2051. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  2052. if (!dsd_ptr) {
  2053. ql_log(ql_log_fatal, vha, 0x300e,
  2054. "Failed to allocate memory for dsd_dma "
  2055. "for cmd=%p.\n", cmd);
  2056. goto queuing_error;
  2057. }
  2058. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  2059. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  2060. if (!dsd_ptr->dsd_addr) {
  2061. kfree(dsd_ptr);
  2062. ql_log(ql_log_fatal, vha, 0x300f,
  2063. "Failed to allocate memory for dsd_addr "
  2064. "for cmd=%p.\n", cmd);
  2065. goto queuing_error;
  2066. }
  2067. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  2068. ha->gbl_dsd_avail++;
  2069. }
  2070. sufficient_dsds:
  2071. req_cnt = 1;
  2072. if (req->cnt < (req_cnt + 2)) {
  2073. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2074. &reg->req_q_out[0]);
  2075. if (req->ring_index < cnt)
  2076. req->cnt = cnt - req->ring_index;
  2077. else
  2078. req->cnt = req->length -
  2079. (req->ring_index - cnt);
  2080. if (req->cnt < (req_cnt + 2))
  2081. goto queuing_error;
  2082. }
  2083. ctx = sp->u.scmd.ctx =
  2084. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2085. if (!ctx) {
  2086. ql_log(ql_log_fatal, vha, 0x3010,
  2087. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2088. goto queuing_error;
  2089. }
  2090. memset(ctx, 0, sizeof(struct ct6_dsd));
  2091. ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool,
  2092. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2093. if (!ctx->fcp_cmnd) {
  2094. ql_log(ql_log_fatal, vha, 0x3011,
  2095. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2096. goto queuing_error;
  2097. }
  2098. /* Initialize the DSD list and dma handle */
  2099. INIT_LIST_HEAD(&ctx->dsd_list);
  2100. ctx->dsd_use_cnt = 0;
  2101. if (cmd->cmd_len > 16) {
  2102. additional_cdb_len = cmd->cmd_len - 16;
  2103. if ((cmd->cmd_len % 4) != 0) {
  2104. /* SCSI command bigger than 16 bytes must be
  2105. * multiple of 4
  2106. */
  2107. ql_log(ql_log_warn, vha, 0x3012,
  2108. "scsi cmd len %d not multiple of 4 "
  2109. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2110. goto queuing_error_fcp_cmnd;
  2111. }
  2112. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2113. } else {
  2114. additional_cdb_len = 0;
  2115. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2116. }
  2117. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2118. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2119. /* Zero out remaining portion of packet. */
  2120. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2121. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2122. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2123. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2124. /* Set NPORT-ID and LUN number*/
  2125. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2126. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2127. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2128. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2129. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2130. /* Build IOCB segments */
  2131. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2132. goto queuing_error_fcp_cmnd;
  2133. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2134. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2135. /* build FCP_CMND IU */
  2136. memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd));
  2137. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2138. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2139. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2140. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2141. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2142. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2143. /*
  2144. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2145. */
  2146. if (scsi_populate_tag_msg(cmd, tag)) {
  2147. switch (tag[0]) {
  2148. case HEAD_OF_QUEUE_TAG:
  2149. ctx->fcp_cmnd->task_attribute =
  2150. TSK_HEAD_OF_QUEUE;
  2151. break;
  2152. case ORDERED_QUEUE_TAG:
  2153. ctx->fcp_cmnd->task_attribute =
  2154. TSK_ORDERED;
  2155. break;
  2156. }
  2157. }
  2158. /* Populate the FCP_PRIO. */
  2159. if (ha->flags.fcp_prio_enabled)
  2160. ctx->fcp_cmnd->task_attribute |=
  2161. sp->fcport->fcp_prio << 3;
  2162. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2163. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2164. additional_cdb_len);
  2165. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2166. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2167. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2168. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2169. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2170. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2171. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2172. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2173. /* Set total data segment count. */
  2174. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2175. /* Specify response queue number where
  2176. * completion should happen
  2177. */
  2178. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2179. } else {
  2180. struct cmd_type_7 *cmd_pkt;
  2181. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2182. if (req->cnt < (req_cnt + 2)) {
  2183. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2184. &reg->req_q_out[0]);
  2185. if (req->ring_index < cnt)
  2186. req->cnt = cnt - req->ring_index;
  2187. else
  2188. req->cnt = req->length -
  2189. (req->ring_index - cnt);
  2190. }
  2191. if (req->cnt < (req_cnt + 2))
  2192. goto queuing_error;
  2193. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2194. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2195. /* Zero out remaining portion of packet. */
  2196. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2197. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2198. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2199. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2200. /* Set NPORT-ID and LUN number*/
  2201. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2202. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2203. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2204. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2205. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2206. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2207. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2208. sizeof(cmd_pkt->lun));
  2209. /*
  2210. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2211. */
  2212. if (scsi_populate_tag_msg(cmd, tag)) {
  2213. switch (tag[0]) {
  2214. case HEAD_OF_QUEUE_TAG:
  2215. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  2216. break;
  2217. case ORDERED_QUEUE_TAG:
  2218. cmd_pkt->task = TSK_ORDERED;
  2219. break;
  2220. }
  2221. }
  2222. /* Populate the FCP_PRIO. */
  2223. if (ha->flags.fcp_prio_enabled)
  2224. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2225. /* Load SCSI command packet. */
  2226. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2227. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2228. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2229. /* Build IOCB segments */
  2230. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  2231. /* Set total data segment count. */
  2232. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2233. /* Specify response queue number where
  2234. * completion should happen.
  2235. */
  2236. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2237. }
  2238. /* Build command packet. */
  2239. req->current_outstanding_cmd = handle;
  2240. req->outstanding_cmds[handle] = sp;
  2241. sp->handle = handle;
  2242. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2243. req->cnt -= req_cnt;
  2244. wmb();
  2245. /* Adjust ring index. */
  2246. req->ring_index++;
  2247. if (req->ring_index == req->length) {
  2248. req->ring_index = 0;
  2249. req->ring_ptr = req->ring;
  2250. } else
  2251. req->ring_ptr++;
  2252. sp->flags |= SRB_DMA_VALID;
  2253. /* Set chip new ring index. */
  2254. /* write, read and verify logic */
  2255. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2256. if (ql2xdbwr)
  2257. qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval);
  2258. else {
  2259. WRT_REG_DWORD(
  2260. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2261. dbval);
  2262. wmb();
  2263. while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) {
  2264. WRT_REG_DWORD(
  2265. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2266. dbval);
  2267. wmb();
  2268. }
  2269. }
  2270. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2271. if (vha->flags.process_response_queue &&
  2272. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2273. qla24xx_process_response_queue(vha, rsp);
  2274. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2275. return QLA_SUCCESS;
  2276. queuing_error_fcp_cmnd:
  2277. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2278. queuing_error:
  2279. if (tot_dsds)
  2280. scsi_dma_unmap(cmd);
  2281. if (sp->u.scmd.ctx) {
  2282. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2283. sp->u.scmd.ctx = NULL;
  2284. }
  2285. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2286. return QLA_FUNCTION_FAILED;
  2287. }
  2288. static void
  2289. qla24xx_abort_iocb(srb_t *sp, struct abort_entry_24xx *abt_iocb)
  2290. {
  2291. struct srb_iocb *aio = &sp->u.iocb_cmd;
  2292. scsi_qla_host_t *vha = sp->fcport->vha;
  2293. struct req_que *req = vha->req;
  2294. memset(abt_iocb, 0, sizeof(struct abort_entry_24xx));
  2295. abt_iocb->entry_type = ABORT_IOCB_TYPE;
  2296. abt_iocb->entry_count = 1;
  2297. abt_iocb->handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
  2298. abt_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2299. abt_iocb->handle_to_abort =
  2300. cpu_to_le32(MAKE_HANDLE(req->id, aio->u.abt.cmd_hndl));
  2301. abt_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  2302. abt_iocb->port_id[1] = sp->fcport->d_id.b.area;
  2303. abt_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  2304. abt_iocb->vp_index = vha->vp_idx;
  2305. abt_iocb->req_que_no = cpu_to_le16(req->id);
  2306. /* Send the command to the firmware */
  2307. wmb();
  2308. }
  2309. int
  2310. qla2x00_start_sp(srb_t *sp)
  2311. {
  2312. int rval;
  2313. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2314. void *pkt;
  2315. unsigned long flags;
  2316. rval = QLA_FUNCTION_FAILED;
  2317. spin_lock_irqsave(&ha->hardware_lock, flags);
  2318. pkt = qla2x00_alloc_iocbs(sp->fcport->vha, sp);
  2319. if (!pkt) {
  2320. ql_log(ql_log_warn, sp->fcport->vha, 0x700c,
  2321. "qla2x00_alloc_iocbs failed.\n");
  2322. goto done;
  2323. }
  2324. rval = QLA_SUCCESS;
  2325. switch (sp->type) {
  2326. case SRB_LOGIN_CMD:
  2327. IS_FWI2_CAPABLE(ha) ?
  2328. qla24xx_login_iocb(sp, pkt) :
  2329. qla2x00_login_iocb(sp, pkt);
  2330. break;
  2331. case SRB_LOGOUT_CMD:
  2332. IS_FWI2_CAPABLE(ha) ?
  2333. qla24xx_logout_iocb(sp, pkt) :
  2334. qla2x00_logout_iocb(sp, pkt);
  2335. break;
  2336. case SRB_ELS_CMD_RPT:
  2337. case SRB_ELS_CMD_HST:
  2338. qla24xx_els_iocb(sp, pkt);
  2339. break;
  2340. case SRB_CT_CMD:
  2341. IS_FWI2_CAPABLE(ha) ?
  2342. qla24xx_ct_iocb(sp, pkt) :
  2343. qla2x00_ct_iocb(sp, pkt);
  2344. break;
  2345. case SRB_ADISC_CMD:
  2346. IS_FWI2_CAPABLE(ha) ?
  2347. qla24xx_adisc_iocb(sp, pkt) :
  2348. qla2x00_adisc_iocb(sp, pkt);
  2349. break;
  2350. case SRB_TM_CMD:
  2351. IS_QLAFX00(ha) ?
  2352. qlafx00_tm_iocb(sp, pkt) :
  2353. qla24xx_tm_iocb(sp, pkt);
  2354. break;
  2355. case SRB_FXIOCB_DCMD:
  2356. case SRB_FXIOCB_BCMD:
  2357. qlafx00_fxdisc_iocb(sp, pkt);
  2358. break;
  2359. case SRB_ABT_CMD:
  2360. IS_QLAFX00(ha) ?
  2361. qlafx00_abort_iocb(sp, pkt) :
  2362. qla24xx_abort_iocb(sp, pkt);
  2363. break;
  2364. default:
  2365. break;
  2366. }
  2367. wmb();
  2368. qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]);
  2369. done:
  2370. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2371. return rval;
  2372. }
  2373. static void
  2374. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  2375. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  2376. {
  2377. uint16_t avail_dsds;
  2378. uint32_t *cur_dsd;
  2379. uint32_t req_data_len = 0;
  2380. uint32_t rsp_data_len = 0;
  2381. struct scatterlist *sg;
  2382. int index;
  2383. int entry_count = 1;
  2384. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  2385. /*Update entry type to indicate bidir command */
  2386. *((uint32_t *)(&cmd_pkt->entry_type)) =
  2387. __constant_cpu_to_le32(COMMAND_BIDIRECTIONAL);
  2388. /* Set the transfer direction, in this set both flags
  2389. * Also set the BD_WRAP_BACK flag, firmware will take care
  2390. * assigning DID=SID for outgoing pkts.
  2391. */
  2392. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2393. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2394. cmd_pkt->control_flags =
  2395. __constant_cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  2396. BD_WRAP_BACK);
  2397. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  2398. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  2399. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  2400. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  2401. vha->bidi_stats.transfer_bytes += req_data_len;
  2402. vha->bidi_stats.io_count++;
  2403. vha->qla_stats.output_bytes += req_data_len;
  2404. vha->qla_stats.output_requests++;
  2405. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  2406. * are bundled in continuation iocb
  2407. */
  2408. avail_dsds = 1;
  2409. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  2410. index = 0;
  2411. for_each_sg(bsg_job->request_payload.sg_list, sg,
  2412. bsg_job->request_payload.sg_cnt, index) {
  2413. dma_addr_t sle_dma;
  2414. cont_a64_entry_t *cont_pkt;
  2415. /* Allocate additional continuation packets */
  2416. if (avail_dsds == 0) {
  2417. /* Continuation type 1 IOCB can accomodate
  2418. * 5 DSDS
  2419. */
  2420. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2421. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2422. avail_dsds = 5;
  2423. entry_count++;
  2424. }
  2425. sle_dma = sg_dma_address(sg);
  2426. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2427. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2428. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2429. avail_dsds--;
  2430. }
  2431. /* For read request DSD will always goes to continuation IOCB
  2432. * and follow the write DSD. If there is room on the current IOCB
  2433. * then it is added to that IOCB else new continuation IOCB is
  2434. * allocated.
  2435. */
  2436. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  2437. bsg_job->reply_payload.sg_cnt, index) {
  2438. dma_addr_t sle_dma;
  2439. cont_a64_entry_t *cont_pkt;
  2440. /* Allocate additional continuation packets */
  2441. if (avail_dsds == 0) {
  2442. /* Continuation type 1 IOCB can accomodate
  2443. * 5 DSDS
  2444. */
  2445. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2446. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2447. avail_dsds = 5;
  2448. entry_count++;
  2449. }
  2450. sle_dma = sg_dma_address(sg);
  2451. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2452. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2453. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2454. avail_dsds--;
  2455. }
  2456. /* This value should be same as number of IOCB required for this cmd */
  2457. cmd_pkt->entry_count = entry_count;
  2458. }
  2459. int
  2460. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  2461. {
  2462. struct qla_hw_data *ha = vha->hw;
  2463. unsigned long flags;
  2464. uint32_t handle;
  2465. uint32_t index;
  2466. uint16_t req_cnt;
  2467. uint16_t cnt;
  2468. uint32_t *clr_ptr;
  2469. struct cmd_bidir *cmd_pkt = NULL;
  2470. struct rsp_que *rsp;
  2471. struct req_que *req;
  2472. int rval = EXT_STATUS_OK;
  2473. rval = QLA_SUCCESS;
  2474. rsp = ha->rsp_q_map[0];
  2475. req = vha->req;
  2476. /* Send marker if required */
  2477. if (vha->marker_needed != 0) {
  2478. if (qla2x00_marker(vha, req,
  2479. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  2480. return EXT_STATUS_MAILBOX;
  2481. vha->marker_needed = 0;
  2482. }
  2483. /* Acquire ring specific lock */
  2484. spin_lock_irqsave(&ha->hardware_lock, flags);
  2485. /* Check for room in outstanding command list. */
  2486. handle = req->current_outstanding_cmd;
  2487. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2488. handle++;
  2489. if (handle == req->num_outstanding_cmds)
  2490. handle = 1;
  2491. if (!req->outstanding_cmds[handle])
  2492. break;
  2493. }
  2494. if (index == req->num_outstanding_cmds) {
  2495. rval = EXT_STATUS_BUSY;
  2496. goto queuing_error;
  2497. }
  2498. /* Calculate number of IOCB required */
  2499. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2500. /* Check for room on request queue. */
  2501. if (req->cnt < req_cnt + 2) {
  2502. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  2503. RD_REG_DWORD_RELAXED(req->req_q_out);
  2504. if (req->ring_index < cnt)
  2505. req->cnt = cnt - req->ring_index;
  2506. else
  2507. req->cnt = req->length -
  2508. (req->ring_index - cnt);
  2509. }
  2510. if (req->cnt < req_cnt + 2) {
  2511. rval = EXT_STATUS_BUSY;
  2512. goto queuing_error;
  2513. }
  2514. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  2515. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2516. /* Zero out remaining portion of packet. */
  2517. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2518. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2519. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2520. /* Set NPORT-ID (of vha)*/
  2521. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  2522. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  2523. cmd_pkt->port_id[1] = vha->d_id.b.area;
  2524. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  2525. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  2526. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2527. /* Build command packet. */
  2528. req->current_outstanding_cmd = handle;
  2529. req->outstanding_cmds[handle] = sp;
  2530. sp->handle = handle;
  2531. req->cnt -= req_cnt;
  2532. /* Send the command to the firmware */
  2533. wmb();
  2534. qla2x00_start_iocbs(vha, req);
  2535. queuing_error:
  2536. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2537. return rval;
  2538. }