ipuv3-crtc.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518
  1. /*
  2. * i.MX IPUv3 Graphics driver
  3. *
  4. * Copyright (C) 2011 Sascha Hauer, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18. * MA 02110-1301, USA.
  19. */
  20. #include <linux/component.h>
  21. #include <linux/module.h>
  22. #include <linux/export.h>
  23. #include <linux/device.h>
  24. #include <linux/platform_device.h>
  25. #include <drm/drmP.h>
  26. #include <drm/drm_crtc_helper.h>
  27. #include <linux/fb.h>
  28. #include <linux/clk.h>
  29. #include <linux/errno.h>
  30. #include <drm/drm_gem_cma_helper.h>
  31. #include <drm/drm_fb_cma_helper.h>
  32. #include <video/imx-ipu-v3.h>
  33. #include "imx-drm.h"
  34. #include "ipuv3-plane.h"
  35. #define DRIVER_DESC "i.MX IPUv3 Graphics"
  36. struct ipu_crtc {
  37. struct device *dev;
  38. struct drm_crtc base;
  39. struct imx_drm_crtc *imx_crtc;
  40. /* plane[0] is the full plane, plane[1] is the partial plane */
  41. struct ipu_plane *plane[2];
  42. struct ipu_dc *dc;
  43. struct ipu_di *di;
  44. int enabled;
  45. struct drm_pending_vblank_event *page_flip_event;
  46. struct drm_framebuffer *newfb;
  47. int irq;
  48. u32 interface_pix_fmt;
  49. unsigned long di_clkflags;
  50. int di_hsync_pin;
  51. int di_vsync_pin;
  52. };
  53. #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
  54. static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
  55. {
  56. struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  57. if (ipu_crtc->enabled)
  58. return;
  59. ipu_dc_enable(ipu);
  60. ipu_plane_enable(ipu_crtc->plane[0]);
  61. /* Start DC channel and DI after IDMAC */
  62. ipu_dc_enable_channel(ipu_crtc->dc);
  63. ipu_di_enable(ipu_crtc->di);
  64. ipu_crtc->enabled = 1;
  65. }
  66. static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
  67. {
  68. struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  69. if (!ipu_crtc->enabled)
  70. return;
  71. /* Stop DC channel and DI before IDMAC */
  72. ipu_dc_disable_channel(ipu_crtc->dc);
  73. ipu_di_disable(ipu_crtc->di);
  74. ipu_plane_disable(ipu_crtc->plane[0]);
  75. ipu_dc_disable(ipu);
  76. ipu_crtc->enabled = 0;
  77. }
  78. static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
  79. {
  80. struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  81. dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
  82. switch (mode) {
  83. case DRM_MODE_DPMS_ON:
  84. ipu_fb_enable(ipu_crtc);
  85. break;
  86. case DRM_MODE_DPMS_STANDBY:
  87. case DRM_MODE_DPMS_SUSPEND:
  88. case DRM_MODE_DPMS_OFF:
  89. ipu_fb_disable(ipu_crtc);
  90. break;
  91. }
  92. }
  93. static int ipu_page_flip(struct drm_crtc *crtc,
  94. struct drm_framebuffer *fb,
  95. struct drm_pending_vblank_event *event,
  96. uint32_t page_flip_flags)
  97. {
  98. struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  99. int ret;
  100. if (ipu_crtc->newfb)
  101. return -EBUSY;
  102. ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
  103. if (ret) {
  104. dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
  105. list_del(&event->base.link);
  106. return ret;
  107. }
  108. ipu_crtc->newfb = fb;
  109. ipu_crtc->page_flip_event = event;
  110. crtc->primary->fb = fb;
  111. return 0;
  112. }
  113. static const struct drm_crtc_funcs ipu_crtc_funcs = {
  114. .set_config = drm_crtc_helper_set_config,
  115. .destroy = drm_crtc_cleanup,
  116. .page_flip = ipu_page_flip,
  117. };
  118. static int ipu_crtc_mode_set(struct drm_crtc *crtc,
  119. struct drm_display_mode *orig_mode,
  120. struct drm_display_mode *mode,
  121. int x, int y,
  122. struct drm_framebuffer *old_fb)
  123. {
  124. struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  125. int ret;
  126. struct ipu_di_signal_cfg sig_cfg = {};
  127. u32 out_pixel_fmt;
  128. dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
  129. mode->hdisplay);
  130. dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
  131. mode->vdisplay);
  132. out_pixel_fmt = ipu_crtc->interface_pix_fmt;
  133. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  134. sig_cfg.interlaced = 1;
  135. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  136. sig_cfg.Hsync_pol = 1;
  137. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  138. sig_cfg.Vsync_pol = 1;
  139. sig_cfg.enable_pol = 1;
  140. sig_cfg.clk_pol = 0;
  141. sig_cfg.width = mode->hdisplay;
  142. sig_cfg.height = mode->vdisplay;
  143. sig_cfg.pixel_fmt = out_pixel_fmt;
  144. sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
  145. sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
  146. sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;
  147. sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
  148. sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
  149. sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
  150. sig_cfg.pixelclock = mode->clock * 1000;
  151. sig_cfg.clkflags = ipu_crtc->di_clkflags;
  152. sig_cfg.v_to_h_sync = 0;
  153. sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
  154. sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
  155. ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
  156. out_pixel_fmt, mode->hdisplay);
  157. if (ret) {
  158. dev_err(ipu_crtc->dev,
  159. "initializing display controller failed with %d\n",
  160. ret);
  161. return ret;
  162. }
  163. ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
  164. if (ret) {
  165. dev_err(ipu_crtc->dev,
  166. "initializing panel failed with %d\n", ret);
  167. return ret;
  168. }
  169. return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode,
  170. crtc->primary->fb,
  171. 0, 0, mode->hdisplay, mode->vdisplay,
  172. x, y, mode->hdisplay, mode->vdisplay);
  173. }
  174. static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
  175. {
  176. unsigned long flags;
  177. struct drm_device *drm = ipu_crtc->base.dev;
  178. spin_lock_irqsave(&drm->event_lock, flags);
  179. if (ipu_crtc->page_flip_event)
  180. drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
  181. ipu_crtc->page_flip_event = NULL;
  182. imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
  183. spin_unlock_irqrestore(&drm->event_lock, flags);
  184. }
  185. static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
  186. {
  187. struct ipu_crtc *ipu_crtc = dev_id;
  188. imx_drm_handle_vblank(ipu_crtc->imx_crtc);
  189. if (ipu_crtc->newfb) {
  190. struct ipu_plane *plane = ipu_crtc->plane[0];
  191. ipu_crtc->newfb = NULL;
  192. ipu_plane_set_base(plane, ipu_crtc->base.primary->fb,
  193. plane->x, plane->y);
  194. ipu_crtc_handle_pageflip(ipu_crtc);
  195. }
  196. return IRQ_HANDLED;
  197. }
  198. static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
  199. const struct drm_display_mode *mode,
  200. struct drm_display_mode *adjusted_mode)
  201. {
  202. return true;
  203. }
  204. static void ipu_crtc_prepare(struct drm_crtc *crtc)
  205. {
  206. struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  207. ipu_fb_disable(ipu_crtc);
  208. }
  209. static void ipu_crtc_commit(struct drm_crtc *crtc)
  210. {
  211. struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  212. ipu_fb_enable(ipu_crtc);
  213. }
  214. static struct drm_crtc_helper_funcs ipu_helper_funcs = {
  215. .dpms = ipu_crtc_dpms,
  216. .mode_fixup = ipu_crtc_mode_fixup,
  217. .mode_set = ipu_crtc_mode_set,
  218. .prepare = ipu_crtc_prepare,
  219. .commit = ipu_crtc_commit,
  220. };
  221. static int ipu_enable_vblank(struct drm_crtc *crtc)
  222. {
  223. return 0;
  224. }
  225. static void ipu_disable_vblank(struct drm_crtc *crtc)
  226. {
  227. struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  228. ipu_crtc->page_flip_event = NULL;
  229. ipu_crtc->newfb = NULL;
  230. }
  231. static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
  232. u32 pixfmt, int hsync_pin, int vsync_pin)
  233. {
  234. struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  235. ipu_crtc->interface_pix_fmt = pixfmt;
  236. ipu_crtc->di_hsync_pin = hsync_pin;
  237. ipu_crtc->di_vsync_pin = vsync_pin;
  238. switch (encoder_type) {
  239. case DRM_MODE_ENCODER_DAC:
  240. case DRM_MODE_ENCODER_TVDAC:
  241. case DRM_MODE_ENCODER_LVDS:
  242. ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC |
  243. IPU_DI_CLKMODE_EXT;
  244. break;
  245. case DRM_MODE_ENCODER_TMDS:
  246. case DRM_MODE_ENCODER_NONE:
  247. ipu_crtc->di_clkflags = 0;
  248. break;
  249. }
  250. return 0;
  251. }
  252. static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
  253. .enable_vblank = ipu_enable_vblank,
  254. .disable_vblank = ipu_disable_vblank,
  255. .set_interface_pix_fmt = ipu_set_interface_pix_fmt,
  256. .crtc_funcs = &ipu_crtc_funcs,
  257. .crtc_helper_funcs = &ipu_helper_funcs,
  258. };
  259. static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
  260. {
  261. if (!IS_ERR_OR_NULL(ipu_crtc->dc))
  262. ipu_dc_put(ipu_crtc->dc);
  263. if (!IS_ERR_OR_NULL(ipu_crtc->di))
  264. ipu_di_put(ipu_crtc->di);
  265. }
  266. static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
  267. struct ipu_client_platformdata *pdata)
  268. {
  269. struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  270. int ret;
  271. ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
  272. if (IS_ERR(ipu_crtc->dc)) {
  273. ret = PTR_ERR(ipu_crtc->dc);
  274. goto err_out;
  275. }
  276. ipu_crtc->di = ipu_di_get(ipu, pdata->di);
  277. if (IS_ERR(ipu_crtc->di)) {
  278. ret = PTR_ERR(ipu_crtc->di);
  279. goto err_out;
  280. }
  281. return 0;
  282. err_out:
  283. ipu_put_resources(ipu_crtc);
  284. return ret;
  285. }
  286. static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
  287. struct ipu_client_platformdata *pdata, struct drm_device *drm)
  288. {
  289. struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  290. int dp = -EINVAL;
  291. int ret;
  292. int id;
  293. ret = ipu_get_resources(ipu_crtc, pdata);
  294. if (ret) {
  295. dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
  296. ret);
  297. return ret;
  298. }
  299. ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
  300. &ipu_crtc_helper_funcs, ipu_crtc->dev->of_node);
  301. if (ret) {
  302. dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
  303. goto err_put_resources;
  304. }
  305. if (pdata->dp >= 0)
  306. dp = IPU_DP_FLOW_SYNC_BG;
  307. id = imx_drm_crtc_id(ipu_crtc->imx_crtc);
  308. ipu_crtc->plane[0] = ipu_plane_init(ipu_crtc->base.dev, ipu,
  309. pdata->dma[0], dp, BIT(id), true);
  310. ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
  311. if (ret) {
  312. dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
  313. ret);
  314. goto err_remove_crtc;
  315. }
  316. /* If this crtc is using the DP, add an overlay plane */
  317. if (pdata->dp >= 0 && pdata->dma[1] > 0) {
  318. ipu_crtc->plane[1] = ipu_plane_init(ipu_crtc->base.dev, ipu,
  319. pdata->dma[1],
  320. IPU_DP_FLOW_SYNC_FG,
  321. BIT(id), false);
  322. if (IS_ERR(ipu_crtc->plane[1]))
  323. ipu_crtc->plane[1] = NULL;
  324. }
  325. ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
  326. ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
  327. "imx_drm", ipu_crtc);
  328. if (ret < 0) {
  329. dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
  330. goto err_put_plane_res;
  331. }
  332. return 0;
  333. err_put_plane_res:
  334. ipu_plane_put_resources(ipu_crtc->plane[0]);
  335. err_remove_crtc:
  336. imx_drm_remove_crtc(ipu_crtc->imx_crtc);
  337. err_put_resources:
  338. ipu_put_resources(ipu_crtc);
  339. return ret;
  340. }
  341. static struct device_node *ipu_drm_get_port_by_id(struct device_node *parent,
  342. int port_id)
  343. {
  344. struct device_node *port;
  345. int id, ret;
  346. port = of_get_child_by_name(parent, "port");
  347. while (port) {
  348. ret = of_property_read_u32(port, "reg", &id);
  349. if (!ret && id == port_id)
  350. return port;
  351. do {
  352. port = of_get_next_child(parent, port);
  353. if (!port)
  354. return NULL;
  355. } while (of_node_cmp(port->name, "port"));
  356. }
  357. return NULL;
  358. }
  359. static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
  360. {
  361. struct ipu_client_platformdata *pdata = dev->platform_data;
  362. struct drm_device *drm = data;
  363. struct ipu_crtc *ipu_crtc;
  364. int ret;
  365. ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
  366. if (!ipu_crtc)
  367. return -ENOMEM;
  368. ipu_crtc->dev = dev;
  369. ret = ipu_crtc_init(ipu_crtc, pdata, drm);
  370. if (ret)
  371. return ret;
  372. dev_set_drvdata(dev, ipu_crtc);
  373. return 0;
  374. }
  375. static void ipu_drm_unbind(struct device *dev, struct device *master,
  376. void *data)
  377. {
  378. struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
  379. imx_drm_remove_crtc(ipu_crtc->imx_crtc);
  380. ipu_plane_put_resources(ipu_crtc->plane[0]);
  381. ipu_put_resources(ipu_crtc);
  382. }
  383. static const struct component_ops ipu_crtc_ops = {
  384. .bind = ipu_drm_bind,
  385. .unbind = ipu_drm_unbind,
  386. };
  387. static int ipu_drm_probe(struct platform_device *pdev)
  388. {
  389. struct device *dev = &pdev->dev;
  390. struct ipu_client_platformdata *pdata = dev->platform_data;
  391. int ret;
  392. if (!dev->platform_data)
  393. return -EINVAL;
  394. if (!dev->of_node) {
  395. /* Associate crtc device with the corresponding DI port node */
  396. dev->of_node = ipu_drm_get_port_by_id(dev->parent->of_node,
  397. pdata->di + 2);
  398. if (!dev->of_node) {
  399. dev_err(dev, "missing port@%d node in %s\n",
  400. pdata->di + 2, dev->parent->of_node->full_name);
  401. return -ENODEV;
  402. }
  403. }
  404. ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
  405. if (ret)
  406. return ret;
  407. return component_add(dev, &ipu_crtc_ops);
  408. }
  409. static int ipu_drm_remove(struct platform_device *pdev)
  410. {
  411. component_del(&pdev->dev, &ipu_crtc_ops);
  412. return 0;
  413. }
  414. static struct platform_driver ipu_drm_driver = {
  415. .driver = {
  416. .name = "imx-ipuv3-crtc",
  417. },
  418. .probe = ipu_drm_probe,
  419. .remove = ipu_drm_remove,
  420. };
  421. module_platform_driver(ipu_drm_driver);
  422. MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
  423. MODULE_DESCRIPTION(DRIVER_DESC);
  424. MODULE_LICENSE("GPL");
  425. MODULE_ALIAS("platform:imx-ipuv3-crtc");