mt_wdt.h 2.9 KB

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  1. #ifndef __WDT_HW_H__
  2. #define __WDT_HW_H__
  3. #define MTK_WDT_BASE toprgu_base
  4. #define MTK_WDT_MODE (MTK_WDT_BASE+0x0000)
  5. #define MTK_WDT_LENGTH (MTK_WDT_BASE+0x0004)
  6. #define MTK_WDT_RESTART (MTK_WDT_BASE+0x0008)
  7. #define MTK_WDT_STATUS (MTK_WDT_BASE+0x000C)
  8. #define MTK_WDT_INTERVAL (MTK_WDT_BASE+0x0010)
  9. #define MTK_WDT_SWRST (MTK_WDT_BASE+0x0014)
  10. #define MTK_WDT_SWSYSRST (MTK_WDT_BASE+0x0018)
  11. #define MTK_WDT_NONRST_REG (MTK_WDT_BASE+0x0020)
  12. #define MTK_WDT_NONRST_REG2 (MTK_WDT_BASE+0x0024)
  13. #define MTK_WDT_REQ_MODE (MTK_WDT_BASE+0x0030)
  14. #define MTK_WDT_REQ_IRQ_EN (MTK_WDT_BASE+0x0034)
  15. #define MTK_WDT_DRAMC_CTL (MTK_WDT_BASE+0x0040)
  16. /*WDT_MODE*/
  17. #define MTK_WDT_MODE_KEYMASK (0xff00)
  18. #define MTK_WDT_MODE_KEY (0x22000000)
  19. #define MTK_WDT_MODE_DDR_RESERVE (0x0080)
  20. #define MTK_WDT_MODE_DUAL_MODE (0x0040)
  21. #define MTK_WDT_MODE_IN_DIS (0x0020) /* Reserved */
  22. #define MTK_WDT_MODE_AUTO_RESTART (0x0010) /* Reserved */
  23. #define MTK_WDT_MODE_IRQ (0x0008)
  24. #define MTK_WDT_MODE_EXTEN (0x0004)
  25. #define MTK_WDT_MODE_EXT_POL (0x0002)
  26. #define MTK_WDT_MODE_ENABLE (0x0001)
  27. /*WDT_LENGTH*/
  28. #define MTK_WDT_LENGTH_TIME_OUT (0xffe0)
  29. #define MTK_WDT_LENGTH_KEYMASK (0x001f)
  30. #define MTK_WDT_LENGTH_KEY (0x0008)
  31. /*WDT_RESTART*/
  32. #define MTK_WDT_RESTART_KEY (0x1971)
  33. /*WDT_STATUS*/
  34. #define MTK_WDT_STATUS_HWWDT_RST (0x80000000)
  35. #define MTK_WDT_STATUS_SWWDT_RST (0x40000000)
  36. #define MTK_WDT_STATUS_IRQWDT_RST (0x20000000)
  37. #define MTK_WDT_STATUS_DEBUGWDT_RST (0x00080000)
  38. #define MTK_WDT_STATUS_SPMWDT_RST (0x0002)
  39. #define MTK_WDT_STATUS_SPM_THERMAL_RST (0x0001)
  40. #define MTK_WDT_STATUS_THERMAL_DIRECT_RST (1<<18)
  41. #define MTK_WDT_STATUS_SECURITY_RST (1<<28)
  42. /*WDT_INTERVAL*/
  43. #define MTK_WDT_INTERVAL_MASK (0x0fff)
  44. /*WDT_SWRST*/
  45. #define MTK_WDT_SWRST_KEY (0x1209)
  46. /*WDT_SWSYSRST*/
  47. #define MTK_WDT_SWSYS_RST_PWRAP_SPI_CTL_RST (0x0800)
  48. #define MTK_WDT_SWSYS_RST_APMIXED_RST (0x0400)
  49. #define MTK_WDT_SWSYS_RST_MD_LITE_RST (0x0200)
  50. #define MTK_WDT_SWSYS_RST_INFRA_AO_RST (0x0100)
  51. #define MTK_WDT_SWSYS_RST_MD_RST (0x0080)
  52. #define MTK_WDT_SWSYS_RST_DDRPHY_RST (0x0040)
  53. #define MTK_WDT_SWSYS_RST_IMG_RST (0x0020)
  54. #define MTK_WDT_SWSYS_RST_VDEC_RST (0x0010)
  55. #define MTK_WDT_SWSYS_RST_VENC_RST (0x0008)
  56. #define MTK_WDT_SWSYS_RST_MFG_RST (0x0004)
  57. #define MTK_WDT_SWSYS_RST_DISP_RST (0x0002)
  58. #define MTK_WDT_SWSYS_RST_INFRA_RST (0x0001)
  59. /* #define MTK_WDT_SWSYS_RST_KEY (0x1500) */
  60. #define MTK_WDT_SWSYS_RST_KEY (0x88000000)
  61. /*MTK_WDT_REQ_IRQ*/
  62. #define MTK_WDT_REQ_IRQ_KEY (0x44000000)
  63. #define MTK_WDT_REQ_IRQ_DEBUG_EN (0x80000)
  64. #define MTK_WDT_REQ_IRQ_SPM_THERMAL_EN (0x0001)
  65. #define MTK_WDT_REQ_IRQ_SPM_SCPSYS_EN (0x0002)
  66. #define MTK_WDT_REQ_IRQ_THERMAL_EN (1<<18)
  67. /*MTK_WDT_REQ_MODE*/
  68. #define MTK_WDT_REQ_MODE_KEY (0x33000000)
  69. #define MTK_WDT_REQ_MODE_DEBUG_EN (0x80000)
  70. #define MTK_WDT_REQ_MODE_SPM_THERMAL (0x0001)
  71. #define MTK_WDT_REQ_MODE_SPM_SCPSYS (0x0002)
  72. #define MTK_WDT_REQ_MODE_THERMAL (1<<18)
  73. #endif /*__WDT_HW_H__*/