w83627hf_wdt.c 10 KB

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  1. /*
  2. * w83627hf/thf WDT driver
  3. *
  4. * (c) Copyright 2013 Guenter Roeck
  5. * converted to watchdog infrastructure
  6. *
  7. * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com>
  8. * added support for W83627THF.
  9. *
  10. * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com>
  11. *
  12. * Based on advantechwdt.c which is based on wdt.c.
  13. * Original copyright messages:
  14. *
  15. * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl>
  16. *
  17. * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
  18. * All Rights Reserved.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License
  22. * as published by the Free Software Foundation; either version
  23. * 2 of the License, or (at your option) any later version.
  24. *
  25. * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide
  26. * warranty for any of this software. This material is provided
  27. * "AS-IS" and at no charge.
  28. *
  29. * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk>
  30. */
  31. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/types.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/ioport.h>
  37. #include <linux/notifier.h>
  38. #include <linux/reboot.h>
  39. #include <linux/init.h>
  40. #include <linux/io.h>
  41. #define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT"
  42. #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
  43. static int wdt_io;
  44. static int cr_wdt_timeout; /* WDT timeout register */
  45. static int cr_wdt_control; /* WDT control register */
  46. enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf,
  47. w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p,
  48. w83667hg_b, nct6775, nct6776, nct6779 };
  49. static int timeout; /* in seconds */
  50. module_param(timeout, int, 0);
  51. MODULE_PARM_DESC(timeout,
  52. "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
  53. __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
  54. static bool nowayout = WATCHDOG_NOWAYOUT;
  55. module_param(nowayout, bool, 0);
  56. MODULE_PARM_DESC(nowayout,
  57. "Watchdog cannot be stopped once started (default="
  58. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  59. static int early_disable;
  60. module_param(early_disable, int, 0);
  61. MODULE_PARM_DESC(early_disable, "Disable watchdog at boot time (default=0)");
  62. /*
  63. * Kernel methods.
  64. */
  65. #define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */
  66. #define WDT_EFIR (wdt_io+0) /* Extended Function Index Register
  67. (same as EFER) */
  68. #define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
  69. #define W83627HF_LD_WDT 0x08
  70. #define W83627HF_ID 0x52
  71. #define W83627S_ID 0x59
  72. #define W83697HF_ID 0x60
  73. #define W83697UG_ID 0x68
  74. #define W83637HF_ID 0x70
  75. #define W83627THF_ID 0x82
  76. #define W83687THF_ID 0x85
  77. #define W83627EHF_ID 0x88
  78. #define W83627DHG_ID 0xa0
  79. #define W83627UHG_ID 0xa2
  80. #define W83667HG_ID 0xa5
  81. #define W83627DHG_P_ID 0xb0
  82. #define W83667HG_B_ID 0xb3
  83. #define NCT6775_ID 0xb4
  84. #define NCT6776_ID 0xc3
  85. #define NCT6779_ID 0xc5
  86. #define W83627HF_WDT_TIMEOUT 0xf6
  87. #define W83697HF_WDT_TIMEOUT 0xf4
  88. #define W83627HF_WDT_CONTROL 0xf5
  89. #define W83697HF_WDT_CONTROL 0xf3
  90. static void superio_outb(int reg, int val)
  91. {
  92. outb(reg, WDT_EFER);
  93. outb(val, WDT_EFDR);
  94. }
  95. static inline int superio_inb(int reg)
  96. {
  97. outb(reg, WDT_EFER);
  98. return inb(WDT_EFDR);
  99. }
  100. static int superio_enter(void)
  101. {
  102. if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME))
  103. return -EBUSY;
  104. outb_p(0x87, WDT_EFER); /* Enter extended function mode */
  105. outb_p(0x87, WDT_EFER); /* Again according to manual */
  106. return 0;
  107. }
  108. static void superio_select(int ld)
  109. {
  110. superio_outb(0x07, ld);
  111. }
  112. static void superio_exit(void)
  113. {
  114. outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
  115. release_region(wdt_io, 2);
  116. }
  117. static int w83627hf_init(struct watchdog_device *wdog, enum chips chip)
  118. {
  119. int ret;
  120. unsigned char t;
  121. ret = superio_enter();
  122. if (ret)
  123. return ret;
  124. superio_select(W83627HF_LD_WDT);
  125. /* set CR30 bit 0 to activate GPIO2 */
  126. t = superio_inb(0x30);
  127. if (!(t & 0x01))
  128. superio_outb(0x30, t | 0x01);
  129. switch (chip) {
  130. case w83627hf:
  131. case w83627s:
  132. t = superio_inb(0x2B) & ~0x10;
  133. superio_outb(0x2B, t); /* set GPIO24 to WDT0 */
  134. break;
  135. case w83697hf:
  136. /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
  137. t = superio_inb(0x29) & ~0x60;
  138. t |= 0x20;
  139. superio_outb(0x29, t);
  140. break;
  141. case w83697ug:
  142. /* Set pin 118 to WDTO# mode */
  143. t = superio_inb(0x2b) & ~0x04;
  144. superio_outb(0x2b, t);
  145. break;
  146. case w83627thf:
  147. t = (superio_inb(0x2B) & ~0x08) | 0x04;
  148. superio_outb(0x2B, t); /* set GPIO3 to WDT0 */
  149. break;
  150. case w83627dhg:
  151. case w83627dhg_p:
  152. t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */
  153. superio_outb(0x2D, t); /* set GPIO5 to WDT0 */
  154. t = superio_inb(cr_wdt_control);
  155. t |= 0x02; /* enable the WDTO# output low pulse
  156. * to the KBRST# pin */
  157. superio_outb(cr_wdt_control, t);
  158. break;
  159. case w83637hf:
  160. break;
  161. case w83687thf:
  162. t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */
  163. superio_outb(0x2C, t);
  164. break;
  165. case w83627ehf:
  166. case w83627uhg:
  167. case w83667hg:
  168. case w83667hg_b:
  169. case nct6775:
  170. case nct6776:
  171. case nct6779:
  172. /*
  173. * These chips have a fixed WDTO# output pin (W83627UHG),
  174. * or support more than one WDTO# output pin.
  175. * Don't touch its configuration, and hope the BIOS
  176. * does the right thing.
  177. */
  178. t = superio_inb(cr_wdt_control);
  179. t |= 0x02; /* enable the WDTO# output low pulse
  180. * to the KBRST# pin */
  181. superio_outb(cr_wdt_control, t);
  182. break;
  183. default:
  184. break;
  185. }
  186. t = superio_inb(cr_wdt_timeout);
  187. if (t != 0) {
  188. if (early_disable) {
  189. pr_warn("Stopping previously enabled watchdog until userland kicks in\n");
  190. superio_outb(cr_wdt_timeout, 0);
  191. } else {
  192. pr_info("Watchdog already running. Resetting timeout to %d sec\n",
  193. wdog->timeout);
  194. superio_outb(cr_wdt_timeout, wdog->timeout);
  195. }
  196. }
  197. /* set second mode & disable keyboard turning off watchdog */
  198. t = superio_inb(cr_wdt_control) & ~0x0C;
  199. superio_outb(cr_wdt_control, t);
  200. /* reset trigger, disable keyboard & mouse turning off watchdog */
  201. t = superio_inb(0xF7) & ~0xD0;
  202. superio_outb(0xF7, t);
  203. superio_exit();
  204. return 0;
  205. }
  206. static int wdt_set_time(unsigned int timeout)
  207. {
  208. int ret;
  209. ret = superio_enter();
  210. if (ret)
  211. return ret;
  212. superio_select(W83627HF_LD_WDT);
  213. superio_outb(cr_wdt_timeout, timeout);
  214. superio_exit();
  215. return 0;
  216. }
  217. static int wdt_start(struct watchdog_device *wdog)
  218. {
  219. return wdt_set_time(wdog->timeout);
  220. }
  221. static int wdt_stop(struct watchdog_device *wdog)
  222. {
  223. return wdt_set_time(0);
  224. }
  225. static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout)
  226. {
  227. wdog->timeout = timeout;
  228. return 0;
  229. }
  230. static unsigned int wdt_get_time(struct watchdog_device *wdog)
  231. {
  232. unsigned int timeleft;
  233. int ret;
  234. ret = superio_enter();
  235. if (ret)
  236. return 0;
  237. superio_select(W83627HF_LD_WDT);
  238. timeleft = superio_inb(cr_wdt_timeout);
  239. superio_exit();
  240. return timeleft;
  241. }
  242. /*
  243. * Notifier for system down
  244. */
  245. static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
  246. void *unused)
  247. {
  248. if (code == SYS_DOWN || code == SYS_HALT)
  249. wdt_set_time(0); /* Turn the WDT off */
  250. return NOTIFY_DONE;
  251. }
  252. /*
  253. * Kernel Interfaces
  254. */
  255. static struct watchdog_info wdt_info = {
  256. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  257. .identity = "W83627HF Watchdog",
  258. };
  259. static struct watchdog_ops wdt_ops = {
  260. .owner = THIS_MODULE,
  261. .start = wdt_start,
  262. .stop = wdt_stop,
  263. .set_timeout = wdt_set_timeout,
  264. .get_timeleft = wdt_get_time,
  265. };
  266. static struct watchdog_device wdt_dev = {
  267. .info = &wdt_info,
  268. .ops = &wdt_ops,
  269. .timeout = WATCHDOG_TIMEOUT,
  270. .min_timeout = 1,
  271. .max_timeout = 255,
  272. };
  273. /*
  274. * The WDT needs to learn about soft shutdowns in order to
  275. * turn the timebomb registers off.
  276. */
  277. static struct notifier_block wdt_notifier = {
  278. .notifier_call = wdt_notify_sys,
  279. };
  280. static int wdt_find(int addr)
  281. {
  282. u8 val;
  283. int ret;
  284. cr_wdt_timeout = W83627HF_WDT_TIMEOUT;
  285. cr_wdt_control = W83627HF_WDT_CONTROL;
  286. ret = superio_enter();
  287. if (ret)
  288. return ret;
  289. superio_select(W83627HF_LD_WDT);
  290. val = superio_inb(0x20);
  291. switch (val) {
  292. case W83627HF_ID:
  293. ret = w83627hf;
  294. break;
  295. case W83627S_ID:
  296. ret = w83627s;
  297. break;
  298. case W83697HF_ID:
  299. ret = w83697hf;
  300. cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
  301. cr_wdt_control = W83697HF_WDT_CONTROL;
  302. break;
  303. case W83697UG_ID:
  304. ret = w83697ug;
  305. cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
  306. cr_wdt_control = W83697HF_WDT_CONTROL;
  307. break;
  308. case W83637HF_ID:
  309. ret = w83637hf;
  310. break;
  311. case W83627THF_ID:
  312. ret = w83627thf;
  313. break;
  314. case W83687THF_ID:
  315. ret = w83687thf;
  316. break;
  317. case W83627EHF_ID:
  318. ret = w83627ehf;
  319. break;
  320. case W83627DHG_ID:
  321. ret = w83627dhg;
  322. break;
  323. case W83627DHG_P_ID:
  324. ret = w83627dhg_p;
  325. break;
  326. case W83627UHG_ID:
  327. ret = w83627uhg;
  328. break;
  329. case W83667HG_ID:
  330. ret = w83667hg;
  331. break;
  332. case W83667HG_B_ID:
  333. ret = w83667hg_b;
  334. break;
  335. case NCT6775_ID:
  336. ret = nct6775;
  337. break;
  338. case NCT6776_ID:
  339. ret = nct6776;
  340. break;
  341. case NCT6779_ID:
  342. ret = nct6779;
  343. break;
  344. case 0xff:
  345. ret = -ENODEV;
  346. break;
  347. default:
  348. ret = -ENODEV;
  349. pr_err("Unsupported chip ID: 0x%02x\n", val);
  350. break;
  351. }
  352. superio_exit();
  353. return ret;
  354. }
  355. static int __init wdt_init(void)
  356. {
  357. int ret;
  358. int chip;
  359. const char * const chip_name[] = {
  360. "W83627HF",
  361. "W83627S",
  362. "W83697HF",
  363. "W83697UG",
  364. "W83637HF",
  365. "W83627THF",
  366. "W83687THF",
  367. "W83627EHF",
  368. "W83627DHG",
  369. "W83627UHG",
  370. "W83667HG",
  371. "W83667DHG-P",
  372. "W83667HG-B",
  373. "NCT6775",
  374. "NCT6776",
  375. "NCT6779",
  376. };
  377. wdt_io = 0x2e;
  378. chip = wdt_find(0x2e);
  379. if (chip < 0) {
  380. wdt_io = 0x4e;
  381. chip = wdt_find(0x4e);
  382. if (chip < 0)
  383. return chip;
  384. }
  385. pr_info("WDT driver for %s Super I/O chip initialising\n",
  386. chip_name[chip]);
  387. watchdog_init_timeout(&wdt_dev, timeout, NULL);
  388. watchdog_set_nowayout(&wdt_dev, nowayout);
  389. ret = w83627hf_init(&wdt_dev, chip);
  390. if (ret) {
  391. pr_err("failed to initialize watchdog (err=%d)\n", ret);
  392. return ret;
  393. }
  394. ret = register_reboot_notifier(&wdt_notifier);
  395. if (ret != 0) {
  396. pr_err("cannot register reboot notifier (err=%d)\n", ret);
  397. return ret;
  398. }
  399. ret = watchdog_register_device(&wdt_dev);
  400. if (ret)
  401. goto unreg_reboot;
  402. pr_info("initialized. timeout=%d sec (nowayout=%d)\n",
  403. wdt_dev.timeout, nowayout);
  404. return ret;
  405. unreg_reboot:
  406. unregister_reboot_notifier(&wdt_notifier);
  407. return ret;
  408. }
  409. static void __exit wdt_exit(void)
  410. {
  411. watchdog_unregister_device(&wdt_dev);
  412. unregister_reboot_notifier(&wdt_notifier);
  413. }
  414. module_init(wdt_init);
  415. module_exit(wdt_exit);
  416. MODULE_LICENSE("GPL");
  417. MODULE_AUTHOR("Pádraig Brady <P@draigBrady.com>");
  418. MODULE_DESCRIPTION("w83627hf/thf WDT driver");