events_base.c 38 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
  24. #include <linux/linkage.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/module.h>
  28. #include <linux/string.h>
  29. #include <linux/bootmem.h>
  30. #include <linux/slab.h>
  31. #include <linux/irqnr.h>
  32. #include <linux/pci.h>
  33. #ifdef CONFIG_X86
  34. #include <asm/desc.h>
  35. #include <asm/ptrace.h>
  36. #include <asm/irq.h>
  37. #include <asm/idle.h>
  38. #include <asm/io_apic.h>
  39. #include <asm/xen/page.h>
  40. #include <asm/xen/pci.h>
  41. #endif
  42. #include <asm/sync_bitops.h>
  43. #include <asm/xen/hypercall.h>
  44. #include <asm/xen/hypervisor.h>
  45. #include <xen/xen.h>
  46. #include <xen/hvm.h>
  47. #include <xen/xen-ops.h>
  48. #include <xen/events.h>
  49. #include <xen/interface/xen.h>
  50. #include <xen/interface/event_channel.h>
  51. #include <xen/interface/hvm/hvm_op.h>
  52. #include <xen/interface/hvm/params.h>
  53. #include <xen/interface/physdev.h>
  54. #include <xen/interface/sched.h>
  55. #include <xen/interface/vcpu.h>
  56. #include <asm/hw_irq.h>
  57. #include "events_internal.h"
  58. const struct evtchn_ops *evtchn_ops;
  59. /*
  60. * This lock protects updates to the following mapping and reference-count
  61. * arrays. The lock does not need to be acquired to read the mapping tables.
  62. */
  63. static DEFINE_MUTEX(irq_mapping_update_lock);
  64. static LIST_HEAD(xen_irq_list_head);
  65. /* IRQ <-> VIRQ mapping. */
  66. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  67. /* IRQ <-> IPI mapping */
  68. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  69. int **evtchn_to_irq;
  70. #ifdef CONFIG_X86
  71. static unsigned long *pirq_eoi_map;
  72. #endif
  73. static bool (*pirq_needs_eoi)(unsigned irq);
  74. #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  75. #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  76. #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
  77. /* Xen will never allocate port zero for any purpose. */
  78. #define VALID_EVTCHN(chn) ((chn) != 0)
  79. static struct irq_chip xen_dynamic_chip;
  80. static struct irq_chip xen_percpu_chip;
  81. static struct irq_chip xen_pirq_chip;
  82. static void enable_dynirq(struct irq_data *data);
  83. static void disable_dynirq(struct irq_data *data);
  84. static void clear_evtchn_to_irq_row(unsigned row)
  85. {
  86. unsigned col;
  87. for (col = 0; col < EVTCHN_PER_ROW; col++)
  88. evtchn_to_irq[row][col] = -1;
  89. }
  90. static void clear_evtchn_to_irq_all(void)
  91. {
  92. unsigned row;
  93. for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
  94. if (evtchn_to_irq[row] == NULL)
  95. continue;
  96. clear_evtchn_to_irq_row(row);
  97. }
  98. }
  99. static int set_evtchn_to_irq(unsigned evtchn, unsigned irq)
  100. {
  101. unsigned row;
  102. unsigned col;
  103. if (evtchn >= xen_evtchn_max_channels())
  104. return -EINVAL;
  105. row = EVTCHN_ROW(evtchn);
  106. col = EVTCHN_COL(evtchn);
  107. if (evtchn_to_irq[row] == NULL) {
  108. /* Unallocated irq entries return -1 anyway */
  109. if (irq == -1)
  110. return 0;
  111. evtchn_to_irq[row] = (int *)get_zeroed_page(GFP_KERNEL);
  112. if (evtchn_to_irq[row] == NULL)
  113. return -ENOMEM;
  114. clear_evtchn_to_irq_row(row);
  115. }
  116. evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)] = irq;
  117. return 0;
  118. }
  119. int get_evtchn_to_irq(unsigned evtchn)
  120. {
  121. if (evtchn >= xen_evtchn_max_channels())
  122. return -1;
  123. if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
  124. return -1;
  125. return evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)];
  126. }
  127. /* Get info for IRQ */
  128. struct irq_info *info_for_irq(unsigned irq)
  129. {
  130. return irq_get_handler_data(irq);
  131. }
  132. /* Constructors for packed IRQ information. */
  133. static int xen_irq_info_common_setup(struct irq_info *info,
  134. unsigned irq,
  135. enum xen_irq_type type,
  136. unsigned evtchn,
  137. unsigned short cpu)
  138. {
  139. int ret;
  140. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  141. info->type = type;
  142. info->irq = irq;
  143. info->evtchn = evtchn;
  144. info->cpu = cpu;
  145. ret = set_evtchn_to_irq(evtchn, irq);
  146. if (ret < 0)
  147. return ret;
  148. irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
  149. return xen_evtchn_port_setup(info);
  150. }
  151. static int xen_irq_info_evtchn_setup(unsigned irq,
  152. unsigned evtchn)
  153. {
  154. struct irq_info *info = info_for_irq(irq);
  155. return xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0);
  156. }
  157. static int xen_irq_info_ipi_setup(unsigned cpu,
  158. unsigned irq,
  159. unsigned evtchn,
  160. enum ipi_vector ipi)
  161. {
  162. struct irq_info *info = info_for_irq(irq);
  163. info->u.ipi = ipi;
  164. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  165. return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0);
  166. }
  167. static int xen_irq_info_virq_setup(unsigned cpu,
  168. unsigned irq,
  169. unsigned evtchn,
  170. unsigned virq)
  171. {
  172. struct irq_info *info = info_for_irq(irq);
  173. info->u.virq = virq;
  174. per_cpu(virq_to_irq, cpu)[virq] = irq;
  175. return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0);
  176. }
  177. static int xen_irq_info_pirq_setup(unsigned irq,
  178. unsigned evtchn,
  179. unsigned pirq,
  180. unsigned gsi,
  181. uint16_t domid,
  182. unsigned char flags)
  183. {
  184. struct irq_info *info = info_for_irq(irq);
  185. info->u.pirq.pirq = pirq;
  186. info->u.pirq.gsi = gsi;
  187. info->u.pirq.domid = domid;
  188. info->u.pirq.flags = flags;
  189. return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0);
  190. }
  191. static void xen_irq_info_cleanup(struct irq_info *info)
  192. {
  193. set_evtchn_to_irq(info->evtchn, -1);
  194. info->evtchn = 0;
  195. }
  196. /*
  197. * Accessors for packed IRQ information.
  198. */
  199. unsigned int evtchn_from_irq(unsigned irq)
  200. {
  201. if (unlikely(WARN(irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  202. return 0;
  203. return info_for_irq(irq)->evtchn;
  204. }
  205. unsigned irq_from_evtchn(unsigned int evtchn)
  206. {
  207. return get_evtchn_to_irq(evtchn);
  208. }
  209. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  210. int irq_from_virq(unsigned int cpu, unsigned int virq)
  211. {
  212. return per_cpu(virq_to_irq, cpu)[virq];
  213. }
  214. static enum ipi_vector ipi_from_irq(unsigned irq)
  215. {
  216. struct irq_info *info = info_for_irq(irq);
  217. BUG_ON(info == NULL);
  218. BUG_ON(info->type != IRQT_IPI);
  219. return info->u.ipi;
  220. }
  221. static unsigned virq_from_irq(unsigned irq)
  222. {
  223. struct irq_info *info = info_for_irq(irq);
  224. BUG_ON(info == NULL);
  225. BUG_ON(info->type != IRQT_VIRQ);
  226. return info->u.virq;
  227. }
  228. static unsigned pirq_from_irq(unsigned irq)
  229. {
  230. struct irq_info *info = info_for_irq(irq);
  231. BUG_ON(info == NULL);
  232. BUG_ON(info->type != IRQT_PIRQ);
  233. return info->u.pirq.pirq;
  234. }
  235. static enum xen_irq_type type_from_irq(unsigned irq)
  236. {
  237. return info_for_irq(irq)->type;
  238. }
  239. unsigned cpu_from_irq(unsigned irq)
  240. {
  241. return info_for_irq(irq)->cpu;
  242. }
  243. unsigned int cpu_from_evtchn(unsigned int evtchn)
  244. {
  245. int irq = get_evtchn_to_irq(evtchn);
  246. unsigned ret = 0;
  247. if (irq != -1)
  248. ret = cpu_from_irq(irq);
  249. return ret;
  250. }
  251. #ifdef CONFIG_X86
  252. static bool pirq_check_eoi_map(unsigned irq)
  253. {
  254. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  255. }
  256. #endif
  257. static bool pirq_needs_eoi_flag(unsigned irq)
  258. {
  259. struct irq_info *info = info_for_irq(irq);
  260. BUG_ON(info->type != IRQT_PIRQ);
  261. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  262. }
  263. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  264. {
  265. int irq = get_evtchn_to_irq(chn);
  266. struct irq_info *info = info_for_irq(irq);
  267. BUG_ON(irq == -1);
  268. #ifdef CONFIG_SMP
  269. cpumask_copy(irq_get_irq_data(irq)->affinity, cpumask_of(cpu));
  270. #endif
  271. xen_evtchn_port_bind_to_cpu(info, cpu);
  272. info->cpu = cpu;
  273. }
  274. static void xen_evtchn_mask_all(void)
  275. {
  276. unsigned int evtchn;
  277. for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
  278. mask_evtchn(evtchn);
  279. }
  280. /**
  281. * notify_remote_via_irq - send event to remote end of event channel via irq
  282. * @irq: irq of event channel to send event to
  283. *
  284. * Unlike notify_remote_via_evtchn(), this is safe to use across
  285. * save/restore. Notifications on a broken connection are silently
  286. * dropped.
  287. */
  288. void notify_remote_via_irq(int irq)
  289. {
  290. int evtchn = evtchn_from_irq(irq);
  291. if (VALID_EVTCHN(evtchn))
  292. notify_remote_via_evtchn(evtchn);
  293. }
  294. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  295. static void xen_irq_init(unsigned irq)
  296. {
  297. struct irq_info *info;
  298. #ifdef CONFIG_SMP
  299. /* By default all event channels notify CPU#0. */
  300. cpumask_copy(irq_get_irq_data(irq)->affinity, cpumask_of(0));
  301. #endif
  302. info = kzalloc(sizeof(*info), GFP_KERNEL);
  303. if (info == NULL)
  304. panic("Unable to allocate metadata for IRQ%d\n", irq);
  305. info->type = IRQT_UNBOUND;
  306. info->refcnt = -1;
  307. irq_set_handler_data(irq, info);
  308. list_add_tail(&info->list, &xen_irq_list_head);
  309. }
  310. static int __must_check xen_allocate_irqs_dynamic(int nvec)
  311. {
  312. int i, irq = irq_alloc_descs(-1, 0, nvec, -1);
  313. if (irq >= 0) {
  314. for (i = 0; i < nvec; i++)
  315. xen_irq_init(irq + i);
  316. }
  317. return irq;
  318. }
  319. static inline int __must_check xen_allocate_irq_dynamic(void)
  320. {
  321. return xen_allocate_irqs_dynamic(1);
  322. }
  323. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  324. {
  325. int irq;
  326. /*
  327. * A PV guest has no concept of a GSI (since it has no ACPI
  328. * nor access to/knowledge of the physical APICs). Therefore
  329. * all IRQs are dynamically allocated from the entire IRQ
  330. * space.
  331. */
  332. if (xen_pv_domain() && !xen_initial_domain())
  333. return xen_allocate_irq_dynamic();
  334. /* Legacy IRQ descriptors are already allocated by the arch. */
  335. if (gsi < NR_IRQS_LEGACY)
  336. irq = gsi;
  337. else
  338. irq = irq_alloc_desc_at(gsi, -1);
  339. xen_irq_init(irq);
  340. return irq;
  341. }
  342. static void xen_free_irq(unsigned irq)
  343. {
  344. struct irq_info *info = irq_get_handler_data(irq);
  345. if (WARN_ON(!info))
  346. return;
  347. list_del(&info->list);
  348. irq_set_handler_data(irq, NULL);
  349. WARN_ON(info->refcnt > 0);
  350. kfree(info);
  351. /* Legacy IRQ descriptors are managed by the arch. */
  352. if (irq < NR_IRQS_LEGACY)
  353. return;
  354. irq_free_desc(irq);
  355. }
  356. static void xen_evtchn_close(unsigned int port)
  357. {
  358. struct evtchn_close close;
  359. close.port = port;
  360. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  361. BUG();
  362. }
  363. static void pirq_query_unmask(int irq)
  364. {
  365. struct physdev_irq_status_query irq_status;
  366. struct irq_info *info = info_for_irq(irq);
  367. BUG_ON(info->type != IRQT_PIRQ);
  368. irq_status.irq = pirq_from_irq(irq);
  369. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  370. irq_status.flags = 0;
  371. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  372. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  373. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  374. }
  375. static void eoi_pirq(struct irq_data *data)
  376. {
  377. int evtchn = evtchn_from_irq(data->irq);
  378. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  379. int rc = 0;
  380. irq_move_irq(data);
  381. if (VALID_EVTCHN(evtchn))
  382. clear_evtchn(evtchn);
  383. if (pirq_needs_eoi(data->irq)) {
  384. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  385. WARN_ON(rc);
  386. }
  387. }
  388. static void mask_ack_pirq(struct irq_data *data)
  389. {
  390. disable_dynirq(data);
  391. eoi_pirq(data);
  392. }
  393. static unsigned int __startup_pirq(unsigned int irq)
  394. {
  395. struct evtchn_bind_pirq bind_pirq;
  396. struct irq_info *info = info_for_irq(irq);
  397. int evtchn = evtchn_from_irq(irq);
  398. int rc;
  399. BUG_ON(info->type != IRQT_PIRQ);
  400. if (VALID_EVTCHN(evtchn))
  401. goto out;
  402. bind_pirq.pirq = pirq_from_irq(irq);
  403. /* NB. We are happy to share unless we are probing. */
  404. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  405. BIND_PIRQ__WILL_SHARE : 0;
  406. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  407. if (rc != 0) {
  408. pr_warn("Failed to obtain physical IRQ %d\n", irq);
  409. return 0;
  410. }
  411. evtchn = bind_pirq.port;
  412. pirq_query_unmask(irq);
  413. rc = set_evtchn_to_irq(evtchn, irq);
  414. if (rc)
  415. goto err;
  416. info->evtchn = evtchn;
  417. bind_evtchn_to_cpu(evtchn, 0);
  418. rc = xen_evtchn_port_setup(info);
  419. if (rc)
  420. goto err;
  421. out:
  422. unmask_evtchn(evtchn);
  423. eoi_pirq(irq_get_irq_data(irq));
  424. return 0;
  425. err:
  426. pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc);
  427. xen_evtchn_close(evtchn);
  428. return 0;
  429. }
  430. static unsigned int startup_pirq(struct irq_data *data)
  431. {
  432. return __startup_pirq(data->irq);
  433. }
  434. static void shutdown_pirq(struct irq_data *data)
  435. {
  436. unsigned int irq = data->irq;
  437. struct irq_info *info = info_for_irq(irq);
  438. unsigned evtchn = evtchn_from_irq(irq);
  439. BUG_ON(info->type != IRQT_PIRQ);
  440. if (!VALID_EVTCHN(evtchn))
  441. return;
  442. mask_evtchn(evtchn);
  443. xen_evtchn_close(evtchn);
  444. xen_irq_info_cleanup(info);
  445. }
  446. static void enable_pirq(struct irq_data *data)
  447. {
  448. startup_pirq(data);
  449. }
  450. static void disable_pirq(struct irq_data *data)
  451. {
  452. disable_dynirq(data);
  453. }
  454. int xen_irq_from_gsi(unsigned gsi)
  455. {
  456. struct irq_info *info;
  457. list_for_each_entry(info, &xen_irq_list_head, list) {
  458. if (info->type != IRQT_PIRQ)
  459. continue;
  460. if (info->u.pirq.gsi == gsi)
  461. return info->irq;
  462. }
  463. return -1;
  464. }
  465. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  466. static void __unbind_from_irq(unsigned int irq)
  467. {
  468. int evtchn = evtchn_from_irq(irq);
  469. struct irq_info *info = irq_get_handler_data(irq);
  470. if (info->refcnt > 0) {
  471. info->refcnt--;
  472. if (info->refcnt != 0)
  473. return;
  474. }
  475. if (VALID_EVTCHN(evtchn)) {
  476. unsigned int cpu = cpu_from_irq(irq);
  477. xen_evtchn_close(evtchn);
  478. switch (type_from_irq(irq)) {
  479. case IRQT_VIRQ:
  480. per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1;
  481. break;
  482. case IRQT_IPI:
  483. per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1;
  484. break;
  485. default:
  486. break;
  487. }
  488. xen_irq_info_cleanup(info);
  489. }
  490. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  491. xen_free_irq(irq);
  492. }
  493. /*
  494. * Do not make any assumptions regarding the relationship between the
  495. * IRQ number returned here and the Xen pirq argument.
  496. *
  497. * Note: We don't assign an event channel until the irq actually started
  498. * up. Return an existing irq if we've already got one for the gsi.
  499. *
  500. * Shareable implies level triggered, not shareable implies edge
  501. * triggered here.
  502. */
  503. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  504. unsigned pirq, int shareable, char *name)
  505. {
  506. int irq = -1;
  507. struct physdev_irq irq_op;
  508. int ret;
  509. mutex_lock(&irq_mapping_update_lock);
  510. irq = xen_irq_from_gsi(gsi);
  511. if (irq != -1) {
  512. pr_info("%s: returning irq %d for gsi %u\n",
  513. __func__, irq, gsi);
  514. goto out;
  515. }
  516. irq = xen_allocate_irq_gsi(gsi);
  517. if (irq < 0)
  518. goto out;
  519. irq_op.irq = irq;
  520. irq_op.vector = 0;
  521. /* Only the privileged domain can do this. For non-priv, the pcifront
  522. * driver provides a PCI bus that does the call to do exactly
  523. * this in the priv domain. */
  524. if (xen_initial_domain() &&
  525. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  526. xen_free_irq(irq);
  527. irq = -ENOSPC;
  528. goto out;
  529. }
  530. ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF,
  531. shareable ? PIRQ_SHAREABLE : 0);
  532. if (ret < 0) {
  533. __unbind_from_irq(irq);
  534. irq = ret;
  535. goto out;
  536. }
  537. pirq_query_unmask(irq);
  538. /* We try to use the handler with the appropriate semantic for the
  539. * type of interrupt: if the interrupt is an edge triggered
  540. * interrupt we use handle_edge_irq.
  541. *
  542. * On the other hand if the interrupt is level triggered we use
  543. * handle_fasteoi_irq like the native code does for this kind of
  544. * interrupts.
  545. *
  546. * Depending on the Xen version, pirq_needs_eoi might return true
  547. * not only for level triggered interrupts but for edge triggered
  548. * interrupts too. In any case Xen always honors the eoi mechanism,
  549. * not injecting any more pirqs of the same kind if the first one
  550. * hasn't received an eoi yet. Therefore using the fasteoi handler
  551. * is the right choice either way.
  552. */
  553. if (shareable)
  554. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  555. handle_fasteoi_irq, name);
  556. else
  557. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  558. handle_edge_irq, name);
  559. out:
  560. mutex_unlock(&irq_mapping_update_lock);
  561. return irq;
  562. }
  563. #ifdef CONFIG_PCI_MSI
  564. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  565. {
  566. int rc;
  567. struct physdev_get_free_pirq op_get_free_pirq;
  568. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  569. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  570. WARN_ONCE(rc == -ENOSYS,
  571. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  572. return rc ? -1 : op_get_free_pirq.pirq;
  573. }
  574. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  575. int pirq, int nvec, const char *name, domid_t domid)
  576. {
  577. int i, irq, ret;
  578. mutex_lock(&irq_mapping_update_lock);
  579. irq = xen_allocate_irqs_dynamic(nvec);
  580. if (irq < 0)
  581. goto out;
  582. for (i = 0; i < nvec; i++) {
  583. irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name);
  584. ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid,
  585. i == 0 ? 0 : PIRQ_MSI_GROUP);
  586. if (ret < 0)
  587. goto error_irq;
  588. }
  589. ret = irq_set_msi_desc(irq, msidesc);
  590. if (ret < 0)
  591. goto error_irq;
  592. out:
  593. mutex_unlock(&irq_mapping_update_lock);
  594. return irq;
  595. error_irq:
  596. for (; i >= 0; i--)
  597. __unbind_from_irq(irq + i);
  598. mutex_unlock(&irq_mapping_update_lock);
  599. return ret;
  600. }
  601. #endif
  602. int xen_destroy_irq(int irq)
  603. {
  604. struct physdev_unmap_pirq unmap_irq;
  605. struct irq_info *info = info_for_irq(irq);
  606. int rc = -ENOENT;
  607. mutex_lock(&irq_mapping_update_lock);
  608. /*
  609. * If trying to remove a vector in a MSI group different
  610. * than the first one skip the PIRQ unmap unless this vector
  611. * is the first one in the group.
  612. */
  613. if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) {
  614. unmap_irq.pirq = info->u.pirq.pirq;
  615. unmap_irq.domid = info->u.pirq.domid;
  616. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  617. /* If another domain quits without making the pci_disable_msix
  618. * call, the Xen hypervisor takes care of freeing the PIRQs
  619. * (free_domain_pirqs).
  620. */
  621. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  622. pr_info("domain %d does not have %d anymore\n",
  623. info->u.pirq.domid, info->u.pirq.pirq);
  624. else if (rc) {
  625. pr_warn("unmap irq failed %d\n", rc);
  626. goto out;
  627. }
  628. }
  629. xen_free_irq(irq);
  630. out:
  631. mutex_unlock(&irq_mapping_update_lock);
  632. return rc;
  633. }
  634. int xen_irq_from_pirq(unsigned pirq)
  635. {
  636. int irq;
  637. struct irq_info *info;
  638. mutex_lock(&irq_mapping_update_lock);
  639. list_for_each_entry(info, &xen_irq_list_head, list) {
  640. if (info->type != IRQT_PIRQ)
  641. continue;
  642. irq = info->irq;
  643. if (info->u.pirq.pirq == pirq)
  644. goto out;
  645. }
  646. irq = -1;
  647. out:
  648. mutex_unlock(&irq_mapping_update_lock);
  649. return irq;
  650. }
  651. int xen_pirq_from_irq(unsigned irq)
  652. {
  653. return pirq_from_irq(irq);
  654. }
  655. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  656. int bind_evtchn_to_irq(unsigned int evtchn)
  657. {
  658. int irq;
  659. int ret;
  660. if (evtchn >= xen_evtchn_max_channels())
  661. return -ENOMEM;
  662. mutex_lock(&irq_mapping_update_lock);
  663. irq = get_evtchn_to_irq(evtchn);
  664. if (irq == -1) {
  665. irq = xen_allocate_irq_dynamic();
  666. if (irq < 0)
  667. goto out;
  668. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  669. handle_edge_irq, "event");
  670. ret = xen_irq_info_evtchn_setup(irq, evtchn);
  671. if (ret < 0) {
  672. __unbind_from_irq(irq);
  673. irq = ret;
  674. goto out;
  675. }
  676. /* New interdomain events are bound to VCPU 0. */
  677. bind_evtchn_to_cpu(evtchn, 0);
  678. } else {
  679. struct irq_info *info = info_for_irq(irq);
  680. WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
  681. }
  682. out:
  683. mutex_unlock(&irq_mapping_update_lock);
  684. return irq;
  685. }
  686. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  687. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  688. {
  689. struct evtchn_bind_ipi bind_ipi;
  690. int evtchn, irq;
  691. int ret;
  692. mutex_lock(&irq_mapping_update_lock);
  693. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  694. if (irq == -1) {
  695. irq = xen_allocate_irq_dynamic();
  696. if (irq < 0)
  697. goto out;
  698. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  699. handle_percpu_irq, "ipi");
  700. bind_ipi.vcpu = cpu;
  701. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  702. &bind_ipi) != 0)
  703. BUG();
  704. evtchn = bind_ipi.port;
  705. ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
  706. if (ret < 0) {
  707. __unbind_from_irq(irq);
  708. irq = ret;
  709. goto out;
  710. }
  711. bind_evtchn_to_cpu(evtchn, cpu);
  712. } else {
  713. struct irq_info *info = info_for_irq(irq);
  714. WARN_ON(info == NULL || info->type != IRQT_IPI);
  715. }
  716. out:
  717. mutex_unlock(&irq_mapping_update_lock);
  718. return irq;
  719. }
  720. int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  721. unsigned int remote_port)
  722. {
  723. struct evtchn_bind_interdomain bind_interdomain;
  724. int err;
  725. bind_interdomain.remote_dom = remote_domain;
  726. bind_interdomain.remote_port = remote_port;
  727. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  728. &bind_interdomain);
  729. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  730. }
  731. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq);
  732. static int find_virq(unsigned int virq, unsigned int cpu)
  733. {
  734. struct evtchn_status status;
  735. int port, rc = -ENOENT;
  736. memset(&status, 0, sizeof(status));
  737. for (port = 0; port < xen_evtchn_max_channels(); port++) {
  738. status.dom = DOMID_SELF;
  739. status.port = port;
  740. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  741. if (rc < 0)
  742. continue;
  743. if (status.status != EVTCHNSTAT_virq)
  744. continue;
  745. if (status.u.virq == virq && status.vcpu == cpu) {
  746. rc = port;
  747. break;
  748. }
  749. }
  750. return rc;
  751. }
  752. /**
  753. * xen_evtchn_nr_channels - number of usable event channel ports
  754. *
  755. * This may be less than the maximum supported by the current
  756. * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
  757. * supported.
  758. */
  759. unsigned xen_evtchn_nr_channels(void)
  760. {
  761. return evtchn_ops->nr_channels();
  762. }
  763. EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
  764. int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
  765. {
  766. struct evtchn_bind_virq bind_virq;
  767. int evtchn, irq, ret;
  768. mutex_lock(&irq_mapping_update_lock);
  769. irq = per_cpu(virq_to_irq, cpu)[virq];
  770. if (irq == -1) {
  771. irq = xen_allocate_irq_dynamic();
  772. if (irq < 0)
  773. goto out;
  774. if (percpu)
  775. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  776. handle_percpu_irq, "virq");
  777. else
  778. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  779. handle_edge_irq, "virq");
  780. bind_virq.virq = virq;
  781. bind_virq.vcpu = cpu;
  782. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  783. &bind_virq);
  784. if (ret == 0)
  785. evtchn = bind_virq.port;
  786. else {
  787. if (ret == -EEXIST)
  788. ret = find_virq(virq, cpu);
  789. BUG_ON(ret < 0);
  790. evtchn = ret;
  791. }
  792. ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
  793. if (ret < 0) {
  794. __unbind_from_irq(irq);
  795. irq = ret;
  796. goto out;
  797. }
  798. bind_evtchn_to_cpu(evtchn, cpu);
  799. } else {
  800. struct irq_info *info = info_for_irq(irq);
  801. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  802. }
  803. out:
  804. mutex_unlock(&irq_mapping_update_lock);
  805. return irq;
  806. }
  807. static void unbind_from_irq(unsigned int irq)
  808. {
  809. mutex_lock(&irq_mapping_update_lock);
  810. __unbind_from_irq(irq);
  811. mutex_unlock(&irq_mapping_update_lock);
  812. }
  813. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  814. irq_handler_t handler,
  815. unsigned long irqflags,
  816. const char *devname, void *dev_id)
  817. {
  818. int irq, retval;
  819. irq = bind_evtchn_to_irq(evtchn);
  820. if (irq < 0)
  821. return irq;
  822. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  823. if (retval != 0) {
  824. unbind_from_irq(irq);
  825. return retval;
  826. }
  827. return irq;
  828. }
  829. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  830. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  831. unsigned int remote_port,
  832. irq_handler_t handler,
  833. unsigned long irqflags,
  834. const char *devname,
  835. void *dev_id)
  836. {
  837. int irq, retval;
  838. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  839. if (irq < 0)
  840. return irq;
  841. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  842. if (retval != 0) {
  843. unbind_from_irq(irq);
  844. return retval;
  845. }
  846. return irq;
  847. }
  848. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  849. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  850. irq_handler_t handler,
  851. unsigned long irqflags, const char *devname, void *dev_id)
  852. {
  853. int irq, retval;
  854. irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
  855. if (irq < 0)
  856. return irq;
  857. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  858. if (retval != 0) {
  859. unbind_from_irq(irq);
  860. return retval;
  861. }
  862. return irq;
  863. }
  864. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  865. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  866. unsigned int cpu,
  867. irq_handler_t handler,
  868. unsigned long irqflags,
  869. const char *devname,
  870. void *dev_id)
  871. {
  872. int irq, retval;
  873. irq = bind_ipi_to_irq(ipi, cpu);
  874. if (irq < 0)
  875. return irq;
  876. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  877. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  878. if (retval != 0) {
  879. unbind_from_irq(irq);
  880. return retval;
  881. }
  882. return irq;
  883. }
  884. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  885. {
  886. struct irq_info *info = irq_get_handler_data(irq);
  887. if (WARN_ON(!info))
  888. return;
  889. free_irq(irq, dev_id);
  890. unbind_from_irq(irq);
  891. }
  892. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  893. /**
  894. * xen_set_irq_priority() - set an event channel priority.
  895. * @irq:irq bound to an event channel.
  896. * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
  897. */
  898. int xen_set_irq_priority(unsigned irq, unsigned priority)
  899. {
  900. struct evtchn_set_priority set_priority;
  901. set_priority.port = evtchn_from_irq(irq);
  902. set_priority.priority = priority;
  903. return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
  904. &set_priority);
  905. }
  906. EXPORT_SYMBOL_GPL(xen_set_irq_priority);
  907. int evtchn_make_refcounted(unsigned int evtchn)
  908. {
  909. int irq = get_evtchn_to_irq(evtchn);
  910. struct irq_info *info;
  911. if (irq == -1)
  912. return -ENOENT;
  913. info = irq_get_handler_data(irq);
  914. if (!info)
  915. return -ENOENT;
  916. WARN_ON(info->refcnt != -1);
  917. info->refcnt = 1;
  918. return 0;
  919. }
  920. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  921. int evtchn_get(unsigned int evtchn)
  922. {
  923. int irq;
  924. struct irq_info *info;
  925. int err = -ENOENT;
  926. if (evtchn >= xen_evtchn_max_channels())
  927. return -EINVAL;
  928. mutex_lock(&irq_mapping_update_lock);
  929. irq = get_evtchn_to_irq(evtchn);
  930. if (irq == -1)
  931. goto done;
  932. info = irq_get_handler_data(irq);
  933. if (!info)
  934. goto done;
  935. err = -EINVAL;
  936. if (info->refcnt <= 0)
  937. goto done;
  938. info->refcnt++;
  939. err = 0;
  940. done:
  941. mutex_unlock(&irq_mapping_update_lock);
  942. return err;
  943. }
  944. EXPORT_SYMBOL_GPL(evtchn_get);
  945. void evtchn_put(unsigned int evtchn)
  946. {
  947. int irq = get_evtchn_to_irq(evtchn);
  948. if (WARN_ON(irq == -1))
  949. return;
  950. unbind_from_irq(irq);
  951. }
  952. EXPORT_SYMBOL_GPL(evtchn_put);
  953. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  954. {
  955. int irq;
  956. #ifdef CONFIG_X86
  957. if (unlikely(vector == XEN_NMI_VECTOR)) {
  958. int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, cpu, NULL);
  959. if (rc < 0)
  960. printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
  961. return;
  962. }
  963. #endif
  964. irq = per_cpu(ipi_to_irq, cpu)[vector];
  965. BUG_ON(irq < 0);
  966. notify_remote_via_irq(irq);
  967. }
  968. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  969. static void __xen_evtchn_do_upcall(void)
  970. {
  971. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  972. int cpu = get_cpu();
  973. unsigned count;
  974. do {
  975. vcpu_info->evtchn_upcall_pending = 0;
  976. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  977. goto out;
  978. xen_evtchn_handle_events(cpu);
  979. BUG_ON(!irqs_disabled());
  980. count = __this_cpu_read(xed_nesting_count);
  981. __this_cpu_write(xed_nesting_count, 0);
  982. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  983. out:
  984. put_cpu();
  985. }
  986. void xen_evtchn_do_upcall(struct pt_regs *regs)
  987. {
  988. struct pt_regs *old_regs = set_irq_regs(regs);
  989. irq_enter();
  990. #ifdef CONFIG_X86
  991. exit_idle();
  992. inc_irq_stat(irq_hv_callback_count);
  993. #endif
  994. __xen_evtchn_do_upcall();
  995. irq_exit();
  996. set_irq_regs(old_regs);
  997. }
  998. void xen_hvm_evtchn_do_upcall(void)
  999. {
  1000. __xen_evtchn_do_upcall();
  1001. }
  1002. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1003. /* Rebind a new event channel to an existing irq. */
  1004. void rebind_evtchn_irq(int evtchn, int irq)
  1005. {
  1006. struct irq_info *info = info_for_irq(irq);
  1007. if (WARN_ON(!info))
  1008. return;
  1009. /* Make sure the irq is masked, since the new event channel
  1010. will also be masked. */
  1011. disable_irq(irq);
  1012. mutex_lock(&irq_mapping_update_lock);
  1013. /* After resume the irq<->evtchn mappings are all cleared out */
  1014. BUG_ON(get_evtchn_to_irq(evtchn) != -1);
  1015. /* Expect irq to have been bound before,
  1016. so there should be a proper type */
  1017. BUG_ON(info->type == IRQT_UNBOUND);
  1018. (void)xen_irq_info_evtchn_setup(irq, evtchn);
  1019. mutex_unlock(&irq_mapping_update_lock);
  1020. bind_evtchn_to_cpu(evtchn, info->cpu);
  1021. /* This will be deferred until interrupt is processed */
  1022. irq_set_affinity(irq, cpumask_of(info->cpu));
  1023. /* Unmask the event channel. */
  1024. enable_irq(irq);
  1025. }
  1026. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1027. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1028. {
  1029. struct evtchn_bind_vcpu bind_vcpu;
  1030. int evtchn = evtchn_from_irq(irq);
  1031. int masked;
  1032. if (!VALID_EVTCHN(evtchn))
  1033. return -1;
  1034. /*
  1035. * Events delivered via platform PCI interrupts are always
  1036. * routed to vcpu 0 and hence cannot be rebound.
  1037. */
  1038. if (xen_hvm_domain() && !xen_have_vector_callback)
  1039. return -1;
  1040. /* Send future instances of this interrupt to other vcpu. */
  1041. bind_vcpu.port = evtchn;
  1042. bind_vcpu.vcpu = tcpu;
  1043. /*
  1044. * Mask the event while changing the VCPU binding to prevent
  1045. * it being delivered on an unexpected VCPU.
  1046. */
  1047. masked = test_and_set_mask(evtchn);
  1048. /*
  1049. * If this fails, it usually just indicates that we're dealing with a
  1050. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1051. * it, but don't do the xenlinux-level rebind in that case.
  1052. */
  1053. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1054. bind_evtchn_to_cpu(evtchn, tcpu);
  1055. if (!masked)
  1056. unmask_evtchn(evtchn);
  1057. return 0;
  1058. }
  1059. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1060. bool force)
  1061. {
  1062. unsigned tcpu = cpumask_first_and(dest, cpu_online_mask);
  1063. return rebind_irq_to_cpu(data->irq, tcpu);
  1064. }
  1065. static void enable_dynirq(struct irq_data *data)
  1066. {
  1067. int evtchn = evtchn_from_irq(data->irq);
  1068. if (VALID_EVTCHN(evtchn))
  1069. unmask_evtchn(evtchn);
  1070. }
  1071. static void disable_dynirq(struct irq_data *data)
  1072. {
  1073. int evtchn = evtchn_from_irq(data->irq);
  1074. if (VALID_EVTCHN(evtchn))
  1075. mask_evtchn(evtchn);
  1076. }
  1077. static void ack_dynirq(struct irq_data *data)
  1078. {
  1079. int evtchn = evtchn_from_irq(data->irq);
  1080. irq_move_irq(data);
  1081. if (VALID_EVTCHN(evtchn))
  1082. clear_evtchn(evtchn);
  1083. }
  1084. static void mask_ack_dynirq(struct irq_data *data)
  1085. {
  1086. disable_dynirq(data);
  1087. ack_dynirq(data);
  1088. }
  1089. static int retrigger_dynirq(struct irq_data *data)
  1090. {
  1091. unsigned int evtchn = evtchn_from_irq(data->irq);
  1092. int masked;
  1093. if (!VALID_EVTCHN(evtchn))
  1094. return 0;
  1095. masked = test_and_set_mask(evtchn);
  1096. set_evtchn(evtchn);
  1097. if (!masked)
  1098. unmask_evtchn(evtchn);
  1099. return 1;
  1100. }
  1101. static void restore_pirqs(void)
  1102. {
  1103. int pirq, rc, irq, gsi;
  1104. struct physdev_map_pirq map_irq;
  1105. struct irq_info *info;
  1106. list_for_each_entry(info, &xen_irq_list_head, list) {
  1107. if (info->type != IRQT_PIRQ)
  1108. continue;
  1109. pirq = info->u.pirq.pirq;
  1110. gsi = info->u.pirq.gsi;
  1111. irq = info->irq;
  1112. /* save/restore of PT devices doesn't work, so at this point the
  1113. * only devices present are GSI based emulated devices */
  1114. if (!gsi)
  1115. continue;
  1116. map_irq.domid = DOMID_SELF;
  1117. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1118. map_irq.index = gsi;
  1119. map_irq.pirq = pirq;
  1120. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1121. if (rc) {
  1122. pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1123. gsi, irq, pirq, rc);
  1124. xen_free_irq(irq);
  1125. continue;
  1126. }
  1127. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1128. __startup_pirq(irq);
  1129. }
  1130. }
  1131. static void restore_cpu_virqs(unsigned int cpu)
  1132. {
  1133. struct evtchn_bind_virq bind_virq;
  1134. int virq, irq, evtchn;
  1135. for (virq = 0; virq < NR_VIRQS; virq++) {
  1136. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1137. continue;
  1138. BUG_ON(virq_from_irq(irq) != virq);
  1139. /* Get a new binding from Xen. */
  1140. bind_virq.virq = virq;
  1141. bind_virq.vcpu = cpu;
  1142. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1143. &bind_virq) != 0)
  1144. BUG();
  1145. evtchn = bind_virq.port;
  1146. /* Record the new mapping. */
  1147. (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
  1148. bind_evtchn_to_cpu(evtchn, cpu);
  1149. }
  1150. }
  1151. static void restore_cpu_ipis(unsigned int cpu)
  1152. {
  1153. struct evtchn_bind_ipi bind_ipi;
  1154. int ipi, irq, evtchn;
  1155. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1156. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1157. continue;
  1158. BUG_ON(ipi_from_irq(irq) != ipi);
  1159. /* Get a new binding from Xen. */
  1160. bind_ipi.vcpu = cpu;
  1161. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1162. &bind_ipi) != 0)
  1163. BUG();
  1164. evtchn = bind_ipi.port;
  1165. /* Record the new mapping. */
  1166. (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
  1167. bind_evtchn_to_cpu(evtchn, cpu);
  1168. }
  1169. }
  1170. /* Clear an irq's pending state, in preparation for polling on it */
  1171. void xen_clear_irq_pending(int irq)
  1172. {
  1173. int evtchn = evtchn_from_irq(irq);
  1174. if (VALID_EVTCHN(evtchn))
  1175. clear_evtchn(evtchn);
  1176. }
  1177. EXPORT_SYMBOL(xen_clear_irq_pending);
  1178. void xen_set_irq_pending(int irq)
  1179. {
  1180. int evtchn = evtchn_from_irq(irq);
  1181. if (VALID_EVTCHN(evtchn))
  1182. set_evtchn(evtchn);
  1183. }
  1184. bool xen_test_irq_pending(int irq)
  1185. {
  1186. int evtchn = evtchn_from_irq(irq);
  1187. bool ret = false;
  1188. if (VALID_EVTCHN(evtchn))
  1189. ret = test_evtchn(evtchn);
  1190. return ret;
  1191. }
  1192. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1193. * the irq will be disabled so it won't deliver an interrupt. */
  1194. void xen_poll_irq_timeout(int irq, u64 timeout)
  1195. {
  1196. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1197. if (VALID_EVTCHN(evtchn)) {
  1198. struct sched_poll poll;
  1199. poll.nr_ports = 1;
  1200. poll.timeout = timeout;
  1201. set_xen_guest_handle(poll.ports, &evtchn);
  1202. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1203. BUG();
  1204. }
  1205. }
  1206. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1207. /* Poll waiting for an irq to become pending. In the usual case, the
  1208. * irq will be disabled so it won't deliver an interrupt. */
  1209. void xen_poll_irq(int irq)
  1210. {
  1211. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1212. }
  1213. /* Check whether the IRQ line is shared with other guests. */
  1214. int xen_test_irq_shared(int irq)
  1215. {
  1216. struct irq_info *info = info_for_irq(irq);
  1217. struct physdev_irq_status_query irq_status;
  1218. if (WARN_ON(!info))
  1219. return -ENOENT;
  1220. irq_status.irq = info->u.pirq.pirq;
  1221. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1222. return 0;
  1223. return !(irq_status.flags & XENIRQSTAT_shared);
  1224. }
  1225. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1226. void xen_irq_resume(void)
  1227. {
  1228. unsigned int cpu;
  1229. struct irq_info *info;
  1230. /* New event-channel space is not 'live' yet. */
  1231. xen_evtchn_mask_all();
  1232. xen_evtchn_resume();
  1233. /* No IRQ <-> event-channel mappings. */
  1234. list_for_each_entry(info, &xen_irq_list_head, list)
  1235. info->evtchn = 0; /* zap event-channel binding */
  1236. clear_evtchn_to_irq_all();
  1237. for_each_possible_cpu(cpu) {
  1238. restore_cpu_virqs(cpu);
  1239. restore_cpu_ipis(cpu);
  1240. }
  1241. restore_pirqs();
  1242. }
  1243. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1244. .name = "xen-dyn",
  1245. .irq_disable = disable_dynirq,
  1246. .irq_mask = disable_dynirq,
  1247. .irq_unmask = enable_dynirq,
  1248. .irq_ack = ack_dynirq,
  1249. .irq_mask_ack = mask_ack_dynirq,
  1250. .irq_set_affinity = set_affinity_irq,
  1251. .irq_retrigger = retrigger_dynirq,
  1252. };
  1253. static struct irq_chip xen_pirq_chip __read_mostly = {
  1254. .name = "xen-pirq",
  1255. .irq_startup = startup_pirq,
  1256. .irq_shutdown = shutdown_pirq,
  1257. .irq_enable = enable_pirq,
  1258. .irq_disable = disable_pirq,
  1259. .irq_mask = disable_dynirq,
  1260. .irq_unmask = enable_dynirq,
  1261. .irq_ack = eoi_pirq,
  1262. .irq_eoi = eoi_pirq,
  1263. .irq_mask_ack = mask_ack_pirq,
  1264. .irq_set_affinity = set_affinity_irq,
  1265. .irq_retrigger = retrigger_dynirq,
  1266. };
  1267. static struct irq_chip xen_percpu_chip __read_mostly = {
  1268. .name = "xen-percpu",
  1269. .irq_disable = disable_dynirq,
  1270. .irq_mask = disable_dynirq,
  1271. .irq_unmask = enable_dynirq,
  1272. .irq_ack = ack_dynirq,
  1273. };
  1274. int xen_set_callback_via(uint64_t via)
  1275. {
  1276. struct xen_hvm_param a;
  1277. a.domid = DOMID_SELF;
  1278. a.index = HVM_PARAM_CALLBACK_IRQ;
  1279. a.value = via;
  1280. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1281. }
  1282. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1283. #ifdef CONFIG_XEN_PVHVM
  1284. /* Vector callbacks are better than PCI interrupts to receive event
  1285. * channel notifications because we can receive vector callbacks on any
  1286. * vcpu and we don't need PCI support or APIC interactions. */
  1287. void xen_callback_vector(void)
  1288. {
  1289. int rc;
  1290. uint64_t callback_via;
  1291. if (xen_have_vector_callback) {
  1292. callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
  1293. rc = xen_set_callback_via(callback_via);
  1294. if (rc) {
  1295. pr_err("Request for Xen HVM callback vector failed\n");
  1296. xen_have_vector_callback = 0;
  1297. return;
  1298. }
  1299. pr_info("Xen HVM callback vector for event delivery is enabled\n");
  1300. /* in the restore case the vector has already been allocated */
  1301. if (!test_bit(HYPERVISOR_CALLBACK_VECTOR, used_vectors))
  1302. alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR,
  1303. xen_hvm_callback_vector);
  1304. }
  1305. }
  1306. #else
  1307. void xen_callback_vector(void) {}
  1308. #endif
  1309. #undef MODULE_PARAM_PREFIX
  1310. #define MODULE_PARAM_PREFIX "xen."
  1311. static bool fifo_events = true;
  1312. module_param(fifo_events, bool, 0);
  1313. void __init xen_init_IRQ(void)
  1314. {
  1315. int ret = -EINVAL;
  1316. if (fifo_events)
  1317. ret = xen_evtchn_fifo_init();
  1318. if (ret < 0)
  1319. xen_evtchn_2l_init();
  1320. evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()),
  1321. sizeof(*evtchn_to_irq), GFP_KERNEL);
  1322. BUG_ON(!evtchn_to_irq);
  1323. /* No event channels are 'live' right now. */
  1324. xen_evtchn_mask_all();
  1325. pirq_needs_eoi = pirq_needs_eoi_flag;
  1326. #ifdef CONFIG_X86
  1327. if (xen_pv_domain()) {
  1328. irq_ctx_init(smp_processor_id());
  1329. if (xen_initial_domain())
  1330. pci_xen_initial_domain();
  1331. }
  1332. if (xen_feature(XENFEAT_hvm_callback_vector))
  1333. xen_callback_vector();
  1334. if (xen_hvm_domain()) {
  1335. native_init_IRQ();
  1336. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1337. * __acpi_register_gsi can point at the right function */
  1338. pci_xen_hvm_init();
  1339. } else {
  1340. int rc;
  1341. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1342. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1343. eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
  1344. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1345. /* TODO: No PVH support for PIRQ EOI */
  1346. if (rc != 0) {
  1347. free_page((unsigned long) pirq_eoi_map);
  1348. pirq_eoi_map = NULL;
  1349. } else
  1350. pirq_needs_eoi = pirq_check_eoi_map;
  1351. }
  1352. #endif
  1353. }