r63417_fhd_dsi_cmd_truly_nt50358.dtsi 8.3 KB

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  1. /*
  2. * Mediatek's LCM driver device tree
  3. *
  4. * Copyright (c) 2013 MediaTek Co., Ltd.
  5. * http://www.mediatek.com
  6. *
  7. */
  8. #include "lcm_define.h"
  9. / {
  10. /* LCM standardization */
  11. lcm_params {
  12. compatible = "mediatek,lcm_params-r63417_fhd_dsi_cmd_truly_nt50358_drv";
  13. lcm_params-types = <2 0 0 0>;
  14. /* type, ctrl, lcm_if, lcm_cmd_if */
  15. lcm_params-resolution = <1080 1920>;
  16. /* width, height */
  17. lcm_params-io_select_mode;
  18. lcm_params-dbi-port;
  19. lcm_params-dbi-clock_freq;
  20. lcm_params-dbi-data_width;
  21. lcm_params-dbi-data_format;
  22. /* color_order, trans_seq, padding, format, width */
  23. lcm_params-dbi-cpu_write_bits;
  24. lcm_params-dbi-io_driving_current;
  25. lcm_params-dbi-msb_io_driving_current;
  26. lcm_params-dbi-ctrl_io_driving_current;
  27. lcm_params-dbi-te_mode;
  28. lcm_params-dbi-te_edge_polarity;
  29. lcm_params-dbi-te_hs_delay_cnt;
  30. lcm_params-dbi-te_vs_width_cnt;
  31. lcm_params-dbi-te_vs_width_cnt_div;
  32. lcm_params-dbi-serial-params0;
  33. /* cs_polarity, clk_polarity, clk_phase, is_non_dbi_mode, clock_base, clock_div */
  34. lcm_params-dbi-serial-params1;
  35. /* css, csh, rd_1st, rd_2nd, wr_1st, wr_2nd */
  36. lcm_params-dbi-serial-params2;
  37. /* sif_1st_pol, sif_sck_def, sif_3wire, sif_sdi sif_div2, sif_hw_cs */
  38. lcm_params-dbi-parallel-params0;
  39. /* write_setup, write_hold, write_wait, read_setup */
  40. lcm_params-dbi-parallel-params1;
  41. /* read_hold, read_latency, wait_period, cs_high_width */
  42. lcm_params-dpi-mipi_pll_clk_ref;
  43. lcm_params-dpi-mipi_pll_clk_div1;
  44. lcm_params-dpi-mipi_pll_clk_div2;
  45. lcm_params-dpi-mipi_pll_clk_fbk_div;
  46. lcm_params-dpi-dpi_clk_div;
  47. lcm_params-dpi-dpi_clk_duty;
  48. lcm_params-dpi-PLL_CLOCK;
  49. lcm_params-dpi-dpi_clock;
  50. lcm_params-dpi-ssc_disable;
  51. lcm_params-dpi-ssc_range;
  52. lcm_params-dpi-width;
  53. lcm_params-dpi-height;
  54. lcm_params-dpi-bg_width;
  55. lcm_params-dpi-bg_height;
  56. lcm_params-dpi-clk_pol;
  57. lcm_params-dpi-de_pol;
  58. lcm_params-dpi-vsync_pol;
  59. lcm_params-dpi-hsync_pol;
  60. lcm_params-dpi-hsync_pulse_width;
  61. lcm_params-dpi-hsync_back_porch;
  62. lcm_params-dpi-hsync_front_porch;
  63. lcm_params-dpi-vsync_pulse_width;
  64. lcm_params-dpi-vsync_back_porch;
  65. lcm_params-dpi-vsync_front_porch;
  66. lcm_params-dpi-format;
  67. lcm_params-dpi-rgb_order;
  68. lcm_params-dpi-is_serial_output;
  69. lcm_params-dpi-i2x_en;
  70. lcm_params-dpi-i2x_edge;
  71. lcm_params-dpi-embsync;
  72. lcm_params-dpi-lvds_tx_en;
  73. lcm_params-dpi-bit_swap;
  74. lcm_params-dpi-intermediat_buffer_num;
  75. lcm_params-dpi-io_driving_current;
  76. lcm_params-dpi-lsb_io_driving_current;
  77. lcm_params-dsi-mode = <0>;
  78. lcm_params-dsi-switch_mode = <2>;
  79. lcm_params-dsi-DSI_WMEM_CONTI;
  80. lcm_params-dsi-DSI_RMEM_CONTI;
  81. lcm_params-dsi-VC_NUM;
  82. lcm_params-dsi-lane_num = <4>;
  83. lcm_params-dsi-data_format = <2 0 0 2>;
  84. /* color_order, trans_seq, padding, format */
  85. lcm_params-dsi-intermediat_buffer_num;
  86. lcm_params-dsi-ps = <2>;
  87. lcm_params-dsi-word_count;
  88. lcm_params-dsi-packet_size = <256>;
  89. lcm_params-dsi-vertical_sync_active = <2>;
  90. lcm_params-dsi-vertical_backporch = <8>;
  91. lcm_params-dsi-vertical_frontporch = <10>;
  92. lcm_params-dsi-vertical_frontporch_for_low_power;
  93. lcm_params-dsi-vertical_active_line = <1920>;
  94. lcm_params-dsi-horizontal_sync_active = <10>;
  95. lcm_params-dsi-horizontal_backporch = <60>;
  96. lcm_params-dsi-horizontal_frontporch = <100>;
  97. lcm_params-dsi-horizontal_blanking_pixel;
  98. lcm_params-dsi-horizontal_active_pixel = <1080>;
  99. lcm_params-dsi-horizontal_bllp;
  100. lcm_params-dsi-line_byte;
  101. lcm_params-dsi-horizontal_sync_active_byte;
  102. lcm_params-dsi-horizontal_backportch_byte;
  103. lcm_params-dsi-horizontal_frontporch_byte;
  104. lcm_params-dsi-rgb_byte;
  105. lcm_params-dsi-horizontal_sync_active_word_count;
  106. lcm_params-dsi-horizontal_backporch_word_count;
  107. lcm_params-dsi-horizontal_frontporch_word_count;
  108. lcm_params-dsi-HS_TRAIL;
  109. lcm_params-dsi-ZERO;
  110. lcm_params-dsi-HS_PRPR;
  111. lcm_params-dsi-LPX;
  112. lcm_params-dsi-TA_SACK;
  113. lcm_params-dsi-TA_GET;
  114. lcm_params-dsi-TA_SURE;
  115. lcm_params-dsi-TA_GO;
  116. lcm_params-dsi-CLK_TRAIL;
  117. lcm_params-dsi-CLK_ZERO;
  118. lcm_params-dsi-LPX_WAIT;
  119. lcm_params-dsi-CONT_DET;
  120. lcm_params-dsi-CLK_HS_PRPR;
  121. lcm_params-dsi-CLK_HS_POST;
  122. lcm_params-dsi-DA_HS_EXIT;
  123. lcm_params-dsi-CLK_HS_EXIT;
  124. lcm_params-dsi-pll_select;
  125. lcm_params-dsi-pll_div1;
  126. lcm_params-dsi-pll_div2;
  127. lcm_params-dsi-fbk_div;
  128. lcm_params-dsi-fbk_sel;
  129. lcm_params-dsi-rg_bir;
  130. lcm_params-dsi-rg_bic;
  131. lcm_params-dsi-rg_bp;
  132. lcm_params-dsi-pll_clock = <450>;
  133. lcm_params-dsi-dsi_clock;
  134. lcm_params-dsi-ssc_disable;
  135. lcm_params-dsi-ssc_range;
  136. lcm_params-dsi-compatibility_for_nvk;
  137. lcm_params-dsi-cont_clock;
  138. lcm_params-dsi-ufoe_enable;
  139. lcm_params-dsi-ufoe_params;
  140. /* compress_ratio, lr_mode_en, vlc_disable, vlc_config */
  141. lcm_params-dsi-edp_panel;
  142. lcm_params-dsi-customization_esd_check_enable = <0>;
  143. lcm_params-dsi-esd_check_enable = <1>;
  144. lcm_params-dsi-lcm_int_te_monitor;
  145. lcm_params-dsi-lcm_int_te_period;
  146. lcm_params-dsi-lcm_ext_te_monitor;
  147. lcm_params-dsi-lcm_ext_te_enable;
  148. lcm_params-dsi-noncont_clock;
  149. lcm_params-dsi-noncont_clock_period;
  150. lcm_params-dsi-clk_lp_per_line_enable = <0>;
  151. lcm_params-dsi-lcm_esd_check_table0 = <0x0A 0x01 0x1C 0x0>;
  152. /* cmd, count, para_list[0], para_list[1] */
  153. lcm_params-dsi-lcm_esd_check_table1;
  154. lcm_params-dsi-lcm_esd_check_table2;
  155. lcm_params-dsi-switch_mode_enable = <0>;
  156. lcm_params-dsi-dual_dsi_type;
  157. lcm_params-dsi-lane_swap_en;
  158. lcm_params-dsi-lane_swap0;
  159. /* lane_swap[0][0~5] */
  160. lcm_params-dsi-lane_swap1;
  161. /* lane_swap[1][0~5] */
  162. lcm_params-dsi-vertical_vfp_lp;
  163. lcm_params-physical_width;
  164. lcm_params-physical_height;
  165. lcm_params-od_table_size;
  166. lcm_params-od_table;
  167. };
  168. lcm_ops {
  169. compatible = "mediatek,lcm_ops-r63417_fhd_dsi_cmd_truly_nt50358_drv";
  170. init = <LCM_FUNC_GPIO LCM_GPIO_MODE 1 LCM_GPIO_MODE_00>,
  171. <LCM_FUNC_GPIO LCM_GPIO_DIR 1 LCM_GPIO_DIR_OUT>,
  172. <LCM_FUNC_GPIO LCM_GPIO_OUT 1 LCM_GPIO_OUT_ONE>,
  173. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 10>,
  174. <LCM_FUNC_I2C LCM_I2C_WRITE 2 0x00 0x0A>,
  175. <LCM_FUNC_I2C LCM_I2C_WRITE 2 0x01 0x0A>,
  176. <LCM_FUNC_UTIL LCM_UTIL_RESET 1 LCM_UTIL_RESET_HIGH>,
  177. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 1>,
  178. <LCM_FUNC_UTIL LCM_UTIL_RESET 1 LCM_UTIL_RESET_LOW>,
  179. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 10>,
  180. <LCM_FUNC_UTIL LCM_UTIL_RESET 1 LCM_UTIL_RESET_HIGH>,
  181. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 10>,
  182. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0xB0 1 0x00>,
  183. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0xD6 1 0x01>,
  184. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0x51 1 0xFF>,
  185. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0x53 1 0x0C>,
  186. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 42 0xC6 40 0x77 0x01 0x71 0x07>,
  187. <0x65 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>,
  188. <0x09 0x19 0x09 0x77 0x01 0x71 0x07 0x65 0x00 0x00 0x00 0x00 0x00>,
  189. <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x19 0x09>,
  190. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 32 0xC7 30 0x01 0x0C 0x14 0x1E>,
  191. <0x2D 0x3C 0x48 0x58 0x3D 0x44 0x4F 0x5C 0x65 0x6D 0x75 0x01 0x0C>,
  192. <0x14 0x1D 0x2C 0x39 0x44 0x54 0x39 0x41 0x4D 0x5A 0x63 0x6B 0x74>,
  193. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 21 0xC8 19 0x01 0x00 0xFF 0xFF>,
  194. <0x00 0xFC 0x00 0x00 0xFF 0xFF 0x00 0xFC 0x00 0x00 0xFF 0xFF 0x00>,
  195. <0xFC 0x00>,
  196. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0x35 1 0x00>,
  197. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 4 0xB6 2 0x3A 0xD3>,
  198. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 2 0x29 0>,
  199. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 2 0x11 0>,
  200. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 120>;
  201. compare_id = <LCM_FUNC_UTIL LCM_UTIL_RESET 1 LCM_UTIL_RESET_HIGH>,
  202. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 1>,
  203. <LCM_FUNC_UTIL LCM_UTIL_RESET 1 LCM_UTIL_RESET_LOW>,
  204. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 10>,
  205. <LCM_FUNC_UTIL LCM_UTIL_RESET 1 LCM_UTIL_RESET_HIGH>,
  206. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 10>,
  207. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V1 5 1 0x00 0x37 0x02 0x00>,
  208. <LCM_FUNC_CMD LCM_UTIL_READ_CMD_V2 3 0xF4 1 0x95>;
  209. suspend = <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 2 0x28 0>,
  210. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 20>,
  211. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 2 0x10 0>,
  212. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0xB0 1 0x00>,
  213. <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0xB1 1 0x01>,
  214. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 80>,
  215. <LCM_FUNC_UTIL LCM_UTIL_MDELAY 1 10>,
  216. <LCM_FUNC_GPIO LCM_GPIO_MODE 1 LCM_GPIO_MODE_00>,
  217. <LCM_FUNC_GPIO LCM_GPIO_DIR 1 LCM_GPIO_DIR_OUT>,
  218. <LCM_FUNC_GPIO LCM_GPIO_OUT 1 LCM_GPIO_OUT_ZERO>;
  219. backlight = <LCM_FUNC_CMD LCM_UTIL_WRITE_CMD_V2 3 0x51 1 0xFF>;
  220. };
  221. /* LCM standardization end */
  222. };