mt_afe_def.h 5.7 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #ifndef __MT_AFE_DEF_H__
  13. #define __MT_AFE_DEF_H__
  14. #include <sound/pcm.h>
  15. #define PM_MANAGER_API
  16. #define COMMON_CLOCK_FRAMEWORK_API
  17. #define IDLE_TASK_DRIVER_API
  18. #define AUDIO_MEMORY_SRAM
  19. #define AUDIO_MEM_IOREMAP
  20. #define AUDIO_IOREMAP_FROM_DT
  21. /* if need assert , use AUDIO_ASSERT(true) */
  22. #define AUDIO_ASSERT(value) BUG_ON(false)
  23. #define ENUM_TO_STR(enum) #enum
  24. /**********************************
  25. * Other Definitions *
  26. **********************************/
  27. #define MASK_ALL (0xFFFFFFFF)
  28. #define MT_SOC_MACHINE_NAME "mt8173-soc-machine"
  29. #define MT_SOC_DL1_PCM "mt8173-soc-dl1-pcm"
  30. #define MT_SOC_DL2_PCM "mt8173-soc-dl2-pcm"
  31. #define MT_SOC_UL1_PCM "mt8173-soc-ul1-pcm"
  32. #define MT_SOC_UL2_PCM "mt8173-soc-ul2-pcm"
  33. #define MT_SOC_DL1_CPU_DAI_NAME "mt-soc-dl1-dai"
  34. #define MT_SOC_DL2_CPU_DAI_NAME "mt-soc-dl2-dai"
  35. #define MT_SOC_UL1_CPU_DAI_NAME "mt-soc-ul1-dai"
  36. #define MT_SOC_UL2_CPU_DAI_NAME "mt-soc-ul2-dai"
  37. #define MT_SOC_STUB_CPU_DAI "mt8173-soc-dummy-dai"
  38. #define MT_SOC_DL1_STREAM_NAME "MultiMedia1_Playback"
  39. #define MT_SOC_DL2_STREAM_NAME "MultiMedia2_Playback"
  40. #define MT_SOC_UL1_STREAM_NAME "MultiMedia1_Capture"
  41. #define MT_SOC_UL2_STREAM_NAME "MultiMedia2_Capture"
  42. #define MT_SOC_ROUTING_STREAM_NAME "MultiMedia Routing"
  43. #define MT_SOC_ROUTING_PCM "mt8173-soc-routing-pcm"
  44. #define MT_SOC_HDMI_PLAYBACK_STREAM_NAME "HDMI_Playback"
  45. #define MT_SOC_HDMI_CPU_DAI_NAME "mt-audio-hdmi"
  46. #define MT_SOC_HDMI_PLATFORM_NAME "mt8173-soc-hdmi-pcm"
  47. #define MT_SOC_BTSCO_STREAM_NAME "BTSCO_Stream"
  48. #define MT_SOC_BTSCO_DL_STREAM_NAME "BTSCO_Playback_Stream"
  49. #define MT_SOC_BTSCO_UL_STREAM_NAME "BTSCO_Capture_Stream"
  50. #define MT_SOC_BTSCO_CPU_DAI_NAME "mt-soc-btsco-dai"
  51. #define MT_SOC_BTSCO_PCM "mt8173-soc-btsco-pcm"
  52. #define MT_SOC_DL1_AWB_STREAM_NAME "DL1_AWB_Capture"
  53. #define MT_SOC_DL1_AWB_CPU_DAI_NAME "mt-soc-dl1-awb-dai"
  54. #define MT_SOC_DL1_AWB_PCM "mt8173-soc-dl1-awb-pcm"
  55. #define MT_SOC_I2S0_AWB_STREAM_NAME "I2S0_AWB_Capture"
  56. #define MT_SOC_I2S0_AWB_CPU_DAI_NAME "mt-soc-i2s0-awb-dai"
  57. #define MT_SOC_I2S0_AWB_PCM "mt8173-soc-i2s0-awb-pcm"
  58. #define MT_SOC_HDMI_RAW_PLAYBACK_STREAM_NAME "HDMI_Raw_Playback"
  59. #define MT_SOC_HDMI_RAW_PLATFORM_NAME "mt8173-soc-hdmi-raw"
  60. #define MT_SOC_HDMI_RAW_CPU_DAI_NAME "mt-audio-hdmi-raw"
  61. #define MT_SOC_SPDIF_PLAYBACK_STREAM_NAME "SPDIF_Playback"
  62. #define MT_SOC_SPDIF_PLATFORM_NAME "mt8173-soc-spdif-pcm"
  63. #define MT_SOC_SPDIF_CPU_DAI_NAME "mt-audio-spdif"
  64. #define MT_SOC_MRGRX_STREAM_NAME "MRGRX_PLayback"
  65. #define MT_SOC_MRGRX_CPU_DAI_NAME "mt-audio-mrgrx"
  66. #define MT_SOC_MRGRX_PLARFORM_NAME "mt8173-soc-mrgrx-pcm"
  67. #define MT_SOC_MRGRX_AWB_STREAM_NAME "MRGRX_CAPTURE"
  68. #define MT_SOC_MRGRX_AWB_CPU_DAI_NAME "mt-audio-mrgrx-awb"
  69. #define MT_SOC_MRGRX_AWB_PLARFORM_NAME "mt8173-soc-mrgrx-awb-pcm"
  70. /*
  71. PCM buffer size and period size setting
  72. */
  73. #define DL1_MAX_BUFFER_SIZE (16*1024)
  74. #define DL2_MAX_BUFFER_SIZE (32*1024)
  75. #define UL1_MAX_BUFFER_SIZE (32*1024)
  76. #define UL2_MAX_BUFFER_SIZE (32*1024)
  77. #define BT_DL_MAX_BUFFER_SIZE (16*1024)
  78. #define BT_DAI_MAX_BUFFER_SIZE (16*1024)
  79. #define AWB_MAX_BUFFER_SIZE (64*1024)
  80. #define HDMI_MAX_BUFFER_SIZE (256*1024)
  81. #define SPDIF_MAX_BUFFER_SIZE (256*1024)
  82. #define MRGRX_MAX_BUFFER_SIZE (64*1024)
  83. #define BTSCO_RATE (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
  84. #define BTSCO_RATE_MIN 8000
  85. #define BTSCO_RATE_MAX 16000
  86. #define BTSCO_OUT_CHANNELS_MIN 1
  87. #define BTSCO_OUT_CHANNELS_MAX 2
  88. #define BTSCO_IN_CHANNELS_MIN 1
  89. #define BTSCO_IN_CHANNELS_MAX 1
  90. #define HDMI_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
  91. #define HDMI_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
  92. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \
  93. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
  94. SNDRV_PCM_RATE_192000)
  95. #define HDMI_RATE_MIN 32000
  96. #define HDMI_RATE_MAX 192000
  97. #define HDMI_CHANNELS_MIN 2
  98. #define HDMI_CHANNELS_MAX 8
  99. #define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE|SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE)
  100. #define SPDIF_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
  101. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \
  102. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
  103. SNDRV_PCM_RATE_192000)
  104. #define SPDIF_RATE_MIN 32000
  105. #define SPDIF_RATE_MAX 192000
  106. #define SPDIF_CHANNELS_MIN 2
  107. #define SPDIF_CHANNELS_MAX 8
  108. #define SOC_NORMAL_USE_RATE (SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000)
  109. #define SOC_NORMAL_USE_RATE_MIN 8000
  110. #define SOC_NORMAL_USE_RATE_MAX 48000
  111. #define SOC_NORMAL_USE_CHANNELS_MIN 1
  112. #define SOC_NORMAL_USE_CHANNELS_MAX 2
  113. #define SOC_NORMAL_USE_PERIODS_MIN 2
  114. #define SOC_NORMAL_USE_PERIODS_MAX 256
  115. #define SOC_NORMAL_USE_PERIOD_SIZE_MIN (512)
  116. static const unsigned int soc_normal_supported_sample_rates[] = {
  117. 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000
  118. };
  119. static const unsigned int soc_voice_supported_sample_rates[] = {
  120. 8000, 16000, 32000
  121. };
  122. static const unsigned int soc_fm_supported_sample_rates[] = {
  123. 32000, 44100, 48000
  124. };
  125. #endif