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AudDrv_Ana.h

AudDrv_Ana.h 6.2 KB
Cronologia Originale

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  1. /*
    2. 

  2.  * Copyright (C) 2007 The Android Open Source Project
    3. 

  3.  *
    4. 

  4.  * Licensed under the Apache License, Version 2.0 (the "License");
    5. 

  5.  * you may not use this file except in compliance with the License.
    6. 

  6.  * You may obtain a copy of the License at
    7. 

  7.  *
    8. 

  8.  *      http://www.apache.org/licenses/LICENSE-2.0
    9. 

  9.  *
    10. 

  10.  * Unless required by applicable law or agreed to in writing, software
    11. 

  11.  * distributed under the License is distributed on an "AS IS" BASIS,
    12. 

  12.  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    13. 

  13.  * See the License for the specific language governing permissions and
    14. 

  14.  * limitations under the License.
    15. 

  15.  */
    16. 

  16. /*******************************************************************************
    17. 

  17.  *
    18. 

  18.  * Filename:
    19. 

  19.  * ---------
    20. 

  20.  *   AudDrv_Ana.h
    21. 

  21.  *
    22. 

  22.  * Project:
    23. 

  23.  * --------
    24. 

  24.  *   MT6583  Audio Driver Ana
    25. 

  25.  *
    26. 

  26.  * Description:
    27. 

  27.  * ------------
    28. 

  28.  *   Audio register
    29. 

  29.  *
    30. 

  30.  * Author:
    31. 

  31.  * -------
    32. 

  32.  *   Chipeng Chang (mtk02308)
    33. 

  33.  *
    34. 

  34.  *------------------------------------------------------------------------------
    35. 

  35.  *
    36. 

  36.  *******************************************************************************/
    37. 

  37. 

  38. #ifndef _AUDDRV_ANA_H_
    39. 

  39. #define _AUDDRV_ANA_H_
    40. 

  40. 

  41. /*****************************************************************************
    42. 

  42.  *                     C O M P I L E R   F L A G S
    43. 

  43.  *****************************************************************************/
    44. 

  44. 

  45. 

  46. /*****************************************************************************
    47. 

  47.  *                E X T E R N A L   R E F E R E N C E S
    48. 

  48.  *****************************************************************************/
    49. 

  49. 

  50. #include "AudDrv_Common.h"
    51. 

  51. #include "AudDrv_Def.h"
    52. 

  52. 

  53. 

  54. /*****************************************************************************
    55. 

  55.  *                         D A T A   T Y P E S
    56. 

  56.  *****************************************************************************/
    57. 

  57. 

  58. 

  59. /*****************************************************************************
    60. 

  60.  *                         M A C R O
    61. 

  61.  *****************************************************************************/
    62. 

  62. 

  63. /*****************************************************************************
    64. 

  64.  *                  R E G I S T E R       D E F I N I T I O N
    65. 

  65.  *****************************************************************************/
    66. 

  66. #define PMIC_REG_BASE                    (0x0000)
    67. 

  67. /* 6323 pmic reg */
    68. 

  68. /* ---------------digital pmic  register define ------------------------------------------- */
    69. 

  69. #define ABB_AFE_CON0             (PMIC_REG_BASE+0x4000 + 0x0000)
    70. 

  70. #define ABB_AFE_CON1             (PMIC_REG_BASE+0x4000 + 0x0002)
    71. 

  71. #define ABB_AFE_CON2             (PMIC_REG_BASE+0x4000 + 0x0004)
    72. 

  72. #define ABB_AFE_CON3             (PMIC_REG_BASE+0x4000 + 0x0006)
    73. 

  73. #define ABB_AFE_CON4             (PMIC_REG_BASE+0x4000 + 0x0008)
    74. 

  74. #define ABB_AFE_CON5             (PMIC_REG_BASE+0x4000 + 0x000A)
    75. 

  75. #define ABB_AFE_CON6             (PMIC_REG_BASE+0x4000 + 0x000C)
    76. 

  76. #define ABB_AFE_CON7             (PMIC_REG_BASE+0x4000 + 0x000E)
    77. 

  77. #define ABB_AFE_CON8             (PMIC_REG_BASE+0x4000 + 0x0010)
    78. 

  78. #define ABB_AFE_CON9             (PMIC_REG_BASE+0x4000 + 0x0012)
    79. 

  79. #define ABB_AFE_CON10            (PMIC_REG_BASE+0x4000 + 0x0014)
    80. 

  80. #define ABB_AFE_CON11            (PMIC_REG_BASE+0x4000 + 0x0016)
    81. 

  81. #define ABB_AFE_STA0             (PMIC_REG_BASE+0x4000 + 0x0018)
    82. 

  82. #define ABB_AFE_STA1             (PMIC_REG_BASE+0x4000 + 0x001A)
    83. 

  83. #define ABB_AFE_STA2             (PMIC_REG_BASE+0x4000 + 0x001C)
    84. 

  84. #define AFE_UP8X_FIFO_CFG0       (PMIC_REG_BASE+0x4000 + 0x001E)
    85. 

  85. #define AFE_UP8X_FIFO_LOG_MON0   (PMIC_REG_BASE+0x4000 + 0x0020)
    86. 

  86. #define AFE_UP8X_FIFO_LOG_MON1   (PMIC_REG_BASE+0x4000 + 0x0022)
    87. 

  87. #define AFE_PMIC_NEWIF_CFG0      (PMIC_REG_BASE+0x4000 + 0x0024)
    88. 

  88. #define AFE_PMIC_NEWIF_CFG1      (PMIC_REG_BASE+0x4000 + 0x0026)
    89. 

  89. #define AFE_PMIC_NEWIF_CFG2      (PMIC_REG_BASE+0x4000 + 0x0028)
    90. 

  90. #define AFE_PMIC_NEWIF_CFG3      (PMIC_REG_BASE+0x4000 + 0x002A)
    91. 

  91. #define ABB_AFE_TOP_CON0         (PMIC_REG_BASE+0x4000 + 0x002C)
    92. 

  92. #define ABB_MON_DEBUG0           (PMIC_REG_BASE+0x4000 + 0x002E)
    93. 

  93. 

  94. /* ---------------digital pmic  register define end --------------------------------------- */
    95. 

  95. 

  96. /* ---------------analog pmic  register define start -------------------------------------- */
    97. 

  97. #define TOP_CKPDN0                  (PMIC_REG_BASE + 0x102)
    98. 

  98. #define TOP_CKPDN0_SET              (PMIC_REG_BASE + 0x104)
    99. 

  99. #define TOP_CKPDN0_CLR              (PMIC_REG_BASE + 0x106)
    100. 

  100. #define TOP_CKPDN1                  (PMIC_REG_BASE + 0x108)
    101. 

  101. #define TOP_CKPDN1_SET              (PMIC_REG_BASE + 0x10A)
    102. 

  102. #define TOP_CKPDN1_CLR              (PMIC_REG_BASE + 0x10C)
    103. 

  103. #define TOP_CKPDN2                  (PMIC_REG_BASE + 0x10E)
    104. 

  104. #define TOP_CKPDN2_SET              (PMIC_REG_BASE + 0x110)
    105. 

  105. #define TOP_CKPDN2_CLR              (PMIC_REG_BASE + 0x112)
    106. 

  106. #define TOP_RST_CON_SET             (PMIC_REG_BASE + 0x116)
    107. 

  107. #define TOP_RST_CON_CLR             (PMIC_REG_BASE + 0x118)
    108. 

  108. #define TOP_CKCON1                  (PMIC_REG_BASE + 0x126)
    109. 

  109. 

  110. #define SPK_CON0                    (PMIC_REG_BASE + 0x052)
    111. 

  111. #define SPK_CON1                    (PMIC_REG_BASE + 0x054)
    112. 

  112. #define SPK_CON2                    (PMIC_REG_BASE + 0x056)
    113. 

  113. #define SPK_CON6                    (PMIC_REG_BASE + 0x05E)
    114. 

  114. #define SPK_CON7                    (PMIC_REG_BASE + 0x060)
    115. 

  115. #define SPK_CON8                    (PMIC_REG_BASE + 0x062)
    116. 

  116. #define SPK_CON9                    (PMIC_REG_BASE + 0x064)
    117. 

  117. #define SPK_CON10                   (PMIC_REG_BASE + 0x066)
    118. 

  118. #define SPK_CON11                   (PMIC_REG_BASE + 0x068)
    119. 

  119. #define SPK_CON12                   (PMIC_REG_BASE + 0x06A)
    120. 

  120. #define CID                         (PMIC_REG_BASE + 0x100)
    121. 

  121. 

  122. #define AUDTOP_CON0                 (PMIC_REG_BASE + 0x700)
    123. 

  123. #define AUDTOP_CON1                 (PMIC_REG_BASE + 0x702)
    124. 

  124. #define AUDTOP_CON2                 (PMIC_REG_BASE + 0x704)
    125. 

  125. #define AUDTOP_CON3                 (PMIC_REG_BASE + 0x706)
    126. 

  126. #define AUDTOP_CON4                 (PMIC_REG_BASE + 0x708)
    127. 

  127. #define AUDTOP_CON5                 (PMIC_REG_BASE + 0x70A)
    128. 

  128. #define AUDTOP_CON6                 (PMIC_REG_BASE + 0x70C)
    129. 

  129. #define AUDTOP_CON7                 (PMIC_REG_BASE + 0x70E)
    130. 

  130. #define AUDTOP_CON8                 (PMIC_REG_BASE + 0x710)
    131. 

  131. #define AUDTOP_CON9                 (PMIC_REG_BASE + 0x712)
    132. 

  132. 

  133. /* ---------------analog pmic  register define end --------------------------------------- */
    134. 

  134. 

  135. void Ana_Set_Reg(uint32 offset, uint32 value, uint32 mask);
    136. 

  136. uint32 Ana_Get_Reg(uint32 offset);
    137. 

  137. 

  138. /* for debug usage */
    139. 

  139. void Ana_Log_Print(void);
    140. 

  140. 

  141. #endif
    142.