AudDrv_Gpio.c 11 KB

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  1. /*
  2. * Copyright (C) 2007 The Android Open Source Project
  3. *
  4. * Licensed under the Apache License, Version 2.0 (the "License");
  5. * you may not use this file except in compliance with the License.
  6. * You may obtain a copy of the License at
  7. *
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. *
  10. * Unless required by applicable law or agreed to in writing, software
  11. * distributed under the License is distributed on an "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13. * See the License for the specific language governing permissions and
  14. * limitations under the License.
  15. */
  16. /*******************************************************************************
  17. *
  18. * Filename:
  19. * ---------
  20. * AudDrv_Gpio.c
  21. *
  22. * Project:
  23. * --------
  24. * MT6797 Audio Driver GPIO
  25. *
  26. * Description:
  27. * ------------
  28. * Audio register
  29. *
  30. * Author:
  31. * -------
  32. * George
  33. *
  34. *------------------------------------------------------------------------------
  35. *
  36. *
  37. *******************************************************************************/
  38. /*****************************************************************************
  39. * C O M P I L E R F L A G S
  40. *****************************************************************************/
  41. /*****************************************************************************
  42. * E X T E R N A L R E F E R E N C E S
  43. *****************************************************************************/
  44. #include <linux/gpio.h>
  45. #include <linux/pinctrl/consumer.h>
  46. #include "AudDrv_Gpio.h"
  47. #ifndef CONFIG_PINCTRL_MT6797
  48. #include <mt-plat/mt_gpio.h>
  49. #endif
  50. #ifdef CONFIG_PINCTRL_MT6797
  51. struct pinctrl *pinctrlaud;
  52. enum audio_system_gpio_type {
  53. GPIO_PMIC_MODE0,
  54. GPIO_PMIC_MODE1,
  55. GPIO_SMARTPA_MODE0,
  56. GPIO_SMARTPA_MODE1,
  57. GPIO_SMARTPA_MODE3,
  58. GPIO_TDM_MODE0,
  59. GPIO_TDM_MODE1,
  60. /* GPIO_I2S_MODE0,
  61. GPIO_I2S_MODE1,
  62. GPIO_EXTAMP_HIGH,
  63. GPIO_EXTAMP_LOW,
  64. GPIO_EXTAMP2_HIGH,
  65. GPIO_EXTAMP2_LOW,
  66. GPIO_RCVSPK_HIGH,
  67. GPIO_RCVSPK_LOW,
  68. GPIO_HPDEPOP_HIGH,
  69. GPIO_HPDEPOP_LOW,*/
  70. GPIO_NUM
  71. };
  72. struct audio_gpio_attr {
  73. const char *name;
  74. bool gpio_prepare;
  75. struct pinctrl_state *gpioctrl;
  76. };
  77. static struct audio_gpio_attr aud_gpios[GPIO_NUM] = {
  78. [GPIO_PMIC_MODE0] = {"audpmic_mode0", false, NULL},
  79. [GPIO_PMIC_MODE1] = {"audpmic_mode1", false, NULL},
  80. [GPIO_SMARTPA_MODE0] = {"aud_smartpa_mode0", false, NULL},
  81. [GPIO_SMARTPA_MODE1] = {"aud_smartpa_mode1", false, NULL},
  82. [GPIO_SMARTPA_MODE3] = {"aud_smartpa_mode3", false, NULL},
  83. [GPIO_TDM_MODE0] = {"aud_tdm_mode0", false, NULL},
  84. [GPIO_TDM_MODE1] = {"aud_tdm_mode1", false, NULL},
  85. /* [GPIO_I2S_MODE0] = {"audi2s1_mode0", false, NULL},
  86. [GPIO_I2S_MODE1] = {"audi2s1_mode1", false, NULL},
  87. [GPIO_EXTAMP_HIGH] = {"audextamp_high", false, NULL},
  88. [GPIO_EXTAMP_LOW] = {"audextamp_low", false, NULL},
  89. [GPIO_EXTAMP2_HIGH] = {"audextamp2_high", false, NULL},
  90. [GPIO_EXTAMP2_LOW] = {"audextamp2_low", false, NULL},
  91. [GPIO_RCVSPK_HIGH] = {"audcvspk_high", false, NULL},
  92. [GPIO_RCVSPK_LOW] = {"audcvspk_low", false, NULL},
  93. [GPIO_HPDEPOP_HIGH] = {"hpdepop-pullhigh", false, NULL},
  94. [GPIO_HPDEPOP_LOW] = {"hpdepop-pulllow", false, NULL},*/
  95. };
  96. #endif
  97. void AudDrv_GPIO_probe(void *dev)
  98. {
  99. #ifdef CONFIG_PINCTRL_MT6797
  100. int ret;
  101. int i = 0;
  102. pr_warn("%s\n", __func__);
  103. pinctrlaud = devm_pinctrl_get(dev);
  104. if (IS_ERR(pinctrlaud)) {
  105. ret = PTR_ERR(pinctrlaud);
  106. pr_err("Cannot find pinctrlaud!\n");
  107. return;
  108. }
  109. for (i = 0; i < ARRAY_SIZE(aud_gpios); i++) {
  110. aud_gpios[i].gpioctrl = pinctrl_lookup_state(pinctrlaud, aud_gpios[i].name);
  111. if (IS_ERR(aud_gpios[i].gpioctrl)) {
  112. ret = PTR_ERR(aud_gpios[i].gpioctrl);
  113. pr_err("%s pinctrl_lookup_state %s fail %d\n", __func__, aud_gpios[i].name,
  114. ret);
  115. } else {
  116. aud_gpios[i].gpio_prepare = true;
  117. }
  118. }
  119. #endif
  120. }
  121. int AudDrv_GPIO_PMIC_Select(int bEnable)
  122. {
  123. int retval = 0;
  124. #ifndef CONFIG_PINCTRL_MT6797
  125. if (bEnable == 1) {
  126. mt_set_gpio_mode(146 | 0x80000000, GPIO_MODE_01);
  127. mt_set_gpio_mode(147 | 0x80000000, GPIO_MODE_01);
  128. mt_set_gpio_mode(148 | 0x80000000, GPIO_MODE_01);
  129. mt_set_gpio_mode(149 | 0x80000000, GPIO_MODE_01);
  130. mt_set_gpio_mode(150 | 0x80000000, GPIO_MODE_01);
  131. } else {
  132. mt_set_gpio_mode(146 | 0x80000000, GPIO_MODE_00);
  133. mt_set_gpio_mode(147 | 0x80000000, GPIO_MODE_00);
  134. mt_set_gpio_mode(148 | 0x80000000, GPIO_MODE_00);
  135. mt_set_gpio_mode(149 | 0x80000000, GPIO_MODE_00);
  136. mt_set_gpio_mode(150 | 0x80000000, GPIO_MODE_00);
  137. }
  138. #else
  139. if (bEnable == 1) {
  140. if (aud_gpios[GPIO_PMIC_MODE1].gpio_prepare) {
  141. retval =
  142. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_PMIC_MODE1].gpioctrl);
  143. if (retval)
  144. pr_err("could not set aud_gpios[GPIO_PMIC_MODE1] pins\n");
  145. }
  146. } else {
  147. if (aud_gpios[GPIO_PMIC_MODE0].gpio_prepare) {
  148. retval =
  149. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_PMIC_MODE0].gpioctrl);
  150. if (retval)
  151. pr_err("could not set aud_gpios[GPIO_PMIC_MODE0] pins\n");
  152. }
  153. }
  154. #endif
  155. return retval;
  156. }
  157. int AudDrv_GPIO_SMARTPA_Select(int mode)
  158. {
  159. int retval = 0;
  160. #ifndef CONFIG_PINCTRL_MT6797
  161. switch (mode) {
  162. case 0:
  163. mt_set_gpio_mode(69 | 0x80000000, GPIO_MODE_00);
  164. mt_set_gpio_mode(70 | 0x80000000, GPIO_MODE_00);
  165. mt_set_gpio_mode(71 | 0x80000000, GPIO_MODE_00);
  166. mt_set_gpio_mode(72 | 0x80000000, GPIO_MODE_00);
  167. mt_set_gpio_mode(73 | 0x80000000, GPIO_MODE_00);
  168. break;
  169. case 1:
  170. mt_set_gpio_mode(69 | 0x80000000, GPIO_MODE_01);
  171. mt_set_gpio_mode(70 | 0x80000000, GPIO_MODE_01);
  172. mt_set_gpio_mode(71 | 0x80000000, GPIO_MODE_01);
  173. mt_set_gpio_mode(72 | 0x80000000, GPIO_MODE_01);
  174. mt_set_gpio_mode(73 | 0x80000000, GPIO_MODE_01);
  175. break;
  176. case 3:
  177. mt_set_gpio_mode(69 | 0x80000000, GPIO_MODE_03);
  178. mt_set_gpio_mode(70 | 0x80000000, GPIO_MODE_03);
  179. mt_set_gpio_mode(71 | 0x80000000, GPIO_MODE_03);
  180. mt_set_gpio_mode(72 | 0x80000000, GPIO_MODE_03);
  181. mt_set_gpio_mode(73 | 0x80000000, GPIO_MODE_03);
  182. break;
  183. default:
  184. pr_err("%s(), invalid mode = %d", __func__, mode);
  185. retval = -1;
  186. }
  187. #else
  188. switch (mode) {
  189. case 0:
  190. if (aud_gpios[GPIO_SMARTPA_MODE0].gpio_prepare) {
  191. retval =
  192. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_SMARTPA_MODE0].gpioctrl);
  193. if (retval)
  194. pr_err("could not set aud_gpios[GPIO_SMARTPA_MODE0] pins\n");
  195. }
  196. break;
  197. case 1:
  198. if (aud_gpios[GPIO_SMARTPA_MODE1].gpio_prepare) {
  199. retval =
  200. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_SMARTPA_MODE1].gpioctrl);
  201. if (retval)
  202. pr_err("could not set aud_gpios[GPIO_SMARTPA_MODE1] pins\n");
  203. }
  204. break;
  205. case 3:
  206. if (aud_gpios[GPIO_SMARTPA_MODE3].gpio_prepare) {
  207. retval =
  208. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_SMARTPA_MODE3].gpioctrl);
  209. if (retval)
  210. pr_err("could not set aud_gpios[GPIO_SMARTPA_MODE3] pins\n");
  211. }
  212. break;
  213. default:
  214. pr_err("%s(), invalid mode = %d", __func__, mode);
  215. retval = -1;
  216. }
  217. #endif
  218. return retval;
  219. }
  220. int AudDrv_GPIO_TDM_Select(int mode)
  221. {
  222. int retval = 0;
  223. #ifndef CONFIG_PINCTRL_MT6797
  224. switch (mode) {
  225. case 0:
  226. mt_set_gpio_mode(135 | 0x80000000, GPIO_MODE_00);
  227. mt_set_gpio_mode(136 | 0x80000000, GPIO_MODE_00);
  228. mt_set_gpio_mode(138 | 0x80000000, GPIO_MODE_00);
  229. break;
  230. case 1:
  231. mt_set_gpio_mode(135 | 0x80000000, GPIO_MODE_01);
  232. mt_set_gpio_mode(136 | 0x80000000, GPIO_MODE_01);
  233. mt_set_gpio_mode(138 | 0x80000000, GPIO_MODE_01);
  234. break;
  235. default:
  236. pr_err("%s(), invalid mode = %d", __func__, mode);
  237. retval = -1;
  238. }
  239. #else
  240. switch (mode) {
  241. case 0:
  242. if (aud_gpios[GPIO_TDM_MODE0].gpio_prepare) {
  243. retval =
  244. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_TDM_MODE0].gpioctrl);
  245. if (retval)
  246. pr_err("could not set aud_gpios[GPIO_TDM_MODE0] pins\n");
  247. }
  248. break;
  249. case 1:
  250. if (aud_gpios[GPIO_TDM_MODE1].gpio_prepare) {
  251. retval =
  252. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_TDM_MODE1].gpioctrl);
  253. if (retval)
  254. pr_err("could not set aud_gpios[GPIO_TDM_MODE1] pins\n");
  255. }
  256. break;
  257. default:
  258. pr_err("%s(), invalid mode = %d", __func__, mode);
  259. retval = -1;
  260. }
  261. #endif
  262. return retval;
  263. }
  264. int AudDrv_GPIO_I2S_Select(int bEnable)
  265. {
  266. int retval = 0;
  267. #if 0
  268. if (bEnable == 1) {
  269. if (aud_gpios[GPIO_I2S_MODE1].gpio_prepare) {
  270. retval =
  271. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_I2S_MODE1].gpioctrl);
  272. if (retval)
  273. pr_err("could not set aud_gpios[GPIO_I2S_MODE1] pins\n");
  274. }
  275. } else {
  276. if (aud_gpios[GPIO_I2S_MODE0].gpio_prepare) {
  277. retval =
  278. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_I2S_MODE0].gpioctrl);
  279. if (retval)
  280. pr_err("could not set aud_gpios[GPIO_I2S_MODE0] pins\n");
  281. }
  282. }
  283. #endif
  284. return retval;
  285. }
  286. int AudDrv_GPIO_EXTAMP_Select(int bEnable, int mode)
  287. {
  288. int retval = 0;
  289. #if 0
  290. int extamp_mode;
  291. int i;
  292. if (bEnable == 1) {
  293. if (mode == 1)
  294. extamp_mode = 1;
  295. else if (mode == 2)
  296. extamp_mode = 2;
  297. else
  298. extamp_mode = 3; /* default mode is 3 */
  299. if (aud_gpios[GPIO_EXTAMP_HIGH].gpio_prepare) {
  300. for (i = 0; i < extamp_mode; i++) {
  301. retval = pinctrl_select_state(pinctrlaud,
  302. aud_gpios[GPIO_EXTAMP_LOW].gpioctrl);
  303. if (retval)
  304. pr_err("could not set aud_gpios[GPIO_EXTAMP_LOW] pins\n");
  305. udelay(2);
  306. retval = pinctrl_select_state(pinctrlaud,
  307. aud_gpios[GPIO_EXTAMP_HIGH].gpioctrl);
  308. if (retval)
  309. pr_err("could not set aud_gpios[GPIO_EXTAMP_HIGH] pins\n");
  310. udelay(2);
  311. }
  312. }
  313. } else {
  314. if (aud_gpios[GPIO_EXTAMP_LOW].gpio_prepare) {
  315. retval =
  316. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_EXTAMP_LOW].gpioctrl);
  317. if (retval)
  318. pr_err("could not set aud_gpios[GPIO_EXTAMP_LOW] pins\n");
  319. }
  320. }
  321. #endif
  322. return retval;
  323. }
  324. int AudDrv_GPIO_EXTAMP2_Select(int bEnable, int mode)
  325. {
  326. int retval = 0;
  327. #if 0
  328. int extamp_mode;
  329. int i;
  330. if (bEnable == 1) {
  331. if (mode == 1)
  332. extamp_mode = 1;
  333. else if (mode == 2)
  334. extamp_mode = 2;
  335. else
  336. extamp_mode = 3; /* default mode is 3 */
  337. if (aud_gpios[GPIO_EXTAMP2_HIGH].gpio_prepare) {
  338. for (i = 0; i < extamp_mode; i++) {
  339. retval = pinctrl_select_state(pinctrlaud,
  340. aud_gpios[GPIO_EXTAMP2_LOW].gpioctrl);
  341. if (retval)
  342. pr_err("could not set aud_gpios[GPIO_EXTAMP2_LOW] pins\n");
  343. udelay(2);
  344. retval = pinctrl_select_state(pinctrlaud,
  345. aud_gpios[GPIO_EXTAMP2_HIGH].gpioctrl);
  346. if (retval)
  347. pr_err("could not set aud_gpios[GPIO_EXTAMP2_HIGH] pins\n");
  348. udelay(2);
  349. }
  350. }
  351. } else {
  352. if (aud_gpios[GPIO_EXTAMP2_LOW].gpio_prepare) {
  353. retval =
  354. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_EXTAMP2_LOW].gpioctrl);
  355. if (retval)
  356. pr_err("could not set aud_gpios[GPIO_EXTAMP2_LOW] pins\n");
  357. }
  358. }
  359. #endif
  360. return retval;
  361. }
  362. int AudDrv_GPIO_RCVSPK_Select(int bEnable)
  363. {
  364. int retval = 0;
  365. #if 0
  366. if (bEnable == 1) {
  367. if (aud_gpios[GPIO_RCVSPK_HIGH].gpio_prepare) {
  368. retval =
  369. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_RCVSPK_HIGH].gpioctrl);
  370. if (retval)
  371. pr_err("could not set aud_gpios[GPIO_RCVSPK_HIGH] pins\n");
  372. }
  373. } else {
  374. if (aud_gpios[GPIO_RCVSPK_LOW].gpio_prepare) {
  375. retval =
  376. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_RCVSPK_LOW].gpioctrl);
  377. if (retval)
  378. pr_err("could not set aud_gpios[GPIO_RCVSPK_LOW] pins\n");
  379. }
  380. }
  381. #endif
  382. return retval;
  383. }
  384. int AudDrv_GPIO_HPDEPOP_Select(int bEnable)
  385. {
  386. int retval = 0;
  387. #if 0
  388. if (bEnable == 1) {
  389. if (aud_gpios[GPIO_HPDEPOP_LOW].gpio_prepare) {
  390. retval =
  391. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_HPDEPOP_LOW].gpioctrl);
  392. if (retval)
  393. pr_err("could not set aud_gpios[GPIO_HPDEPOP_LOW] pins\n");
  394. }
  395. } else {
  396. if (aud_gpios[GPIO_HPDEPOP_HIGH].gpio_prepare) {
  397. retval =
  398. pinctrl_select_state(pinctrlaud, aud_gpios[GPIO_HPDEPOP_HIGH].gpioctrl);
  399. if (retval)
  400. pr_err("could not set aud_gpios[GPIO_HPDEPOP_HIGH] pins\n");
  401. }
  402. }
  403. #endif
  404. return retval;
  405. }