AudDrv_Ana.c 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151
  1. /*
  2. * Copyright (C) 2007 The Android Open Source Project
  3. *
  4. * Licensed under the Apache License, Version 2.0 (the "License");
  5. * you may not use this file except in compliance with the License.
  6. * You may obtain a copy of the License at
  7. *
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. *
  10. * Unless required by applicable law or agreed to in writing, software
  11. * distributed under the License is distributed on an "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13. * See the License for the specific language governing permissions and
  14. * limitations under the License.
  15. */
  16. /*******************************************************************************
  17. *
  18. * Filename:
  19. * ---------
  20. * AudDrv_Ana.c
  21. *
  22. * Project:
  23. * --------
  24. * MT6583 Audio Driver ana Register setting
  25. *
  26. * Description:
  27. * ------------
  28. * Audio register
  29. *
  30. * Author:
  31. * -------
  32. * Chipeng Chang
  33. *
  34. *------------------------------------------------------------------------------
  35. *
  36. *
  37. *******************************************************************************/
  38. /*****************************************************************************
  39. * C O M P I L E R F L A G S
  40. *****************************************************************************/
  41. /*****************************************************************************
  42. * E X T E R N A L R E F E R E N C E S
  43. *****************************************************************************/
  44. #include "AudDrv_Common.h"
  45. #include "AudDrv_Ana.h"
  46. #include "AudDrv_Clk.h"
  47. /* define this to use wrapper to control */
  48. /* #define AUDIO_USING_WRAP_DRIVER */
  49. #ifdef AUDIO_USING_WRAP_DRIVER
  50. #include <mt-plat/mt_pmic_wrap.h>
  51. #endif
  52. /*****************************************************************************
  53. * D A T A T Y P E S
  54. *****************************************************************************/
  55. void Ana_Set_Reg(uint32 offset, uint32 value, uint32 mask)
  56. {
  57. /* set pmic register or analog CONTROL_IFACE_PATH */
  58. int ret = 0;
  59. uint32 Reg_Value;
  60. PRINTK_ANA_REG("Ana_Set_Reg offset= 0x%x, value = 0x%x, mask = 0x%x\n", offset, value, mask);
  61. #ifdef AUDIO_USING_WRAP_DRIVER
  62. Reg_Value = Ana_Get_Reg(offset);
  63. Reg_Value &= (~mask);
  64. Reg_Value |= (value & mask);
  65. ret = pwrap_write(offset, Reg_Value);
  66. Reg_Value = Ana_Get_Reg(offset);
  67. if ((Reg_Value & mask) != (value & mask)) {
  68. pr_warn("Ana_Set_Reg offset= 0x%x, value = 0x%x mask = 0x%x ret = %d Reg_Value = 0x%x\n",
  69. offset, value, mask, ret, Reg_Value);
  70. }
  71. #endif
  72. }
  73. EXPORT_SYMBOL(Ana_Set_Reg);
  74. uint32 Ana_Get_Reg(uint32 offset)
  75. {
  76. /* get pmic register */
  77. int ret = 0;
  78. uint32 Rdata = 0;
  79. #ifdef AUDIO_USING_WRAP_DRIVER
  80. ret = pwrap_read(offset, &Rdata);
  81. #endif
  82. PRINTK_ANA_REG("Ana_Get_Reg offset= 0x%x Rdata = 0x%x ret = %d\n", offset, Rdata, ret);
  83. return Rdata;
  84. }
  85. EXPORT_SYMBOL(Ana_Get_Reg);
  86. void Ana_Log_Print(void)
  87. {
  88. AudDrv_ANA_Clk_On();
  89. pr_debug("ABB_AFE_CON0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON0));
  90. pr_debug("ABB_AFE_CON1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON1));
  91. pr_debug("ABB_AFE_CON2 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON2));
  92. pr_debug("ABB_AFE_CON3 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON3));
  93. pr_debug("ABB_AFE_CON4 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON4));
  94. pr_debug("ABB_AFE_CON5 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON5));
  95. pr_debug("ABB_AFE_CON6 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON6));
  96. pr_debug("ABB_AFE_CON7 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON7));
  97. pr_debug("ABB_AFE_CON8 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON8));
  98. pr_debug("ABB_AFE_CON9 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON9));
  99. pr_debug("ABB_AFE_CON10 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON10));
  100. pr_debug("ABB_AFE_CON11 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON11));
  101. pr_debug("ABB_AFE_STA0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA0));
  102. pr_debug("ABB_AFE_STA1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA1));
  103. pr_debug("ABB_AFE_STA2 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA2));
  104. pr_debug("AFE_UP8X_FIFO_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_CFG0));
  105. pr_debug("AFE_UP8X_FIFO_LOG_MON0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON0));
  106. pr_debug("AFE_UP8X_FIFO_LOG_MON1 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON1));
  107. pr_debug("AFE_PMIC_NEWIF_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG0));
  108. pr_debug("AFE_PMIC_NEWIF_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG1));
  109. pr_debug("AFE_PMIC_NEWIF_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG2));
  110. pr_debug("AFE_PMIC_NEWIF_CFG3 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG3));
  111. pr_debug("ABB_AFE_TOP_CON0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_TOP_CON0));
  112. pr_debug("ABB_MON_DEBUG0 = 0x%x\n", Ana_Get_Reg(ABB_MON_DEBUG0));
  113. pr_debug("TOP_CKPDN0 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0));
  114. pr_debug("TOP_CKPDN1 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1));
  115. pr_debug("TOP_CKPDN2 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2));
  116. pr_debug("TOP_CKCON1 = 0x%x\n", Ana_Get_Reg(TOP_CKCON1));
  117. pr_debug("SPK_CON0 = 0x%x\n", Ana_Get_Reg(SPK_CON0));
  118. pr_debug("SPK_CON1 = 0x%x\n", Ana_Get_Reg(SPK_CON1));
  119. pr_debug("SPK_CON2 = 0x%x\n", Ana_Get_Reg(SPK_CON2));
  120. pr_debug("SPK_CON6 = 0x%x\n", Ana_Get_Reg(SPK_CON6));
  121. pr_debug("SPK_CON7 = 0x%x\n", Ana_Get_Reg(SPK_CON7));
  122. pr_debug("SPK_CON8 = 0x%x\n", Ana_Get_Reg(SPK_CON8));
  123. pr_debug("SPK_CON9 = 0x%x\n", Ana_Get_Reg(SPK_CON9));
  124. pr_debug("SPK_CON10 = 0x%x\n", Ana_Get_Reg(SPK_CON10));
  125. pr_debug("SPK_CON11 = 0x%x\n", Ana_Get_Reg(SPK_CON11));
  126. pr_debug("AUDTOP_CON0 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON0));
  127. pr_debug("AUDTOP_CON1 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON1));
  128. pr_debug("AUDTOP_CON2 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON2));
  129. pr_debug("AUDTOP_CON3 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON3));
  130. pr_debug("AUDTOP_CON4 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON4));
  131. pr_debug("AUDTOP_CON5 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON5));
  132. pr_debug("AUDTOP_CON7 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON6));
  133. pr_debug("AUDTOP_CON8 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON7));
  134. pr_debug("AUDTOP_CON9 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON9));
  135. AudDrv_ANA_Clk_Off();
  136. pr_debug("-Ana_Log_Print\n");
  137. }
  138. EXPORT_SYMBOL(Ana_Log_Print);