mt_afe_reg.c 16 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. /*****************************************************************************
  13. * C O M P I L E R F L A G S
  14. *****************************************************************************/
  15. /*****************************************************************************
  16. * E X T E R N A L R E F E R E N C E S
  17. *****************************************************************************/
  18. #include "mt_afe_reg.h"
  19. #include "mt_afe_clk.h"
  20. #include "mt_afe_control.h"
  21. #include <sync_write.h>
  22. #include <linux/of_address.h>
  23. /* address for ioremap audio hardware register */
  24. static void *afe_base_address;
  25. static void *afe_sram_address;
  26. static void *spm_base_address;
  27. static void *topckgen_base_address;
  28. static void *apmixedsys_base_address;
  29. static phys_addr_t afe_sram_phy_address = AFE_INTERNAL_SRAM_PHY_BASE;
  30. int mt_afe_reg_remap(void *dev)
  31. {
  32. #ifdef AUDIO_IOREMAP_FROM_DT
  33. int ret = 0;
  34. struct device *pdev = dev;
  35. struct resource res;
  36. struct device_node *node;
  37. /* AFE register base */
  38. ret = of_address_to_resource(pdev->of_node, 0, &res);
  39. if (ret) {
  40. pr_err("%s of_address_to_resource#0 fail %d\n", __func__, ret);
  41. goto exit;
  42. }
  43. afe_base_address = ioremap_nocache(res.start, resource_size(&res));
  44. if (!afe_base_address) {
  45. pr_err("%s ioremap_nocache#0 addr:0x%llx size:0x%llx fail\n",
  46. __func__, (unsigned long long)res.start,
  47. (unsigned long long)resource_size(&res));
  48. ret = -ENXIO;
  49. goto exit;
  50. }
  51. /* audio SRAM base */
  52. ret = of_address_to_resource(pdev->of_node, 1, &res);
  53. if (ret) {
  54. pr_err("%s of_address_to_resource#1 fail %d\n", __func__, ret);
  55. goto exit;
  56. }
  57. afe_sram_address = ioremap_nocache(res.start, resource_size(&res));
  58. if (!afe_sram_address) {
  59. pr_err("%s ioremap_nocache#1 addr:0x%llx size:0x%llx fail\n",
  60. __func__, (unsigned long long)res.start,
  61. (unsigned long long)resource_size(&res));
  62. ret = -ENXIO;
  63. goto exit;
  64. }
  65. afe_sram_phy_address = res.start;
  66. /* TOPCKGEN register base */
  67. node = of_find_compatible_node(NULL, NULL, "mediatek,mt8173-topckgen");
  68. if (!node) {
  69. pr_warn("%s of_find_compatible_node(mediatek,mt8173-topckgen) fail\n", __func__);
  70. topckgen_base_address = ioremap_nocache(CKSYS_TOP, 0x1000);
  71. } else {
  72. topckgen_base_address = of_iomap(node, 0);
  73. }
  74. if (!topckgen_base_address) {
  75. pr_err("%s ioremap topckgen_base_address fail\n", __func__);
  76. ret = -ENODEV;
  77. goto exit;
  78. }
  79. /* SPM register base */
  80. node = of_find_compatible_node(NULL, NULL, "mediatek,mt8173-scpsys");
  81. if (!node) {
  82. pr_warn("%s of_find_compatible_node(mediatek,mt8173-scpsys) fail\n", __func__);
  83. spm_base_address = ioremap_nocache(SPM_BASE, 0x1000);
  84. } else {
  85. spm_base_address = of_iomap(node, 0);
  86. }
  87. if (!spm_base_address) {
  88. pr_err("%s ioremap spm_base_address fail\n", __func__);
  89. ret = -ENODEV;
  90. goto exit;
  91. }
  92. /* APMIXEDSYS register base */
  93. node = of_find_compatible_node(NULL, NULL, "mediatek,mt8173-apmixedsys");
  94. if (!node) {
  95. pr_warn("%s of_find_compatible_node(mediatek,mt8173-apmixedsys) fail\n", __func__);
  96. apmixedsys_base_address = ioremap_nocache(APMIXEDSYS_BASE, 0x1000);
  97. } else {
  98. apmixedsys_base_address = of_iomap(node, 0);
  99. }
  100. if (!apmixedsys_base_address) {
  101. pr_err("%s ioremap apmixedsys_base_address fail\n", __func__);
  102. ret = -ENODEV;
  103. goto exit;
  104. }
  105. exit:
  106. if (ret)
  107. mt_afe_reg_unmap();
  108. return ret;
  109. #else
  110. afe_sram_address = ioremap_nocache(AFE_INTERNAL_SRAM_PHY_BASE, AFE_INTERNAL_SRAM_SIZE);
  111. afe_base_address = ioremap_nocache(AUDIO_HW_PHYSICAL_BASE, 0x1000);
  112. spm_base_address = ioremap_nocache(SPM_BASE, 0x1000);
  113. topckgen_base_address = ioremap_nocache(CKSYS_TOP, 0x1000);
  114. apmixedsys_base_address = ioremap_nocache(APMIXEDSYS_BASE, 0x1000);
  115. return 0;
  116. #endif
  117. }
  118. void mt_afe_reg_unmap(void)
  119. {
  120. if (afe_base_address) {
  121. iounmap(afe_base_address);
  122. afe_base_address = NULL;
  123. }
  124. if (afe_sram_address) {
  125. iounmap(afe_sram_address);
  126. afe_sram_address = NULL;
  127. }
  128. if (topckgen_base_address) {
  129. iounmap(topckgen_base_address);
  130. topckgen_base_address = NULL;
  131. }
  132. if (spm_base_address) {
  133. iounmap(spm_base_address);
  134. spm_base_address = NULL;
  135. }
  136. if (apmixedsys_base_address) {
  137. iounmap(apmixedsys_base_address);
  138. apmixedsys_base_address = NULL;
  139. }
  140. }
  141. void mt_afe_set_reg(uint32_t offset, uint32_t value, uint32_t mask)
  142. {
  143. #ifdef AUDIO_MEM_IOREMAP
  144. const uint32_t *address = (uint32_t *) ((char *)afe_base_address + offset);
  145. #else
  146. const uint32_t address = (AFE_BASE + offset);
  147. #endif
  148. uint32_t val_tmp;
  149. val_tmp = mt_afe_get_reg(offset);
  150. val_tmp &= (~mask);
  151. val_tmp |= (value & mask);
  152. mt_reg_sync_writel(val_tmp, address);
  153. }
  154. EXPORT_SYMBOL(mt_afe_set_reg);
  155. uint32_t mt_afe_get_reg(uint32_t offset)
  156. {
  157. #ifdef AUDIO_MEM_IOREMAP
  158. const uint32_t *address = (uint32_t *) ((char *)afe_base_address + offset);
  159. #else
  160. const uint32_t address = (AFE_BASE + offset);
  161. #endif
  162. return readl((const void __iomem *)address);
  163. }
  164. EXPORT_SYMBOL(mt_afe_get_reg);
  165. uint32_t mt_afe_topck_get_reg(uint32_t offset)
  166. {
  167. const uint32_t *address = (uint32_t *) ((char *)topckgen_base_address + offset);
  168. return readl((const void __iomem *)address);
  169. }
  170. void mt_afe_topck_set_reg(uint32_t offset, uint32_t value, uint32_t mask)
  171. {
  172. const uint32_t *address = (uint32_t *) ((char *)topckgen_base_address + offset);
  173. uint32_t val_tmp;
  174. val_tmp = mt_afe_topck_get_reg(offset);
  175. val_tmp &= (~mask);
  176. val_tmp |= (value & mask);
  177. mt_reg_sync_writel(val_tmp, address);
  178. }
  179. uint32_t mt_afe_pll_get_reg(uint32_t offset)
  180. {
  181. const uint32_t *address = (uint32_t *) ((char *)apmixedsys_base_address + offset);
  182. return readl((const void __iomem *)address);
  183. }
  184. void mt_afe_pll_set_reg(uint32_t offset, uint32_t value, uint32_t mask)
  185. {
  186. const uint32_t *address = (uint32_t *) ((char *)apmixedsys_base_address + offset);
  187. uint32_t val_tmp;
  188. val_tmp = mt_afe_pll_get_reg(offset);
  189. val_tmp &= (~mask);
  190. val_tmp |= (value & mask);
  191. mt_reg_sync_writel(val_tmp, address);
  192. }
  193. uint32_t mt_afe_spm_get_reg(uint32_t offset)
  194. {
  195. const uint32_t *address = (uint32_t *) ((char *)spm_base_address + offset);
  196. return readl((const void __iomem *)address);
  197. }
  198. void mt_afe_spm_set_reg(uint32_t offset, uint32_t value, uint32_t mask)
  199. {
  200. const uint32_t *address = (uint32_t *) ((char *)spm_base_address + offset);
  201. uint32_t val_tmp;
  202. val_tmp = mt_afe_spm_get_reg(offset);
  203. val_tmp &= (~mask);
  204. val_tmp |= (value & mask);
  205. mt_reg_sync_writel(val_tmp, address);
  206. }
  207. void *mt_afe_get_sram_base_ptr()
  208. {
  209. return afe_sram_address;
  210. }
  211. phys_addr_t mt_afe_get_sram_phy_addr(void)
  212. {
  213. return afe_sram_phy_address;
  214. }
  215. void mt_afe_log_print(void)
  216. {
  217. mt_afe_main_clk_on();
  218. pr_debug("+AudDrv mt_afe_log_print\n");
  219. pr_debug("AUDIO_TOP_CON0 = 0x%x\n", mt_afe_get_reg(AUDIO_TOP_CON0));
  220. pr_debug("AUDIO_TOP_CON3 = 0x%x\n", mt_afe_get_reg(AUDIO_TOP_CON3));
  221. pr_debug("AFE_DAC_CON0 = 0x%x\n", mt_afe_get_reg(AFE_DAC_CON0));
  222. pr_debug("AFE_DAC_CON1 = 0x%x\n", mt_afe_get_reg(AFE_DAC_CON1));
  223. pr_debug("AFE_I2S_CON = 0x%x\n", mt_afe_get_reg(AFE_I2S_CON));
  224. pr_debug("AFE_DAIBT_CON0 = 0x%x\n", mt_afe_get_reg(AFE_DAIBT_CON0));
  225. pr_debug("AFE_CONN0 = 0x%x\n", mt_afe_get_reg(AFE_CONN0));
  226. pr_debug("AFE_CONN1 = 0x%x\n", mt_afe_get_reg(AFE_CONN1));
  227. pr_debug("AFE_CONN2 = 0x%x\n", mt_afe_get_reg(AFE_CONN2));
  228. pr_debug("AFE_CONN3 = 0x%x\n", mt_afe_get_reg(AFE_CONN3));
  229. pr_debug("AFE_CONN4 = 0x%x\n", mt_afe_get_reg(AFE_CONN4));
  230. pr_debug("AFE_I2S_CON1 = 0x%x\n", mt_afe_get_reg(AFE_I2S_CON1));
  231. pr_debug("AFE_I2S_CON2 = 0x%x\n", mt_afe_get_reg(AFE_I2S_CON2));
  232. pr_debug("AFE_MRGIF_CON = 0x%x\n", mt_afe_get_reg(AFE_MRGIF_CON));
  233. pr_debug("AFE_DL1_BASE = 0x%x\n", mt_afe_get_reg(AFE_DL1_BASE));
  234. pr_debug("AFE_DL1_CUR = 0x%x\n", mt_afe_get_reg(AFE_DL1_CUR));
  235. pr_debug("AFE_DL1_END = 0x%x\n", mt_afe_get_reg(AFE_DL1_END));
  236. pr_debug("AFE_DL2_BASE = 0x%x\n", mt_afe_get_reg(AFE_DL2_BASE));
  237. pr_debug("AFE_DL2_CUR = 0x%x\n", mt_afe_get_reg(AFE_DL2_CUR));
  238. pr_debug("AFE_DL2_END = 0x%x\n", mt_afe_get_reg(AFE_DL2_END));
  239. pr_debug("AFE_AWB_BASE = 0x%x\n", mt_afe_get_reg(AFE_AWB_BASE));
  240. pr_debug("AFE_AWB_END = 0x%x\n", mt_afe_get_reg(AFE_AWB_END));
  241. pr_debug("AFE_AWB_CUR = 0x%x\n", mt_afe_get_reg(AFE_AWB_CUR));
  242. pr_debug("AFE_VUL_BASE = 0x%x\n", mt_afe_get_reg(AFE_VUL_BASE));
  243. pr_debug("AFE_VUL_END = 0x%x\n", mt_afe_get_reg(AFE_VUL_END));
  244. pr_debug("AFE_VUL_CUR = 0x%x\n", mt_afe_get_reg(AFE_VUL_CUR));
  245. pr_debug("AFE_DAI_BASE = 0x%x\n", mt_afe_get_reg(AFE_DAI_BASE));
  246. pr_debug("AFE_DAI_END = 0x%x\n", mt_afe_get_reg(AFE_DAI_END));
  247. pr_debug("AFE_DAI_CUR = 0x%x\n", mt_afe_get_reg(AFE_DAI_CUR));
  248. pr_debug("AFE_MEMIF_MON0 = 0x%x\n", mt_afe_get_reg(AFE_MEMIF_MON0));
  249. pr_debug("AFE_MEMIF_MON1 = 0x%x\n", mt_afe_get_reg(AFE_MEMIF_MON1));
  250. pr_debug("AFE_MEMIF_MON2 = 0x%x\n", mt_afe_get_reg(AFE_MEMIF_MON2));
  251. pr_debug("AFE_MEMIF_MON4 = 0x%x\n", mt_afe_get_reg(AFE_MEMIF_MON4));
  252. pr_debug("AFE_ADDA_DL_SRC2_CON0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_DL_SRC2_CON0));
  253. pr_debug("AFE_ADDA_DL_SRC2_CON1 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_DL_SRC2_CON1));
  254. pr_debug("AFE_ADDA_UL_SRC_CON0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_UL_SRC_CON0));
  255. pr_debug("AFE_ADDA_UL_SRC_CON1 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_UL_SRC_CON1));
  256. pr_debug("AFE_ADDA_TOP_CON0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_TOP_CON0));
  257. pr_debug("AFE_ADDA_UL_DL_CON0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_UL_DL_CON0));
  258. pr_debug("AFE_ADDA_SRC_DEBUG = 0x%x\n", mt_afe_get_reg(AFE_ADDA_SRC_DEBUG));
  259. pr_debug("AFE_ADDA_SRC_DEBUG_MON0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_SRC_DEBUG_MON0));
  260. pr_debug("AFE_ADDA_SRC_DEBUG_MON1 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_SRC_DEBUG_MON1));
  261. pr_debug("AFE_ADDA_NEWIF_CFG0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_NEWIF_CFG0));
  262. pr_debug("AFE_ADDA_NEWIF_CFG1 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_NEWIF_CFG1));
  263. pr_debug("AFE_ADDA2_TOP_CON0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA2_TOP_CON0));
  264. pr_debug("AFE_SIDETONE_DEBUG = 0x%x\n", mt_afe_get_reg(AFE_SIDETONE_DEBUG));
  265. pr_debug("AFE_SIDETONE_MON = 0x%x\n", mt_afe_get_reg(AFE_SIDETONE_MON));
  266. pr_debug("AFE_SIDETONE_CON0 = 0x%x\n", mt_afe_get_reg(AFE_SIDETONE_CON0));
  267. pr_debug("AFE_SIDETONE_COEFF = 0x%x\n", mt_afe_get_reg(AFE_SIDETONE_COEFF));
  268. pr_debug("AFE_SIDETONE_CON1 = 0x%x\n", mt_afe_get_reg(AFE_SIDETONE_CON1));
  269. pr_debug("AFE_SIDETONE_GAIN = 0x%x\n", mt_afe_get_reg(AFE_SIDETONE_GAIN));
  270. pr_debug("AFE_SIDETONE_GAIN = 0x%x\n", mt_afe_get_reg(AFE_SGEN_CON0));
  271. pr_debug("AFE_TOP_CON0 = 0x%x\n", mt_afe_get_reg(AFE_TOP_CON0));
  272. pr_debug("AFE_ADDA_PREDIS_CON0 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_PREDIS_CON0));
  273. pr_debug("AFE_ADDA_PREDIS_CON1 = 0x%x\n", mt_afe_get_reg(AFE_ADDA_PREDIS_CON1));
  274. pr_debug("AFE_MRGIF_MON0 = 0x%x\n", mt_afe_get_reg(AFE_MRGIF_MON0));
  275. pr_debug("AFE_MRGIF_MON1 = 0x%x\n", mt_afe_get_reg(AFE_MRGIF_MON1));
  276. pr_debug("AFE_MRGIF_MON2 = 0x%x\n", mt_afe_get_reg(AFE_MRGIF_MON2));
  277. pr_debug("AFE_MOD_DAI_BASE = 0x%x\n", mt_afe_get_reg(AFE_MOD_DAI_BASE));
  278. pr_debug("AFE_MOD_DAI_END = 0x%x\n", mt_afe_get_reg(AFE_MOD_DAI_END));
  279. pr_debug("AFE_MOD_DAI_CUR = 0x%x\n", mt_afe_get_reg(AFE_MOD_DAI_CUR));
  280. pr_debug("AFE_HDMI_OUT_CON0 = 0x%x\n", mt_afe_get_reg(AFE_HDMI_OUT_CON0));
  281. pr_debug("AFE_HDMI_OUT_BASE = 0x%x\n", mt_afe_get_reg(AFE_HDMI_OUT_BASE));
  282. pr_debug("AFE_HDMI_OUT_CUR = 0x%x\n", mt_afe_get_reg(AFE_HDMI_OUT_CUR));
  283. pr_debug("AFE_HDMI_OUT_END = 0x%x\n", mt_afe_get_reg(AFE_HDMI_OUT_END));
  284. pr_debug("AFE_SPDIF_OUT_CON0 = 0x%x\n", mt_afe_get_reg(AFE_SPDIF_OUT_CON0));
  285. pr_debug("AFE_SPDIF_BASE = 0x%x\n", mt_afe_get_reg(AFE_SPDIF_BASE));
  286. pr_debug("AFE_SPDIF_CUR = 0x%x\n", mt_afe_get_reg(AFE_SPDIF_CUR));
  287. pr_debug("AFE_SPDIF_END = 0x%x\n", mt_afe_get_reg(AFE_SPDIF_END));
  288. pr_debug("AFE_HDMI_CONN0 = 0x%x\n", mt_afe_get_reg(AFE_HDMI_CONN0));
  289. pr_debug("AFE_IRQ_MCU_CON = 0x%x\n", mt_afe_get_reg(AFE_IRQ_MCU_CON));
  290. pr_debug("AFE_IRQ_MCU_STATUS = 0x%x\n", mt_afe_get_reg(AFE_IRQ_MCU_STATUS));
  291. pr_debug("AFE_IRQ_MCU_CLR = 0x%x\n", mt_afe_get_reg(AFE_IRQ_MCU_CLR));
  292. pr_debug("AFE_IRQ_MCU_CNT1 = 0x%x\n", mt_afe_get_reg(AFE_IRQ_MCU_CNT1));
  293. pr_debug("AFE_IRQ_MCU_CNT2 = 0x%x\n", mt_afe_get_reg(AFE_IRQ_MCU_CNT2));
  294. pr_debug("AFE_IRQ_MCU_MON2 = 0x%x\n", mt_afe_get_reg(AFE_IRQ_MCU_MON2));
  295. pr_debug("AFE_IRQ_MCU_CNT5 = 0x%x\n", mt_afe_get_reg(AFE_IRQ_MCU_CNT5));
  296. pr_debug("AFE_IRQ1_MCU_CNT_MON = 0x%x\n", mt_afe_get_reg(AFE_IRQ1_MCU_CNT_MON));
  297. pr_debug("AFE_IRQ2_MCU_CNT_MON = 0x%x\n", mt_afe_get_reg(AFE_IRQ2_MCU_CNT_MON));
  298. pr_debug("AFE_IRQ1_MCU_EN_CNT_MON = 0x%x\n", mt_afe_get_reg(AFE_IRQ1_MCU_EN_CNT_MON));
  299. pr_debug("AFE_IRQ5_MCU_CNT_MON = 0x%x\n", mt_afe_get_reg(AFE_IRQ5_MCU_CNT_MON));
  300. pr_debug("AFE_MEMIF_MAXLEN = 0x%x\n", mt_afe_get_reg(AFE_MEMIF_MAXLEN));
  301. pr_debug("AFE_MEMIF_PBUF_SIZE = 0x%x\n", mt_afe_get_reg(AFE_MEMIF_PBUF_SIZE));
  302. pr_debug("AFE_GAIN1_CON0 = 0x%x\n", mt_afe_get_reg(AFE_GAIN1_CON0));
  303. pr_debug("AFE_GAIN1_CON1 = 0x%x\n", mt_afe_get_reg(AFE_GAIN1_CON1));
  304. pr_debug("AFE_GAIN1_CON2 = 0x%x\n", mt_afe_get_reg(AFE_GAIN1_CON2));
  305. pr_debug("AFE_GAIN1_CON3 = 0x%x\n", mt_afe_get_reg(AFE_GAIN1_CON3));
  306. pr_debug("AFE_GAIN1_CONN = 0x%x\n", mt_afe_get_reg(AFE_GAIN1_CONN));
  307. pr_debug("AFE_GAIN1_CUR = 0x%x\n", mt_afe_get_reg(AFE_GAIN1_CUR));
  308. pr_debug("AFE_GAIN2_CON0 = 0x%x\n", mt_afe_get_reg(AFE_GAIN2_CON0));
  309. pr_debug("AFE_GAIN2_CON1 = 0x%x\n", mt_afe_get_reg(AFE_GAIN2_CON1));
  310. pr_debug("AFE_GAIN2_CON2 = 0x%x\n", mt_afe_get_reg(AFE_GAIN2_CON2));
  311. pr_debug("AFE_GAIN2_CON3 = 0x%x\n", mt_afe_get_reg(AFE_GAIN2_CON3));
  312. pr_debug("AFE_GAIN2_CONN = 0x%x\n", mt_afe_get_reg(AFE_GAIN2_CONN));
  313. pr_debug("AFE_GAIN2_CUR = 0x%x\n", mt_afe_get_reg(AFE_GAIN2_CUR));
  314. pr_debug("AFE_GAIN2_CONN2 = 0x%x\n", mt_afe_get_reg(AFE_GAIN2_CONN2));
  315. pr_debug("AFE_IEC_CFG = 0x%x\n", mt_afe_get_reg(AFE_IEC_CFG));
  316. pr_debug("AFE_IEC_NSNUM = 0x%x\n", mt_afe_get_reg(AFE_IEC_NSNUM));
  317. pr_debug("AFE_IEC_BURST_INFO = 0x%x\n", mt_afe_get_reg(AFE_IEC_BURST_INFO));
  318. pr_debug("AFE_IEC_BURST_LEN = 0x%x\n", mt_afe_get_reg(AFE_IEC_BURST_LEN));
  319. pr_debug("AFE_IEC_NSADR = 0x%x\n", mt_afe_get_reg(AFE_IEC_NSADR));
  320. pr_debug("AFE_IEC_CHL_STAT0 = 0x%x\n", mt_afe_get_reg(AFE_IEC_CHL_STAT0));
  321. pr_debug("AFE_IEC_CHL_STAT1 = 0x%x\n", mt_afe_get_reg(AFE_IEC_CHL_STAT1));
  322. pr_debug("AFE_IEC_CHR_STAT0 = 0x%x\n", mt_afe_get_reg(AFE_IEC_CHR_STAT0));
  323. pr_debug("AFE_IEC_CHR_STAT1 = 0x%x\n", mt_afe_get_reg(AFE_IEC_CHR_STAT1));
  324. pr_debug("AFE_ASRC_CON0 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON0));
  325. pr_debug("AFE_ASRC_CON1 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON1));
  326. pr_debug("AFE_ASRC_CON2 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON2));
  327. pr_debug("AFE_ASRC_CON3 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON3));
  328. pr_debug("AFE_ASRC_CON4 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON4));
  329. pr_debug("AFE_ASRC_CON5 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON5));
  330. pr_debug("AFE_ASRC_CON6 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON6));
  331. pr_debug("AFE_ASRC_CON7 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON7));
  332. pr_debug("AFE_ASRC_CON8 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON8));
  333. pr_debug("AFE_ASRC_CON9 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON9));
  334. pr_debug("AFE_ASRC_CON10 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON10));
  335. pr_debug("AFE_ASRC_CON11 = 0x%x\n", mt_afe_get_reg(AFE_ASRC_CON11));
  336. pr_debug("PCM_INTF_CON1 = 0x%x\n", mt_afe_get_reg(PCM_INTF_CON1));
  337. pr_debug("PCM_INTF_CON2 = 0x%x\n", mt_afe_get_reg(PCM_INTF_CON2));
  338. pr_debug("PCM2_INTF_CON = 0x%x\n", mt_afe_get_reg(PCM2_INTF_CON));
  339. mt_afe_main_clk_off();
  340. pr_debug("-AudDrv mt_afe_log_print\n");
  341. }
  342. EXPORT_SYMBOL(mt_afe_log_print);