AudDrv_Ana.c 12 KB

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  1. /*
  2. * Copyright (C) 2007 The Android Open Source Project
  3. *
  4. * Licensed under the Apache License, Version 2.0 (the "License");
  5. * you may not use this file except in compliance with the License.
  6. * You may obtain a copy of the License at
  7. *
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. *
  10. * Unless required by applicable law or agreed to in writing, software
  11. * distributed under the License is distributed on an "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13. * See the License for the specific language governing permissions and
  14. * limitations under the License.
  15. */
  16. /*******************************************************************************
  17. *
  18. * Filename:
  19. * ---------
  20. * AudDrv_Ana.c
  21. *
  22. * Project:
  23. * --------
  24. * MT6583 Audio Driver ana Register setting
  25. *
  26. * Description:
  27. * ------------
  28. * Audio register
  29. *
  30. * Author:
  31. * -------
  32. * Chipeng Chang
  33. *
  34. *------------------------------------------------------------------------------
  35. *
  36. *
  37. *******************************************************************************/
  38. /*****************************************************************************
  39. * C O M P I L E R F L A G S
  40. *****************************************************************************/
  41. /*****************************************************************************
  42. * E X T E R N A L R E F E R E N C E S
  43. *****************************************************************************/
  44. #include "AudDrv_Common.h"
  45. #include "AudDrv_Ana.h"
  46. #include "AudDrv_Clk.h"
  47. /* define this to use wrapper to control */
  48. /*#define AUDIO_USING_WRAP_DRIVER*/
  49. #ifdef AUDIO_USING_WRAP_DRIVER
  50. #include <mach/mt_pmic_wrap.h>
  51. #endif
  52. static DEFINE_SPINLOCK(ana_set_reg_lock);
  53. /*****************************************************************************
  54. * D A T A T Y P E S
  55. *****************************************************************************/
  56. void Ana_Set_Reg(uint32 offset, uint32 value, uint32 mask)
  57. {
  58. /* set pmic register or analog CONTROL_IFACE_PATH */
  59. int ret = 0;
  60. uint32 Reg_Value;
  61. unsigned long flags = 0;
  62. PRINTK_ANA_REG("Ana_Set_Reg offset= 0x%x , value = 0x%x mask = 0x%x\n", offset, value,
  63. mask);
  64. #ifdef AUDIO_USING_WRAP_DRIVER
  65. spin_lock_irqsave(&ana_set_reg_lock, flags);
  66. Reg_Value = Ana_Get_Reg(offset);
  67. Reg_Value &= (~mask);
  68. Reg_Value |= (value & mask);
  69. ret = pwrap_write(offset, Reg_Value);
  70. spin_unlock_irqrestore(&ana_set_reg_lock, flags);
  71. Reg_Value = Ana_Get_Reg(offset);
  72. /*
  73. if ((Reg_Value & mask) != (value & mask))
  74. pr_debug("Ana_Set_Reg mask = 0x%x ret = %d Reg_Value = 0x%x\n", mask, ret,
  75. Reg_Value);*/
  76. #endif
  77. }
  78. EXPORT_SYMBOL(Ana_Set_Reg);
  79. uint32 Ana_Get_Reg(uint32 offset)
  80. {
  81. /* get pmic register */
  82. int ret = 0;
  83. uint32 Rdata = 0;
  84. #ifdef AUDIO_USING_WRAP_DRIVER
  85. ret = pwrap_read(offset, &Rdata);
  86. #endif
  87. PRINTK_ANA_REG("Ana_Get_Reg offset=0x%x,Rdata=0x%x,ret=%d\n", offset, Rdata, ret);
  88. return Rdata;
  89. }
  90. EXPORT_SYMBOL(Ana_Get_Reg);
  91. void Ana_Log_Print(void)
  92. {
  93. AudDrv_ANA_Clk_On();
  94. pr_debug("AFE_UL_DL_CON0 = 0x%x\n", Ana_Get_Reg(AFE_UL_DL_CON0));
  95. pr_debug("AFE_DL_SRC2_CON0_H = 0x%x\n", Ana_Get_Reg(AFE_DL_SRC2_CON0_H));
  96. pr_debug("AFE_DL_SRC2_CON0_L = 0x%x\n", Ana_Get_Reg(AFE_DL_SRC2_CON0_L));
  97. pr_debug("AFE_DL_SDM_CON0 = 0x%x\n", Ana_Get_Reg(AFE_DL_SDM_CON0));
  98. pr_debug("AFE_DL_SDM_CON1 = 0x%x\n", Ana_Get_Reg(AFE_DL_SDM_CON1));
  99. pr_debug("AFE_UL_SRC0_CON0_H = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC0_CON0_H));
  100. pr_debug("AFE_UL_SRC0_CON0_L = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC0_CON0_L));
  101. pr_debug("AFE_UL_SRC1_CON0_H = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC1_CON0_H));
  102. pr_debug("AFE_UL_SRC1_CON0_L = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC1_CON0_L));
  103. pr_debug("PMIC_AFE_TOP_CON0 = 0x%x\n", Ana_Get_Reg(PMIC_AFE_TOP_CON0));
  104. pr_debug("AFE_AUDIO_TOP_CON0 = 0x%x\n", Ana_Get_Reg(AFE_AUDIO_TOP_CON0));
  105. pr_debug("PMIC_AFE_TOP_CON0 = 0x%x\n", Ana_Get_Reg(PMIC_AFE_TOP_CON0));
  106. pr_debug("AFE_DL_SRC_MON0 = 0x%x\n", Ana_Get_Reg(AFE_DL_SRC_MON0));
  107. pr_debug("AFE_DL_SDM_TEST0 = 0x%x\n", Ana_Get_Reg(AFE_DL_SDM_TEST0));
  108. pr_debug("AFE_MON_DEBUG0 = 0x%x\n", Ana_Get_Reg(AFE_MON_DEBUG0));
  109. pr_debug("AFUNC_AUD_CON0 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON0));
  110. pr_debug("AFUNC_AUD_CON1 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON1));
  111. pr_debug("AFUNC_AUD_CON2 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON2));
  112. pr_debug("AFUNC_AUD_CON3 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON3));
  113. pr_debug("AFUNC_AUD_CON4 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON4));
  114. pr_debug("AFUNC_AUD_MON0 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_MON0));
  115. pr_debug("AFUNC_AUD_MON1 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_MON1));
  116. pr_debug("AUDRC_TUNE_MON0 = 0x%x\n", Ana_Get_Reg(AUDRC_TUNE_MON0));
  117. pr_debug("AFE_UP8X_FIFO_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_CFG0));
  118. pr_debug("AFE_UP8X_FIFO_LOG_MON0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON0));
  119. pr_debug("AFE_UP8X_FIFO_LOG_MON1 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON1));
  120. pr_debug("AFE_DL_DC_COMP_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_DL_DC_COMP_CFG0));
  121. pr_debug("AFE_DL_DC_COMP_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_DL_DC_COMP_CFG1));
  122. pr_debug("AFE_DL_DC_COMP_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_DL_DC_COMP_CFG2));
  123. pr_debug("AFE_PMIC_NEWIF_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG0));
  124. pr_debug("AFE_PMIC_NEWIF_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG1));
  125. pr_debug("AFE_PMIC_NEWIF_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG2));
  126. pr_debug("AFE_PMIC_NEWIF_CFG3 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG3));
  127. pr_debug("AFE_SGEN_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_SGEN_CFG0));
  128. pr_debug("AFE_SGEN_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_SGEN_CFG1));
  129. pr_debug("AFE_VOW_TOP = 0x%x\n", Ana_Get_Reg(AFE_VOW_TOP));
  130. pr_debug("AFE_VOW_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG0));
  131. pr_debug("AFE_VOW_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG1));
  132. pr_debug("AFE_VOW_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG2));
  133. pr_debug("AFE_VOW_CFG3 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG3));
  134. pr_debug("AFE_VOW_CFG4 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG4));
  135. pr_debug("AFE_VOW_CFG5 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG5));
  136. pr_debug("AFE_VOW_MON0 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON0));
  137. pr_debug("AFE_VOW_MON1 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON1));
  138. pr_debug("AFE_VOW_MON2 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON2));
  139. pr_debug("AFE_VOW_MON3 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON3));
  140. pr_debug("AFE_VOW_MON4 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON4));
  141. pr_debug("AFE_VOW_MON5 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON5));
  142. pr_debug("AFE_DCCLK_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_DCCLK_CFG0));
  143. pr_debug("AFE_DCCLK_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_DCCLK_CFG1));
  144. pr_debug("TOP_CON = 0x%x\n", Ana_Get_Reg(TOP_CON));
  145. pr_debug("TOP_STATUS = 0x%x\n", Ana_Get_Reg(TOP_STATUS));
  146. pr_debug("TOP_CKPDN_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON0));
  147. pr_debug("TOP_CKPDN_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON1));
  148. pr_debug("TOP_CKPDN_CON2 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON2));
  149. pr_debug("TOP_CKPDN_CON3 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON3));
  150. pr_debug("TOP_CKSEL_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKSEL_CON0));
  151. pr_debug("TOP_CKSEL_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKSEL_CON1));
  152. pr_debug("TOP_CKSEL_CON2 = 0x%x\n", Ana_Get_Reg(TOP_CKSEL_CON2));
  153. pr_debug("TOP_CKDIVSEL_CON = 0x%x\n", Ana_Get_Reg(TOP_CKDIVSEL_CON));
  154. pr_debug("TOP_CKHWEN_CON = 0x%x\n", Ana_Get_Reg(TOP_CKHWEN_CON));
  155. pr_debug("TOP_CKTST_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKTST_CON0));
  156. pr_debug("TOP_CKTST_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKTST_CON1));
  157. pr_debug("TOP_CKTST_CON2 = 0x%x\n", Ana_Get_Reg(TOP_CKTST_CON2));
  158. pr_debug("TOP_CLKSQ = 0x%x\n", Ana_Get_Reg(TOP_CLKSQ));
  159. pr_debug("TOP_RST_CON0 = 0x%x\n", Ana_Get_Reg(TOP_RST_CON0));
  160. pr_debug("TEST_CON0 = 0x%x\n", Ana_Get_Reg(TEST_CON0));
  161. pr_debug("TEST_OUT = 0x%x\n", Ana_Get_Reg(TEST_OUT));
  162. pr_debug("AFE_MON_DEBUG0= 0x%x\n", Ana_Get_Reg(AFE_MON_DEBUG0));
  163. pr_debug("ZCD_CON0 = 0x%x\n", Ana_Get_Reg(ZCD_CON0));
  164. pr_debug("ZCD_CON1 = 0x%x\n", Ana_Get_Reg(ZCD_CON1));
  165. pr_debug("ZCD_CON2 = 0x%x\n", Ana_Get_Reg(ZCD_CON2));
  166. pr_debug("ZCD_CON3 = 0x%x\n", Ana_Get_Reg(ZCD_CON3));
  167. pr_debug("ZCD_CON4 = 0x%x\n", Ana_Get_Reg(ZCD_CON4));
  168. pr_debug("ZCD_CON5 = 0x%x\n", Ana_Get_Reg(ZCD_CON5));
  169. pr_debug("LDO_CON1 = 0x%x\n", Ana_Get_Reg(LDO_CON1));
  170. pr_debug("LDO_CON2 = 0x%x\n", Ana_Get_Reg(LDO_CON2));
  171. pr_debug("LDO_VCON1 = 0x%x\n", Ana_Get_Reg(LDO_VCON1));
  172. pr_debug("SPK_CON0 = 0x%x\n", Ana_Get_Reg(SPK_CON0));
  173. pr_debug("SPK_CON1 = 0x%x\n", Ana_Get_Reg(SPK_CON1));
  174. pr_debug("SPK_CON2 = 0x%x\n", Ana_Get_Reg(SPK_CON2));
  175. pr_debug("SPK_CON3 = 0x%x\n", Ana_Get_Reg(SPK_CON3));
  176. pr_debug("SPK_CON4 = 0x%x\n", Ana_Get_Reg(SPK_CON4));
  177. pr_debug("SPK_CON5 = 0x%x\n", Ana_Get_Reg(SPK_CON5));
  178. pr_debug("SPK_CON6 = 0x%x\n", Ana_Get_Reg(SPK_CON6));
  179. pr_debug("SPK_CON7 = 0x%x\n", Ana_Get_Reg(SPK_CON7));
  180. pr_debug("SPK_CON8 = 0x%x\n", Ana_Get_Reg(SPK_CON8));
  181. pr_debug("SPK_CON9 = 0x%x\n", Ana_Get_Reg(SPK_CON9));
  182. pr_debug("SPK_CON10 = 0x%x\n", Ana_Get_Reg(SPK_CON10));
  183. pr_debug("SPK_CON11 = 0x%x\n", Ana_Get_Reg(SPK_CON11));
  184. pr_debug("SPK_CON12 = 0x%x\n", Ana_Get_Reg(SPK_CON12));
  185. pr_debug("SPK_CON13 = 0x%x\n", Ana_Get_Reg(SPK_CON13));
  186. pr_debug("SPK_CON14 = 0x%x\n", Ana_Get_Reg(SPK_CON14));
  187. pr_debug("SPK_CON15 = 0x%x\n", Ana_Get_Reg(SPK_CON15));
  188. pr_debug("SPK_CON16 = 0x%x\n", Ana_Get_Reg(SPK_CON16));
  189. pr_debug("SPK_ANA_CON0 = 0x%x\n", Ana_Get_Reg(SPK_ANA_CON0));
  190. pr_debug("SPK_ANA_CON1 = 0x%x\n", Ana_Get_Reg(SPK_ANA_CON1));
  191. pr_debug("SPK_ANA_CON3 = 0x%x\n", Ana_Get_Reg(SPK_ANA_CON3));
  192. pr_debug("AUDDEC_ANA_CON0 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON0));
  193. pr_debug("AUDDEC_ANA_CON1 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON1));
  194. pr_debug("AUDDEC_ANA_CON2 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON2));
  195. pr_debug("AUDDEC_ANA_CON3 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON3));
  196. pr_debug("AUDDEC_ANA_CON4 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON4));
  197. pr_debug("AUDDEC_ANA_CON5 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON5));
  198. pr_debug("AUDDEC_ANA_CON6 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON6));
  199. pr_debug("AUDDEC_ANA_CON7 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON7));
  200. pr_debug("AUDDEC_ANA_CON8 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON8));
  201. pr_debug("AUDENC_ANA_CON0 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON0));
  202. pr_debug("AUDENC_ANA_CON1 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON1));
  203. pr_debug("AUDENC_ANA_CON2 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON2));
  204. pr_debug("AUDENC_ANA_CON3 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON3));
  205. pr_debug("AUDENC_ANA_CON4 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON4));
  206. pr_debug("AUDENC_ANA_CON5 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON5));
  207. pr_debug("AUDENC_ANA_CON6 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON6));
  208. pr_debug("AUDENC_ANA_CON7 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON7));
  209. pr_debug("AUDENC_ANA_CON8 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON8));
  210. pr_debug("AUDENC_ANA_CON9 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON9));
  211. #ifdef _VOW_ENABLE
  212. pr_debug("AUDENC_ANA_CON11 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON11));
  213. pr_debug("AUDENC_ANA_CON12 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON12));
  214. pr_debug("AUDENC_ANA_CON13 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON13));
  215. pr_debug("AUDENC_ANA_CON14 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON14));
  216. #endif
  217. pr_debug("AUDENC_ANA_CON10 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON10));
  218. pr_debug("AUDNCP_CLKDIV_CON0 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON0));
  219. pr_debug("AUDNCP_CLKDIV_CON1 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON1));
  220. pr_debug("AUDNCP_CLKDIV_CON2 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON2));
  221. pr_debug("AUDNCP_CLKDIV_CON3 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON3));
  222. pr_debug("AUDNCP_CLKDIV_CON4 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON4));
  223. pr_debug("TOP_CKPDN_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON0));
  224. pr_debug("GPIO_MODE3 = 0x%x\n", Ana_Get_Reg(GPIO_MODE3));
  225. AudDrv_ANA_Clk_Off();
  226. pr_debug("-Ana_Log_Print\n");
  227. }
  228. EXPORT_SYMBOL(Ana_Log_Print);
  229. /* export symbols for other module using */