Kconfig 3.4 KB

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  1. #
  2. # Memory devices
  3. #
  4. menuconfig MEMORY
  5. bool "Memory Controller drivers"
  6. if MEMORY
  7. config ATMEL_SDRAMC
  8. bool "Atmel (Multi-port DDR-)SDRAM Controller"
  9. default y
  10. depends on ARCH_AT91 && OF
  11. help
  12. This driver is for Atmel SDRAM Controller or Atmel Multi-port
  13. DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
  14. Starting with the at91sam9g45, this controller supports SDR, DDR and
  15. LP-DDR memories.
  16. config TI_AEMIF
  17. tristate "Texas Instruments AEMIF driver"
  18. depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
  19. help
  20. This driver is for the AEMIF module available in Texas Instruments
  21. SoCs. AEMIF stands for Asynchronous External Memory Interface and
  22. is intended to provide a glue-less interface to a variety of
  23. asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
  24. of 256M bytes of any of these memories can be accessed at a given
  25. time via four chip selects with 64M byte access per chip select.
  26. config TI_EMIF
  27. tristate "Texas Instruments EMIF driver"
  28. depends on ARCH_OMAP2PLUS
  29. select DDR
  30. help
  31. This driver is for the EMIF module available in Texas Instruments
  32. SoCs. EMIF is an SDRAM controller that, based on its revision,
  33. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  34. This driver takes care of only LPDDR2 memories presently. The
  35. functions of the driver includes re-configuring AC timing
  36. parameters and other settings during frequency, voltage and
  37. temperature changes
  38. config MVEBU_DEVBUS
  39. bool "Marvell EBU Device Bus Controller"
  40. default y
  41. depends on PLAT_ORION && OF
  42. help
  43. This driver is for the Device Bus controller available in some
  44. Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
  45. Armada 370 and Armada XP. This controller allows to handle flash
  46. devices such as NOR, NAND, SRAM, and FPGA.
  47. config TEGRA20_MC
  48. bool "Tegra20 Memory Controller(MC) driver"
  49. default y
  50. depends on ARCH_TEGRA_2x_SOC
  51. help
  52. This driver is for the Memory Controller(MC) module available
  53. in Tegra20 SoCs, mainly for a address translation fault
  54. analysis, especially for IOMMU/GART(Graphics Address
  55. Relocation Table) module.
  56. config TEGRA30_MC
  57. bool "Tegra30 Memory Controller(MC) driver"
  58. default y
  59. depends on ARCH_TEGRA_3x_SOC
  60. help
  61. This driver is for the Memory Controller(MC) module available
  62. in Tegra30 SoCs, mainly for a address translation fault
  63. analysis, especially for IOMMU/SMMU(System Memory Management
  64. Unit) module.
  65. config FSL_CORENET_CF
  66. tristate "Freescale CoreNet Error Reporting"
  67. depends on FSL_SOC_BOOKE
  68. help
  69. Say Y for reporting of errors from the Freescale CoreNet
  70. Coherency Fabric. Errors reported include accesses to
  71. physical addresses that mapped by no local access window
  72. (LAW) or an invalid LAW, as well as bad cache state that
  73. represents a coherency violation.
  74. config FSL_IFC
  75. bool
  76. depends on FSL_SOC
  77. config MTK_SMI
  78. bool "MTK SMI"
  79. depends on ARCH_MEDIATEK || COMPILE_TEST
  80. help
  81. This driver is for the Memory Controller module in MediaTek SoCs,
  82. mainly help enable/disable iommu, help control the power-domain and
  83. the clocks for each local arbiter. It also help bandwidth control
  84. for different scenario.
  85. config MTK_SMI_V1
  86. bool "MTK SMI V1"
  87. depends on ARCH_MEDIATEK || COMPILE_TEST
  88. help
  89. This driver is for Mediatek SMI verion-1 which have smi_common_ao
  90. base. It will enable/disable iommu, help control the power-domain and
  91. the clocks for each local arbiter. It also help bandwidth control
  92. for different scenario.
  93. endif