cpufreq-dt.c 9.6 KB

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  1. /*
  2. * Copyright (C) 2012 Freescale Semiconductor, Inc.
  3. *
  4. * Copyright (C) 2014 Linaro.
  5. * Viresh Kumar <viresh.kumar@linaro.org>
  6. *
  7. * The OPP code in function set_target() is reused from
  8. * drivers/cpufreq/omap-cpufreq.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/clk.h>
  16. #include <linux/cpu.h>
  17. #include <linux/cpu_cooling.h>
  18. #include <linux/cpufreq.h>
  19. #include <linux/cpufreq-dt.h>
  20. #include <linux/cpumask.h>
  21. #include <linux/err.h>
  22. #include <linux/module.h>
  23. #include <linux/of.h>
  24. #include <linux/pm_opp.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/regulator/consumer.h>
  27. #include <linux/slab.h>
  28. #include <linux/thermal.h>
  29. struct private_data {
  30. struct device *cpu_dev;
  31. struct regulator *cpu_reg;
  32. struct thermal_cooling_device *cdev;
  33. unsigned int voltage_tolerance; /* in percentage */
  34. };
  35. static int set_target(struct cpufreq_policy *policy, unsigned int index)
  36. {
  37. struct dev_pm_opp *opp;
  38. struct cpufreq_frequency_table *freq_table = policy->freq_table;
  39. struct clk *cpu_clk = policy->clk;
  40. struct private_data *priv = policy->driver_data;
  41. struct device *cpu_dev = priv->cpu_dev;
  42. struct regulator *cpu_reg = priv->cpu_reg;
  43. unsigned long volt = 0, volt_old = 0, tol = 0;
  44. unsigned int old_freq, new_freq;
  45. long freq_Hz, freq_exact;
  46. int ret;
  47. freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  48. if (freq_Hz <= 0)
  49. freq_Hz = freq_table[index].frequency * 1000;
  50. freq_exact = freq_Hz;
  51. new_freq = freq_Hz / 1000;
  52. old_freq = clk_get_rate(cpu_clk) / 1000;
  53. if (!IS_ERR(cpu_reg)) {
  54. rcu_read_lock();
  55. opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  56. if (IS_ERR(opp)) {
  57. rcu_read_unlock();
  58. dev_err(cpu_dev, "failed to find OPP for %ld\n",
  59. freq_Hz);
  60. return PTR_ERR(opp);
  61. }
  62. volt = dev_pm_opp_get_voltage(opp);
  63. rcu_read_unlock();
  64. tol = volt * priv->voltage_tolerance / 100;
  65. volt_old = regulator_get_voltage(cpu_reg);
  66. }
  67. dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
  68. old_freq / 1000, volt_old ? volt_old / 1000 : -1,
  69. new_freq / 1000, volt ? volt / 1000 : -1);
  70. /* scaling up? scale voltage before frequency */
  71. if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  72. ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  73. if (ret) {
  74. dev_err(cpu_dev, "failed to scale voltage up: %d\n",
  75. ret);
  76. return ret;
  77. }
  78. }
  79. ret = clk_set_rate(cpu_clk, freq_exact);
  80. if (ret) {
  81. dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
  82. if (!IS_ERR(cpu_reg))
  83. regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  84. return ret;
  85. }
  86. /* scaling down? scale voltage after frequency */
  87. if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
  88. ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  89. if (ret) {
  90. dev_err(cpu_dev, "failed to scale voltage down: %d\n",
  91. ret);
  92. clk_set_rate(cpu_clk, old_freq * 1000);
  93. }
  94. }
  95. return ret;
  96. }
  97. static int allocate_resources(int cpu, struct device **cdev,
  98. struct regulator **creg, struct clk **cclk)
  99. {
  100. struct device *cpu_dev;
  101. struct regulator *cpu_reg;
  102. struct clk *cpu_clk;
  103. int ret = 0;
  104. char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
  105. cpu_dev = get_cpu_device(cpu);
  106. if (!cpu_dev) {
  107. pr_err("failed to get cpu%d device\n", cpu);
  108. return -ENODEV;
  109. }
  110. /* Try "cpu0" for older DTs */
  111. if (!cpu)
  112. reg = reg_cpu0;
  113. else
  114. reg = reg_cpu;
  115. try_again:
  116. cpu_reg = regulator_get_optional(cpu_dev, reg);
  117. if (IS_ERR(cpu_reg)) {
  118. /*
  119. * If cpu's regulator supply node is present, but regulator is
  120. * not yet registered, we should try defering probe.
  121. */
  122. if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
  123. dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
  124. cpu);
  125. return -EPROBE_DEFER;
  126. }
  127. /* Try with "cpu-supply" */
  128. if (reg == reg_cpu0) {
  129. reg = reg_cpu;
  130. goto try_again;
  131. }
  132. dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
  133. cpu, PTR_ERR(cpu_reg));
  134. }
  135. cpu_clk = clk_get(cpu_dev, NULL);
  136. if (IS_ERR(cpu_clk)) {
  137. /* put regulator */
  138. if (!IS_ERR(cpu_reg))
  139. regulator_put(cpu_reg);
  140. ret = PTR_ERR(cpu_clk);
  141. /*
  142. * If cpu's clk node is present, but clock is not yet
  143. * registered, we should try defering probe.
  144. */
  145. if (ret == -EPROBE_DEFER)
  146. dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
  147. else
  148. dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
  149. ret);
  150. } else {
  151. *cdev = cpu_dev;
  152. *creg = cpu_reg;
  153. *cclk = cpu_clk;
  154. }
  155. return ret;
  156. }
  157. static int cpufreq_init(struct cpufreq_policy *policy)
  158. {
  159. struct cpufreq_dt_platform_data *pd;
  160. struct cpufreq_frequency_table *freq_table;
  161. struct thermal_cooling_device *cdev;
  162. struct device_node *np;
  163. struct private_data *priv;
  164. struct device *cpu_dev;
  165. struct regulator *cpu_reg;
  166. struct clk *cpu_clk;
  167. unsigned long min_uV = ~0, max_uV = 0;
  168. unsigned int transition_latency;
  169. int ret;
  170. ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
  171. if (ret) {
  172. pr_err("%s: Failed to allocate resources\n: %d", __func__, ret);
  173. return ret;
  174. }
  175. np = of_node_get(cpu_dev->of_node);
  176. if (!np) {
  177. dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
  178. ret = -ENOENT;
  179. goto out_put_reg_clk;
  180. }
  181. /* OPPs might be populated at runtime, don't check for error here */
  182. of_init_opp_table(cpu_dev);
  183. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  184. if (!priv) {
  185. ret = -ENOMEM;
  186. goto out_put_node;
  187. }
  188. of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
  189. if (of_property_read_u32(np, "clock-latency", &transition_latency))
  190. transition_latency = CPUFREQ_ETERNAL;
  191. if (!IS_ERR(cpu_reg)) {
  192. unsigned long opp_freq = 0;
  193. /*
  194. * Disable any OPPs where the connected regulator isn't able to
  195. * provide the specified voltage and record minimum and maximum
  196. * voltage levels.
  197. */
  198. while (1) {
  199. struct dev_pm_opp *opp;
  200. unsigned long opp_uV, tol_uV;
  201. rcu_read_lock();
  202. opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
  203. if (IS_ERR(opp)) {
  204. rcu_read_unlock();
  205. break;
  206. }
  207. opp_uV = dev_pm_opp_get_voltage(opp);
  208. rcu_read_unlock();
  209. tol_uV = opp_uV * priv->voltage_tolerance / 100;
  210. if (regulator_is_supported_voltage(cpu_reg, opp_uV,
  211. opp_uV + tol_uV)) {
  212. if (opp_uV < min_uV)
  213. min_uV = opp_uV;
  214. if (opp_uV > max_uV)
  215. max_uV = opp_uV;
  216. } else {
  217. dev_pm_opp_disable(cpu_dev, opp_freq);
  218. }
  219. opp_freq++;
  220. }
  221. ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
  222. if (ret > 0)
  223. transition_latency += ret * 1000;
  224. }
  225. ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
  226. if (ret) {
  227. pr_err("failed to init cpufreq table: %d\n", ret);
  228. goto out_free_priv;
  229. }
  230. /*
  231. * For now, just loading the cooling device;
  232. * thermal DT code takes care of matching them.
  233. */
  234. if (of_find_property(np, "#cooling-cells", NULL)) {
  235. cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
  236. if (IS_ERR(cdev))
  237. dev_err(cpu_dev,
  238. "running cpufreq without cooling device: %ld\n",
  239. PTR_ERR(cdev));
  240. else
  241. priv->cdev = cdev;
  242. }
  243. priv->cpu_dev = cpu_dev;
  244. priv->cpu_reg = cpu_reg;
  245. policy->driver_data = priv;
  246. policy->clk = cpu_clk;
  247. ret = cpufreq_table_validate_and_show(policy, freq_table);
  248. if (ret) {
  249. dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
  250. ret);
  251. goto out_cooling_unregister;
  252. }
  253. policy->cpuinfo.transition_latency = transition_latency;
  254. pd = cpufreq_get_driver_data();
  255. if (!pd || !pd->independent_clocks)
  256. cpumask_setall(policy->cpus);
  257. of_node_put(np);
  258. return 0;
  259. out_cooling_unregister:
  260. cpufreq_cooling_unregister(priv->cdev);
  261. dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
  262. out_free_priv:
  263. kfree(priv);
  264. out_put_node:
  265. of_node_put(np);
  266. out_put_reg_clk:
  267. clk_put(cpu_clk);
  268. if (!IS_ERR(cpu_reg))
  269. regulator_put(cpu_reg);
  270. return ret;
  271. }
  272. static int cpufreq_exit(struct cpufreq_policy *policy)
  273. {
  274. struct private_data *priv = policy->driver_data;
  275. cpufreq_cooling_unregister(priv->cdev);
  276. dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
  277. clk_put(policy->clk);
  278. if (!IS_ERR(priv->cpu_reg))
  279. regulator_put(priv->cpu_reg);
  280. kfree(priv);
  281. return 0;
  282. }
  283. static struct cpufreq_driver dt_cpufreq_driver = {
  284. .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
  285. .verify = cpufreq_generic_frequency_table_verify,
  286. .target_index = set_target,
  287. .get = cpufreq_generic_get,
  288. .init = cpufreq_init,
  289. .exit = cpufreq_exit,
  290. .name = "cpufreq-dt",
  291. .attr = cpufreq_generic_attr,
  292. };
  293. static int dt_cpufreq_probe(struct platform_device *pdev)
  294. {
  295. struct device *cpu_dev;
  296. struct regulator *cpu_reg;
  297. struct clk *cpu_clk;
  298. int ret;
  299. /*
  300. * All per-cluster (CPUs sharing clock/voltages) initialization is done
  301. * from ->init(). In probe(), we just need to make sure that clk and
  302. * regulators are available. Else defer probe and retry.
  303. *
  304. * FIXME: Is checking this only for CPU0 sufficient ?
  305. */
  306. ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
  307. if (ret)
  308. return ret;
  309. clk_put(cpu_clk);
  310. if (!IS_ERR(cpu_reg))
  311. regulator_put(cpu_reg);
  312. dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
  313. ret = cpufreq_register_driver(&dt_cpufreq_driver);
  314. if (ret)
  315. dev_err(cpu_dev, "failed register driver: %d\n", ret);
  316. return ret;
  317. }
  318. static int dt_cpufreq_remove(struct platform_device *pdev)
  319. {
  320. cpufreq_unregister_driver(&dt_cpufreq_driver);
  321. return 0;
  322. }
  323. static struct platform_driver dt_cpufreq_platdrv = {
  324. .driver = {
  325. .name = "cpufreq-dt",
  326. .owner = THIS_MODULE,
  327. },
  328. .probe = dt_cpufreq_probe,
  329. .remove = dt_cpufreq_remove,
  330. };
  331. module_platform_driver(dt_cpufreq_platdrv);
  332. MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
  333. MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
  334. MODULE_DESCRIPTION("Generic cpufreq driver");
  335. MODULE_LICENSE("GPL");