Ioctl.h 7.8 KB

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  1. #ifndef _IOCTL_H_
  2. #define _IOCTL_H_
  3. struct bcm_rdm_buffer {
  4. unsigned long Register;
  5. unsigned long Length;
  6. } __packed;
  7. struct bcm_wrm_buffer {
  8. unsigned long Register;
  9. unsigned long Length;
  10. unsigned char Data[4];
  11. } __packed;
  12. struct bcm_ioctl_buffer {
  13. void __user *InputBuffer;
  14. unsigned long InputLength;
  15. void __user *OutputBuffer;
  16. unsigned long OutputLength;
  17. } __packed;
  18. struct bcm_gpio_info {
  19. unsigned int uiGpioNumber; /* valid numbers 0-15 */
  20. unsigned int uiGpioValue; /* 1 set ; 0 not set */
  21. } __packed;
  22. struct bcm_user_thread_req {
  23. /* 0->Inactivate LED thread. */
  24. /* 1->Activate the LED thread */
  25. unsigned int ThreadState;
  26. } __packed;
  27. #define LED_THREAD_ACTIVATION_REQ 1
  28. #define BCM_IOCTL 'k'
  29. #define IOCTL_SEND_CONTROL_MESSAGE _IOW(BCM_IOCTL, 0x801, int)
  30. #define IOCTL_BCM_REGISTER_WRITE _IOW(BCM_IOCTL, 0x802, int)
  31. #define IOCTL_BCM_REGISTER_READ _IOR(BCM_IOCTL, 0x803, int)
  32. #define IOCTL_BCM_COMMON_MEMORY_WRITE _IOW(BCM_IOCTL, 0x804, int)
  33. #define IOCTL_BCM_COMMON_MEMORY_READ _IOR(BCM_IOCTL, 0x805, int)
  34. #define IOCTL_GET_CONTROL_MESSAGE _IOR(BCM_IOCTL, 0x806, int)
  35. #define IOCTL_BCM_FIRMWARE_DOWNLOAD _IOW(BCM_IOCTL, 0x807, int)
  36. #define IOCTL_BCM_SET_SEND_VCID _IOW(BCM_IOCTL, 0x808, int)
  37. #define IOCTL_BCM_SWITCH_TRANSFER_MODE _IOW(BCM_IOCTL, 0x809, int)
  38. #define IOCTL_LINK_REQ _IOW(BCM_IOCTL, 0x80A, int)
  39. #define IOCTL_RSSI_LEVEL_REQ _IOW(BCM_IOCTL, 0x80B, int)
  40. #define IOCTL_IDLE_REQ _IOW(BCM_IOCTL, 0x80C, int)
  41. #define IOCTL_SS_INFO_REQ _IOW(BCM_IOCTL, 0x80D, int)
  42. #define IOCTL_GET_STATISTICS_POINTER _IOW(BCM_IOCTL, 0x80E, int)
  43. #define IOCTL_CM_REQUEST _IOW(BCM_IOCTL, 0x80F, int)
  44. #define IOCTL_INIT_PARAM_REQ _IOW(BCM_IOCTL, 0x810, int)
  45. #define IOCTL_MAC_ADDR_REQ _IOW(BCM_IOCTL, 0x811, int)
  46. #define IOCTL_MAC_ADDR_RESP _IOWR(BCM_IOCTL, 0x812, int)
  47. #define IOCTL_CLASSIFICATION_RULE _IOW(BCM_IOCTL, 0x813, char)
  48. #define IOCTL_CLOSE_NOTIFICATION _IO(BCM_IOCTL, 0x814)
  49. #define IOCTL_LINK_UP _IO(BCM_IOCTL, 0x815)
  50. #define IOCTL_LINK_DOWN _IO(BCM_IOCTL, 0x816, struct bcm_ioctl_buffer)
  51. #define IOCTL_CHIP_RESET _IO(BCM_IOCTL, 0x816)
  52. #define IOCTL_CINR_LEVEL_REQ _IOW(BCM_IOCTL, 0x817, char)
  53. #define IOCTL_WTM_CONTROL_REQ _IOW(BCM_IOCTL, 0x817, char)
  54. #define IOCTL_BE_BUCKET_SIZE _IOW(BCM_IOCTL, 0x818, unsigned long)
  55. #define IOCTL_RTPS_BUCKET_SIZE _IOW(BCM_IOCTL, 0x819, unsigned long)
  56. #define IOCTL_QOS_THRESHOLD _IOW(BCM_IOCTL, 0x820, unsigned long)
  57. #define IOCTL_DUMP_PACKET_INFO _IO(BCM_IOCTL, 0x821)
  58. #define IOCTL_GET_PACK_INFO _IOR(BCM_IOCTL, 0x823, int)
  59. #define IOCTL_BCM_GET_DRIVER_VERSION _IOR(BCM_IOCTL, 0x829, int)
  60. #define IOCTL_BCM_GET_CURRENT_STATUS _IOW(BCM_IOCTL, 0x828, int)
  61. #define IOCTL_BCM_GPIO_SET_REQUEST _IOW(BCM_IOCTL, 0x82A, int)
  62. #define IOCTL_BCM_GPIO_STATUS_REQUEST _IOW(BCM_IOCTL, 0x82b, int)
  63. #define IOCTL_BCM_GET_DSX_INDICATION _IOR(BCM_IOCTL, 0x854, int)
  64. #define IOCTL_BCM_BUFFER_DOWNLOAD_START _IOW(BCM_IOCTL, 0x855, int)
  65. #define IOCTL_BCM_BUFFER_DOWNLOAD _IOW(BCM_IOCTL, 0x856, int)
  66. #define IOCTL_BCM_BUFFER_DOWNLOAD_STOP _IOW(BCM_IOCTL, 0x857, int)
  67. #define IOCTL_BCM_REGISTER_WRITE_PRIVATE _IOW(BCM_IOCTL, 0x826, char)
  68. #define IOCTL_BCM_REGISTER_READ_PRIVATE _IOW(BCM_IOCTL, 0x827, char)
  69. #define IOCTL_BCM_SET_DEBUG _IOW(BCM_IOCTL, 0x824, struct bcm_ioctl_buffer)
  70. #define IOCTL_BCM_EEPROM_REGISTER_WRITE _IOW(BCM_IOCTL, 0x858, int)
  71. #define IOCTL_BCM_EEPROM_REGISTER_READ _IOR(BCM_IOCTL, 0x859, int)
  72. #define IOCTL_BCM_WAKE_UP_DEVICE_FROM_IDLE _IOR(BCM_IOCTL, 0x860, int)
  73. #define IOCTL_BCM_SET_MAC_TRACING _IOW(BCM_IOCTL, 0x82c, int)
  74. #define IOCTL_BCM_GET_HOST_MIBS _IOW(BCM_IOCTL, 0x853, int)
  75. #define IOCTL_BCM_NVM_READ _IOR(BCM_IOCTL, 0x861, int)
  76. #define IOCTL_BCM_NVM_WRITE _IOW(BCM_IOCTL, 0x862, int)
  77. #define IOCTL_BCM_GET_NVM_SIZE _IOR(BCM_IOCTL, 0x863, int)
  78. #define IOCTL_BCM_CAL_INIT _IOR(BCM_IOCTL, 0x864, int)
  79. #define IOCTL_BCM_BULK_WRM _IOW(BCM_IOCTL, 0x90B, int)
  80. #define IOCTL_BCM_FLASH2X_SECTION_READ _IOR(BCM_IOCTL, 0x865, int)
  81. #define IOCTL_BCM_FLASH2X_SECTION_WRITE _IOW(BCM_IOCTL, 0x866, int)
  82. #define IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP _IOR(BCM_IOCTL, 0x867, int)
  83. #define IOCTL_BCM_SET_ACTIVE_SECTION _IOW(BCM_IOCTL, 0x868, int)
  84. #define IOCTL_BCM_IDENTIFY_ACTIVE_SECTION _IO(BCM_IOCTL, 0x869)
  85. #define IOCTL_BCM_COPY_SECTION _IOW(BCM_IOCTL, 0x870, int)
  86. #define IOCTL_BCM_GET_FLASH_CS_INFO _IOR(BCM_IOCTL, 0x871, int)
  87. #define IOCTL_BCM_SELECT_DSD _IOW(BCM_IOCTL, 0x872, int)
  88. #define IOCTL_BCM_NVM_RAW_READ _IOR(BCM_IOCTL, 0x875, int)
  89. #define IOCTL_BCM_CNTRLMSG_MASK _IOW(BCM_IOCTL, 0x874, int)
  90. #define IOCTL_BCM_GET_DEVICE_DRIVER_INFO _IOR(BCM_IOCTL, 0x877, int)
  91. #define IOCTL_BCM_TIME_SINCE_NET_ENTRY _IOR(BCM_IOCTL, 0x876, int)
  92. #define BCM_LED_THREAD_STATE_CHANGE_REQ _IOW(BCM_IOCTL, 0x878, int)
  93. #define IOCTL_BCM_GPIO_MULTI_REQUEST _IOW(BCM_IOCTL, 0x82D, struct bcm_ioctl_buffer)
  94. #define IOCTL_BCM_GPIO_MODE_REQUEST _IOW(BCM_IOCTL, 0x82E, struct bcm_ioctl_buffer)
  95. enum bcm_interface_type {
  96. BCM_MII,
  97. BCM_CARDBUS,
  98. BCM_USB,
  99. BCM_SDIO,
  100. BCM_PCMCIA
  101. };
  102. struct bcm_driver_info {
  103. enum bcm_nvm_type u32NVMType;
  104. unsigned int MaxRDMBufferSize;
  105. enum bcm_interface_type u32InterfaceType;
  106. unsigned int u32DSDStartOffset;
  107. unsigned int u32RxAlignmentCorrection;
  108. unsigned int u32Reserved[10];
  109. };
  110. struct bcm_nvm_readwrite {
  111. void __user *pBuffer;
  112. uint32_t uiOffset;
  113. uint32_t uiNumBytes;
  114. bool bVerify;
  115. };
  116. struct bcm_bulk_wrm_buffer {
  117. unsigned long Register;
  118. unsigned long SwapEndian;
  119. unsigned long Values[1];
  120. };
  121. enum bcm_flash2x_section_val {
  122. NO_SECTION_VAL = 0, /* no section chosen when absolute offset is given for RD/WR */
  123. ISO_IMAGE1,
  124. ISO_IMAGE2,
  125. DSD0,
  126. DSD1,
  127. DSD2,
  128. VSA0,
  129. VSA1,
  130. VSA2,
  131. SCSI,
  132. CONTROL_SECTION,
  133. ISO_IMAGE1_PART2,
  134. ISO_IMAGE1_PART3,
  135. ISO_IMAGE2_PART2,
  136. ISO_IMAGE2_PART3,
  137. TOTAL_SECTIONS
  138. };
  139. /*
  140. * Structure used for READ/WRITE Flash Map2.x
  141. */
  142. struct bcm_flash2x_readwrite {
  143. enum bcm_flash2x_section_val Section; /* section to be read/written */
  144. u32 offset; /* offset within section. */
  145. u32 numOfBytes; /* number of bytes from the offset */
  146. u32 bVerify;
  147. void __user *pDataBuff; /* buffer for reading/writing */
  148. };
  149. /*
  150. * This structure is used for coping one section to other.
  151. * there are two ways to copy one section to other.
  152. * it NOB =0, complete section will be copied on to other.
  153. * if NOB !=0, only NOB will be copied from the given offset.
  154. */
  155. struct bcm_flash2x_copy_section {
  156. enum bcm_flash2x_section_val SrcSection;
  157. enum bcm_flash2x_section_val DstSection;
  158. u32 offset;
  159. u32 numOfBytes;
  160. };
  161. /*
  162. * This section provide the complete bitmap of the Flash.
  163. * using this map lib/APP will issue read/write command.
  164. * Fields are defined as :
  165. * Bit [0] = section is present //1:present, 0: Not present
  166. * Bit [1] = section is valid //1: valid, 0: not valid
  167. * Bit [2] = Section is R/W //0: RW, 1: RO
  168. * Bit [3] = Section is Active or not 1 means Active, 0->inactive
  169. * Bit [7...3] = Reserved
  170. */
  171. struct bcm_flash2x_bitmap {
  172. unsigned char ISO_IMAGE1;
  173. unsigned char ISO_IMAGE2;
  174. unsigned char DSD0;
  175. unsigned char DSD1;
  176. unsigned char DSD2;
  177. unsigned char VSA0;
  178. unsigned char VSA1;
  179. unsigned char VSA2;
  180. unsigned char SCSI;
  181. unsigned char CONTROL_SECTION;
  182. /* Reserved for future use */
  183. unsigned char Reserved0;
  184. unsigned char Reserved1;
  185. unsigned char Reserved2;
  186. };
  187. struct bcm_time_elapsed {
  188. u64 ul64TimeElapsedSinceNetEntry;
  189. u32 uiReserved[4];
  190. };
  191. enum {
  192. WIMAX_IDX = 0, /* To access WiMAX chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
  193. HOST_IDX, /* To access Host chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
  194. MAX_IDX
  195. };
  196. struct bcm_gpio_multi_info {
  197. unsigned int uiGPIOCommand; /* 1 for set and 0 for get */
  198. unsigned int uiGPIOMask; /* set the corresponding bit to 1 to access GPIO */
  199. unsigned int uiGPIOValue; /* 0 or 1; value to be set when command is 1. */
  200. } __packed;
  201. struct bcm_gpio_multi_mode {
  202. unsigned int uiGPIOMode; /* 1 for OUT mode, 0 for IN mode */
  203. unsigned int uiGPIOMask; /* GPIO mask to set mode */
  204. } __packed;
  205. #endif