pincfg.txt 1.8 KB

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  1. * Pin configuration nodes
  2. Required properties:
  3. - pio-map : array of pin configurations. Each pin is defined by 6
  4. integers. The six numbers are respectively: port, pin, dir,
  5. open_drain, assignment, has_irq.
  6. - port : port number of the pin; 0-6 represent port A-G in UM.
  7. - pin : pin number in the port.
  8. - dir : direction of the pin, should encode as follows:
  9. 0 = The pin is disabled
  10. 1 = The pin is an output
  11. 2 = The pin is an input
  12. 3 = The pin is I/O
  13. - open_drain : indicates the pin is normal or wired-OR:
  14. 0 = The pin is actively driven as an output
  15. 1 = The pin is an open-drain driver. As an output, the pin is
  16. driven active-low, otherwise it is three-stated.
  17. - assignment : function number of the pin according to the Pin Assignment
  18. tables in User Manual. Each pin can have up to 4 possible functions in
  19. QE and two options for CPM.
  20. - has_irq : indicates if the pin is used as source of external
  21. interrupts.
  22. Example:
  23. ucc_pin@01 {
  24. pio-map = <
  25. /* port pin dir open_drain assignment has_irq */
  26. 0 3 1 0 1 0 /* TxD0 */
  27. 0 4 1 0 1 0 /* TxD1 */
  28. 0 5 1 0 1 0 /* TxD2 */
  29. 0 6 1 0 1 0 /* TxD3 */
  30. 1 6 1 0 3 0 /* TxD4 */
  31. 1 7 1 0 1 0 /* TxD5 */
  32. 1 9 1 0 2 0 /* TxD6 */
  33. 1 a 1 0 2 0 /* TxD7 */
  34. 0 9 2 0 1 0 /* RxD0 */
  35. 0 a 2 0 1 0 /* RxD1 */
  36. 0 b 2 0 1 0 /* RxD2 */
  37. 0 c 2 0 1 0 /* RxD3 */
  38. 0 d 2 0 1 0 /* RxD4 */
  39. 1 1 2 0 2 0 /* RxD5 */
  40. 1 0 2 0 2 0 /* RxD6 */
  41. 1 4 2 0 2 0 /* RxD7 */
  42. 0 7 1 0 1 0 /* TX_EN */
  43. 0 8 1 0 1 0 /* TX_ER */
  44. 0 f 2 0 1 0 /* RX_DV */
  45. 0 10 2 0 1 0 /* RX_ER */
  46. 0 0 2 0 1 0 /* RX_CLK */
  47. 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
  48. 2 8 2 0 1 0>; /* GTX125 - CLK9 */
  49. };