adau17x1.h 3.6 KB

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  1. #ifndef __ADAU17X1_H__
  2. #define __ADAU17X1_H__
  3. #include <linux/regmap.h>
  4. #include <linux/platform_data/adau17x1.h>
  5. enum adau17x1_type {
  6. ADAU1361,
  7. ADAU1761,
  8. ADAU1381,
  9. ADAU1781,
  10. };
  11. enum adau17x1_pll {
  12. ADAU17X1_PLL,
  13. };
  14. enum adau17x1_pll_src {
  15. ADAU17X1_PLL_SRC_MCLK,
  16. };
  17. enum adau17x1_clk_src {
  18. ADAU17X1_CLK_SRC_MCLK,
  19. ADAU17X1_CLK_SRC_PLL,
  20. };
  21. struct adau {
  22. unsigned int sysclk;
  23. unsigned int pll_freq;
  24. enum adau17x1_clk_src clk_src;
  25. enum adau17x1_type type;
  26. void (*switch_mode)(struct device *dev);
  27. unsigned int dai_fmt;
  28. uint8_t pll_regs[6];
  29. bool master;
  30. unsigned int tdm_slot[2];
  31. bool dsp_bypass[2];
  32. struct regmap *regmap;
  33. };
  34. int adau17x1_add_widgets(struct snd_soc_codec *codec);
  35. int adau17x1_add_routes(struct snd_soc_codec *codec);
  36. int adau17x1_probe(struct device *dev, struct regmap *regmap,
  37. enum adau17x1_type type, void (*switch_mode)(struct device *dev));
  38. int adau17x1_set_micbias_voltage(struct snd_soc_codec *codec,
  39. enum adau17x1_micbias_voltage micbias);
  40. bool adau17x1_readable_register(struct device *dev, unsigned int reg);
  41. bool adau17x1_volatile_register(struct device *dev, unsigned int reg);
  42. int adau17x1_resume(struct snd_soc_codec *codec);
  43. extern const struct snd_soc_dai_ops adau17x1_dai_ops;
  44. int adau17x1_load_firmware(struct adau *adau, struct device *dev,
  45. const char *firmware);
  46. bool adau17x1_has_dsp(struct adau *adau);
  47. #define ADAU17X1_CLOCK_CONTROL 0x4000
  48. #define ADAU17X1_PLL_CONTROL 0x4002
  49. #define ADAU17X1_REC_POWER_MGMT 0x4009
  50. #define ADAU17X1_MICBIAS 0x4010
  51. #define ADAU17X1_SERIAL_PORT0 0x4015
  52. #define ADAU17X1_SERIAL_PORT1 0x4016
  53. #define ADAU17X1_CONVERTER0 0x4017
  54. #define ADAU17X1_CONVERTER1 0x4018
  55. #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a
  56. #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b
  57. #define ADAU17X1_ADC_CONTROL 0x4019
  58. #define ADAU17X1_PLAY_POWER_MGMT 0x4029
  59. #define ADAU17X1_DAC_CONTROL0 0x402a
  60. #define ADAU17X1_DAC_CONTROL1 0x402b
  61. #define ADAU17X1_DAC_CONTROL2 0x402c
  62. #define ADAU17X1_SERIAL_PORT_PAD 0x402d
  63. #define ADAU17X1_CONTROL_PORT_PAD0 0x402f
  64. #define ADAU17X1_CONTROL_PORT_PAD1 0x4030
  65. #define ADAU17X1_DSP_SAMPLING_RATE 0x40eb
  66. #define ADAU17X1_SERIAL_INPUT_ROUTE 0x40f2
  67. #define ADAU17X1_SERIAL_OUTPUT_ROUTE 0x40f3
  68. #define ADAU17X1_DSP_ENABLE 0x40f5
  69. #define ADAU17X1_DSP_RUN 0x40f6
  70. #define ADAU17X1_SERIAL_SAMPLING_RATE 0x40f8
  71. #define ADAU17X1_SERIAL_PORT0_BCLK_POL BIT(4)
  72. #define ADAU17X1_SERIAL_PORT0_LRCLK_POL BIT(3)
  73. #define ADAU17X1_SERIAL_PORT0_MASTER BIT(0)
  74. #define ADAU17X1_SERIAL_PORT1_DELAY1 0x00
  75. #define ADAU17X1_SERIAL_PORT1_DELAY0 0x01
  76. #define ADAU17X1_SERIAL_PORT1_DELAY8 0x02
  77. #define ADAU17X1_SERIAL_PORT1_DELAY16 0x03
  78. #define ADAU17X1_SERIAL_PORT1_DELAY_MASK 0x03
  79. #define ADAU17X1_CLOCK_CONTROL_INFREQ_MASK 0x6
  80. #define ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL BIT(3)
  81. #define ADAU17X1_CLOCK_CONTROL_SYSCLK_EN BIT(0)
  82. #define ADAU17X1_SERIAL_PORT1_BCLK32 (0x0 << 5)
  83. #define ADAU17X1_SERIAL_PORT1_BCLK48 (0x1 << 5)
  84. #define ADAU17X1_SERIAL_PORT1_BCLK64 (0x2 << 5)
  85. #define ADAU17X1_SERIAL_PORT1_BCLK128 (0x3 << 5)
  86. #define ADAU17X1_SERIAL_PORT1_BCLK256 (0x4 << 5)
  87. #define ADAU17X1_SERIAL_PORT1_BCLK_MASK (0x7 << 5)
  88. #define ADAU17X1_SERIAL_PORT0_STEREO (0x0 << 1)
  89. #define ADAU17X1_SERIAL_PORT0_TDM4 (0x1 << 1)
  90. #define ADAU17X1_SERIAL_PORT0_TDM8 (0x2 << 1)
  91. #define ADAU17X1_SERIAL_PORT0_TDM_MASK (0x3 << 1)
  92. #define ADAU17X1_SERIAL_PORT0_PULSE_MODE BIT(5)
  93. #define ADAU17X1_CONVERTER0_DAC_PAIR(x) (((x) - 1) << 5)
  94. #define ADAU17X1_CONVERTER0_DAC_PAIR_MASK (0x3 << 5)
  95. #define ADAU17X1_CONVERTER1_ADC_PAIR(x) ((x) - 1)
  96. #define ADAU17X1_CONVERTER1_ADC_PAIR_MASK 0x3
  97. #define ADAU17X1_CONVERTER0_CONVSR_MASK 0x7
  98. #endif