AudDrv_Ana.c 12 KB

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  1. /*
  2. * Copyright (C) 2007 The Android Open Source Project
  3. *
  4. * Licensed under the Apache License, Version 2.0 (the "License");
  5. * you may not use this file except in compliance with the License.
  6. * You may obtain a copy of the License at
  7. *
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. *
  10. * Unless required by applicable law or agreed to in writing, software
  11. * distributed under the License is distributed on an "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13. * See the License for the specific language governing permissions and
  14. * limitations under the License.
  15. */
  16. /*******************************************************************************
  17. *
  18. * Filename:
  19. * ---------
  20. * AudDrv_Ana.c
  21. *
  22. * Project:
  23. * --------
  24. * MT6797 Audio Driver ana Register setting
  25. *
  26. * Description:
  27. * ------------
  28. * Audio register
  29. *
  30. * Author:
  31. * -------
  32. * Chipeng Chang
  33. *
  34. *------------------------------------------------------------------------------
  35. *
  36. *
  37. *******************************************************************************/
  38. /*****************************************************************************
  39. * C O M P I L E R F L A G S
  40. *****************************************************************************/
  41. /*****************************************************************************
  42. * E X T E R N A L R E F E R E N C E S
  43. *****************************************************************************/
  44. #include "AudDrv_Common.h"
  45. #include "AudDrv_Ana.h"
  46. #include "AudDrv_Clk.h"
  47. #ifdef AUDIO_USING_WRAP_DRIVER
  48. #include <mach/mt_pmic_wrap.h>
  49. #endif
  50. static DEFINE_SPINLOCK(ana_set_reg_lock);
  51. /*****************************************************************************
  52. * D A T A T Y P E S
  53. *****************************************************************************/
  54. void Ana_Set_Reg(uint32 offset, uint32 value, uint32 mask)
  55. {
  56. /* set pmic register or analog CONTROL_IFACE_PATH */
  57. int ret = 0;
  58. uint32 Reg_Value;
  59. unsigned long flags = 0;
  60. PRINTK_ANA_REG("Ana_Set_Reg offset= 0x%x , value = 0x%x mask = 0x%x\n", offset, value,
  61. mask);
  62. #ifdef AUDIO_USING_WRAP_DRIVER
  63. spin_lock_irqsave(&ana_set_reg_lock, flags);
  64. Reg_Value = Ana_Get_Reg(offset);
  65. Reg_Value &= (~mask);
  66. Reg_Value |= (value & mask);
  67. ret = pwrap_write(offset, Reg_Value);
  68. spin_unlock_irqrestore(&ana_set_reg_lock, flags);
  69. Reg_Value = Ana_Get_Reg(offset);
  70. if ((Reg_Value & mask) != (value & mask))
  71. pr_warn("Ana_Set_Reg mask = 0x%x ret = %d Reg_Value = 0x%x\n", mask, ret,
  72. Reg_Value);
  73. #endif
  74. }
  75. EXPORT_SYMBOL(Ana_Set_Reg);
  76. uint32 Ana_Get_Reg(uint32 offset)
  77. {
  78. /* get pmic register */
  79. int ret = 0;
  80. uint32 Rdata = 0;
  81. #ifdef AUDIO_USING_WRAP_DRIVER
  82. ret = pwrap_read(offset, &Rdata);
  83. #endif
  84. PRINTK_ANA_REG("Ana_Get_Reg offset=0x%x,Rdata=0x%x,ret=%d\n", offset, Rdata, ret);
  85. return Rdata;
  86. }
  87. EXPORT_SYMBOL(Ana_Get_Reg);
  88. void Ana_Log_Print(void)
  89. {
  90. AudDrv_ANA_Clk_On();
  91. pr_debug("AFE_UL_DL_CON0 = 0x%x\n", Ana_Get_Reg(AFE_UL_DL_CON0));
  92. pr_debug("AFE_DL_SRC2_CON0_H = 0x%x\n", Ana_Get_Reg(AFE_DL_SRC2_CON0_H));
  93. pr_debug("AFE_DL_SRC2_CON0_L = 0x%x\n", Ana_Get_Reg(AFE_DL_SRC2_CON0_L));
  94. pr_debug("AFE_DL_SDM_CON0 = 0x%x\n", Ana_Get_Reg(AFE_DL_SDM_CON0));
  95. pr_debug("AFE_DL_SDM_CON1 = 0x%x\n", Ana_Get_Reg(AFE_DL_SDM_CON1));
  96. pr_debug("AFE_UL_SRC_CON0_H = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC_CON0_H));
  97. pr_debug("AFE_UL_SRC_CON0_L = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC_CON0_L));
  98. pr_debug("AFE_UL_SRC_CON1_H = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC_CON1_H));
  99. pr_debug("AFE_UL_SRC_CON1_L = 0x%x\n", Ana_Get_Reg(AFE_UL_SRC_CON1_L));
  100. pr_debug("PMIC_AFE_TOP_CON0 = 0x%x\n", Ana_Get_Reg(PMIC_AFE_TOP_CON0));
  101. pr_debug("AFE_AUDIO_TOP_CON0 = 0x%x\n", Ana_Get_Reg(AFE_AUDIO_TOP_CON0));
  102. pr_debug("PMIC_AFE_TOP_CON0 = 0x%x\n", Ana_Get_Reg(PMIC_AFE_TOP_CON0));
  103. pr_debug("AFE_DL_SRC_MON0 = 0x%x\n", Ana_Get_Reg(AFE_DL_SRC_MON0));
  104. pr_debug("AFE_DL_SDM_TEST0 = 0x%x\n", Ana_Get_Reg(AFE_DL_SDM_TEST0));
  105. pr_debug("AFE_MON_DEBUG0 = 0x%x\n", Ana_Get_Reg(AFE_MON_DEBUG0));
  106. pr_debug("AFUNC_AUD_CON0 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON0));
  107. pr_debug("AFUNC_AUD_CON1 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON1));
  108. pr_debug("AFUNC_AUD_CON2 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON2));
  109. pr_debug("AFUNC_AUD_CON3 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON3));
  110. pr_debug("AFUNC_AUD_CON4 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_CON4));
  111. pr_debug("AFUNC_AUD_MON0 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_MON0));
  112. pr_debug("AFUNC_AUD_MON1 = 0x%x\n", Ana_Get_Reg(AFUNC_AUD_MON1));
  113. pr_debug("AUDRC_TUNE_MON0 = 0x%x\n", Ana_Get_Reg(AUDRC_TUNE_MON0));
  114. pr_debug("AFE_UP8X_FIFO_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_CFG0));
  115. pr_debug("AFE_UP8X_FIFO_LOG_MON0 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON0));
  116. pr_debug("AFE_UP8X_FIFO_LOG_MON1 = 0x%x\n", Ana_Get_Reg(AFE_UP8X_FIFO_LOG_MON1));
  117. pr_debug("AFE_DL_DC_COMP_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_DL_DC_COMP_CFG0));
  118. pr_debug("AFE_DL_DC_COMP_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_DL_DC_COMP_CFG1));
  119. pr_debug("AFE_DL_DC_COMP_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_DL_DC_COMP_CFG2));
  120. pr_debug("AFE_PMIC_NEWIF_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG0));
  121. pr_debug("AFE_PMIC_NEWIF_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG1));
  122. pr_debug("AFE_PMIC_NEWIF_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG2));
  123. pr_debug("AFE_PMIC_NEWIF_CFG3 = 0x%x\n", Ana_Get_Reg(AFE_PMIC_NEWIF_CFG3));
  124. pr_debug("AFE_SGEN_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_SGEN_CFG0));
  125. pr_debug("AFE_SGEN_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_SGEN_CFG1));
  126. pr_debug("AFE_ADDA2_PMIC_NEWIF_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_ADDA2_PMIC_NEWIF_CFG0));
  127. pr_debug("AFE_ADDA2_PMIC_NEWIF_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_ADDA2_PMIC_NEWIF_CFG1));
  128. pr_debug("AFE_ADDA2_PMIC_NEWIF_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_ADDA2_PMIC_NEWIF_CFG2));
  129. pr_debug("AFE_VOW_TOP = 0x%x\n", Ana_Get_Reg(AFE_VOW_TOP));
  130. pr_debug("AFE_VOW_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG0));
  131. pr_debug("AFE_VOW_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG1));
  132. pr_debug("AFE_VOW_CFG2 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG2));
  133. pr_debug("AFE_VOW_CFG3 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG3));
  134. pr_debug("AFE_VOW_CFG4 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG4));
  135. pr_debug("AFE_VOW_CFG5 = 0x%x\n", Ana_Get_Reg(AFE_VOW_CFG5));
  136. pr_debug("AFE_VOW_MON0 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON0));
  137. pr_debug("AFE_VOW_MON1 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON1));
  138. pr_debug("AFE_VOW_MON2 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON2));
  139. pr_debug("AFE_VOW_MON3 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON3));
  140. pr_debug("AFE_VOW_MON4 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON4));
  141. pr_debug("AFE_VOW_MON5 = 0x%x\n", Ana_Get_Reg(AFE_VOW_MON5));
  142. pr_debug("AFE_DCCLK_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_DCCLK_CFG0));
  143. pr_debug("AFE_DCCLK_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_DCCLK_CFG1));
  144. pr_debug("AFE_NCP_CFG0 = 0x%x\n", Ana_Get_Reg(AFE_NCP_CFG0));
  145. pr_debug("AFE_NCP_CFG1 = 0x%x\n", Ana_Get_Reg(AFE_NCP_CFG1));
  146. pr_debug("TOP_CON = 0x%x\n", Ana_Get_Reg(TOP_CON));
  147. pr_debug("TOP_STATUS = 0x%x\n", Ana_Get_Reg(TOP_STATUS));
  148. pr_debug("TOP_CKPDN_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON0));
  149. pr_debug("TOP_CKPDN_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON1));
  150. pr_debug("TOP_CKPDN_CON2 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON2));
  151. pr_debug("TOP_CKPDN_CON3 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON3));
  152. pr_debug("TOP_CKPDN_CON4 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON4));
  153. pr_debug("TOP_CKPDN_CON5 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON5));
  154. pr_debug("TOP_CKSEL_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKSEL_CON0));
  155. pr_debug("TOP_CKSEL_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKSEL_CON1));
  156. pr_debug("TOP_CKSEL_CON2 = 0x%x\n", Ana_Get_Reg(TOP_CKSEL_CON2));
  157. pr_debug("TOP_CKSEL_CON3 = 0x%x\n", Ana_Get_Reg(TOP_CKSEL_CON3));
  158. pr_debug("TOP_CKDIVSEL_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKDIVSEL_CON0));
  159. pr_debug("TOP_CKDIVSEL_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKDIVSEL_CON1));
  160. pr_debug("TOP_CKHWEN_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKHWEN_CON0));
  161. pr_debug("TOP_CKHWEN_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKHWEN_CON1));
  162. pr_debug("TOP_CKHWEN_CON2 = 0x%x\n", Ana_Get_Reg(TOP_CKHWEN_CON2));
  163. pr_debug("TOP_CKTST_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKTST_CON0));
  164. pr_debug("TOP_CKTST_CON1 = 0x%x\n", Ana_Get_Reg(TOP_CKTST_CON1));
  165. pr_debug("TOP_CKTST_CON2 = 0x%x\n", Ana_Get_Reg(TOP_CKTST_CON2));
  166. pr_debug("TOP_CLKSQ = 0x%x\n", Ana_Get_Reg(TOP_CLKSQ));
  167. pr_debug("TOP_CLKSQ_RTC = 0x%x\n", Ana_Get_Reg(TOP_CLKSQ_RTC));
  168. pr_debug("TOP_CLK_TRIM = 0x%x\n", Ana_Get_Reg(TOP_CLK_TRIM));
  169. pr_debug("TOP_RST_CON0 = 0x%x\n", Ana_Get_Reg(TOP_RST_CON0));
  170. pr_debug("TOP_RST_CON1 = 0x%x\n", Ana_Get_Reg(TOP_RST_CON1));
  171. pr_debug("TOP_RST_CON2 = 0x%x\n", Ana_Get_Reg(TOP_RST_CON2));
  172. pr_debug("TOP_RST_MISC = 0x%x\n", Ana_Get_Reg(TOP_RST_MISC));
  173. pr_debug("TOP_RST_STATUS = 0x%x\n", Ana_Get_Reg(TOP_RST_STATUS));
  174. pr_debug("TEST_CON0 = 0x%x\n", Ana_Get_Reg(TEST_CON0));
  175. pr_debug("TEST_CON1 = 0x%x\n", Ana_Get_Reg(TEST_CON1));
  176. pr_debug("TEST_OUT = 0x%x\n", Ana_Get_Reg(TEST_OUT));
  177. pr_debug("AFE_MON_DEBUG0= 0x%x\n", Ana_Get_Reg(AFE_MON_DEBUG0));
  178. pr_debug("ZCD_CON0 = 0x%x\n", Ana_Get_Reg(ZCD_CON0));
  179. pr_debug("ZCD_CON1 = 0x%x\n", Ana_Get_Reg(ZCD_CON1));
  180. pr_debug("ZCD_CON2 = 0x%x\n", Ana_Get_Reg(ZCD_CON2));
  181. pr_debug("ZCD_CON3 = 0x%x\n", Ana_Get_Reg(ZCD_CON3));
  182. pr_debug("ZCD_CON4 = 0x%x\n", Ana_Get_Reg(ZCD_CON4));
  183. pr_debug("ZCD_CON5 = 0x%x\n", Ana_Get_Reg(ZCD_CON5));
  184. pr_debug("LDO_VA18_CON0 = 0x%x\n", Ana_Get_Reg(LDO_VA18_CON0));
  185. pr_debug("LDO_VA18_CON1 = 0x%x\n", Ana_Get_Reg(LDO_VA18_CON1));
  186. pr_debug("LDO_VUSB33_CON0 = 0x%x\n", Ana_Get_Reg(LDO_VUSB33_CON0));
  187. pr_debug("LDO_VUSB33_CON1 = 0x%x\n", Ana_Get_Reg(LDO_VUSB33_CON1));
  188. pr_debug("AUDDEC_ANA_CON0 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON0));
  189. pr_debug("AUDDEC_ANA_CON1 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON1));
  190. pr_debug("AUDDEC_ANA_CON2 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON2));
  191. pr_debug("AUDDEC_ANA_CON3 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON3));
  192. pr_debug("AUDDEC_ANA_CON4 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON4));
  193. pr_debug("AUDDEC_ANA_CON5 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON5));
  194. pr_debug("AUDDEC_ANA_CON6 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON6));
  195. pr_debug("AUDDEC_ANA_CON7 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON7));
  196. pr_debug("AUDDEC_ANA_CON8 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON8));
  197. pr_debug("AUDDEC_ANA_CON9 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON9));
  198. pr_debug("AUDDEC_ANA_CON10 = 0x%x\n", Ana_Get_Reg(AUDDEC_ANA_CON10));
  199. pr_debug("AUDENC_ANA_CON0 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON0));
  200. pr_debug("AUDENC_ANA_CON1 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON1));
  201. pr_debug("AUDENC_ANA_CON2 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON2));
  202. pr_debug("AUDENC_ANA_CON3 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON3));
  203. pr_debug("AUDENC_ANA_CON4 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON4));
  204. pr_debug("AUDENC_ANA_CON5 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON5));
  205. pr_debug("AUDENC_ANA_CON6 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON6));
  206. pr_debug("AUDENC_ANA_CON7 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON7));
  207. pr_debug("AUDENC_ANA_CON8 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON8));
  208. pr_debug("AUDENC_ANA_CON9 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON9));
  209. pr_debug("AUDENC_ANA_CON10 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON10));
  210. pr_debug("AUDENC_ANA_CON11 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON11));
  211. pr_debug("AUDENC_ANA_CON12 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON12));
  212. pr_debug("AUDENC_ANA_CON13 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON13));
  213. pr_debug("AUDENC_ANA_CON14 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON14));
  214. pr_debug("AUDENC_ANA_CON15 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON15));
  215. pr_debug("AUDENC_ANA_CON16 = 0x%x\n", Ana_Get_Reg(AUDENC_ANA_CON16));
  216. pr_debug("AUDNCP_CLKDIV_CON0 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON0));
  217. pr_debug("AUDNCP_CLKDIV_CON1 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON1));
  218. pr_debug("AUDNCP_CLKDIV_CON2 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON2));
  219. pr_debug("AUDNCP_CLKDIV_CON3 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON3));
  220. pr_debug("AUDNCP_CLKDIV_CON4 = 0x%x\n", Ana_Get_Reg(AUDNCP_CLKDIV_CON4));
  221. pr_debug("TOP_CKPDN_CON0 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN_CON0));
  222. pr_debug("GPIO_MODE3 = 0x%x\n", Ana_Get_Reg(GPIO_MODE3));
  223. AudDrv_ANA_Clk_Off();
  224. pr_debug("-Ana_Log_Print\n");
  225. }
  226. EXPORT_SYMBOL(Ana_Log_Print);
  227. /* export symbols for other module using */