at91-clock.txt 13 KB

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  1. Device Tree Clock bindings for arch-at91
  2. This binding uses the common clock binding[1].
  3. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
  4. Required properties:
  5. - compatible : shall be one of the following:
  6. "atmel,at91sam9x5-sckc":
  7. at91 SCKC (Slow Clock Controller)
  8. This node contains the slow clock definitions.
  9. "atmel,at91sam9x5-clk-slow-osc":
  10. at91 slow oscillator
  11. "atmel,at91sam9x5-clk-slow-rc-osc":
  12. at91 internal slow RC oscillator
  13. "atmel,at91rm9200-pmc" or
  14. "atmel,at91sam9g45-pmc" or
  15. "atmel,at91sam9n12-pmc" or
  16. "atmel,at91sam9x5-pmc" or
  17. "atmel,sama5d3-pmc":
  18. at91 PMC (Power Management Controller)
  19. All at91 specific clocks (clocks defined below) must be child
  20. node of the PMC node.
  21. "atmel,at91sam9x5-clk-slow" (under sckc node)
  22. or
  23. "atmel,at91sam9260-clk-slow" (under pmc node):
  24. at91 slow clk
  25. "atmel,at91rm9200-clk-main-osc"
  26. "atmel,at91sam9x5-clk-main-rc-osc"
  27. at91 main clk sources
  28. "atmel,at91sam9x5-clk-main"
  29. "atmel,at91rm9200-clk-main":
  30. at91 main clock
  31. "atmel,at91rm9200-clk-master" or
  32. "atmel,at91sam9x5-clk-master":
  33. at91 master clock
  34. "atmel,at91sam9x5-clk-peripheral" or
  35. "atmel,at91rm9200-clk-peripheral":
  36. at91 peripheral clocks
  37. "atmel,at91rm9200-clk-pll" or
  38. "atmel,at91sam9g45-clk-pll" or
  39. "atmel,at91sam9g20-clk-pllb" or
  40. "atmel,sama5d3-clk-pll":
  41. at91 pll clocks
  42. "atmel,at91sam9x5-clk-plldiv":
  43. at91 plla divisor
  44. "atmel,at91rm9200-clk-programmable" or
  45. "atmel,at91sam9g45-clk-programmable" or
  46. "atmel,at91sam9x5-clk-programmable":
  47. at91 programmable clocks
  48. "atmel,at91sam9x5-clk-smd":
  49. at91 SMD (Soft Modem) clock
  50. "atmel,at91rm9200-clk-system":
  51. at91 system clocks
  52. "atmel,at91rm9200-clk-usb" or
  53. "atmel,at91sam9x5-clk-usb" or
  54. "atmel,at91sam9n12-clk-usb":
  55. at91 usb clock
  56. "atmel,at91sam9x5-clk-utmi":
  57. at91 utmi clock
  58. "atmel,sama5d4-clk-h32mx":
  59. at91 h32mx clock
  60. Required properties for SCKC node:
  61. - reg : defines the IO memory reserved for the SCKC.
  62. - #size-cells : shall be 0 (reg is used to encode clk id).
  63. - #address-cells : shall be 1 (reg is used to encode clk id).
  64. For example:
  65. sckc: sckc@fffffe50 {
  66. compatible = "atmel,sama5d3-pmc";
  67. reg = <0xfffffe50 0x4>
  68. #size-cells = <0>;
  69. #address-cells = <1>;
  70. /* put at91 slow clocks here */
  71. };
  72. Required properties for internal slow RC oscillator:
  73. - #clock-cells : from common clock binding; shall be set to 0.
  74. - clock-frequency : define the internal RC oscillator frequency.
  75. Optional properties:
  76. - clock-accuracy : define the internal RC oscillator accuracy.
  77. For example:
  78. slow_rc_osc: slow_rc_osc {
  79. compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
  80. clock-frequency = <32768>;
  81. clock-accuracy = <50000000>;
  82. };
  83. Required properties for slow oscillator:
  84. - #clock-cells : from common clock binding; shall be set to 0.
  85. - clocks : shall encode the main osc source clk sources (see atmel datasheet).
  86. Optional properties:
  87. - atmel,osc-bypass : boolean property. Set this when a clock signal is directly
  88. provided on XIN.
  89. For example:
  90. slow_osc: slow_osc {
  91. compatible = "atmel,at91rm9200-clk-slow-osc";
  92. #clock-cells = <0>;
  93. clocks = <&slow_xtal>;
  94. };
  95. Required properties for slow clock:
  96. - #clock-cells : from common clock binding; shall be set to 0.
  97. - clocks : shall encode the slow clk sources (see atmel datasheet).
  98. For example:
  99. clk32k: slck {
  100. compatible = "atmel,at91sam9x5-clk-slow";
  101. #clock-cells = <0>;
  102. clocks = <&slow_rc_osc &slow_osc>;
  103. };
  104. Required properties for PMC node:
  105. - reg : defines the IO memory reserved for the PMC.
  106. - #size-cells : shall be 0 (reg is used to encode clk id).
  107. - #address-cells : shall be 1 (reg is used to encode clk id).
  108. - interrupts : shall be set to PMC interrupt line.
  109. - interrupt-controller : tell that the PMC is an interrupt controller.
  110. - #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
  111. and reflect the bit position in the PMC_ER/DR/SR registers.
  112. You can use the dt macros defined in dt-bindings/clock/at91.h.
  113. 0 (AT91_PMC_MOSCS) -> main oscillator ready
  114. 1 (AT91_PMC_LOCKA) -> PLL A ready
  115. 2 (AT91_PMC_LOCKB) -> PLL B ready
  116. 3 (AT91_PMC_MCKRDY) -> master clock ready
  117. 6 (AT91_PMC_LOCKU) -> UTMI PLL clock ready
  118. 8 .. 15 (AT91_PMC_PCKRDY(id)) -> programmable clock ready
  119. 16 (AT91_PMC_MOSCSELS) -> main oscillator selected
  120. 17 (AT91_PMC_MOSCRCS) -> RC main oscillator stabilized
  121. 18 (AT91_PMC_CFDEV) -> clock failure detected
  122. For example:
  123. pmc: pmc@fffffc00 {
  124. compatible = "atmel,sama5d3-pmc";
  125. interrupts = <1 4 7>;
  126. interrupt-controller;
  127. #interrupt-cells = <2>;
  128. #size-cells = <0>;
  129. #address-cells = <1>;
  130. /* put at91 clocks here */
  131. };
  132. Required properties for main clock internal RC oscillator:
  133. - interrupt-parent : must reference the PMC node.
  134. - interrupts : shall be set to "<0>".
  135. - clock-frequency : define the internal RC oscillator frequency.
  136. Optional properties:
  137. - clock-accuracy : define the internal RC oscillator accuracy.
  138. For example:
  139. main_rc_osc: main_rc_osc {
  140. compatible = "atmel,at91sam9x5-clk-main-rc-osc";
  141. interrupt-parent = <&pmc>;
  142. interrupts = <0>;
  143. clock-frequency = <12000000>;
  144. clock-accuracy = <50000000>;
  145. };
  146. Required properties for main clock oscillator:
  147. - interrupt-parent : must reference the PMC node.
  148. - interrupts : shall be set to "<0>".
  149. - #clock-cells : from common clock binding; shall be set to 0.
  150. - clocks : shall encode the main osc source clk sources (see atmel datasheet).
  151. Optional properties:
  152. - atmel,osc-bypass : boolean property. Specified if a clock signal is provided
  153. on XIN.
  154. clock signal is directly provided on XIN pin.
  155. For example:
  156. main_osc: main_osc {
  157. compatible = "atmel,at91rm9200-clk-main-osc";
  158. interrupt-parent = <&pmc>;
  159. interrupts = <0>;
  160. #clock-cells = <0>;
  161. clocks = <&main_xtal>;
  162. };
  163. Required properties for main clock:
  164. - interrupt-parent : must reference the PMC node.
  165. - interrupts : shall be set to "<0>".
  166. - #clock-cells : from common clock binding; shall be set to 0.
  167. - clocks : shall encode the main clk sources (see atmel datasheet).
  168. For example:
  169. main: mainck {
  170. compatible = "atmel,at91sam9x5-clk-main";
  171. interrupt-parent = <&pmc>;
  172. interrupts = <0>;
  173. #clock-cells = <0>;
  174. clocks = <&main_rc_osc &main_osc>;
  175. };
  176. Required properties for master clock:
  177. - interrupt-parent : must reference the PMC node.
  178. - interrupts : shall be set to "<3>".
  179. - #clock-cells : from common clock binding; shall be set to 0.
  180. - clocks : shall be the master clock sources (see atmel datasheet) phandles.
  181. e.g. "<&ck32k>, <&main>, <&plla>, <&pllb>".
  182. - atmel,clk-output-range : minimum and maximum clock frequency (two u32
  183. fields).
  184. e.g. output = <0 133000000>; <=> 0 to 133MHz.
  185. - atmel,clk-divisors : master clock divisors table (four u32 fields).
  186. 0 <=> reserved value.
  187. e.g. divisors = <1 2 4 6>;
  188. - atmel,master-clk-have-div3-pres : some SoC use the reserved value 7 in the
  189. PRES field as CLOCK_DIV3 (e.g sam9x5).
  190. For example:
  191. mck: mck {
  192. compatible = "atmel,at91rm9200-clk-master";
  193. interrupt-parent = <&pmc>;
  194. interrupts = <3>;
  195. #clock-cells = <0>;
  196. atmel,clk-output-range = <0 133000000>;
  197. atmel,clk-divisors = <1 2 4 0>;
  198. };
  199. Required properties for peripheral clocks:
  200. - #size-cells : shall be 0 (reg is used to encode clk id).
  201. - #address-cells : shall be 1 (reg is used to encode clk id).
  202. - clocks : shall be the master clock phandle.
  203. e.g. clocks = <&mck>;
  204. - name: device tree node describing a specific system clock.
  205. * #clock-cells : from common clock binding; shall be set to 0.
  206. * reg: peripheral id. See Atmel's datasheets to get a full
  207. list of peripheral ids.
  208. * atmel,clk-output-range : minimum and maximum clock frequency
  209. (two u32 fields). Only valid on at91sam9x5-clk-peripheral
  210. compatible IPs.
  211. For example:
  212. periph: periphck {
  213. compatible = "atmel,at91sam9x5-clk-peripheral";
  214. #size-cells = <0>;
  215. #address-cells = <1>;
  216. clocks = <&mck>;
  217. ssc0_clk {
  218. #clock-cells = <0>;
  219. reg = <2>;
  220. atmel,clk-output-range = <0 133000000>;
  221. };
  222. usart0_clk {
  223. #clock-cells = <0>;
  224. reg = <3>;
  225. atmel,clk-output-range = <0 66000000>;
  226. };
  227. };
  228. Required properties for pll clocks:
  229. - interrupt-parent : must reference the PMC node.
  230. - interrupts : shall be set to "<1>".
  231. - #clock-cells : from common clock binding; shall be set to 0.
  232. - clocks : shall be the main clock phandle.
  233. - reg : pll id.
  234. 0 -> PLL A
  235. 1 -> PLL B
  236. - atmel,clk-input-range : minimum and maximum source clock frequency (two u32
  237. fields).
  238. e.g. input = <1 32000000>; <=> 1 to 32MHz.
  239. - #atmel,pll-clk-output-range-cells : number of cells reserved for pll output
  240. range description. Sould be set to 2, 3
  241. or 4.
  242. * 1st and 2nd cells represent the frequency range (min-max).
  243. * 3rd cell is optional and represents the OUT field value for the given
  244. range.
  245. * 4th cell is optional and represents the ICPLL field (PLLICPR
  246. register)
  247. - atmel,pll-clk-output-ranges : pll output frequency ranges + optional parameter
  248. depending on #atmel,pll-output-range-cells
  249. property value.
  250. For example:
  251. plla: pllack {
  252. compatible = "atmel,at91sam9g45-clk-pll";
  253. interrupt-parent = <&pmc>;
  254. interrupts = <1>;
  255. #clock-cells = <0>;
  256. clocks = <&main>;
  257. reg = <0>;
  258. atmel,clk-input-range = <2000000 32000000>;
  259. #atmel,pll-clk-output-range-cells = <4>;
  260. atmel,pll-clk-output-ranges = <74500000 800000000 0 0
  261. 69500000 750000000 1 0
  262. 64500000 700000000 2 0
  263. 59500000 650000000 3 0
  264. 54500000 600000000 0 1
  265. 49500000 550000000 1 1
  266. 44500000 500000000 2 1
  267. 40000000 450000000 3 1>;
  268. };
  269. Required properties for plldiv clocks (plldiv = pll / 2):
  270. - #clock-cells : from common clock binding; shall be set to 0.
  271. - clocks : shall be the plla clock phandle.
  272. The pll divisor is equal to 2 and cannot be changed.
  273. For example:
  274. plladiv: plladivck {
  275. compatible = "atmel,at91sam9x5-clk-plldiv";
  276. #clock-cells = <0>;
  277. clocks = <&plla>;
  278. };
  279. Required properties for programmable clocks:
  280. - interrupt-parent : must reference the PMC node.
  281. - #size-cells : shall be 0 (reg is used to encode clk id).
  282. - #address-cells : shall be 1 (reg is used to encode clk id).
  283. - clocks : shall be the programmable clock source phandles.
  284. e.g. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
  285. - name: device tree node describing a specific prog clock.
  286. * #clock-cells : from common clock binding; shall be set to 0.
  287. * reg : programmable clock id (register offset from PCKx
  288. register).
  289. * interrupts : shall be set to "<(8 + id)>".
  290. For example:
  291. prog: progck {
  292. compatible = "atmel,at91sam9g45-clk-programmable";
  293. #size-cells = <0>;
  294. #address-cells = <1>;
  295. interrupt-parent = <&pmc>;
  296. clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
  297. prog0 {
  298. #clock-cells = <0>;
  299. reg = <0>;
  300. interrupts = <8>;
  301. };
  302. prog1 {
  303. #clock-cells = <0>;
  304. reg = <1>;
  305. interrupts = <9>;
  306. };
  307. };
  308. Required properties for smd clock:
  309. - #clock-cells : from common clock binding; shall be set to 0.
  310. - clocks : shall be the smd clock source phandles.
  311. e.g. clocks = <&plladiv>, <&utmi>;
  312. For example:
  313. smd: smdck {
  314. compatible = "atmel,at91sam9x5-clk-smd";
  315. #clock-cells = <0>;
  316. clocks = <&plladiv>, <&utmi>;
  317. };
  318. Required properties for system clocks:
  319. - #size-cells : shall be 0 (reg is used to encode clk id).
  320. - #address-cells : shall be 1 (reg is used to encode clk id).
  321. - name: device tree node describing a specific system clock.
  322. * #clock-cells : from common clock binding; shall be set to 0.
  323. * reg: system clock id (bit position in SCER/SCDR/SCSR registers).
  324. See Atmel's datasheet to get a full list of system clock ids.
  325. For example:
  326. system: systemck {
  327. compatible = "atmel,at91rm9200-clk-system";
  328. #address-cells = <1>;
  329. #size-cells = <0>;
  330. ddrck {
  331. #clock-cells = <0>;
  332. reg = <2>;
  333. clocks = <&mck>;
  334. };
  335. uhpck {
  336. #clock-cells = <0>;
  337. reg = <6>;
  338. clocks = <&usb>;
  339. };
  340. udpck {
  341. #clock-cells = <0>;
  342. reg = <7>;
  343. clocks = <&usb>;
  344. };
  345. };
  346. Required properties for usb clock:
  347. - #clock-cells : from common clock binding; shall be set to 0.
  348. - clocks : shall be the smd clock source phandles.
  349. e.g. clocks = <&pllb>;
  350. - atmel,clk-divisors (only available for "atmel,at91rm9200-clk-usb"):
  351. usb clock divisor table.
  352. e.g. divisors = <1 2 4 0>;
  353. For example:
  354. usb: usbck {
  355. compatible = "atmel,at91sam9x5-clk-usb";
  356. #clock-cells = <0>;
  357. clocks = <&plladiv>, <&utmi>;
  358. };
  359. usb: usbck {
  360. compatible = "atmel,at91rm9200-clk-usb";
  361. #clock-cells = <0>;
  362. clocks = <&pllb>;
  363. atmel,clk-divisors = <1 2 4 0>;
  364. };
  365. Required properties for utmi clock:
  366. - interrupt-parent : must reference the PMC node.
  367. - interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>".
  368. - #clock-cells : from common clock binding; shall be set to 0.
  369. - clocks : shall be the main clock source phandle.
  370. For example:
  371. utmi: utmick {
  372. compatible = "atmel,at91sam9x5-clk-utmi";
  373. interrupt-parent = <&pmc>;
  374. interrupts = <AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>;
  375. #clock-cells = <0>;
  376. clocks = <&main>;
  377. };
  378. Required properties for 32 bits bus Matrix clock (h32mx clock):
  379. - #clock-cells : from common clock binding; shall be set to 0.
  380. - clocks : shall be the master clock source phandle.
  381. For example:
  382. h32ck: h32mxck {
  383. #clock-cells = <0>;
  384. compatible = "atmel,sama5d4-clk-h32mx";
  385. clocks = <&mck>;
  386. };