ak4642.c 15 KB

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  1. /*
  2. * ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
  3. *
  4. * Copyright (C) 2009 Renesas Solutions Corp.
  5. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  6. *
  7. * Based on wm8731.c by Richard Purdie
  8. * Based on ak4535.c by Richard Purdie
  9. * Based on wm8753.c by Liam Girdwood
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. /* ** CAUTION **
  16. *
  17. * This is very simple driver.
  18. * It can use headphone output / stereo input only
  19. *
  20. * AK4642 is tested.
  21. * AK4643 is tested.
  22. * AK4648 is tested.
  23. */
  24. #include <linux/delay.h>
  25. #include <linux/i2c.h>
  26. #include <linux/slab.h>
  27. #include <linux/of_device.h>
  28. #include <linux/module.h>
  29. #include <linux/regmap.h>
  30. #include <sound/soc.h>
  31. #include <sound/initval.h>
  32. #include <sound/tlv.h>
  33. #define PW_MGMT1 0x00
  34. #define PW_MGMT2 0x01
  35. #define SG_SL1 0x02
  36. #define SG_SL2 0x03
  37. #define MD_CTL1 0x04
  38. #define MD_CTL2 0x05
  39. #define TIMER 0x06
  40. #define ALC_CTL1 0x07
  41. #define ALC_CTL2 0x08
  42. #define L_IVC 0x09
  43. #define L_DVC 0x0a
  44. #define ALC_CTL3 0x0b
  45. #define R_IVC 0x0c
  46. #define R_DVC 0x0d
  47. #define MD_CTL3 0x0e
  48. #define MD_CTL4 0x0f
  49. #define PW_MGMT3 0x10
  50. #define DF_S 0x11
  51. #define FIL3_0 0x12
  52. #define FIL3_1 0x13
  53. #define FIL3_2 0x14
  54. #define FIL3_3 0x15
  55. #define EQ_0 0x16
  56. #define EQ_1 0x17
  57. #define EQ_2 0x18
  58. #define EQ_3 0x19
  59. #define EQ_4 0x1a
  60. #define EQ_5 0x1b
  61. #define FIL1_0 0x1c
  62. #define FIL1_1 0x1d
  63. #define FIL1_2 0x1e
  64. #define FIL1_3 0x1f
  65. #define PW_MGMT4 0x20
  66. #define MD_CTL5 0x21
  67. #define LO_MS 0x22
  68. #define HP_MS 0x23
  69. #define SPK_MS 0x24
  70. /* PW_MGMT1*/
  71. #define PMVCM (1 << 6) /* VCOM Power Management */
  72. #define PMMIN (1 << 5) /* MIN Input Power Management */
  73. #define PMDAC (1 << 2) /* DAC Power Management */
  74. #define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
  75. /* PW_MGMT2 */
  76. #define HPMTN (1 << 6)
  77. #define PMHPL (1 << 5)
  78. #define PMHPR (1 << 4)
  79. #define MS (1 << 3) /* master/slave select */
  80. #define MCKO (1 << 1)
  81. #define PMPLL (1 << 0)
  82. #define PMHP_MASK (PMHPL | PMHPR)
  83. #define PMHP PMHP_MASK
  84. /* PW_MGMT3 */
  85. #define PMADR (1 << 0) /* MIC L / ADC R Power Management */
  86. /* SG_SL1 */
  87. #define MINS (1 << 6) /* Switch from MIN to Speaker */
  88. #define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
  89. #define PMMP (1 << 2) /* MPWR pin Power Management */
  90. #define MGAIN0 (1 << 0) /* MIC amp gain*/
  91. /* TIMER */
  92. #define ZTM(param) ((param & 0x3) << 4) /* ALC Zero Crossing TimeOut */
  93. #define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
  94. /* ALC_CTL1 */
  95. #define ALC (1 << 5) /* ALC Enable */
  96. #define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
  97. /* MD_CTL1 */
  98. #define PLL3 (1 << 7)
  99. #define PLL2 (1 << 6)
  100. #define PLL1 (1 << 5)
  101. #define PLL0 (1 << 4)
  102. #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
  103. #define BCKO_MASK (1 << 3)
  104. #define BCKO_64 BCKO_MASK
  105. #define DIF_MASK (3 << 0)
  106. #define DSP (0 << 0)
  107. #define RIGHT_J (1 << 0)
  108. #define LEFT_J (2 << 0)
  109. #define I2S (3 << 0)
  110. /* MD_CTL2 */
  111. #define FS0 (1 << 0)
  112. #define FS1 (1 << 1)
  113. #define FS2 (1 << 2)
  114. #define FS3 (1 << 5)
  115. #define FS_MASK (FS0 | FS1 | FS2 | FS3)
  116. /* MD_CTL3 */
  117. #define BST1 (1 << 3)
  118. /* MD_CTL4 */
  119. #define DACH (1 << 0)
  120. struct ak4642_drvdata {
  121. const struct regmap_config *regmap_config;
  122. int extended_frequencies;
  123. };
  124. struct ak4642_priv {
  125. const struct ak4642_drvdata *drvdata;
  126. };
  127. /*
  128. * Playback Volume (table 39)
  129. *
  130. * max : 0x00 : +12.0 dB
  131. * ( 0.5 dB step )
  132. * min : 0xFE : -115.0 dB
  133. * mute: 0xFF
  134. */
  135. static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
  136. static const struct snd_kcontrol_new ak4642_snd_controls[] = {
  137. SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
  138. 0, 0xFF, 1, out_tlv),
  139. SOC_SINGLE("ALC Capture Switch", ALC_CTL1, 5, 1, 0),
  140. SOC_SINGLE("ALC Capture ZC Switch", ALC_CTL1, 4, 1, 1),
  141. };
  142. static const struct snd_kcontrol_new ak4642_headphone_control =
  143. SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
  144. static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
  145. SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
  146. };
  147. static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
  148. /* Outputs */
  149. SND_SOC_DAPM_OUTPUT("HPOUTL"),
  150. SND_SOC_DAPM_OUTPUT("HPOUTR"),
  151. SND_SOC_DAPM_OUTPUT("LINEOUT"),
  152. SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
  153. SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
  154. SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
  155. &ak4642_headphone_control),
  156. SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
  157. SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
  158. &ak4642_lout_mixer_controls[0],
  159. ARRAY_SIZE(ak4642_lout_mixer_controls)),
  160. /* DAC */
  161. SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
  162. };
  163. static const struct snd_soc_dapm_route ak4642_intercon[] = {
  164. /* Outputs */
  165. {"HPOUTL", NULL, "HPL Out"},
  166. {"HPOUTR", NULL, "HPR Out"},
  167. {"LINEOUT", NULL, "LINEOUT Mixer"},
  168. {"HPL Out", NULL, "Headphone Enable"},
  169. {"HPR Out", NULL, "Headphone Enable"},
  170. {"Headphone Enable", "Switch", "DACH"},
  171. {"DACH", NULL, "DAC"},
  172. {"LINEOUT Mixer", "DACL", "DAC"},
  173. };
  174. /*
  175. * ak4642 register cache
  176. */
  177. static const struct reg_default ak4642_reg[] = {
  178. { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 },
  179. { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 },
  180. { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 },
  181. { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0x08 },
  182. { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 },
  183. { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 },
  184. { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 },
  185. { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 },
  186. { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 },
  187. { 36, 0x00 },
  188. };
  189. static const struct reg_default ak4648_reg[] = {
  190. { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 },
  191. { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 },
  192. { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 },
  193. { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0xb8 },
  194. { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 },
  195. { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 },
  196. { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 },
  197. { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 },
  198. { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 },
  199. { 36, 0x00 }, { 37, 0x88 }, { 38, 0x88 }, { 39, 0x08 },
  200. };
  201. static int ak4642_dai_startup(struct snd_pcm_substream *substream,
  202. struct snd_soc_dai *dai)
  203. {
  204. int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  205. struct snd_soc_codec *codec = dai->codec;
  206. if (is_play) {
  207. /*
  208. * start headphone output
  209. *
  210. * PLL, Master Mode
  211. * Audio I/F Format :MSB justified (ADC & DAC)
  212. * Bass Boost Level : Middle
  213. *
  214. * This operation came from example code of
  215. * "ASAHI KASEI AK4642" (japanese) manual p97.
  216. */
  217. snd_soc_write(codec, L_IVC, 0x91); /* volume */
  218. snd_soc_write(codec, R_IVC, 0x91); /* volume */
  219. } else {
  220. /*
  221. * start stereo input
  222. *
  223. * PLL Master Mode
  224. * Audio I/F Format:MSB justified (ADC & DAC)
  225. * Pre MIC AMP:+20dB
  226. * MIC Power On
  227. * ALC setting:Refer to Table 35
  228. * ALC bit=“1”
  229. *
  230. * This operation came from example code of
  231. * "ASAHI KASEI AK4642" (japanese) manual p94.
  232. */
  233. snd_soc_update_bits(codec, SG_SL1, PMMP | MGAIN0, PMMP | MGAIN0);
  234. snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
  235. snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
  236. snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
  237. snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
  238. }
  239. return 0;
  240. }
  241. static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
  242. struct snd_soc_dai *dai)
  243. {
  244. int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  245. struct snd_soc_codec *codec = dai->codec;
  246. if (is_play) {
  247. } else {
  248. /* stop stereo input */
  249. snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
  250. snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
  251. snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
  252. }
  253. }
  254. static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
  255. int clk_id, unsigned int freq, int dir)
  256. {
  257. struct snd_soc_codec *codec = codec_dai->codec;
  258. struct ak4642_priv *priv = snd_soc_codec_get_drvdata(codec);
  259. u8 pll;
  260. int extended_freq = 0;
  261. switch (freq) {
  262. case 11289600:
  263. pll = PLL2;
  264. break;
  265. case 12288000:
  266. pll = PLL2 | PLL0;
  267. break;
  268. case 12000000:
  269. pll = PLL2 | PLL1;
  270. break;
  271. case 24000000:
  272. pll = PLL2 | PLL1 | PLL0;
  273. break;
  274. case 13500000:
  275. pll = PLL3 | PLL2;
  276. break;
  277. case 27000000:
  278. pll = PLL3 | PLL2 | PLL0;
  279. break;
  280. case 19200000:
  281. pll = PLL3;
  282. extended_freq = 1;
  283. break;
  284. case 13000000:
  285. pll = PLL3 | PLL2 | PLL1;
  286. extended_freq = 1;
  287. break;
  288. case 26000000:
  289. pll = PLL3 | PLL2 | PLL1 | PLL0;
  290. extended_freq = 1;
  291. break;
  292. default:
  293. return -EINVAL;
  294. }
  295. if (extended_freq && !priv->drvdata->extended_frequencies)
  296. return -EINVAL;
  297. snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
  298. return 0;
  299. }
  300. static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  301. {
  302. struct snd_soc_codec *codec = dai->codec;
  303. u8 data;
  304. u8 bcko;
  305. data = MCKO | PMPLL; /* use MCKO */
  306. bcko = 0;
  307. /* set master/slave audio interface */
  308. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  309. case SND_SOC_DAIFMT_CBM_CFM:
  310. data |= MS;
  311. bcko = BCKO_64;
  312. break;
  313. case SND_SOC_DAIFMT_CBS_CFS:
  314. break;
  315. default:
  316. return -EINVAL;
  317. }
  318. snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
  319. snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
  320. /* format type */
  321. data = 0;
  322. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  323. case SND_SOC_DAIFMT_LEFT_J:
  324. data = LEFT_J;
  325. break;
  326. case SND_SOC_DAIFMT_I2S:
  327. data = I2S;
  328. break;
  329. /* FIXME
  330. * Please add RIGHT_J / DSP support here
  331. */
  332. default:
  333. return -EINVAL;
  334. }
  335. snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
  336. return 0;
  337. }
  338. static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
  339. struct snd_pcm_hw_params *params,
  340. struct snd_soc_dai *dai)
  341. {
  342. struct snd_soc_codec *codec = dai->codec;
  343. u8 rate;
  344. switch (params_rate(params)) {
  345. case 7350:
  346. rate = FS2;
  347. break;
  348. case 8000:
  349. rate = 0;
  350. break;
  351. case 11025:
  352. rate = FS2 | FS0;
  353. break;
  354. case 12000:
  355. rate = FS0;
  356. break;
  357. case 14700:
  358. rate = FS2 | FS1;
  359. break;
  360. case 16000:
  361. rate = FS1;
  362. break;
  363. case 22050:
  364. rate = FS2 | FS1 | FS0;
  365. break;
  366. case 24000:
  367. rate = FS1 | FS0;
  368. break;
  369. case 29400:
  370. rate = FS3 | FS2 | FS1;
  371. break;
  372. case 32000:
  373. rate = FS3 | FS1;
  374. break;
  375. case 44100:
  376. rate = FS3 | FS2 | FS1 | FS0;
  377. break;
  378. case 48000:
  379. rate = FS3 | FS1 | FS0;
  380. break;
  381. default:
  382. return -EINVAL;
  383. }
  384. snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
  385. return 0;
  386. }
  387. static int ak4642_set_bias_level(struct snd_soc_codec *codec,
  388. enum snd_soc_bias_level level)
  389. {
  390. switch (level) {
  391. case SND_SOC_BIAS_OFF:
  392. snd_soc_write(codec, PW_MGMT1, 0x00);
  393. break;
  394. default:
  395. snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
  396. break;
  397. }
  398. codec->dapm.bias_level = level;
  399. return 0;
  400. }
  401. static const struct snd_soc_dai_ops ak4642_dai_ops = {
  402. .startup = ak4642_dai_startup,
  403. .shutdown = ak4642_dai_shutdown,
  404. .set_sysclk = ak4642_dai_set_sysclk,
  405. .set_fmt = ak4642_dai_set_fmt,
  406. .hw_params = ak4642_dai_hw_params,
  407. };
  408. static struct snd_soc_dai_driver ak4642_dai = {
  409. .name = "ak4642-hifi",
  410. .playback = {
  411. .stream_name = "Playback",
  412. .channels_min = 1,
  413. .channels_max = 2,
  414. .rates = SNDRV_PCM_RATE_8000_48000,
  415. .formats = SNDRV_PCM_FMTBIT_S16_LE },
  416. .capture = {
  417. .stream_name = "Capture",
  418. .channels_min = 1,
  419. .channels_max = 2,
  420. .rates = SNDRV_PCM_RATE_8000_48000,
  421. .formats = SNDRV_PCM_FMTBIT_S16_LE },
  422. .ops = &ak4642_dai_ops,
  423. .symmetric_rates = 1,
  424. };
  425. static int ak4642_resume(struct snd_soc_codec *codec)
  426. {
  427. struct regmap *regmap = dev_get_regmap(codec->dev, NULL);
  428. regcache_mark_dirty(regmap);
  429. regcache_sync(regmap);
  430. return 0;
  431. }
  432. static int ak4642_probe(struct snd_soc_codec *codec)
  433. {
  434. ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  435. return 0;
  436. }
  437. static int ak4642_remove(struct snd_soc_codec *codec)
  438. {
  439. ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
  440. return 0;
  441. }
  442. static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
  443. .probe = ak4642_probe,
  444. .remove = ak4642_remove,
  445. .resume = ak4642_resume,
  446. .set_bias_level = ak4642_set_bias_level,
  447. .controls = ak4642_snd_controls,
  448. .num_controls = ARRAY_SIZE(ak4642_snd_controls),
  449. .dapm_widgets = ak4642_dapm_widgets,
  450. .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
  451. .dapm_routes = ak4642_intercon,
  452. .num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
  453. };
  454. static const struct regmap_config ak4642_regmap = {
  455. .reg_bits = 8,
  456. .val_bits = 8,
  457. .max_register = ARRAY_SIZE(ak4642_reg) + 1,
  458. .reg_defaults = ak4642_reg,
  459. .num_reg_defaults = ARRAY_SIZE(ak4642_reg),
  460. };
  461. static const struct regmap_config ak4648_regmap = {
  462. .reg_bits = 8,
  463. .val_bits = 8,
  464. .max_register = ARRAY_SIZE(ak4648_reg) + 1,
  465. .reg_defaults = ak4648_reg,
  466. .num_reg_defaults = ARRAY_SIZE(ak4648_reg),
  467. };
  468. static const struct ak4642_drvdata ak4642_drvdata = {
  469. .regmap_config = &ak4642_regmap,
  470. };
  471. static const struct ak4642_drvdata ak4643_drvdata = {
  472. .regmap_config = &ak4642_regmap,
  473. };
  474. static const struct ak4642_drvdata ak4648_drvdata = {
  475. .regmap_config = &ak4648_regmap,
  476. .extended_frequencies = 1,
  477. };
  478. static const struct of_device_id ak4642_of_match[];
  479. static int ak4642_i2c_probe(struct i2c_client *i2c,
  480. const struct i2c_device_id *id)
  481. {
  482. struct device_node *np = i2c->dev.of_node;
  483. const struct ak4642_drvdata *drvdata = NULL;
  484. struct regmap *regmap;
  485. struct ak4642_priv *priv;
  486. if (np) {
  487. const struct of_device_id *of_id;
  488. of_id = of_match_device(ak4642_of_match, &i2c->dev);
  489. if (of_id)
  490. drvdata = of_id->data;
  491. } else {
  492. drvdata = (const struct ak4642_drvdata *)id->driver_data;
  493. }
  494. if (!drvdata) {
  495. dev_err(&i2c->dev, "Unknown device type\n");
  496. return -EINVAL;
  497. }
  498. priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
  499. if (!priv)
  500. return -ENOMEM;
  501. priv->drvdata = drvdata;
  502. i2c_set_clientdata(i2c, priv);
  503. regmap = devm_regmap_init_i2c(i2c, drvdata->regmap_config);
  504. if (IS_ERR(regmap))
  505. return PTR_ERR(regmap);
  506. return snd_soc_register_codec(&i2c->dev,
  507. &soc_codec_dev_ak4642, &ak4642_dai, 1);
  508. }
  509. static int ak4642_i2c_remove(struct i2c_client *client)
  510. {
  511. snd_soc_unregister_codec(&client->dev);
  512. return 0;
  513. }
  514. static const struct of_device_id ak4642_of_match[] = {
  515. { .compatible = "asahi-kasei,ak4642", .data = &ak4642_drvdata},
  516. { .compatible = "asahi-kasei,ak4643", .data = &ak4643_drvdata},
  517. { .compatible = "asahi-kasei,ak4648", .data = &ak4648_drvdata},
  518. {},
  519. };
  520. MODULE_DEVICE_TABLE(of, ak4642_of_match);
  521. static const struct i2c_device_id ak4642_i2c_id[] = {
  522. { "ak4642", (kernel_ulong_t)&ak4642_drvdata },
  523. { "ak4643", (kernel_ulong_t)&ak4643_drvdata },
  524. { "ak4648", (kernel_ulong_t)&ak4648_drvdata },
  525. { }
  526. };
  527. MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
  528. static struct i2c_driver ak4642_i2c_driver = {
  529. .driver = {
  530. .name = "ak4642-codec",
  531. .owner = THIS_MODULE,
  532. .of_match_table = ak4642_of_match,
  533. },
  534. .probe = ak4642_i2c_probe,
  535. .remove = ak4642_i2c_remove,
  536. .id_table = ak4642_i2c_id,
  537. };
  538. module_i2c_driver(ak4642_i2c_driver);
  539. MODULE_DESCRIPTION("Soc AK4642 driver");
  540. MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
  541. MODULE_LICENSE("GPL");