i2c_common.c 12 KB

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  1. #include <linux/module.h>
  2. #include <linux/init.h>
  3. #include <linux/i2c.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/dma-mapping.h>
  6. #include <linux/slab.h>
  7. #include <linux/errno.h>
  8. #include <linux/err.h>
  9. /* #include <mach/mt_pm_ldo.h> */
  10. #include <asm/memory.h>
  11. #include <mt_i2c.h>
  12. static char data_buffer[256 * 4];
  13. static ssize_t show_config(struct device *dev, struct device_attribute *attr, char *buff)
  14. {
  15. int len = strlen(data_buffer);
  16. memcpy(buff, data_buffer, len);
  17. I2CLOG("Return Value:%s\n", data_buffer);
  18. return len;
  19. }
  20. static int pows(int x, int y)
  21. {
  22. int result = 1;
  23. while (y--)
  24. result *= x;
  25. return result;
  26. }
  27. int string2hex(const char *buffer, int cnt)
  28. {
  29. int c = 0;
  30. char t = 0;
  31. int count = cnt;
  32. while (count--) {
  33. t = *(buffer + cnt - count - 1);
  34. if (t >= 'A' && t <= 'F')
  35. c += ((t - 'A') + 10) * pows(16, count);
  36. else if (t >= '0' && t <= '9')
  37. c += (t - '0') * pows(16, count);
  38. else
  39. c = -1;
  40. }
  41. return c;
  42. }
  43. char *get_hexbuffer(char *data_buffer, char *hex_buffer, int str_len)
  44. {
  45. char *ptr = data_buffer;
  46. int index = 0;
  47. while (*ptr && *++ptr && str_len--) {
  48. *(hex_buffer + index++) = string2hex(ptr - 1, 2);
  49. ptr++;
  50. }
  51. *(hex_buffer + index) = 0;
  52. return hex_buffer;
  53. }
  54. int i2c_trans_data(int bus_id, int address, char *buf, int count, unsigned int ext_flag, int timing,
  55. int op)
  56. {
  57. int ret;
  58. struct i2c_msg msg;
  59. struct i2c_adapter *adap;
  60. adap = i2c_get_adapter(bus_id);
  61. if (!adap)
  62. return -1;
  63. msg.addr = address;
  64. if (0 == op)
  65. msg.flags = 0;
  66. else if (1 == op)
  67. msg.flags = I2C_M_RD;
  68. else if (2 == op)
  69. msg.flags = 0;
  70. /* msg.flags = ((ext_flag & 0x80000000)?I2C_M_RD:0); */
  71. msg.len = count;
  72. msg.buf = (char *)buf;
  73. #ifdef CONFIG_MTK_I2C_EXTENSION
  74. msg.timing = timing;
  75. msg.ext_flag = ext_flag;
  76. #endif
  77. /* msg.ext_flag = (ext_flag & 0x7FFF00FF); */
  78. /* msg.addr |= ext_flag & 0x0000FF00; */
  79. ret = i2c_transfer(adap, &msg, 1);
  80. /* If everything went ok (i.e. 1 msg transmitted), return #bytes
  81. transmitted, else error code. */
  82. i2c_put_adapter(adap);
  83. return (ret == 1) ? count : ret;
  84. }
  85. int mt_i2c_test(int id, int addr)
  86. {
  87. int ret = 0;
  88. unsigned long flag;
  89. /* unsigned char buffer[]={0x55}; */
  90. if (id > 3)
  91. flag = I2C_DIRECTION_FLAG;
  92. /* flag |= 0x80000000; */
  93. /* ret = i2c_trans_data(id, addr,buffer,1,flag,200); */
  94. return ret;
  95. }
  96. EXPORT_SYMBOL(mt_i2c_test);
  97. /* extern struct mt_i2c_t ; */
  98. static int i2c_test_reg(int bus_id, int val)
  99. {
  100. int ret = 0;
  101. struct i2c_adapter *adap;
  102. struct mt_i2c_t *i2c;
  103. adap = i2c_get_adapter(bus_id);
  104. if (!adap)
  105. return -1;
  106. i2c = container_of(adap, struct mt_i2c_t, adap);
  107. I2CLOG("I2C%d base address 0x%p\n", bus_id, i2c->base);
  108. /* write i2c writable register with 0 */
  109. i2c_writel(i2c, OFFSET_SLAVE_ADDR, val);
  110. i2c_writel(i2c, OFFSET_INTR_MASK, val);
  111. i2c_writel(i2c, OFFSET_INTR_STAT, val);
  112. i2c_writel(i2c, OFFSET_CONTROL, val);
  113. i2c_writel(i2c, OFFSET_TRANSFER_LEN, val);
  114. i2c_writel(i2c, OFFSET_TRANSAC_LEN, val);
  115. i2c_writel(i2c, OFFSET_DELAY_LEN, val);
  116. i2c_writel(i2c, OFFSET_TIMING, val);
  117. i2c_writel(i2c, OFFSET_EXT_CONF, val);
  118. i2c_writel(i2c, OFFSET_IO_CONFIG, val);
  119. i2c_writel(i2c, OFFSET_HS, val);
  120. /* If everything went ok (i.e. 1 msg transmitted), return #bytes
  121. transmitted, else error code. */
  122. i2c_put_adapter(adap);
  123. return ret;
  124. }
  125. static int i2c_soft_reset(int bus_id)
  126. {
  127. int ret = 0;
  128. struct i2c_adapter *adap;
  129. struct mt_i2c_t *i2c;
  130. adap = i2c_get_adapter(bus_id);
  131. if (!adap)
  132. return -1;
  133. i2c = container_of(adap, struct mt_i2c_t, adap);
  134. I2CLOG("I2C%d base address 0x%p\n", bus_id, i2c->base);
  135. /* write i2c writable register with 0 */
  136. i2c_writel(i2c, OFFSET_SOFTRESET, 1);
  137. /* If everything went ok (i.e. 1 msg transmitted), return #bytes
  138. transmitted, else error code. */
  139. i2c_put_adapter(adap);
  140. return ret;
  141. }
  142. static int i2c_ext_conf_test(int bus_id, int val)
  143. {
  144. int ret = 0;
  145. struct i2c_adapter *adap;
  146. struct mt_i2c_t *i2c;
  147. adap = i2c_get_adapter(bus_id);
  148. if (!adap)
  149. return -1;
  150. i2c = container_of(adap, struct mt_i2c_t, adap);
  151. I2CLOG("I2C%d base address 0x%p\n", bus_id, i2c->base);
  152. /* write i2c writable register with 0 */
  153. i2c_writel(i2c, OFFSET_EXT_CONF, val);
  154. I2CLOG("EXT_CONF 0x%x", i2c_readl(i2c, OFFSET_EXT_CONF));
  155. /* If everything went ok (i.e. 1 msg transmitted), return #bytes
  156. transmitted, else error code. */
  157. i2c_put_adapter(adap);
  158. return ret;
  159. }
  160. static void hex2string(unsigned char *in, unsigned char *out, int length)
  161. {
  162. unsigned char *ptr = in;
  163. unsigned char *ptrout = out;
  164. unsigned char t;
  165. while (length--) {
  166. t = (*ptr & 0xF0) >> 4;
  167. if (t < 10)
  168. *ptrout = t + '0';
  169. else
  170. *ptrout = t + 'A' - 10;
  171. ptrout++;
  172. t = (*ptr & 0x0F);
  173. if (t < 10)
  174. *ptrout = t + '0';
  175. else
  176. *ptrout = t + 'A' - 10;
  177. ptr++;
  178. ptrout++;
  179. }
  180. *ptrout = 0;
  181. }
  182. static ssize_t set_config(struct device *dev, struct device_attribute *attr, const char *buf,
  183. size_t count)
  184. {
  185. int bus_id;
  186. int address;
  187. int operation;
  188. int trans_mode;
  189. int trans_stop;
  190. int speed_mode;
  191. int pushpull_mode;
  192. int query_mode;
  193. int timing;
  194. int trans_num;
  195. int trans_auxlen;
  196. int data_len;
  197. int number = 0;
  198. int length = 0;
  199. unsigned int ext_flag = 0;
  200. dma_addr_t dma_addr = 0;
  201. void *vir_addr = NULL;
  202. /* int status; */
  203. int ret = 0;
  204. unsigned char tmpbuffer[128];
  205. I2CLOG("%s\n", buf);
  206. /* if ( sscanf(buf, "%d %d %d %d %d %d %d %d %d %d %d %d %s",
  207. &bus_id, &address, &operation, &trans_mode, &trans_stop,
  208. &speed_mode, &pushpull_mode, &query_mode, &timing, &trans_num,
  209. &trans_auxlen,&dir, data_buffer) ) { */
  210. if (sscanf(buf, "%d %x %d %d %d %d %d %d %d %d %d %d %1023s", &bus_id, &address, &operation, &trans_mode,
  211. &trans_stop, &speed_mode, &pushpull_mode, &query_mode, &timing, &trans_num,
  212. &trans_auxlen, &data_len, data_buffer) != 0) {
  213. if ((address != 0) && (operation <= 2)) {
  214. /* data_len is transfer bytes, offset address + write data */
  215. length = 2 * data_len;
  216. if (operation == 0) {
  217. ext_flag |= I2C_WR_FLAG;
  218. number = (trans_auxlen << 8) | (length >> 1); /* /TODO:need to confitm 8 Or 16 */
  219. } else if (operation == 1) {
  220. /* ext_flag |= 0x80000000; */
  221. number = (trans_num << 16) | (length >> 1);
  222. } else if (operation == 2) {
  223. /* ext_flag &= 0x7FFFFFFF; */
  224. number = (trans_num << 16) | (length >> 1);
  225. } else {
  226. I2CERR("invalid operation\n");
  227. goto err;
  228. }
  229. if (trans_mode == 0) {
  230. /* default is fifo */
  231. } else if (trans_mode == 1) {
  232. ext_flag |= I2C_DMA_FLAG;
  233. } else {
  234. I2CERR("invalid trans_mod fifo/dma\n");
  235. goto err;
  236. }
  237. if (trans_stop == 0) {
  238. /* default */
  239. } else if (trans_stop == 1) {
  240. ext_flag |= I2C_RS_FLAG;
  241. } else {
  242. I2CERR("invalid trans_stop\n");
  243. goto err;
  244. }
  245. if (speed_mode == 0) {
  246. timing = 0; /* ST mode */
  247. } else if (speed_mode == 1) {
  248. /* ext_flag |= I2C_FS_FLAG;//FS MODE */
  249. } else if (speed_mode == 2) {
  250. ext_flag |= I2C_HS_FLAG; /* HS mode */
  251. } else {
  252. I2CERR("invalid speed_mode\n");
  253. goto err;
  254. }
  255. if (pushpull_mode == 0) {
  256. /* default */
  257. } else if (pushpull_mode == 1) {
  258. ext_flag |= I2C_PUSHPULL_FLAG;
  259. } else {
  260. I2CERR("invalid pushpull mode\n");
  261. goto err;
  262. }
  263. if (query_mode == 0) {
  264. /* */
  265. } else if (query_mode == 1) {
  266. ext_flag |= I2C_POLLING_FLAG;
  267. } else {
  268. I2CERR("invalid query mode interrupt/polling\n");
  269. goto err;
  270. }
  271. if (trans_mode == 1) { /*DMA MODE */
  272. /*need GFP_DMA32 flag to confirm DMA alloc PA is 32bit range */
  273. vir_addr =
  274. dma_alloc_coherent(dev, (length >> 1) + 1, &dma_addr,
  275. GFP_KERNEL | GFP_DMA32);
  276. if (vir_addr == NULL) {
  277. I2CERR("alloc dma memory failed\n");
  278. goto err;
  279. }
  280. } else {
  281. vir_addr = kzalloc((length >> 1) + 1, GFP_KERNEL);
  282. if (vir_addr == NULL) {
  283. I2CERR("alloc virtual memory failed\n");
  284. goto err;
  285. }
  286. }
  287. get_hexbuffer(data_buffer, vir_addr, length);
  288. I2CLOG("bus_id:%d,address:%x,count:%x,ext_flag:0x%x,timing:%d\n", bus_id,
  289. address, number, ext_flag, timing);
  290. I2CLOG("data_buffer:%s\n", data_buffer);
  291. if (trans_mode == 1) {
  292. #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
  293. pr_info("phys_addr: 0x%llx\n", dma_addr);
  294. #else
  295. pr_info("phys_addr: 0x%x\n", dma_addr);
  296. #endif
  297. ret =
  298. i2c_trans_data(bus_id, address, mt_i2c_bus_to_virt(dma_addr),
  299. number, ext_flag, timing, operation);
  300. } else {
  301. ret =
  302. i2c_trans_data(bus_id, address, vir_addr, number, ext_flag,
  303. timing, operation);
  304. }
  305. /* dealing */
  306. if (ret >= 0) {
  307. if (operation == 1) {
  308. hex2string(vir_addr, tmpbuffer, length >> 1);
  309. snprintf(data_buffer, sizeof(data_buffer), "1 %s", tmpbuffer);
  310. I2CLOG("received data: %s\n", tmpbuffer);
  311. } else if (operation == 0) {
  312. hex2string(vir_addr, tmpbuffer, trans_auxlen);
  313. snprintf(data_buffer, sizeof(data_buffer), "1 %s", tmpbuffer);
  314. I2CLOG("received data: %s\n", tmpbuffer);
  315. } else {
  316. snprintf(data_buffer, sizeof(data_buffer), "1 %s", "00");
  317. }
  318. I2CLOG("Actual return Value:%d 0x%p\n", ret, vir_addr);
  319. } else if (ret < 0) {
  320. if (ret == -EINVAL)
  321. snprintf(data_buffer, sizeof(data_buffer), "0 %s", "Invalid Parameter");
  322. else if (ret == -ETIMEDOUT)
  323. snprintf(data_buffer, sizeof(data_buffer), "0 %s", "Transfer Timeout");
  324. else if (ret == -EREMOTEIO)
  325. snprintf(data_buffer, sizeof(data_buffer), "0 %s", "Ack Error");
  326. else
  327. snprintf(data_buffer, sizeof(data_buffer), "0 %s", "unknown error");
  328. I2CLOG("Actual return Value:%d 0x%p\n", ret, vir_addr);
  329. }
  330. if (trans_mode == 1 && vir_addr != NULL) { /*DMA MODE */
  331. dma_free_coherent(dev, length >> 1, vir_addr, dma_addr);
  332. } else {
  333. kfree(vir_addr);
  334. }
  335. /* log for UT test. */
  336. {
  337. struct i2c_adapter *adap = i2c_get_adapter(bus_id);
  338. struct mt_i2c_t *i2c = i2c_get_adapdata(adap);
  339. _i2c_dump_info(i2c);
  340. }
  341. } else {
  342. struct i2c_adapter *adap = i2c_get_adapter(bus_id);
  343. struct mt_i2c_t *i2c = i2c_get_adapdata(adap);
  344. if (operation == 3) {
  345. _i2c_dump_info(i2c);
  346. } else if (operation == 4) {
  347. i2c_test_reg(bus_id, 0);
  348. _i2c_dump_info(i2c);
  349. i2c_test_reg(bus_id, 0xFFFFFFFF);
  350. _i2c_dump_info(i2c);
  351. } else if (operation == 5) {
  352. i2c_ext_conf_test(bus_id, address);
  353. } else if (operation == 9) {
  354. i2c_soft_reset(bus_id);
  355. _i2c_dump_info(i2c);
  356. } else if (operation == 6) {
  357. if (bus_id == 0) {
  358. /* I2C0 PINMUX2 power on */
  359. /* hwPowerOn(MT65XX_POWER_LDO_VMC1,VOL_DEFAULT,"i2c_pinmux"); */
  360. /* hwPowerOn(MT65XX_POWER_LDO_VMCH1,VOL_DEFAULT,"i2c_pinmux"); */
  361. }
  362. } else if (operation == 7) {
  363. mt_i2c_test(1, 0x50);
  364. } else {
  365. dev_err(dev, "i2c debug system: Parameter invalid!\n");
  366. }
  367. _i2c_dump_info(i2c);
  368. }
  369. } else {
  370. /*parameter invalid */
  371. dev_err(dev, "i2c debug system: Parameter invalid!\n");
  372. }
  373. return count;
  374. err:
  375. I2CERR("analyze failed\n");
  376. return -1;
  377. }
  378. static DEVICE_ATTR(ut, 0660, show_config, set_config);
  379. static int i2c_common_probe(struct platform_device *pdev)
  380. {
  381. int ret = 0;
  382. /* your code here£¬your should save client in your own way */
  383. I2CLOG("i2c_common device probe\n");
  384. ret = device_create_file(&pdev->dev, &dev_attr_ut);
  385. return ret;
  386. }
  387. static int i2c_common_remove(struct platform_device *pdev)
  388. {
  389. int ret = 0;
  390. /* your code here */
  391. device_remove_file(&pdev->dev, &dev_attr_ut);
  392. return ret;
  393. }
  394. static struct platform_driver i2c_common_driver = {
  395. .driver = {
  396. .name = "mt-i2cd",
  397. .owner = THIS_MODULE,
  398. },
  399. .probe = i2c_common_probe,
  400. .remove = i2c_common_remove,
  401. };
  402. /* platform device */
  403. static struct platform_device i2c_common_device = {
  404. .name = "mt-i2cd",
  405. .dev = {
  406. .coherent_dma_mask = DMA_BIT_MASK(32),
  407. },
  408. };
  409. static int __init xxx_init(void)
  410. {
  411. I2CLOG("i2c_common device init\n");
  412. platform_device_register(&i2c_common_device);
  413. return platform_driver_register(&i2c_common_driver);
  414. }
  415. static void __exit xxx_exit(void)
  416. {
  417. platform_driver_unregister(&i2c_common_driver);
  418. platform_device_unregister(&i2c_common_device);
  419. }
  420. module_init(xxx_init);
  421. module_exit(xxx_exit);
  422. MODULE_LICENSE("GPL");
  423. MODULE_DESCRIPTION("MediaTek I2C Bus Driver Test Driver");
  424. MODULE_AUTHOR("Ranran Lu");