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Aquaris-M10-4G
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Aquaris-M10-4G
/
drivers
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misc
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mediatek
/
videocodec
/
mt6735
/
videocodec_kernel_driver.h

videocodec_kernel_driver.h 4.0 KB
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  1. #ifndef __VCODEC_DRIVER_H__
    2. 

  2. #define __VCODEC_DRIVER_H__
    3. 

  3. 

  4. #define MFV_IOC_MAGIC    'M'
    5. 

  5. 

  6. /* below is control message */
    7. 

  7. #define MFV_TEST_CMD                   _IO(MFV_IOC_MAGIC,  0x00)
    8. 

  8. #define MFV_INIT_CMD                   _IO(MFV_IOC_MAGIC, 0x01)
    9. 

  9. #define MFV_DEINIT_CMD                 _IO(MFV_IOC_MAGIC, 0x02)
    10. 

  10. #define MFV_SET_CMD_CMD                _IOW(MFV_IOC_MAGIC, 0x03, unsigned int) /* P_MFV_DRV_CMD_QUEUE_T */
    11. 

  11. #define MFV_SET_PWR_CMD                _IOW(MFV_IOC_MAGIC, 0x04, unsigned int) /* HAL_POWER_T * */
    12. 

  12. #define MFV_SET_ISR_CMD                _IOW(MFV_IOC_MAGIC, 0x05, unsigned int) /* HAL_ISR_T * */
    13. 

  13. #define MFV_ALLOC_MEM_CMD              _IOW(MFV_IOC_MAGIC, 0x06, unsigned int)
    14. 

  14. #define MFV_FREE_MEM_CMD               _IOW(MFV_IOC_MAGIC, 0x07, unsigned int)
    15. 

  15. #define MFV_MAKE_PMEM_TO_NONCACHED     _IOW(MFV_IOC_MAGIC, 0x08, unsigned int) /* unsigned int* */
    16. 

  16. #define MFV_ALLOC_INT_MEM_CMD          _IOW(MFV_IOC_MAGIC, 0x09, unsigned int) /* VAL_INTMEM_T* */
    17. 

  17. #define MFV_FREE_INT_MEM_CMD           _IOW(MFV_IOC_MAGIC, 0x0a, unsigned int) /* VAL_INTMEM_T* */
    18. 

  18. #define VCODEC_WAITISR                 _IOW(MFV_IOC_MAGIC, 0x0b, unsigned int) /* HAL_POWER_T * */
    19. 

  19. #define VCODEC_LOCKHW                  _IOW(MFV_IOC_MAGIC, 0x0d, unsigned int) /* VAL_HW_LOCK_T * */
    20. 

  20. #define VCODEC_PMEM_FLUSH              _IOW(MFV_IOC_MAGIC, 0x10, unsigned int) /* HAL_POWER_T * */
    21. 

  21. #define VCODEC_PMEM_CLEAN              _IOW(MFV_IOC_MAGIC, 0x11, unsigned int) /* HAL_POWER_T * */
    22. 

  22. #define VCODEC_INC_SYSRAM_USER         _IOW(MFV_IOC_MAGIC, 0x13, unsigned int) /* VAL_UINT32_T * */
    23. 

  23. #define VCODEC_DEC_SYSRAM_USER         _IOW(MFV_IOC_MAGIC, 0x14, unsigned int) /* VAL_UINT32_T * */
    24. 

  24. #define VCODEC_INC_ENC_EMI_USER        _IOW(MFV_IOC_MAGIC, 0x15, unsigned int) /* VAL_UINT32_T * */
    25. 

  25. #define VCODEC_DEC_ENC_EMI_USER        _IOW(MFV_IOC_MAGIC, 0x16, unsigned int) /* VAL_UINT32_T * */
    26. 

  26. #define VCODEC_INC_DEC_EMI_USER        _IOW(MFV_IOC_MAGIC, 0x17, unsigned int) /* VAL_UINT32_T * */
    27. 

  27. #define VCODEC_DEC_DEC_EMI_USER        _IOW(MFV_IOC_MAGIC, 0x18, unsigned int) /* VAL_UINT32_T * */
    28. 

  28. #define VCODEC_INITHWLOCK              _IOW(MFV_IOC_MAGIC, 0x20, unsigned int) /* VAL_VCODEC_OAL_HW_REGISTER_T * */
    29. 

  29. #define VCODEC_DEINITHWLOCK            _IOW(MFV_IOC_MAGIC, 0x21, unsigned int) /* VAL_VCODEC_OAL_HW_REGISTER_T * */
    30. 

  30. #define VCODEC_ALLOC_NON_CACHE_BUFFER  _IOW(MFV_IOC_MAGIC, 0x22, unsigned int) /* VAL_MEMORY_T * */
    31. 

  31. #define VCODEC_FREE_NON_CACHE_BUFFER   _IOW(MFV_IOC_MAGIC, 0x23, unsigned int) /* VAL_MEMORY_T * */
    32. 

  32. #define VCODEC_SET_THREAD_ID           _IOW(MFV_IOC_MAGIC, 0x24, unsigned int) /* VAL_VCODEC_THREAD_ID_T * */
    33. 

  33. #define VCODEC_SET_SYSRAM_INFO         _IOW(MFV_IOC_MAGIC, 0x25, unsigned int) /* VAL_INTMEM_T * */
    34. 

  34. #define VCODEC_GET_SYSRAM_INFO         _IOW(MFV_IOC_MAGIC, 0x26, unsigned int) /* VAL_INTMEM_T * */
    35. 

  35. #define VCODEC_INC_PWR_USER            _IOW(MFV_IOC_MAGIC, 0x27, unsigned int) /* HAL_POWER_T * */
    36. 

  36. #define VCODEC_DEC_PWR_USER            _IOW(MFV_IOC_MAGIC, 0x28, unsigned int) /* HAL_POWER_T * */
    37. 

  37. #define VCODEC_GET_CPU_LOADING_INFO    _IOW(MFV_IOC_MAGIC, 0x29, unsigned int) /* VAL_VCODEC_CPU_LOADING_INFO_T * */
    38. 

  38. #define VCODEC_GET_CORE_LOADING        _IOW(MFV_IOC_MAGIC, 0x30, unsigned int) /* VAL_VCODEC_CORE_LOADING_T * */
    39. 

  39. #define VCODEC_GET_CORE_NUMBER         _IOW(MFV_IOC_MAGIC, 0x31, unsigned int) /* int * */
    40. 

  40. #define VCODEC_SET_CPU_OPP_LIMIT       _IOW(MFV_IOC_MAGIC, 0x32, unsigned int) /* VAL_VCODEC_CPU_OPP_LIMIT_T * */
    41. 

  41. #define VCODEC_UNLOCKHW                _IOW(MFV_IOC_MAGIC, 0x33, unsigned int) /* VAL_HW_LOCK_T * */
    42. 

  42. #define VCODEC_MB                      _IOW(MFV_IOC_MAGIC, 0x34, unsigned int) /* VAL_UINT32_T * */
    43. 

  43. #define VCODEC_SET_LOG_COUNT           _IOW(MFV_IOC_MAGIC, 0x35, unsigned int) /* VAL_BOOL_T * */
    44. 

  44. 

  45. 

  46. /* extern unsigned long get_cpu_load(int cpu); */
    47. 

  47. 

  48. /* #define MFV_GET_CACHECTRLADDR_CMD  _IOR(MFV_IOC_MAGIC, 0x06, int) */
    49. 

  49. 

  50. #ifdef CONFIG_MTK_HIBERNATION
    51. 

  51. extern void mt_irq_set_sens(unsigned int irq, unsigned int sens);
    52. 

  52. extern void mt_irq_set_polarity(unsigned int irq, unsigned int polarity);
    53. 

  53. #endif
    54. 

  54. 

  55. #endif /* __VCODEC_DRIVER_H__ */
    56.