Version 1.2.0_20170215-0930 released

arch/arm/configs/mlt8735_f3gh_debug_defconfig

@@ -95,7 +95,6 @@ CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CT_PROTO_UDPLITE=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_CONNMARK=y

arch/arm/configs/mlt8735_f3gh_defconfig

@@ -91,7 +91,6 @@ CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CT_PROTO_UDPLITE=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_CONNMARK=y

arch/arm/configs/mlt8735m_f3gh_debug_defconfig

@@ -92,7 +92,6 @@ CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CT_PROTO_UDPLITE=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_CONNMARK=y

arch/arm/configs/mlt8735m_f3gh_defconfig

@@ -89,7 +89,6 @@ CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CT_PROTO_UDPLITE=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_CONNMARK=y

arch/arm/configs/mlt8735m_f3h_debug_defconfig

@@ -95,7 +95,6 @@ CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CT_PROTO_UDPLITE=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_CONNMARK=y

arch/arm/configs/mlt8735m_f3h_defconfig

@@ -92,7 +92,6 @@ CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CT_PROTO_UDPLITE=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_CONNMARK=y

arch/arm64/configs/bq_aquaris_m10_LTE_defconfig

@@ -86,7 +86,6 @@ CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CT_PROTO_UDPLITE=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SIP=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_CONNMARK=y

drivers/misc/mediatek/aw2015/AW2015_LED_M.c

@@ -62,6 +62,13 @@ static ssize_t AW2015_Set_Yellow_delay_on(struct device* cd, struct device_attri
 static ssize_t AW2015_Set_Pink(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
 static ssize_t AW2015_Set_Pink_delay_off(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
 static ssize_t AW2015_Set_Pink_delay_on(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
+static ssize_t AW2015_Set_Orange(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
+static ssize_t AW2015_Set_Orange_delay_off(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
+static ssize_t AW2015_Set_Orange_delay_on(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
+static ssize_t AW2015_Set_Violet(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
+static ssize_t AW2015_Set_Violet_delay_off(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
+static ssize_t AW2015_Set_Violet_delay_on(struct device* cd, struct device_attribute *attr,const char* buf, size_t len);
+
 
 
 
@@ -75,6 +82,8 @@ static DEVICE_ATTR(White, 0660, NULL,  AW2015_Set_White);
 static DEVICE_ATTR(Gray, 0660, NULL,  AW2015_Set_Gray);
 static DEVICE_ATTR(Yellow, 0660, NULL,  AW2015_Set_Yellow);
 static DEVICE_ATTR(Pink, 0660, NULL,  AW2015_Set_Pink);
+static DEVICE_ATTR(Orange, 0660, NULL,  AW2015_Set_Orange);
+static DEVICE_ATTR(Violet, 0660, NULL,  AW2015_Set_Violet);
 
 
 static int RED_DELAY_OFF = 0,RED_DELAY_ON = 0;
@@ -103,6 +112,13 @@ static int PINK_DELAY_OFF = 0,PINK_DELAY_ON = 0;
 static DEVICE_ATTR(Pink_delay_off, 0660, NULL,  AW2015_Set_Pink_delay_off);
 static DEVICE_ATTR(Pink_delay_on, 0660, NULL,  AW2015_Set_Pink_delay_on);
 
+static int ORANGE_DELAY_OFF = 0,ORANGE_DELAY_ON = 0;
+static DEVICE_ATTR(Orange_delay_off, 0660, NULL,  AW2015_Set_Orange_delay_off);
+static DEVICE_ATTR(Orange_delay_on, 0660, NULL,  AW2015_Set_Orange_delay_on);
+
+static int VIOLET_DELAY_OFF = 0,VIOLET_DELAY_ON = 0;
+static DEVICE_ATTR(Violet_delay_off, 0660, NULL,  AW2015_Set_Violet_delay_off);
+static DEVICE_ATTR(Violet_delay_on, 0660, NULL,  AW2015_Set_Violet_delay_on);
 
 struct i2c_client *AW2015_i2c_client;
 
@@ -407,6 +423,378 @@ static ssize_t AW2015_Set_Pink_delay_on(struct device* cd, struct device_attribu
     return len;
 }
 
+static ssize_t AW2015_Set_Orange_delay_off(struct device* cd, struct device_attribute *attr, const char* buf, size_t len)
+{
+    unsigned long iNewPsSensorState = simple_strtoul(buf, NULL, 10);
+    ORANGE_DELAY_OFF = iNewPsSensorState;
+    return len;
+}
+
+static ssize_t AW2015_Set_Orange_delay_on(struct device* cd, struct device_attribute *attr, const char* buf, size_t len)
+{
+    unsigned long iNewPsSensorState = simple_strtoul(buf, NULL, 10);
+    ORANGE_DELAY_ON = iNewPsSensorState;
+    return len;
+}
+
+static ssize_t AW2015_Set_Violet_delay_off(struct device* cd, struct device_attribute *attr, const char* buf, size_t len)
+{
+    unsigned long iNewPsSensorState = simple_strtoul(buf, NULL, 10);
+    VIOLET_DELAY_OFF = iNewPsSensorState;
+    return len;
+}
+
+static ssize_t AW2015_Set_Violet_delay_on(struct device* cd, struct device_attribute *attr, const char* buf, size_t len)
+{
+    unsigned long iNewPsSensorState = simple_strtoul(buf, NULL, 10);
+    VIOLET_DELAY_ON = iNewPsSensorState;
+    return len;
+}
+
+
+static ssize_t AW2015_Set_Orange(struct device* cd, struct device_attribute *attr, const char* buf, size_t len)
+
+{
+    unsigned int databuf[16];
+	sscanf(buf,"%d",&databuf[0]);
+    I2C_write_reg(0x00, 0x55);		// software reset
+
+	I2C_write_reg(0x01, 0x03);		// GCR
+	I2C_write_reg(0x03, 0x01);		// IMAX
+	I2C_write_reg(0x04, 0x00);		// LCFG1
+	I2C_write_reg(0x05, 0x00);		// LCFG2
+	I2C_write_reg(0x06, 0x00);		// LCFG3
+	I2C_write_reg(0x07, 0x07);		// LEDEN
+
+    if(databuf[0]!=0)
+    {
+        if(ORANGE_DELAY_OFF == 500)
+        {
+            if(ORANGE_DELAY_ON == 500)
+            {
+                I2C_write_reg(0x00, 0x55);		// software reset
+
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xFF);      // Color1_R
+                I2C_write_reg(0x11, 0xCE);      // Color1_G
+                I2C_write_reg(0x12, 0x1F);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN	
+            }
+            else if(ORANGE_DELAY_ON == 1000)
+            {
+                I2C_write_reg(0x00, 0x55);      // software reset
+                
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xFF);      // Color1_R
+                I2C_write_reg(0x11, 0xCE);      // Color1_G
+                I2C_write_reg(0x12, 0x1F);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x13);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x01);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x20);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN	
+            }
+            else if(ORANGE_DELAY_ON == 1499)
+            {
+                I2C_write_reg(0x00, 0x55);      // software reset
+                
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xFF);      // Color1_R
+                I2C_write_reg(0x11, 0xCE);      // Color1_G
+                I2C_write_reg(0x12, 0x1F);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x80);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x00);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN
+            }
+        }   else if(ORANGE_DELAY_ON!=0 &&ORANGE_DELAY_OFF!=0)
+            {
+                I2C_write_reg(0x00, 0x55);      // software reset
+
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xFF);      // Color1_R
+                I2C_write_reg(0x11, 0xCE);      // Color1_G
+                I2C_write_reg(0x12, 0x1F);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x14);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x01);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x31);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN	
+        }
+        else
+        {
+            I2C_write_reg(0x00, 0x55);      // software reset
+            
+            I2C_write_reg(0x01, 0x03);      // GCR
+            I2C_write_reg(0x03, 0x01);      // IMAX
+            I2C_write_reg(0x04, 0x00);      // LCFG1
+            I2C_write_reg(0x05, 0x00);      // LCFG2
+            I2C_write_reg(0x06, 0x00);      // LCFG3
+            I2C_write_reg(0x07, 0x07);      // LEDEN
+
+            I2C_write_reg(0x10, 0xFF);		// Color1_R
+            I2C_write_reg(0x11, 0xCE);		// Color1_G
+            I2C_write_reg(0x12, 0x1F);		// Color1_B
+            I2C_write_reg(0x1C, 0xFF);		// PWM1
+            I2C_write_reg(0x1D, 0xFF);		// PWM2
+            I2C_write_reg(0x1E, 0xFF);		// PWM3
+            I2C_write_reg(0x09, 0x07);		// PAT_RIN
+        }
+        
+    }
+    else
+    {
+        I2C_write_reg(0x10, 0x00);		// Color1_R
+        I2C_write_reg(0x11, 0x00);		// Color1_G
+        I2C_write_reg(0x12, 0x00);		// Color1_B
+        I2C_write_reg(0x1C, 0x00);		// PWM1
+        I2C_write_reg(0x1D, 0x00);		// PWM2
+        I2C_write_reg(0x1E, 0x00);		// PWM3
+        I2C_write_reg(0x09, 0x07);		// PAT_RIN
+        ORANGE_DELAY_ON = 0;
+        ORANGE_DELAY_OFF = 0;
+    }
+	return len;
+
+}
+
+
+static ssize_t AW2015_Set_Violet(struct device* cd, struct device_attribute *attr, const char* buf, size_t len)
+
+{
+    unsigned int databuf[16];
+	sscanf(buf,"%d",&databuf[0]);
+    I2C_write_reg(0x00, 0x55);		// software reset
+
+	I2C_write_reg(0x01, 0x03);		// GCR
+	I2C_write_reg(0x03, 0x01);		// IMAX
+	I2C_write_reg(0x04, 0x00);		// LCFG1
+	I2C_write_reg(0x05, 0x00);		// LCFG2
+	I2C_write_reg(0x06, 0x00);		// LCFG3
+	I2C_write_reg(0x07, 0x07);		// LEDEN
+
+    if(databuf[0]!=0)
+    {
+        if(VIOLET_DELAY_OFF == 500)
+        {
+            if(VIOLET_DELAY_ON == 500)
+            {
+                I2C_write_reg(0x00, 0x55);		// software reset
+
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xD2);      // Color1_R
+                I2C_write_reg(0x11, 0x74);      // Color1_G
+                I2C_write_reg(0x12, 0xF9);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN	
+            }
+            else if(VIOLET_DELAY_ON == 1000)
+            {
+                I2C_write_reg(0x00, 0x55);      // software reset
+                
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xD2);      // Color1_R
+                I2C_write_reg(0x11, 0x74);      // Color1_G
+                I2C_write_reg(0x12, 0xF9);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x13);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x01);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x20);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN	
+            }
+            else if(VIOLET_DELAY_ON == 1499)
+            {
+                I2C_write_reg(0x00, 0x55);      // software reset
+                
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xD2);      // Color1_R
+                I2C_write_reg(0x11, 0x74);      // Color1_G
+                I2C_write_reg(0x12, 0xF9);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x80);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x00);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN
+            }
+        }   else if(VIOLET_DELAY_ON!=0 &&VIOLET_DELAY_OFF!=0)
+            {
+                I2C_write_reg(0x00, 0x55);      // software reset
+
+                I2C_write_reg(0x01, 0x03);      // GCR
+                I2C_write_reg(0x03, 0x01);      // IMAX
+                I2C_write_reg(0x04, 0x01);      // LCFG1
+                I2C_write_reg(0x05, 0x01);      // LCFG2
+                I2C_write_reg(0x06, 0x01);      // LCFG3
+                I2C_write_reg(0x07, 0x07);      // LEDEN
+                I2C_write_reg(0x08, 0x08);      // LEDCTR
+
+                I2C_write_reg(0x10, 0xD2);      // Color1_R
+                I2C_write_reg(0x11, 0x74);      // Color1_G
+                I2C_write_reg(0x12, 0xF9);      // Color1_B
+                I2C_write_reg(0x1C, 0xFF);      // PWM1
+                I2C_write_reg(0x1D, 0xFF);      // PWM2
+                I2C_write_reg(0x1E, 0xFF);      // PWM3
+                I2C_write_reg(0x09, 0x07);      // PAT_RIN
+
+                I2C_write_reg(0x30, 0x14);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x01);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x31);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
+                I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
+
+
+                I2C_write_reg(0x09, 0x07);		// PAT_RIN	
+        }
+        else
+        {
+            I2C_write_reg(0x00, 0x55);      // software reset
+            
+            I2C_write_reg(0x01, 0x03);      // GCR
+            I2C_write_reg(0x03, 0x01);      // IMAX
+            I2C_write_reg(0x04, 0x00);      // LCFG1
+            I2C_write_reg(0x05, 0x00);      // LCFG2
+            I2C_write_reg(0x06, 0x00);      // LCFG3
+            I2C_write_reg(0x07, 0x07);      // LEDEN
+
+            I2C_write_reg(0x10, 0xD2);		// Color1_R
+            I2C_write_reg(0x11, 0x74);		// Color1_G
+            I2C_write_reg(0x12, 0xF9);		// Color1_B
+            I2C_write_reg(0x1C, 0xFF);		// PWM1
+            I2C_write_reg(0x1D, 0xFF);		// PWM2
+            I2C_write_reg(0x1E, 0xFF);		// PWM3
+            I2C_write_reg(0x09, 0x07);		// PAT_RIN
+        }
+        
+    }
+    else
+    {
+        I2C_write_reg(0x10, 0x00);		// Color1_R
+        I2C_write_reg(0x11, 0x00);		// Color1_G
+        I2C_write_reg(0x12, 0x00);		// Color1_B
+        I2C_write_reg(0x1C, 0x00);		// PWM1
+        I2C_write_reg(0x1D, 0x00);		// PWM2
+        I2C_write_reg(0x1E, 0x00);		// PWM3
+        I2C_write_reg(0x09, 0x07);		// PAT_RIN
+        VIOLET_DELAY_ON = 0;
+        VIOLET_DELAY_OFF = 0;
+    }
+	return len;
+
+}
+
 static ssize_t AW2015_Set_White(struct device* cd, struct device_attribute *attr, const char* buf, size_t len)
 
 {
@@ -446,7 +834,7 @@ static ssize_t AW2015_Set_White(struct device* cd, struct device_attribute *attr
                 I2C_write_reg(0x09, 0x07);      // PAT_RIN
 
                 I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
                 I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
@@ -617,7 +1005,7 @@ static ssize_t AW2015_Set_Gray(struct device* cd, struct device_attribute *attr,
                 I2C_write_reg(0x09, 0x07);      // PAT_RIN
 
                 I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
                 I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
@@ -787,7 +1175,7 @@ static ssize_t AW2015_Set_Yellow(struct device* cd, struct device_attribute *att
                 I2C_write_reg(0x09, 0x07);      // PAT_RIN
 
                 I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
                 I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
@@ -957,7 +1345,7 @@ static ssize_t AW2015_Set_Pink(struct device* cd, struct device_attribute *attr,
                 I2C_write_reg(0x09, 0x07);      // PAT_RIN
 
                 I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
                 I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
@@ -1118,7 +1506,7 @@ static ssize_t AW2015_Set_Red(struct device* cd, struct device_attribute *attr,
                 I2C_write_reg(0x09, 0x07);      // PAT_RIN
                 
                 I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
                 I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
@@ -1201,9 +1589,9 @@ static ssize_t AW2015_Set_Red(struct device* cd, struct device_attribute *attr,
                 I2C_write_reg(0x1E, 0x00);      // PWM3
                 I2C_write_reg(0x09, 0x07);      // PAT_RIN
 
-                I2C_write_reg(0x30, 0x80);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
-                I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
+                I2C_write_reg(0x30, 0x14);		// PAT_T1		Trise & Ton
+                I2C_write_reg(0x31, 0x01);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x32, 0x31);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x00);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
 
@@ -1291,7 +1679,7 @@ static ssize_t AW2015_Set_Green(struct device* cd, struct device_attribute *attr
                 I2C_write_reg(0x1E, 0xFF);      // PWM3
 
                 I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
                 I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
@@ -1493,7 +1881,7 @@ static ssize_t AW2015_Set_Blue(struct device* cd, struct device_attribute *attr,
                 I2C_write_reg(0x1E, 0xFF);      // PWM3
 
                 I2C_write_reg(0x30, 0x00);		// PAT_T1		Trise & Ton
-                I2C_write_reg(0x31, 0x00);		// PAT_T2		Tfall & Toff
+                I2C_write_reg(0x31, 0x02);		// PAT_T2		Tfall & Toff
                 I2C_write_reg(0x32, 0x00);		// PAT_T3		Tslot & Tdelay
                 I2C_write_reg(0x33, 0x10);		// PAT_T4 	  PAT_CTR & Color
                 I2C_write_reg(0x34, 0x00);		// PAT_T5		    Timer
@@ -1842,6 +2230,12 @@ static int AW2015_create_sysfs(struct i2c_client *client)
     err = device_create_file(dev, &dev_attr_Pink);
     err = device_create_file(dev, &dev_attr_Pink_delay_off);
     err = device_create_file(dev, &dev_attr_Pink_delay_on);
+    err = device_create_file(dev, &dev_attr_Orange);
+    err = device_create_file(dev, &dev_attr_Orange_delay_off);
+    err = device_create_file(dev, &dev_attr_Orange_delay_on);
+    err = device_create_file(dev, &dev_attr_Violet);
+    err = device_create_file(dev, &dev_attr_Violet_delay_off);
+    err = device_create_file(dev, &dev_attr_Violet_delay_on);
 
 	return err;
 }

drivers/misc/mediatek/connectivity/wlan/gen2/common/wlan_lib.c

@@ -4027,6 +4027,8 @@ WLAN_STATUS wlanQueryNicCapability(IN P_ADAPTER_T prAdapter)
 	prAdapter->rVerInfo.u2FwProductID = prEventNicCapability->u2ProductID;
 	prAdapter->rVerInfo.u2FwOwnVersion = prEventNicCapability->u2FwVersion;
 	prAdapter->rVerInfo.u2FwPeerVersion = prEventNicCapability->u2DriverVersion;
+	prAdapter->rVerInfo.u2FwOwnVersionExtend = prEventNicCapability->aucReserved[0];
+
 	prAdapter->fgIsHw5GBandDisabled = (BOOLEAN) prEventNicCapability->ucHw5GBandDisabled;
 	prAdapter->fgIsEepromUsed = (BOOLEAN) prEventNicCapability->ucEepromUsed;
 	prAdapter->fgIsEfuseValid = (BOOLEAN) prEventNicCapability->ucEfuseValid;

drivers/misc/mediatek/connectivity/wlan/gen2/common/wlan_oid.c

@@ -7669,12 +7669,11 @@ wlanoidRftestQueryAutoTest(IN P_ADAPTER_T prAdapter,
 		ASSERT(pvQueryBuffer);
 	ASSERT(pu4QueryInfoLen);
 
-	*pu4QueryInfoLen = sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T);
+	/*pu4QueryInfoLen is depended on upper-layer*/
+	*pu4QueryInfoLen = u4QueryBufferLen;
 
-	if (u4QueryBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T)) {
-		DBGLOG(OID, ERROR, "Invalid data. QueryBufferLen: %u.\n", u4QueryBufferLen);
-		return WLAN_STATUS_INVALID_LENGTH;
-	}
+	if (u4QueryBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T))
+		DBGLOG(OID, WARN, "Invalid data. QueryBufferLen: %u.\n", u4QueryBufferLen);
 
 	prRfATInfo = (P_PARAM_MTK_WIFI_TEST_STRUCT_T) pvQueryBuffer;
 	rStatus = rftestQueryATInfo(prAdapter,
@@ -7715,10 +7714,9 @@ wlanoidRftestSetAutoTest(IN P_ADAPTER_T prAdapter,
 
 	*pu4SetInfoLen = sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T);
 
-	if (u4SetBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T)) {
-		DBGLOG(OID, ERROR, "Invalid data. SetBufferLen: %u.\n", u4SetBufferLen);
-		return WLAN_STATUS_INVALID_LENGTH;
-	}
+	if (u4SetBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T))
+		DBGLOG(OID, WARN, "Invalid data. SetBufferLen: %u.\n", u4SetBufferLen);
+
 
 	prRfATInfo = (P_PARAM_MTK_WIFI_TEST_STRUCT_T) pvSetBuffer;
 	rStatus = rftestSetATInfo(prAdapter, prRfATInfo->u4FuncIndex, prRfATInfo->u4FuncData);
@@ -7804,18 +7802,26 @@ rftestQueryATInfo(IN P_ADAPTER_T prAdapter,
 
 		prTestStatus->rATInfo.u4FuncData =
 		    (prAdapter->rVerInfo.u2FwProductID << 16) | (prAdapter->rVerInfo.u2FwOwnVersion);
-		u4QueryBufferLen = sizeof(EVENT_TEST_STATUS);
+		if (u4QueryBufferLen > 8) {
+			/*support FW version extended*/
+			prTestStatus->rATInfo.u4FuncData2 = prAdapter->rVerInfo.u2FwOwnVersionExtend;
+
+			DBGLOG(OID, INFO, "<wifi> version: 0x%x ,extended : 0x%x\n"
+				, prTestStatus->rATInfo.u4FuncData
+				, prTestStatus->rATInfo.u4FuncData2);
+		} else
+			DBGLOG(OID, INFO, "<wifi> version: 0x%x\n"
+				, prTestStatus->rATInfo.u4FuncData);
 
 		return WLAN_STATUS_SUCCESS;
 	} else if (u4FuncIndex == RF_AT_FUNCID_DRV_INFO) {
 		/* driver implementation */
 		prTestStatus = (P_EVENT_TEST_STATUS) pvQueryBuffer;
-
 		prTestStatus->rATInfo.u4FuncData = CFG_DRV_OWN_VERSION;
-		u4QueryBufferLen = sizeof(EVENT_TEST_STATUS);
 
 		return WLAN_STATUS_SUCCESS;
 	}
+
 	prCmdInfo = cmdBufAllocateCmdInfo(prAdapter, (CMD_HDR_SIZE + sizeof(CMD_TEST_CTRL_T)));
 
 	if (!prCmdInfo) {

drivers/misc/mediatek/connectivity/wlan/gen2/include/nic/adapter.h

@@ -1111,6 +1111,7 @@ typedef struct {
 	UINT_16 u2FwProductID;
 	UINT_16 u2FwOwnVersion;
 	UINT_16 u2FwPeerVersion;
+	UINT_16 u2FwOwnVersionExtend; /*support version extended*/
 
 } WIFI_VER_INFO_T, *P_WIFI_VER_INFO_T;
 

drivers/misc/mediatek/connectivity/wlan/gen2/include/wlan_oid.h

@@ -813,6 +813,7 @@ typedef struct _PARAM_LINUX_NETDEV_STATISTICS_T {
 typedef struct _PARAM_MTK_WIFI_TEST_STRUCT_T {
 	UINT_32 u4FuncIndex;
 	UINT_32 u4FuncData;
+	UINT_32 u4FuncData2; /*FW don't support*/
 } PARAM_MTK_WIFI_TEST_STRUCT_T, *P_PARAM_MTK_WIFI_TEST_STRUCT_T;
 
 /* 802.11 Media stream constraints */

drivers/misc/mediatek/connectivity/wlan/gen2/nic/nic_cmd_event.c

@@ -462,7 +462,9 @@ VOID nicCmdEventQueryRfTestATInfo(IN P_ADAPTER_T prAdapter, IN P_CMD_INFO_T prCm
 		prGlueInfo = prAdapter->prGlueInfo;
 		prQueryBuffer = (P_EVENT_TEST_STATUS) prCmdInfo->pvInformationBuffer;
 
-		kalMemCopy(prQueryBuffer, prTestStatus, sizeof(EVENT_TEST_STATUS));
+		/*Memory copy length is depended on upper-layer*/
+		kalMemCopy(prQueryBuffer, prTestStatus, prCmdInfo->u4InformationBufferLength);
+
 
 		u4QueryInfoLen = sizeof(EVENT_TEST_STATUS);
 

drivers/misc/mediatek/connectivity/wlan/gen2/os/linux/gl_wext_priv.c

@@ -573,7 +573,7 @@ static WLAN_REQ_ENTRY arWlanOidReqTable[] = {
 	,
 	{OID_CUSTOM_MTK_WIFI_TEST,
 	 DISP_STRING("OID_CUSTOM_MTK_WIFI_TEST"),
-	 TRUE, TRUE, ENUM_OID_DRIVER_CORE, sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T),
+	 FALSE, FALSE, ENUM_OID_DRIVER_CORE, sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T),
 	 (PFN_OID_HANDLER_FUNC_REQ) wlanoidRftestQueryAutoTest,
 	 (PFN_OID_HANDLER_FUNC_REQ) wlanoidRftestSetAutoTest}
 	,

drivers/misc/mediatek/connectivity/wlan/gen3/common/wlan_lib.c

@@ -4575,6 +4575,14 @@ WLAN_STATUS wlanQueryNicCapability(IN P_ADAPTER_T prAdapter)
 	prAdapter->rVerInfo.u2FwProductID = prEventNicCapability->u2ProductID;
 	prAdapter->rVerInfo.u2FwOwnVersion = prEventNicCapability->u2FwVersion;
 	prAdapter->rVerInfo.u2FwPeerVersion = prEventNicCapability->u2DriverVersion;
+	/*support FW version extend*/
+
+	prAdapter->rVerInfo.u2FwOwnVersionExtend =
+		(prEventNicCapability->aucReserved0[0] << 24)
+		| (prEventNicCapability->aucReserved0[1] << 16)
+		| (prEventNicCapability->aucReserved0[2] << 8)
+		| (prEventNicCapability->aucReserved0[3]);
+
 	prAdapter->fgIsHw5GBandDisabled = (BOOLEAN) prEventNicCapability->ucHw5GBandDisabled;
 	prAdapter->fgIsEepromUsed = (BOOLEAN) prEventNicCapability->ucEepromUsed;
 	prAdapter->fgIsEmbbededMacAddrValid = (BOOLEAN)

drivers/misc/mediatek/connectivity/wlan/gen3/common/wlan_oid.c

@@ -8366,12 +8366,13 @@ wlanoidRftestQueryAutoTest(IN P_ADAPTER_T prAdapter,
 		ASSERT(pvQueryBuffer);
 	ASSERT(pu4QueryInfoLen);
 
-	*pu4QueryInfoLen = sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T);
+	/*pu4QueryInfoLen is depended on upper-layer*/
+	*pu4QueryInfoLen = u4QueryBufferLen;
+
+
+	if (u4QueryBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T))
+		DBGLOG(OID, WARN, "Invalid data. QueryBufferLen: %ld.\n", u4QueryBufferLen);
 
-	if (u4QueryBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T)) {
-		DBGLOG(OID, ERROR, "Invalid data. QueryBufferLen: %ld.\n", u4QueryBufferLen);
-		return WLAN_STATUS_INVALID_LENGTH;
-	}
 
 	prRfATInfo = (P_PARAM_MTK_WIFI_TEST_STRUCT_T) pvQueryBuffer;
 	rStatus = rftestQueryATInfo(prAdapter,
@@ -8412,10 +8413,9 @@ wlanoidRftestSetAutoTest(IN P_ADAPTER_T prAdapter,
 
 	*pu4SetInfoLen = sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T);
 
-	if (u4SetBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T)) {
-		DBGLOG(OID, ERROR, "Invalid data. SetBufferLen: %u.\n", u4SetBufferLen);
-		return WLAN_STATUS_INVALID_LENGTH;
-	}
+	if (u4SetBufferLen != sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T))
+		DBGLOG(OID, WARN, "Invalid data. SetBufferLen: %u.\n", u4SetBufferLen);
+
 
 	prRfATInfo = (P_PARAM_MTK_WIFI_TEST_STRUCT_T) pvSetBuffer;
 	rStatus = rftestSetATInfo(prAdapter, prRfATInfo->u4FuncIndex, prRfATInfo->u4FuncData);
@@ -8510,14 +8510,25 @@ rftestQueryATInfo(IN P_ADAPTER_T prAdapter,
 
 		prTestStatus->rATInfo.u4FuncData =
 		    (prAdapter->rVerInfo.u2FwProductID << 16) | (prAdapter->rVerInfo.u2FwOwnVersion);
-		u4QueryBufferLen = sizeof(EVENT_TEST_STATUS);
+		prTestStatus->rATInfo.u4FuncData2 = prAdapter->rVerInfo.u2FwOwnVersionExtend;
+
+		if (u4QueryBufferLen > 8) {
+			/*support FW version extended*/
+			prTestStatus->rATInfo.u4FuncData2 = prAdapter->rVerInfo.u2FwOwnVersionExtend;
+
+			DBGLOG(OID, INFO, "<wifi> version: 0x%x ,extended : 0x%x\n"
+				, prTestStatus->rATInfo.u4FuncData
+				, prTestStatus->rATInfo.u4FuncData2);
+		} else
+			DBGLOG(OID, INFO, "<wifi> version: 0x%x\n"
+				, prTestStatus->rATInfo.u4FuncData);
+
 
 	} else if (u4FuncIndex == RF_AT_FUNCID_DRV_INFO) {
 		/* driver implementation */
 		prTestStatus = (P_EVENT_TEST_STATUS) pvQueryBuffer;
 
 		prTestStatus->rATInfo.u4FuncData = CFG_DRV_OWN_VERSION;
-		u4QueryBufferLen = sizeof(EVENT_TEST_STATUS);
 
 	} else if (u4FuncIndex == RF_AT_FUNCID_QUERY_ICAP_DUMP_FILE) {
 		/* driver implementation */

drivers/misc/mediatek/connectivity/wlan/gen3/include/nic/adapter.h

@@ -1410,6 +1410,7 @@ typedef struct {
 	UINT_16 u2FwProductID;
 	UINT_16 u2FwOwnVersion;
 	UINT_16 u2FwPeerVersion;
+	UINT_32 u2FwOwnVersionExtend; /*support version extended*/
 
 } WIFI_VER_INFO_T, *P_WIFI_VER_INFO_T;
 

drivers/misc/mediatek/connectivity/wlan/gen3/include/wlan_oid.h

@@ -868,6 +868,7 @@ typedef struct _PARAM_LINUX_NETDEV_STATISTICS_T {
 typedef struct _PARAM_MTK_WIFI_TEST_STRUCT_T {
 	UINT_32 u4FuncIndex;
 	UINT_32 u4FuncData;
+	UINT_32 u4FuncData2; /*FW don't support*/
 } PARAM_MTK_WIFI_TEST_STRUCT_T, *P_PARAM_MTK_WIFI_TEST_STRUCT_T;
 
 /* 802.11 Media stream constraints */

drivers/misc/mediatek/connectivity/wlan/gen3/nic/nic_cmd_event.c

@@ -581,7 +581,8 @@ VOID nicCmdEventQueryRfTestATInfo(IN P_ADAPTER_T prAdapter, IN P_CMD_INFO_T prCm
 		prGlueInfo = prAdapter->prGlueInfo;
 		prQueryBuffer = (P_EVENT_TEST_STATUS) prCmdInfo->pvInformationBuffer;
 
-		kalMemCopy(prQueryBuffer, prTestStatus, sizeof(EVENT_TEST_STATUS));
+		/*Memory copy length is depended on upper-layer*/
+		kalMemCopy(prQueryBuffer, prTestStatus, prCmdInfo->u4InformationBufferLength);
 
 		u4QueryInfoLen = sizeof(EVENT_TEST_STATUS);
 

drivers/misc/mediatek/connectivity/wlan/gen3/os/linux/gl_wext_priv.c

@@ -525,7 +525,7 @@ static WLAN_REQ_ENTRY arWlanOidReqTable[] = {
 	,
 	{OID_CUSTOM_MTK_WIFI_TEST,
 	 DISP_STRING("OID_CUSTOM_MTK_WIFI_TEST"),
-	 TRUE, TRUE, ENUM_OID_DRIVER_CORE, sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T),
+	 FALSE, FALSE, ENUM_OID_DRIVER_CORE, sizeof(PARAM_MTK_WIFI_TEST_STRUCT_T),
 	 (PFN_OID_HANDLER_FUNC_REQ) wlanoidRftestQueryAutoTest,
 	 (PFN_OID_HANDLER_FUNC_REQ) wlanoidRftestSetAutoTest}
 	,

drivers/misc/mediatek/ext_disp/mt6735/external_display.c

@@ -41,7 +41,7 @@
 int ext_disp_use_cmdq;
 int ext_disp_use_m4u;
 enum EXT_DISP_PATH_MODE ext_disp_mode;
-
+extern bool is_hdmi_active(void);/*Change by xmwuwh@20170120 for mantis 0058685 */
 static int is_context_inited;
 static int init_roi;
 
@@ -1058,7 +1058,8 @@ int ext_disp_config_input_multiple(disp_session_input_config *input, int idx, un
 
 	disp_ddp_path_config *data_config;
 
-	if (pgc->state != EXTD_INIT && pgc->state != EXTD_RESUME && pgc->suspend_config != 1) {
+    /*Change by xmwuwh@20170120 for mantis 0058685 */
+	if (pgc->state != EXTD_INIT && pgc->state != EXTD_RESUME && pgc->suspend_config != 1 && !is_hdmi_active()) {
 		EXT_DISP_LOG("config ext disp is already slept, state:%d\n", pgc->state);
 		MMProfileLogEx(ddp_mmp_get_events()->Extd_ErrorInfo, MMProfileFlagPulse, Config, idx);
 		return -2;

drivers/misc/mediatek/hdmi/mt8193/hdmi_drv.c

@@ -927,6 +927,8 @@ static void vPlugDetectService(HDMI_CTRL_STATE_T e_state)
 
 void hdmi_timer_impl(void)
 {
+    
+    msleep(500);/*Change by xmwuwh@20170120 for mantis 0058685 */
 	if (mt8193_hdmiinit == 0) {
 		mt8193_hdmiinit = 1;
 		/* mt8193_power_off(); */

drivers/misc/mediatek/video/mt6735/videox/mtk_disp_mgr.c

@@ -76,6 +76,11 @@
 /* extern struct semaphore dal_sem; */
 /* extern int isAEEEnabled; */
 #define DISP_DISABLE_X_CHANNEL_ALPHA
+/*Change by xmwuwh@20170120 for mantis 0058685 */
+extern bool is_hdmi_active(void);
+extern int primary_display_wait_for_vsync(void *config);
+extern int ext_disp_wait_for_vsync(void *config, unsigned int session);
+/*Change by xmwuwh@20170120 for mantis 0058685 */
 
 /* TODO: revise this later @xuecheng */
 #include "mtkfb_fence.h"
@@ -1806,7 +1811,8 @@ int _ioctl_wait_vsync(unsigned long arg)
 	if (session_info)
 		dprec_start(&session_info->event_waitvsync, 0, 0);
 
-#ifdef CONFIG_SINGLE_PANEL_OUTPUT
+/*Change by xmwuwh@20170120 for mantis 0058685 */
+#if  1 //def CONFIG_SINGLE_PANEL_OUTPUT
 	if (primary_display_is_sleepd() && is_hdmi_active()) {
 			ret = ext_disp_wait_for_vsync(&vsync_config, vsync_config.session_id);
 			if (ret <= 0)