Aquaris-M10-4G/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt

Xilinx AXI VDMA engine, it does transfers between memory and video devices.
It can be configured to have one channel or two channels. If configured
as two channels, one is to transmit to the video device and another is
to receive from the video device.

Required properties:
- compatible: Should be "xlnx,axi-vdma-1.00.a"
- #dma-cells: Should be <1>, see "dmas" property below
- reg: Should contain VDMA registers location and length.
- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
- dma-channel child node: Should have at least one channel and can have up to
	two channels per device. This node specifies the properties of each
	DMA channel (see child node properties below).

Optional properties:
- xlnx,include-sg: Tells configured for Scatter-mode in
	the hardware.
- xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
	It takes following values:
	{1}, flush both channels
	{2}, flush mm2s channel
	{3}, flush s2mm channel

Required child node properties:
- compatible: It should be either "xlnx,axi-vdma-mm2s-channel" or
	"xlnx,axi-vdma-s2mm-channel".
- interrupts: Should contain per channel VDMA interrupts.
- xlnx,data-width: Should contain the stream data width, take values
	{32,64...1024}.

Optional child node properties:
- xlnx,include-dre: Tells hardware is configured for Data
	Realignment Engine.
- xlnx,genlock-mode: Tells Genlock synchronization is
	enabled/disabled in hardware.

Example:
++++++++

axi_vdma_0: axivdma@40030000 {
	compatible = "xlnx,axi-vdma-1.00.a";
	#dma_cells = <1>;
	reg = < 0x40030000 0x10000 >;
	xlnx,num-fstores = <0x8>;
	xlnx,flush-fsync = <0x1>;
	dma-channel@40030000 {
		compatible = "xlnx,axi-vdma-mm2s-channel";
		interrupts = < 0 54 4 >;
		xlnx,datawidth = <0x40>;
	} ;
	dma-channel@40030030 {
		compatible = "xlnx,axi-vdma-s2mm-channel";
		interrupts = < 0 53 4 >;
		xlnx,datawidth = <0x40>;
	} ;
} ;


* DMA client

Required properties:
- dmas: a list of <[Video DMA device phandle] [Channel ID]> pairs,
	where Channel ID is '0' for write/tx and '1' for read/rx
	channel.
- dma-names: a list of DMA channel names, one per "dmas" entry

Example:
++++++++

vdmatest_0: vdmatest@0 {
	compatible ="xlnx,axi-vdma-test-1.00.a";
	dmas = <&axi_vdma_0 0
		&axi_vdma_0 1>;
	dma-names = "vdma0", "vdma1";
} ;